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| author | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
|---|---|---|
| committer | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
| commit | 268a53de823a6750d6256ee1fb1e7707b4b45740 (patch) | |
| tree | 42c1799a9a82b2f7d9790ee9fe181d72a7274751 /sim/ucsim/stm8.src/test/ss.c | |
| download | sdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz | |
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'sim/ucsim/stm8.src/test/ss.c')
| -rw-r--r-- | sim/ucsim/stm8.src/test/ss.c | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/sim/ucsim/stm8.src/test/ss.c b/sim/ucsim/stm8.src/test/ss.c new file mode 100644 index 0000000..253b55b --- /dev/null +++ b/sim/ucsim/stm8.src/test/ss.c @@ -0,0 +1,46 @@ +// Source code under CC0 1.0 +#include <stdint.h> +#include <stdio.h> + +#define CLK_DIVR (*(volatile uint8_t *)0x50c6) +#define CLK_PCKENR1 (*(volatile uint8_t *)0x50c7) + +#define UART2_SR (*(volatile uint8_t *)0x5240) +#define UART2_DR (*(volatile uint8_t *)0x5241) +#define UART2_BRR1 (*(volatile uint8_t *)0x5242) +#define UART2_BRR2 (*(volatile uint8_t *)0x5243) +#define UART2_CR2 (*(volatile uint8_t *)0x5245) +#define UART2_CR3 (*(volatile uint8_t *)0x5246) + +#define UART_CR2_TEN (1 << 3) +#define UART_CR3_STOP2 (1 << 5) +#define UART_CR3_STOP1 (1 << 4) +#define UART_SR_TXE (1 << 7) + +int putchar(int c) +{ + while(!(UART2_SR & UART_SR_TXE)); + + UART2_DR = c; + return c; +} + +void main(void) +{ + unsigned long i = 0; + int a= 0; + + CLK_DIVR = 0x00; // Set the frequency to 16 MHz + CLK_PCKENR1 = 0xFF; // Enable peripherals + + UART2_CR2 = UART_CR2_TEN; // Allow TX and RX + UART2_CR3 &= ~(UART_CR3_STOP1 | UART_CR3_STOP2); // 1 stop bit + UART2_BRR2 = 0x03; UART2_BRR1 = 0x68; // 9600 baud + + for(;;) + { + printf("Hello World %d %x!\n", a, a); + for(i = 0; i < 147456; i++); // Sleep + a++; + } +} |
