diff options
| author | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
|---|---|---|
| committer | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
| commit | 268a53de823a6750d6256ee1fb1e7707b4b45740 (patch) | |
| tree | 42c1799a9a82b2f7d9790ee9fe181d72a7274751 /sim/ucsim/stm8.src/test/lled.c | |
| download | sdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz | |
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'sim/ucsim/stm8.src/test/lled.c')
| -rw-r--r-- | sim/ucsim/stm8.src/test/lled.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/sim/ucsim/stm8.src/test/lled.c b/sim/ucsim/stm8.src/test/lled.c new file mode 100644 index 0000000..dd1cd08 --- /dev/null +++ b/sim/ucsim/stm8.src/test/lled.c @@ -0,0 +1,47 @@ +// Source code under CC0 1.0 +#include <stdint.h> + +#include "stm8.h" + +#define PC GPIOC +#define PE GPIOE + +unsigned int clock(void) +{ + unsigned char h, l; + h = TIM1->cntrh; + l = TIM1->cntrl; + return((unsigned int)(h) << 8 | l); +} + +void main(void) +{ + CLK->ckdivr = 0x00; // Set the frequency to 16 MHz + CLK->pckenr2 |= 0x02; // Enable clock to timer + + // Configure timer + // 1000 ticks per second + TIM1->pscrh = 0x3e; + TIM1->pscrl = 0x80; + // Enable timer + TIM1->cr1 = TIM_CR1_CEN; + + // Configure pins + PE->ddr = 0x80; + PE->cr1 = 0x80; + + PC->ddr = 0x80; + PC->cr1 = 0x80; + + for(;;) + { + if (clock() % 1000 <= 500) + PE->odr |= 0x80; + else + PE->odr &= 0x7f; + if (clock() % 2000 <= 1000) + PC->odr |= 0x80; + else + PC->odr &= 0x7f; + } +} |
