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-rw-r--r--support/regression/ports/stm8/spec.mk73
-rw-r--r--support/regression/ports/stm8/support.c22
-rw-r--r--support/regression/ports/stm8/uCsim.cmd7
3 files changed, 102 insertions, 0 deletions
diff --git a/support/regression/ports/stm8/spec.mk b/support/regression/ports/stm8/spec.mk
new file mode 100644
index 0000000..0dfb75d
--- /dev/null
+++ b/support/regression/ports/stm8/spec.mk
@@ -0,0 +1,73 @@
+# Regression test specification for the stm8 target running with uCsim
+
+# simulation timeout in seconds
+SIM_TIMEOUT = 30
+
+# path to uCsim
+ifdef SDCC_BIN_PATH
+ UCSTM8C = $(SDCC_BIN_PATH)/sstm8$(EXEEXT)
+
+ AS_STM8C = $(SDCC_BIN_PATH)/sdasstm8$(EXEEXT)
+else
+ ifdef UCSIM_DIR
+ UCSTM8A = $(UCSIM_DIR)/stm8.src/sstm8$(EXEEXT)
+ else
+ UCSTM8A = $(top_builddir)/sim/ucsim/stm8.src/sstm8$(EXEEXT)
+ UCSTM8B = $(top_builddir)/bin/sstm8$(EXEEXT)
+ endif
+
+ EMU = $(WINE) $(shell if [ -f $(UCSTM8A) ]; then echo $(UCSTM8A); else echo $(UCSTM8B); fi)
+
+ AS = $(WINE) $(top_builddir)/bin/sdasstm8$(EXEEXT)
+
+ifndef CROSSCOMPILING
+ SDCCFLAGS += --nostdinc -I$(top_srcdir)
+ LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/stm8
+endif
+endif
+
+ifdef CROSSCOMPILING
+ SDCCFLAGS += -I$(top_srcdir)
+endif
+
+SDCCFLAGS += -mstm8 --less-pedantic --out-fmt-ihx
+LINKFLAGS += stm8.lib
+
+OBJEXT = .rel
+BINEXT = .ihx
+
+# otherwise `make` deletes testfwk.rel and `make -j` will fail
+.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT)
+
+# Required extras
+EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT)
+include $(srcdir)/fwk/lib/spec.mk
+
+# Rule to link into .ihx
+%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib
+ $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@
+
+%$(OBJEXT): %.asm
+ $(AS) -plosgff $<
+
+%$(OBJEXT): %.c
+ $(SDCC) $(SDCCFLAGS) -c $< -o $@
+
+$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c
+ $(SDCC) $(SDCCFLAGS) -c $< -o $@
+
+$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c
+ $(SDCC) $(SDCCFLAGS) -c $< -o $@
+
+$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib
+ cat < $(srcdir)/fwk/lib/fwk.lib > $@
+
+# run simulator with SIM_TIMEOUT seconds timeout
+%.out: %$(BINEXT) $(CASES_DIR)/timeout
+ mkdir -p $(dir $@)
+ -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \
+ || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@
+ $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@
+ -grep -n FAIL $@ /dev/null || true
+
+_clean:
diff --git a/support/regression/ports/stm8/support.c b/support/regression/ports/stm8/support.c
new file mode 100644
index 0000000..8614f74
--- /dev/null
+++ b/support/regression/ports/stm8/support.c
@@ -0,0 +1,22 @@
+void
+_putchar(unsigned char c)
+{
+ c;
+ __asm
+ ld a, (0x03, sp)
+ .db 0x71, 0xed
+ __endasm;
+}
+
+void
+_initEmu(void)
+{
+}
+
+void
+_exitEmu(void)
+{
+ __asm
+ .db 0x71, 0xec
+ __endasm;
+}
diff --git a/support/regression/ports/stm8/uCsim.cmd b/support/regression/ports/stm8/uCsim.cmd
new file mode 100644
index 0000000..fb936cc
--- /dev/null
+++ b/support/regression/ports/stm8/uCsim.cmd
@@ -0,0 +1,7 @@
+set error non-classified off
+set error unknown_code off
+set error memory off
+set error stack off
+run
+state
+quit