diff options
Diffstat (limited to 'support/regression/ports')
70 files changed, 2305 insertions, 0 deletions
diff --git a/support/regression/ports/ds390/spec.mk b/support/regression/ports/ds390/spec.mk new file mode 100644 index 0000000..3429910 --- /dev/null +++ b/support/regression/ports/ds390/spec.mk @@ -0,0 +1,75 @@ +# Regression test specification for the ds390 target running with uCsim + +.PRECIOUS: %.c + +CC_FOR_BUILD = $(CC) + +# simulation timeout in seconds +SIM_TIMEOUT = 240 + +# path to uCsim +ifdef SDCC_BIN_PATH + S51 = $(SDCC_BIN_PATH)/s51$(EXEEXT) +else + ifdef UCSIM_DIR + S51A = $(UCSIM_DIR)/s51.src/s51$(EXEEXT) + else + S51A = $(top_builddir)/sim/ucsim/s51.src/s51$(EXEEXT) + S51B = $(top_builddir)/bin/s51$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(S51A) ]; then echo $(S51A); else echo $(S51B); fi) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/ds390 +endif +endif + +ifdef CROSSCOMPILING + DEV_NULL ?= NUL + SDCCFLAGS += -I$(top_srcdir) +else + DEV_NULL ?= /dev/null +endif + +SDCCFLAGS += -mds390 --less-pedantic -Wl-r +LINKFLAGS += libsdcc.lib liblong.lib liblonglong.lib libint.lib libfloat.lib +LINKFLAGS += libds390.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) -tds390 -S in=$(DEV_NULL),out=$@ $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $(@:.out=.sim) \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $(@:.out=.sim) >> $@ + -grep -n FAIL $@ /dev/null || true + + +_clean: diff --git a/support/regression/ports/ds390/support.c b/support/regression/ports/ds390/support.c new file mode 100644 index 0000000..190b3d4 --- /dev/null +++ b/support/regression/ports/ds390/support.c @@ -0,0 +1,44 @@ +/*------------------------------------------------------------------------- + support.c - startup for regression tests with uCsim + + Copied from tinibios.c, which was written By - Johan Knol, johan.knol@iduna.nl + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#include <tinibios.h> + +void +_putchar (char c) +{ + Serial0PutChar (c); +} + +void +_initEmu (void) +{ +} + +void +_exitEmu (void) +{ + Serial0PutChar (' '); /* wait for the last character to be transmitted */ + /* before hitting the breakpoint */ + * (char __idata *) 0 = * (char __xdata *) 0x7654; +} diff --git a/support/regression/ports/ds390/uCsim.cmd b/support/regression/ports/ds390/uCsim.cmd new file mode 100644 index 0000000..cd2b168 --- /dev/null +++ b/support/regression/ports/ds390/uCsim.cmd @@ -0,0 +1,8 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +break xram r 0x7654 +run +state +quit diff --git a/support/regression/ports/ez80-z80/spec.mk b/support/regression/ports/ez80-z80/spec.mk new file mode 100644 index 0000000..4650ff4 --- /dev/null +++ b/support/regression/ports/ez80-z80/spec.mk @@ -0,0 +1,76 @@ +# Regression test specification for the ez80_z80 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasz80$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasz80$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/ez80_z80 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mez80_z80 --less-pedantic --profile +LINKFLAGS += ez80_z80.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) -tez80 $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/ez80-z80/support.asm b/support/regression/ports/ez80-z80/support.asm new file mode 100644 index 0000000..6ca9773 --- /dev/null +++ b/support/regression/ports/ez80-z80/support.asm @@ -0,0 +1,16 @@ + .area _CODE + .globl _exit + +__putchar:: + ld hl, #2 + add hl, sp + ld l, (hl) + ld a, #1 + rst 0x08 + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ez80-z80/uCsim.cmd b/support/regression/ports/ez80-z80/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ez80-z80/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/hc08/spec.mk b/support/regression/ports/hc08/spec.mk new file mode 100644 index 0000000..22779ea --- /dev/null +++ b/support/regression/ports/hc08/spec.mk @@ -0,0 +1,73 @@ +# Regression test specification for the hc08 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCHC08C = $(SDCC_BIN_PATH)/shc08$(EXEEXT) + + AS_HC08C = $(SDCC_BIN_PATH)/sdas6808$(EXEEXT) +else + ifdef UCSIM_DIR + UCHC08A = $(UCSIM_DIR)/hc08.src/shc08$(EXEEXT) + else + UCHC08A = $(top_builddir)/sim/ucsim/hc08.src/shc08$(EXEEXT) + UCHC08B = $(top_builddir)/bin/shc08$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCHC08A) ]; then echo $(UCHC08A); else echo $(UCHC08B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdas6808$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/hc08 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mhc08 --less-pedantic --out-fmt-ihx +LINKFLAGS += hc08.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/hc08/support.c b/support/regression/ports/hc08/support.c new file mode 100644 index 0000000..f9f1ab5 --- /dev/null +++ b/support/regression/ports/hc08/support.c @@ -0,0 +1,22 @@ + +void +_putchar(unsigned char c) +{ + c; + __asm + .db 0x9e, 0xed + __endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + __asm + .db 0x9e, 0xec + __endasm; +} diff --git a/support/regression/ports/hc08/uCsim.cmd b/support/regression/ports/hc08/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/hc08/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/host/spec.mk b/support/regression/ports/host/spec.mk new file mode 100644 index 0000000..650af25 --- /dev/null +++ b/support/regression/ports/host/spec.mk @@ -0,0 +1,38 @@ +# Port specification for compiling on the host machines version of gcc +SDCC = gcc +SDCCFLAGS = -pipe -ggdb -g -O2 --std=c99 $(CPPFLAGS) -DPORT_HOST=1 -DREENTRANT= -I$(top_builddir) -I$(top_srcdir) +SDLDFLAGS = +# disable all warnings: +SDCCFLAGS+= -w +# enable all warnings: +#SDCCFLAGS+= -Wall -Wno-parentheses + +BINEXT = .bin +OBJEXT = .o +INC_DIR = . + +# otherwise `make` deletes testfwk.o and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +%.out: %$(BINEXT) + mkdir -p $(dir $@) + -$< > $@ + -grep -n FAIL $@ /dev/null || true + +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) + $(SDCC) $(SDCCFLAGS) $(SDLDFLAGS) -o $@ $< $(EXTRAS) $(FWKLIB) -lm + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +_clean: diff --git a/support/regression/ports/host/spec.mk.in b/support/regression/ports/host/spec.mk.in new file mode 100644 index 0000000..41ec8a0 --- /dev/null +++ b/support/regression/ports/host/spec.mk.in @@ -0,0 +1,38 @@ +# Port specification for compiling on the host machines version of gcc +SDCC = @CC@ +SDCCFLAGS = @CFLAGS@ @C99_FLAG@ $(CPPFLAGS) -DPORT_HOST=1 -DREENTRANT= -I$(top_builddir) -I$(top_srcdir) +SDLDFLAGS = @LDFLAGS@ +# disable all warnings: +SDCCFLAGS+= -w +# enable all warnings: +#SDCCFLAGS+= @WALL_FLAG@ + +BINEXT = .bin +OBJEXT = .o +INC_DIR = . + +# otherwise `make` deletes testfwk.o and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +%.out: %$(BINEXT) + mkdir -p $(dir $@) + -$< > $@ + -grep -n FAIL $@ /dev/null || true + +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) + $(SDCC) $(SDCCFLAGS) $(SDLDFLAGS) -o $@ $< $(EXTRAS) $(FWKLIB) -lm + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +_clean: diff --git a/support/regression/ports/host/support.c b/support/regression/ports/host/support.c new file mode 100644 index 0000000..3921b47 --- /dev/null +++ b/support/regression/ports/host/support.c @@ -0,0 +1,21 @@ +/** Host specific support routines. + */ +#include <stdio.h> +#include <stdlib.h> + +void +_putchar(char c) +{ + putchar(c); +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + exit(0); +} diff --git a/support/regression/ports/mcs51-common/T2_isr.c b/support/regression/ports/mcs51-common/T2_isr.c new file mode 100644 index 0000000..cdac442 --- /dev/null +++ b/support/regression/ports/mcs51-common/T2_isr.c @@ -0,0 +1,7 @@ +//dummy interrupt service routine +//just to make linker happy + +void +T2_isr (void) __interrupt 5 +{ +} diff --git a/support/regression/ports/mcs51-common/fwk.lib b/support/regression/ports/mcs51-common/fwk.lib new file mode 100644 index 0000000..c6898f8 --- /dev/null +++ b/support/regression/ports/mcs51-common/fwk.lib @@ -0,0 +1 @@ +T2_isr.rel diff --git a/support/regression/ports/mcs51-common/spec.mk b/support/regression/ports/mcs51-common/spec.mk new file mode 100644 index 0000000..2d034d9 --- /dev/null +++ b/support/regression/ports/mcs51-common/spec.mk @@ -0,0 +1,71 @@ +# Common regression test specification for the mcs51 targets running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 80 + +# path to uCsim +ifdef SDCC_BIN_PATH + S51 = $(SDCC_BIN_PATH)/s51$(EXEEXT) +else + ifdef UCSIM_DIR + S51A = $(UCSIM_DIR)/s51.src/s51$(EXEEXT) + else + S51A = $(top_builddir)/sim/ucsim/s51.src/s51$(EXEEXT) + S51B = $(top_builddir)/bin/s51$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(S51A) ]; then echo $(S51A); else echo $(S51B); fi) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(INC_DIR)/mcs51 -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(LIBDIR) +endif +endif + +ifdef CROSSCOMPILING + DEV_NULL ?= NUL + SDCCFLAGS += -I$(top_srcdir) +else + DEV_NULL ?= /dev/null +endif + +SDCCFLAGS += --less-pedantic +LINKFLAGS += mcs51.lib libsdcc.lib liblong.lib libint.lib libfloat.lib liblonglong.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk +FWKLIB += $(PORT_CASES_DIR)/T2_isr$(OBJEXT) + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/mcs51-common/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib $(PORTS_DIR)/mcs51-common/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + cat < $(PORTS_DIR)/mcs51-common/fwk.lib >> $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) -t32 -S in=$(DEV_NULL),out=$@ $< < $(PORTS_DIR)/mcs51-common/uCsim.cmd > $(@:.out=.sim) \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $(@:.out=.sim) >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/mcs51-common/support.c b/support/regression/ports/mcs51-common/support.c new file mode 100644 index 0000000..52a9bc9 --- /dev/null +++ b/support/regression/ports/mcs51-common/support.c @@ -0,0 +1,36 @@ +// #define MICROCONTROLLER_8051 +#include <mcs51reg.h> + +/* assume P1 for bankswitching address lines */ +__sfr __at(0x90) PSBANK; + +unsigned char +_sdcc_external_startup (void) __nonbanked +{ + /* serial port mode 0 is default */ + /* enable transmission of first byte */ + TI = 1; + return 0; +} + +void +_putchar (char c) +{ + while (!TI) + ; + TI = 0; + SBUF = c; +} + +void +_initEmu (void) +{ +} + +void +_exitEmu (void) +{ + while (!TI) /* wait for the last character to be transmitted */ + ; /* before hitting the breakpoint */ + * (char __idata *) 0 = * (char __xdata *) 0x7654; +} diff --git a/support/regression/ports/mcs51-common/uCsim.cmd b/support/regression/ports/mcs51-common/uCsim.cmd new file mode 100644 index 0000000..cd2b168 --- /dev/null +++ b/support/regression/ports/mcs51-common/uCsim.cmd @@ -0,0 +1,8 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +break xram r 0x7654 +run +state +quit diff --git a/support/regression/ports/mcs51-huge/spec.mk b/support/regression/ports/mcs51-huge/spec.mk new file mode 100644 index 0000000..3bce5b6 --- /dev/null +++ b/support/regression/ports/mcs51-huge/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-huge target running with uCsim +# +# model huge + +SDCCFLAGS += --model-huge + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/huge diff --git a/support/regression/ports/mcs51-large-stack-auto/spec.mk b/support/regression/ports/mcs51-large-stack-auto/spec.mk new file mode 100644 index 0000000..1f02733 --- /dev/null +++ b/support/regression/ports/mcs51-large-stack-auto/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-large-stack-auto target running with uCsim +# +# model large stack-auto + +SDCCFLAGS +=--model-large --stack-auto + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/large-stack-auto diff --git a/support/regression/ports/mcs51-large/spec.mk b/support/regression/ports/mcs51-large/spec.mk new file mode 100644 index 0000000..de4a71b --- /dev/null +++ b/support/regression/ports/mcs51-large/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-large target running with uCsim +# +# model large + +SDCCFLAGS +=--model-large + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/large diff --git a/support/regression/ports/mcs51-medium/spec.mk b/support/regression/ports/mcs51-medium/spec.mk new file mode 100644 index 0000000..ca8e875 --- /dev/null +++ b/support/regression/ports/mcs51-medium/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-medium target running with uCsim +# +# model medium + +SDCCFLAGS +=--model-medium + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/medium diff --git a/support/regression/ports/mcs51-small/spec.mk b/support/regression/ports/mcs51-small/spec.mk new file mode 100644 index 0000000..f685a9a --- /dev/null +++ b/support/regression/ports/mcs51-small/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51 target running with uCsim +# +# model small + +SDCCFLAGS +=--model-small + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/small diff --git a/support/regression/ports/mcs51-stack-auto/spec.mk b/support/regression/ports/mcs51-stack-auto/spec.mk new file mode 100644 index 0000000..12d7a41 --- /dev/null +++ b/support/regression/ports/mcs51-stack-auto/spec.mk @@ -0,0 +1,9 @@ +# Regression test specification for the mcs51-stack-auto target running with uCsim +# +# model small stack-auto + +SDCCFLAGS +=--stack-auto + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/small-stack-auto diff --git a/support/regression/ports/mcs51-xstack-auto/spec.mk b/support/regression/ports/mcs51-xstack-auto/spec.mk new file mode 100644 index 0000000..1e64a63 --- /dev/null +++ b/support/regression/ports/mcs51-xstack-auto/spec.mk @@ -0,0 +1,16 @@ +# Regression test specification for the mcs51-xstack-auto target running with uCsim +# +# model small xstack-auto + +LIBSDCCFLAGS+= --stack-auto --xstack +SDCCFLAGS += --stack-auto --xstack + +include $(PORTS_DIR)/mcs51-common/spec.mk + +LIBDIR = $(top_builddir)/device/lib/build/small-xstack-auto + +MAKE_LIBRARY = lib-files + +.PHONY: lib-files +lib-files: + $(MAKE) -C $(top_builddir)/device/lib model-mcs51-xstack-auto MODELS=small diff --git a/support/regression/ports/pdk14/spec.mk b/support/regression/ports/pdk14/spec.mk new file mode 100644 index 0000000..5ad1310 --- /dev/null +++ b/support/regression/ports/pdk14/spec.mk @@ -0,0 +1,73 @@ +# Regression test specification for the pdk14 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 30 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCPDK14C = $(SDCC_BIN_PATH)/spdk$(EXEEXT) + + AS_PDK14C = $(SDCC_BIN_PATH)/sdaspdk$(EXEEXT) +else + ifdef UCSIM_DIR + UCPDK14A = $(UCSIM_DIR)/pdk.src/spdk$(EXEEXT) + else + UCPDK14A = $(top_builddir)/sim/ucsim/pdk.src/spdk$(EXEEXT) + UCPDK14B = $(top_builddir)/bin/spdk$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCPDK14A) ]; then echo $(UCPDK14A); else echo $(UCPDK14B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdaspdk$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/pdk14 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mpdk14 --less-pedantic --out-fmt-ihx +LINKFLAGS += pdk14.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/pdk14/support.c b/support/regression/ports/pdk14/support.c new file mode 100644 index 0000000..83221f5 --- /dev/null +++ b/support/regression/ports/pdk14/support.c @@ -0,0 +1,22 @@ +void +_putchar(unsigned char c) +{ + c; + __asm + mov a, __putchar_PARM_1+0 + .db 0x00, 0xff + __endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + __asm + stopsys + __endasm; +} diff --git a/support/regression/ports/pdk14/uCsim.cmd b/support/regression/ports/pdk14/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/pdk14/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/pdk15/spec.mk b/support/regression/ports/pdk15/spec.mk new file mode 100644 index 0000000..367a02f --- /dev/null +++ b/support/regression/ports/pdk15/spec.mk @@ -0,0 +1,73 @@ +# Regression test specification for the pdk14 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 30 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCPDK15C = $(SDCC_BIN_PATH)/spdk$(EXEEXT) + + AS_PDK15C = $(SDCC_BIN_PATH)/sdaspdk$(EXEEXT) +else + ifdef UCSIM_DIR + UCPDK15A = $(UCSIM_DIR)/pdk.src/spdk$(EXEEXT) + else + UCPDK15A = $(top_builddir)/sim/ucsim/pdk.src/spdk$(EXEEXT) + UCPDK15B = $(top_builddir)/bin/spdk$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCPDK15A) ]; then echo $(UCPDK15A); else echo $(UCPDK15B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdaspdk$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/pdk15 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mpdk15 --less-pedantic --out-fmt-ihx +LINKFLAGS += pdk15.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) -tPDK15 $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/pdk15/support.c b/support/regression/ports/pdk15/support.c new file mode 100644 index 0000000..83221f5 --- /dev/null +++ b/support/regression/ports/pdk15/support.c @@ -0,0 +1,22 @@ +void +_putchar(unsigned char c) +{ + c; + __asm + mov a, __putchar_PARM_1+0 + .db 0x00, 0xff + __endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + __asm + stopsys + __endasm; +} diff --git a/support/regression/ports/pdk15/uCsim.cmd b/support/regression/ports/pdk15/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/pdk15/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/pic14/gpsim.cmd b/support/regression/ports/pic14/gpsim.cmd new file mode 100644 index 0000000..58afc78 --- /dev/null +++ b/support/regression/ports/pic14/gpsim.cmd @@ -0,0 +1,2 @@ +run +quit diff --git a/support/regression/ports/pic14/spec.mk b/support/regression/ports/pic14/spec.mk new file mode 100644 index 0000000..a3dcc05 --- /dev/null +++ b/support/regression/ports/pic14/spec.mk @@ -0,0 +1,60 @@ +# Regression test specification for the pic14 target running with gpsim + +# simulation timeout in seconds +SIM_TIMEOUT = 25 + +# path to gpsim +ifdef GPSIM_PATH + GPSIM := $(WINE) $(GPSIM_PATH)/gpsim$(EXEEXT) +else + GPSIM := $(WINE) gpsim$(EXEEXT) +endif + +ifndef SDCC_BIN_PATH + ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir)/device/include/pic14 -I$(top_srcdir)/device/non-free/include/pic14 -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/pic14 -L$(top_builddir)/device/non-free/lib/build/pic14 + else + SDCCFLAGS += --use-non-free + endif +else + SDCCFLAGS += --use-non-free +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mpic14 -pp16f877 --less-pedantic -Wl,-q +SDCCFLAGS += --no-warn-non-free +LINKFLAGS += libsdcc.lib libm.lib + +OBJEXT = .o +BINEXT = .cod + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) + -$(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +.PRECIOUS: gen/pic14/testfwk.o gen/pic14/support.o + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(GPSIM) -i -s $< -c $(PORTS_DIR)/pic14/gpsim.cmd > $@ || \ + echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/pic14/support.c b/support/regression/ports/pic14/support.c new file mode 100644 index 0000000..2370a61 --- /dev/null +++ b/support/regression/ports/pic14/support.c @@ -0,0 +1,106 @@ +/*------------------------------------------------------------------------- + support.c - startup for PIC14 regression tests with gpsim + + Copyright (c) 2006-2010 Borut Razem + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#pragma preproc_asm - + +#include <pic16f877.h> + +static unsigned int __at(0x2007) _config = _WDT_OFF; + +void +_putchar(char c) +{ + while (!TXIF) + ; + TXREG = c; + /* wait until the transmit buffer is empty */ + while (!TRMT) + ; +} + + +void +_initEmu(void) +{ + /* load and configure the libgpsim_modules module */ + __asm + ;; Set frequency to 20MHz + .direct "e", ".frequency=20e6" + + ;; Load the USART library and module + .direct "e", "module library libgpsim_modules" + .direct "e", "module load usart U1" + + ;; Define a node + .direct "e", "node PIC_tx" + + ;; Tie the USART module to the PIC + .direct "e", "attach PIC_tx portc6 U1.RXPIN" + + ;; Set the USART module's Baud Rate + .direct "e", "U1.rxbaud = 9600" + + ;; Display the received character on terminal + .direct "e", "U1.console = true" + __endasm; + + /* USART initialization */ + PORTC |= 0x40; // Set TX pin to 1 + TRISC &= ~0x40; // TX pin is output + + //1. Initialize the SPBRG register for the appropriate + // baud rate. If a high speed baud rate is desired, + // set bit BRGH (Section 16.1). + BRGH = 1; + SPBRG = 129; + + //2. Enable the asynchronous serial port by clearing + // bit SYNC and setting bit SPEN. + CREN = 1; + SPEN = 1; + + //3. If interrupts are desired, set enable bit TXIE. + //4. If 9-bit transmission is desired, set transmit bit + // TX9. Can be used as address/data bit. + //5. Enable the transmission by setting bit TXEN, + // which will also set bit TXIF. + TXEN = 1; + + //6. If 9-bit transmission is selected, the ninth bit + // should be loaded in bit TX9D. + //7. Load data to the TXREG register (starts + // transmission). +} + + +void +_exitEmu(void) +{ + /* set the breakpoint */ + __asm + .direct "a", "\"PASSED\"" + goto $ + __endasm; +} + diff --git a/support/regression/ports/pic16/gpsim.cmd b/support/regression/ports/pic16/gpsim.cmd new file mode 100644 index 0000000..58afc78 --- /dev/null +++ b/support/regression/ports/pic16/gpsim.cmd @@ -0,0 +1,2 @@ +run +quit diff --git a/support/regression/ports/pic16/spec.mk b/support/regression/ports/pic16/spec.mk new file mode 100644 index 0000000..1f94cde --- /dev/null +++ b/support/regression/ports/pic16/spec.mk @@ -0,0 +1,61 @@ +# Regression test specification for the pic16 target running with gpsim + +# simulation timeout in seconds +SIM_TIMEOUT = 25 + +# path to gpsim +ifdef GPSIM_PATH + GPSIM := $(WINE) $(GPSIM_PATH)/gpsim$(EXEEXT) +else + GPSIM := $(WINE) gpsim$(EXEEXT) +endif + +ifndef SDCC_BIN_PATH + ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir)/device/include/pic16 -I$(top_srcdir)/device/non-free/include/pic16 -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/pic16 -L$(top_builddir)/device/non-free/lib/build/pic16 + else + SDCCFLAGS += --use-non-free + endif +else + SDCCFLAGS += --use-non-free +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mpic16 -pp18f452 --less-pedantic -Wl,-q +SDCCFLAGS += --no-peep +SDCCFLAGS += --no-warn-non-free +LINKFLAGS += libsdcc.lib libc18f.lib libm18f.lib + +OBJEXT = .o +BINEXT = .cod + +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) + -$(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $< -o $@ + +%$(OBJEXT): %.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + -$(SDCC) $(SDCCFLAGS) -c $< -o $@ + +.PRECIOUS: gen/pic16/testfwk.o gen/pic16/support.o + +$(PORT_CASES_DIR)/%$(OBJEXT): fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(GPSIM) -i -s $< -c $(PORTS_DIR)/pic16/gpsim.cmd > $@ || \ + echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/pic16/support.c b/support/regression/ports/pic16/support.c new file mode 100644 index 0000000..e34ee33 --- /dev/null +++ b/support/regression/ports/pic16/support.c @@ -0,0 +1,107 @@ +/*------------------------------------------------------------------------- + support.c - startup for PIC16 regression tests with gpsim + + Copyright (c) 2006-2010 Borut Razem + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 2, or (at your option) any + later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + In other words, you are welcome to use, share and improve this program. + You are forbidden to forbid anyone else to use, share and improve + what you give them. Help stamp out software-hoarding! +-------------------------------------------------------------------------*/ + +#pragma preproc_asm - +#pragma stack 0x200 255 /* set stack size to 255 bytes */ + +#include <pic18f452.h> + + +void +_putchar(char c) +{ + while (!PIR1bits.TXIF) + ; + TXREG = c; +} + + +void +_initEmu(void) +{ + /* load and configure the libgpsim_modules module */ + __asm + ;; Set frequency to 20MHz + .direct "e", ".frequency=20e6" + + ;; Load the USART library and module + .direct "e", "module library libgpsim_modules" + .direct "e", "module load usart U1" + + ;; Define a node + .direct "e", "node PIC_tx" + + ;; Tie the USART module to the PIC + .direct "e", "attach PIC_tx portc6 U1.RXPIN" + + ;; Set the USART module's Baud Rate + .direct "e", "U1.rxbaud = 9600" + + ;; Display the received character on terminal + .direct "e", "U1.console = true" + __endasm; + + /* USART initialization */ + PORTCbits.TX = 1; // Set TX pin to 1 + TRISCbits.TRISC6 = 0; // TX pin is output + + TXSTA = 0; // Reset USART registers to POR state + RCSTA = 0; + + //1. Initialize the SPBRG register for the appropriate + // baud rate. If a high speed baud rate is desired, + // set bit BRGH (Section 16.1). + TXSTAbits.BRGH = 1; + SPBRG = 129; + + //2. Enable the asynchronous serial port by clearing + // bit SYNC and setting bit SPEN. + RCSTAbits.SPEN = 1; + + //3. If interrupts are desired, set enable bit TXIE. + //4. If 9-bit transmission is desired, set transmit bit + // TX9. Can be used as address/data bit. + //5. Enable the transmission by setting bit TXEN, + // which will also set bit TXIF. + TXSTAbits.TXEN = 1; + + //6. If 9-bit transmission is selected, the ninth bit + // should be loaded in bit TX9D. + //7. Load data to the TXREG register (starts + // transmission). +} + + +void +_exitEmu(void) +{ + /* wait until the transmit buffer is empty */ + while (!TXSTAbits.TRMT) + ; + + /* set the breakpoint */ + __asm + .direct "a", "\"\"" + __endasm; +} diff --git a/support/regression/ports/rrgbz80/spec.mk b/support/regression/ports/rrgbz80/spec.mk new file mode 100644 index 0000000..05cc3df --- /dev/null +++ b/support/regression/ports/rrgbz80/spec.mk @@ -0,0 +1,54 @@ +# Regression test specification for the gbz80 target. + +EMU = $(SDCC_EXTRA_DIR)/emu/rrgb/rrgb$(EXEEXT) +MAKEBIN = $(top_builddir)/bin/makebin$(EXEEXT) + +SDCCFLAGS += --nostdinc -I$(top_srcdir) +LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/gbz80 + +SDCCFLAGS += -mgbz80 --less-pedantic +LINKFLAGS += --out-fmt-ihx gbz80.lib + +OBJEXT = .rel +BINEXT = .gb + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Needs parts of gbdk-lib, namely the internal mul/div/mod functions. +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to convert .ihx to .gb +%$(BINEXT): %.ihx + $(MAKEBIN) -Z -yn ABS $< $@ + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(top_builddir)/bin/sdasgb -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# PENDING: Path to sdcc-extra +%.out: %$(BINEXT) + mkdir -p $(dir $@) + $(EMU) -k $< > $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/rrgbz80/support.asm b/support/regression/ports/rrgbz80/support.asm new file mode 100644 index 0000000..c16fa2a --- /dev/null +++ b/support/regression/ports/rrgbz80/support.asm @@ -0,0 +1,12 @@ + .area _CODE + .globl _putchar + .globl _exit + +__putchar:: + jp _putchar + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/rrz80/spec.mk b/support/regression/ports/rrz80/spec.mk new file mode 100644 index 0000000..bf2e6c2 --- /dev/null +++ b/support/regression/ports/rrz80/spec.mk @@ -0,0 +1,55 @@ +# Regression test specification for the z80 target running on top of the Java based +# 'ConsoleZ80' emulator. + +EMU = $(SDCC_EXTRA_DIR)/emu/rrz80/rrz80$(EXEEXT) +MAKEBIN = $(top_builddir)/bin/makebin$(EXEEXT) + +SDCCFLAGS += --nostdinc -I$(top_srcdir) +LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/z80 + +SDCCFLAGS += -mz80 --less-pedantic --profile +LINKFLAGS += --out-fmt-ihx z80.lib + +OBJEXT = .rel +BINEXT = .bin + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Needs parts of gbdk-lib, namely the internal mul/div/mod functions. +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to generate a Emulator .bin file from the .ihx linker output. +%$(BINEXT): %.ihx + $(MAKEBIN) -s 32768 < $< > $@ + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(top_builddir)/bin/sdasz80 -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.s + $(top_builddir)/bin/sdasz80 -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# PENDING: Path to sdcc-extra +%.out: %$(BINEXT) + mkdir -p $(dir $@) + $(EMU) --maxruntime=3 --mapfile=$(<:.bin=.sym) $< > $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/rrz80/support.asm b/support/regression/ports/rrz80/support.asm new file mode 100644 index 0000000..c16fa2a --- /dev/null +++ b/support/regression/ports/rrz80/support.asm @@ -0,0 +1,12 @@ + .area _CODE + .globl _putchar + .globl _exit + +__putchar:: + jp _putchar + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/s08/spec.mk b/support/regression/ports/s08/spec.mk new file mode 100644 index 0000000..5a4ac39 --- /dev/null +++ b/support/regression/ports/s08/spec.mk @@ -0,0 +1,75 @@ +# Regression test specification for the s08 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +EMU_PORT_FLAG=-thcs08 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCHC08C = $(SDCC_BIN_PATH)/shc08$(EXEEXT) + + AS_HC08C = $(SDCC_BIN_PATH)/sdas6808$(EXEEXT) +else + ifdef UCSIM_DIR + UCHC08A = $(UCSIM_DIR)/hc08.src/shc08$(EXEEXT) + else + UCHC08A = $(top_builddir)/sim/ucsim/hc08.src/shc08$(EXEEXT) + UCHC08B = $(top_builddir)/bin/shc08$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCHC08A) ]; then echo $(UCHC08A); else echo $(UCHC08B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdas6808$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/s08 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -ms08 --less-pedantic --out-fmt-ihx +LINKFLAGS += s08.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $(EMU_PORT_FLAG) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/s08/support.c b/support/regression/ports/s08/support.c new file mode 100644 index 0000000..f9f1ab5 --- /dev/null +++ b/support/regression/ports/s08/support.c @@ -0,0 +1,22 @@ + +void +_putchar(unsigned char c) +{ + c; + __asm + .db 0x9e, 0xed + __endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + __asm + .db 0x9e, 0xec + __endasm; +} diff --git a/support/regression/ports/s08/uCsim.cmd b/support/regression/ports/s08/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/s08/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/stm8-large/spec.mk b/support/regression/ports/stm8-large/spec.mk new file mode 100644 index 0000000..1597419 --- /dev/null +++ b/support/regression/ports/stm8-large/spec.mk @@ -0,0 +1,73 @@ +# Regression test specification for the stm8-large target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 30 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCSTM8C = $(SDCC_BIN_PATH)/sstm8$(EXEEXT) + + AS_STM8C = $(SDCC_BIN_PATH)/sdasstm8$(EXEEXT) +else + ifdef UCSIM_DIR + UCSTM8A = $(UCSIM_DIR)/stm8.src/sstm8$(EXEEXT) + else + UCSTM8A = $(top_builddir)/sim/ucsim/stm8.src/sstm8$(EXEEXT) + UCSTM8B = $(top_builddir)/bin/sstm8$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCSTM8A) ]; then echo $(UCSTM8A); else echo $(UCSTM8B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasstm8$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/stm8-large +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mstm8 --model-large --less-pedantic --out-fmt-ihx +LINKFLAGS += stm8.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/stm8-large/support.c b/support/regression/ports/stm8-large/support.c new file mode 100644 index 0000000..ef2edd9 --- /dev/null +++ b/support/regression/ports/stm8-large/support.c @@ -0,0 +1,22 @@ +void +_putchar(unsigned char c) +{ + c; + __asm + ld a, (0x04, sp) + .db 0x71, 0xed + __endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + __asm + .db 0x71, 0xec + __endasm; +} diff --git a/support/regression/ports/stm8-large/uCsim.cmd b/support/regression/ports/stm8-large/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/stm8-large/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/stm8/spec.mk b/support/regression/ports/stm8/spec.mk new file mode 100644 index 0000000..0dfb75d --- /dev/null +++ b/support/regression/ports/stm8/spec.mk @@ -0,0 +1,73 @@ +# Regression test specification for the stm8 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 30 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCSTM8C = $(SDCC_BIN_PATH)/sstm8$(EXEEXT) + + AS_STM8C = $(SDCC_BIN_PATH)/sdasstm8$(EXEEXT) +else + ifdef UCSIM_DIR + UCSTM8A = $(UCSIM_DIR)/stm8.src/sstm8$(EXEEXT) + else + UCSTM8A = $(top_builddir)/sim/ucsim/stm8.src/sstm8$(EXEEXT) + UCSTM8B = $(top_builddir)/bin/sstm8$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCSTM8A) ]; then echo $(UCSTM8A); else echo $(UCSTM8B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasstm8$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/stm8 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mstm8 --less-pedantic --out-fmt-ihx +LINKFLAGS += stm8.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/stm8/support.c b/support/regression/ports/stm8/support.c new file mode 100644 index 0000000..8614f74 --- /dev/null +++ b/support/regression/ports/stm8/support.c @@ -0,0 +1,22 @@ +void +_putchar(unsigned char c) +{ + c; + __asm + ld a, (0x03, sp) + .db 0x71, 0xed + __endasm; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + __asm + .db 0x71, 0xec + __endasm; +} diff --git a/support/regression/ports/stm8/uCsim.cmd b/support/regression/ports/stm8/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/stm8/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/tlcs90/spec.mk b/support/regression/ports/tlcs90/spec.mk new file mode 100644 index 0000000..8d6dbd2 --- /dev/null +++ b/support/regression/ports/tlcs90/spec.mk @@ -0,0 +1,73 @@ +# Regression test specification for the tlcs90 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCTLCS90C = $(SDCC_BIN_PATH)/stlcs$(EXEEXT) + + AS_TLCS90C = $(SDCC_BIN_PATH)/sdastlcs90$(EXEEXT) +else + ifdef UCSIM_DIR + UCTLCS90A = $(UCSIM_DIR)/tlcs.src/stlcs$(EXEEXT) + else + UCTLCS90A = $(top_builddir)/sim/ucsim/tlcs.src/stlcs$(EXEEXT) + UCTLCS90B = $(top_builddir)/bin/stlcs$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(UCTLCS90A) ]; then echo $(UCTLCS90A); else echo $(UCTLCS90B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdastlcs90$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/tlcs90 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += --debug -mtlcs90 --less-pedantic --out-fmt-ihx +LINKFLAGS += tlcs90.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +%$(OBJEXT): %.asm + $(AS) -plosgff $< + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/tlcs90/support.c b/support/regression/ports/tlcs90/support.c new file mode 100644 index 0000000..6444f15 --- /dev/null +++ b/support/regression/ports/tlcs90/support.c @@ -0,0 +1,19 @@ +static unsigned char * volatile sif= (unsigned char *)0xffff; + +void +_putchar(unsigned char c) +{ + *sif= 'p'; + *sif= c; +} + +void +_initEmu(void) +{ +} + +void +_exitEmu(void) +{ + *sif= 's'; +} diff --git a/support/regression/ports/tlcs90/uCsim.cmd b/support/regression/ports/tlcs90/uCsim.cmd new file mode 100644 index 0000000..35dc5be --- /dev/null +++ b/support/regression/ports/tlcs90/uCsim.cmd @@ -0,0 +1,10 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off + +set hw simif nas 0xffff + +run +state +quit diff --git a/support/regression/ports/ucgbz80/spec.mk b/support/regression/ports/ucgbz80/spec.mk new file mode 100755 index 0000000..8cac86c --- /dev/null +++ b/support/regression/ports/ucgbz80/spec.mk @@ -0,0 +1,78 @@ +# Regression test specification for the gbz80 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +EMU_PORT_FLAG=-tlr35902 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasgb$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasgb$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/gbz80 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mgbz80 --less-pedantic --profile +LINKFLAGS += gbz80.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $(EMU_PORT_FLAG) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/ucgbz80/support.asm b/support/regression/ports/ucgbz80/support.asm new file mode 100755 index 0000000..6ca9773 --- /dev/null +++ b/support/regression/ports/ucgbz80/support.asm @@ -0,0 +1,16 @@ + .area _CODE + .globl _exit + +__putchar:: + ld hl, #2 + add hl, sp + ld l, (hl) + ld a, #1 + rst 0x08 + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucgbz80/uCsim.cmd b/support/regression/ports/ucgbz80/uCsim.cmd new file mode 100755 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucgbz80/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/ucr2k/spec.mk b/support/regression/ports/ucr2k/spec.mk new file mode 100644 index 0000000..cb1cf75 --- /dev/null +++ b/support/regression/ports/ucr2k/spec.mk @@ -0,0 +1,78 @@ +# Regression test specification for the z80 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +EMU_PORT_FLAG=-tr2k + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasrab$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasrab$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/r2k +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mr2k --less-pedantic --profile +LINKFLAGS += r2k.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $(EMU_PORT_FLAG) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/ucr2k/support.asm b/support/regression/ports/ucr2k/support.asm new file mode 100644 index 0000000..740a744 --- /dev/null +++ b/support/regression/ports/ucr2k/support.asm @@ -0,0 +1,16 @@ + .area _CODE + .globl _exit + +__putchar:: + ld hl, #2 + add hl, sp + ld l, (hl) + ld a, #1 + rst 0x28 + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucr2k/uCsim.cmd b/support/regression/ports/ucr2k/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucr2k/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/ucr3ka/spec.mk b/support/regression/ports/ucr3ka/spec.mk new file mode 100755 index 0000000..592f436 --- /dev/null +++ b/support/regression/ports/ucr3ka/spec.mk @@ -0,0 +1,81 @@ +# Regression test specification for the z80 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +EMU_PORT_FLAG=-tr3ka + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasrab$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasrab$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/r3ka +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mr3ka --less-pedantic --profile +LINKFLAGS += r3ka.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $(EMU_PORT_FLAG) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + + +# echo Running $(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $(EMU_PORT_FLAG) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd + +_clean: diff --git a/support/regression/ports/ucr3ka/support.asm b/support/regression/ports/ucr3ka/support.asm new file mode 100755 index 0000000..28fc214 --- /dev/null +++ b/support/regression/ports/ucr3ka/support.asm @@ -0,0 +1,15 @@ + .area _CODE + .globl _exit + +SADR=0xC0 + +__putchar:: + ioi + ld (SADR),a + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucr3ka/uCsim.cmd b/support/regression/ports/ucr3ka/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucr3ka/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/ucz180/spec.mk b/support/regression/ports/ucz180/spec.mk new file mode 100644 index 0000000..9ef6837 --- /dev/null +++ b/support/regression/ports/ucz180/spec.mk @@ -0,0 +1,76 @@ +# Regression test specification for the z180 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasz80$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasz80$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/z180 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mz180 --less-pedantic --profile +LINKFLAGS += z180.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) -tz180 $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/ucz180/support.asm b/support/regression/ports/ucz180/support.asm new file mode 100644 index 0000000..6ca9773 --- /dev/null +++ b/support/regression/ports/ucz180/support.asm @@ -0,0 +1,16 @@ + .area _CODE + .globl _exit + +__putchar:: + ld hl, #2 + add hl, sp + ld l, (hl) + ld a, #1 + rst 0x08 + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucz180/uCsim.cmd b/support/regression/ports/ucz180/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucz180/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/ucz80-resiy/spec.mk b/support/regression/ports/ucz80-resiy/spec.mk new file mode 100644 index 0000000..2dff1c1 --- /dev/null +++ b/support/regression/ports/ucz80-resiy/spec.mk @@ -0,0 +1,76 @@ +# Regression test specification for the z80 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasz80$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasz80$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/z80 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mz80 --less-pedantic --profile --reserve-regs-iy +LINKFLAGS += z80.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/ucz80-resiy/support.asm b/support/regression/ports/ucz80-resiy/support.asm new file mode 100644 index 0000000..6ca9773 --- /dev/null +++ b/support/regression/ports/ucz80-resiy/support.asm @@ -0,0 +1,16 @@ + .area _CODE + .globl _exit + +__putchar:: + ld hl, #2 + add hl, sp + ld l, (hl) + ld a, #1 + rst 0x08 + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucz80-resiy/uCsim.cmd b/support/regression/ports/ucz80-resiy/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucz80-resiy/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit diff --git a/support/regression/ports/ucz80/spec.mk b/support/regression/ports/ucz80/spec.mk new file mode 100644 index 0000000..736dc8c --- /dev/null +++ b/support/regression/ports/ucz80/spec.mk @@ -0,0 +1,76 @@ +# Regression test specification for the z80 target running with uCsim + +# simulation timeout in seconds +SIM_TIMEOUT = 40 + +# path to uCsim +ifdef SDCC_BIN_PATH + UCZ80C = $(SDCC_BIN_PATH)/sz80$(EXEEXT) + + AS_Z80C = $(SDCC_BIN_PATH)/sdasz80$(EXEEXT) +else + ifdef UCSIM_DIR + SZ80A = $(UCSIM_DIR)/z80.src/sz80$(EXEEXT) + else + SZ80A = $(top_builddir)/sim/ucsim/z80.src/sz80$(EXEEXT) + SZ80B = $(top_builddir)/bin/sz80$(EXEEXT) + endif + + EMU = $(WINE) $(shell if [ -f $(SZ80A) ]; then echo $(SZ80A); else echo $(SZ80B); fi) + + AS = $(WINE) $(top_builddir)/bin/sdasz80$(EXEEXT) + +ifndef CROSSCOMPILING + SDCCFLAGS += --nostdinc -I$(top_srcdir) + LINKFLAGS += --nostdlib -L$(top_builddir)/device/lib/build/z80 +endif +endif + +ifdef CROSSCOMPILING + SDCCFLAGS += -I$(top_srcdir) +endif + +SDCCFLAGS += -mz80 --less-pedantic --profile +LINKFLAGS += z80.lib + +OBJEXT = .rel +BINEXT = .ihx + +# otherwise `make` deletes testfwk.rel and `make -j` will fail +.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT) + +# Required extras +EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT) +include $(srcdir)/fwk/lib/spec.mk + +# Rule to link into .ihx +%.ihx: %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib + $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.asm + @# TODO: sdas should place it\'s output in the current dir + cp $< $(PORT_CASES_DIR) + $(AS) -plosgff $(PORT_CASES_DIR)/$(notdir $<) + rm $(PORT_CASES_DIR)/$(notdir $<) + +%$(OBJEXT): %.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/$(PORT)/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c + $(SDCC) $(SDCCFLAGS) -c $< -o $@ + +$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib + cat < $(srcdir)/fwk/lib/fwk.lib > $@ + +# run simulator with SIM_TIMEOUT seconds timeout +%.out: %$(BINEXT) $(CASES_DIR)/timeout + mkdir -p $(dir $@) + -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) $< < $(PORTS_DIR)/$(PORT)/uCsim.cmd > $@ \ + || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@ + $(PYTHON) $(srcdir)/get_ticks.py < $@ >> $@ + -grep -n FAIL $@ /dev/null || true + +_clean: diff --git a/support/regression/ports/ucz80/support.asm b/support/regression/ports/ucz80/support.asm new file mode 100644 index 0000000..6ca9773 --- /dev/null +++ b/support/regression/ports/ucz80/support.asm @@ -0,0 +1,16 @@ + .area _CODE + .globl _exit + +__putchar:: + ld hl, #2 + add hl, sp + ld l, (hl) + ld a, #1 + rst 0x08 + ret + +__initEmu:: + ret + +__exitEmu:: + jp _exit diff --git a/support/regression/ports/ucz80/uCsim.cmd b/support/regression/ports/ucz80/uCsim.cmd new file mode 100644 index 0000000..fb936cc --- /dev/null +++ b/support/regression/ports/ucz80/uCsim.cmd @@ -0,0 +1,7 @@ +set error non-classified off +set error unknown_code off +set error memory off +set error stack off +run +state +quit |