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-rw-r--r--support/regression/ports/mcs51-common/T2_isr.c7
-rw-r--r--support/regression/ports/mcs51-common/fwk.lib1
-rw-r--r--support/regression/ports/mcs51-common/spec.mk71
-rw-r--r--support/regression/ports/mcs51-common/support.c36
-rw-r--r--support/regression/ports/mcs51-common/uCsim.cmd8
5 files changed, 123 insertions, 0 deletions
diff --git a/support/regression/ports/mcs51-common/T2_isr.c b/support/regression/ports/mcs51-common/T2_isr.c
new file mode 100644
index 0000000..cdac442
--- /dev/null
+++ b/support/regression/ports/mcs51-common/T2_isr.c
@@ -0,0 +1,7 @@
+//dummy interrupt service routine
+//just to make linker happy
+
+void
+T2_isr (void) __interrupt 5
+{
+}
diff --git a/support/regression/ports/mcs51-common/fwk.lib b/support/regression/ports/mcs51-common/fwk.lib
new file mode 100644
index 0000000..c6898f8
--- /dev/null
+++ b/support/regression/ports/mcs51-common/fwk.lib
@@ -0,0 +1 @@
+T2_isr.rel
diff --git a/support/regression/ports/mcs51-common/spec.mk b/support/regression/ports/mcs51-common/spec.mk
new file mode 100644
index 0000000..2d034d9
--- /dev/null
+++ b/support/regression/ports/mcs51-common/spec.mk
@@ -0,0 +1,71 @@
+# Common regression test specification for the mcs51 targets running with uCsim
+
+# simulation timeout in seconds
+SIM_TIMEOUT = 80
+
+# path to uCsim
+ifdef SDCC_BIN_PATH
+ S51 = $(SDCC_BIN_PATH)/s51$(EXEEXT)
+else
+ ifdef UCSIM_DIR
+ S51A = $(UCSIM_DIR)/s51.src/s51$(EXEEXT)
+ else
+ S51A = $(top_builddir)/sim/ucsim/s51.src/s51$(EXEEXT)
+ S51B = $(top_builddir)/bin/s51$(EXEEXT)
+ endif
+
+ EMU = $(WINE) $(shell if [ -f $(S51A) ]; then echo $(S51A); else echo $(S51B); fi)
+
+ifndef CROSSCOMPILING
+ SDCCFLAGS += --nostdinc -I$(INC_DIR)/mcs51 -I$(top_srcdir)
+ LINKFLAGS += --nostdlib -L$(LIBDIR)
+endif
+endif
+
+ifdef CROSSCOMPILING
+ DEV_NULL ?= NUL
+ SDCCFLAGS += -I$(top_srcdir)
+else
+ DEV_NULL ?= /dev/null
+endif
+
+SDCCFLAGS += --less-pedantic
+LINKFLAGS += mcs51.lib libsdcc.lib liblong.lib libint.lib libfloat.lib liblonglong.lib
+
+OBJEXT = .rel
+BINEXT = .ihx
+
+# otherwise `make` deletes testfwk.rel and `make -j` will fail
+.PRECIOUS: $(PORT_CASES_DIR)/%$(OBJEXT)
+
+# Required extras
+EXTRAS = $(PORT_CASES_DIR)/testfwk$(OBJEXT) $(PORT_CASES_DIR)/support$(OBJEXT)
+include $(srcdir)/fwk/lib/spec.mk
+FWKLIB += $(PORT_CASES_DIR)/T2_isr$(OBJEXT)
+
+# Rule to link into .ihx
+%$(BINEXT): %$(OBJEXT) $(EXTRAS) $(FWKLIB) $(PORT_CASES_DIR)/fwk.lib
+ $(SDCC) $(SDCCFLAGS) $(LINKFLAGS) $(EXTRAS) $(PORT_CASES_DIR)/fwk.lib $< -o $@
+
+%$(OBJEXT): %.c
+ $(SDCC) $(SDCCFLAGS) -c $< -o $@
+
+$(PORT_CASES_DIR)/%$(OBJEXT): $(PORTS_DIR)/mcs51-common/%.c
+ $(SDCC) $(SDCCFLAGS) -c $< -o $@
+
+$(PORT_CASES_DIR)/%$(OBJEXT): $(srcdir)/fwk/lib/%.c
+ $(SDCC) $(SDCCFLAGS) -c $< -o $@
+
+$(PORT_CASES_DIR)/fwk.lib: $(srcdir)/fwk/lib/fwk.lib $(PORTS_DIR)/mcs51-common/fwk.lib
+ cat < $(srcdir)/fwk/lib/fwk.lib > $@
+ cat < $(PORTS_DIR)/mcs51-common/fwk.lib >> $@
+
+# run simulator with SIM_TIMEOUT seconds timeout
+%.out: %$(BINEXT) $(CASES_DIR)/timeout
+ mkdir -p $(dir $@)
+ -$(CASES_DIR)/timeout $(SIM_TIMEOUT) $(EMU) -t32 -S in=$(DEV_NULL),out=$@ $< < $(PORTS_DIR)/mcs51-common/uCsim.cmd > $(@:.out=.sim) \
+ || echo -e --- FAIL: \"timeout, simulation killed\" in $(<:$(BINEXT)=.c)"\n"--- Summary: 1/1/1: timeout >> $@
+ $(PYTHON) $(srcdir)/get_ticks.py < $(@:.out=.sim) >> $@
+ -grep -n FAIL $@ /dev/null || true
+
+_clean:
diff --git a/support/regression/ports/mcs51-common/support.c b/support/regression/ports/mcs51-common/support.c
new file mode 100644
index 0000000..52a9bc9
--- /dev/null
+++ b/support/regression/ports/mcs51-common/support.c
@@ -0,0 +1,36 @@
+// #define MICROCONTROLLER_8051
+#include <mcs51reg.h>
+
+/* assume P1 for bankswitching address lines */
+__sfr __at(0x90) PSBANK;
+
+unsigned char
+_sdcc_external_startup (void) __nonbanked
+{
+ /* serial port mode 0 is default */
+ /* enable transmission of first byte */
+ TI = 1;
+ return 0;
+}
+
+void
+_putchar (char c)
+{
+ while (!TI)
+ ;
+ TI = 0;
+ SBUF = c;
+}
+
+void
+_initEmu (void)
+{
+}
+
+void
+_exitEmu (void)
+{
+ while (!TI) /* wait for the last character to be transmitted */
+ ; /* before hitting the breakpoint */
+ * (char __idata *) 0 = * (char __xdata *) 0x7654;
+}
diff --git a/support/regression/ports/mcs51-common/uCsim.cmd b/support/regression/ports/mcs51-common/uCsim.cmd
new file mode 100644
index 0000000..cd2b168
--- /dev/null
+++ b/support/regression/ports/mcs51-common/uCsim.cmd
@@ -0,0 +1,8 @@
+set error non-classified off
+set error unknown_code off
+set error memory off
+set error stack off
+break xram r 0x7654
+run
+state
+quit