MaddTheSane:

- Clean up the Xcode projects a bit.
- Added 64-bit mode on Mac.
- Made it so that the SDK was set on the Xcode projects.
- Enabled PowerPC support.
(Patch #7730).

git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@61171 e17a0e51-4ae3-4d35-97c3-1a29b211df97

2 files changed, 65 insertions, 57 deletions

diff --git a/libpcsxcore/ix86/iR3000A.c b/libpcsxcore/ix86/iR3000A.c
index 203c6c0e..a6e38978 100644
--- a/libpcsxcore/ix86/iR3000A.c
+++ b/libpcsxcore/ix86/iR3000A.c
@@ -21,6 +21,8 @@
 * i386 assembly functions for R3000A core.
 */
 
+#ifdef __i386__
+
 #include "ix86.h"
 #include <sys/mman.h>
 
@@ -73,8 +75,8 @@ static void (*recSPC[64])();
 static void (*recREG[32])();
 static void (*recCP0[32])();
 static void (*recCP2[64])();
-static void (*recCP2BSC[32])();

-

+static void (*recCP2BSC[32])();
+
 #define DYNAREC_BLOCK 50
 
 static void MapConst(int reg, u32 _const) {
@@ -163,23 +165,23 @@ static void SetBranch() {
 		return;
 	}
 
-	

-	switch( psxRegs.code >> 26 ) {

-		// Lode Runner (jr - beq)

-

-		// bltz - bgez - bltzal - bgezal / beq - bne - blez - bgtz

-		case 0x01:

-		case 0x04:

-		case 0x05:

-		case 0x06:

-		case 0x07:

-			break;

-

-		default:

-			recBSC[psxRegs.code>>26]();

-			break;

-	}

-

+	
+	switch( psxRegs.code >> 26 ) {
+		// Lode Runner (jr - beq)
+
+		// bltz - bgez - bltzal - bgezal / beq - bne - blez - bgtz
+		case 0x01:
+		case 0x04:
+		case 0x05:
+		case 0x06:
+		case 0x07:
+			break;
+
+		default:
+			recBSC[psxRegs.code>>26]();
+			break;
+	}
+
 
 	iFlushRegs();
 	MOV32MtoR(EAX, (u32)&target);
@@ -469,24 +471,24 @@ static void recExecuteBlock() {
 }
 
 static void recClear(u32 Addr, u32 Size) {
-	u32 bank,offset;

-

-	bank = Addr >> 24;

-	offset = Addr & 0xffffff;

-

-

-	// Pitfall 3D - clear dynarec slots that contain 'stale' ram data

-	// - fixes stage 1 loading crash

-	if( bank == 0x80 || bank == 0xa0 || bank == 0x00 ) {

-		offset &= 0x1fffff;

-

-		if( offset >= DYNAREC_BLOCK * 4 )

-			memset((void*)PC_REC(Addr - DYNAREC_BLOCK * 4), 0, DYNAREC_BLOCK * 4);

-		else

-			memset((void*)PC_REC(Addr - offset), 0, offset);

-	}

-	

-	

+	u32 bank,offset;
+
+	bank = Addr >> 24;
+	offset = Addr & 0xffffff;
+
+
+	// Pitfall 3D - clear dynarec slots that contain 'stale' ram data
+	// - fixes stage 1 loading crash
+	if( bank == 0x80 || bank == 0xa0 || bank == 0x00 ) {
+		offset &= 0x1fffff;
+
+		if( offset >= DYNAREC_BLOCK * 4 )
+			memset((void*)PC_REC(Addr - DYNAREC_BLOCK * 4), 0, DYNAREC_BLOCK * 4);
+		else
+			memset((void*)PC_REC(Addr - offset), 0, offset);
+	}
+	
+	
 	memset((void*)PC_REC(Addr), 0, Size * 4);
 }
 
@@ -513,13 +515,13 @@ static void recCOP0() {
 }
 
 //REC_SYS(COP2);
-static void recCOP2() {

-	MOV32MtoR(EAX, (u32)&psxRegs.CP0.n.Status);

-	AND32ItoR(EAX, 0x40000000);

-	j8Ptr[31] = JZ8(0);

+static void recCOP2() {
+	MOV32MtoR(EAX, (u32)&psxRegs.CP0.n.Status);
+	AND32ItoR(EAX, 0x40000000);
+	j8Ptr[31] = JZ8(0);
+
+	recCP2[_Funct_]();
 
-	recCP2[_Funct_]();

-

 	x86SetJ8(j8Ptr[31]);
 }
 
@@ -1791,8 +1793,8 @@ static void recSB() {
 	if (IsConst(_Rs_)) {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
-

-#if 0

+
+#if 0
 		// V-Rally 2 - no tree sprite corruption
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			if (IsConst(_Rt_)) {
@@ -1802,7 +1804,7 @@ static void recSB() {
 				MOV8RtoM((u32)&psxM[addr & 0x1fffff], EAX);
 			}
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			if (IsConst(_Rt_)) {
@@ -1836,8 +1838,8 @@ static void recSH() {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
 
-#if 0

-		// V-Rally 2 - no tree sprite corruption

+#if 0
+		// V-Rally 2 - no tree sprite corruption
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			if (IsConst(_Rt_)) {
 				MOV16ItoM((u32)&psxM[addr & 0x1fffff], (u16)iRegs[_Rt_].k);
@@ -1846,7 +1848,7 @@ static void recSH() {
 				MOV16RtoM((u32)&psxM[addr & 0x1fffff], EAX);
 			}
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			if (IsConst(_Rt_)) {
@@ -1895,8 +1897,8 @@ static void recSW() {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
 
-#if 0

-		// V-Rally 2 - no tree sprite corruption

+#if 0
+		// V-Rally 2 - no tree sprite corruption
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			if (IsConst(_Rt_)) {
 				MOV32ItoM((u32)&psxM[addr & 0x1fffff], iRegs[_Rt_].k);
@@ -1905,7 +1907,7 @@ static void recSW() {
 				MOV32RtoM((u32)&psxM[addr & 0x1fffff], EAX);
 			}
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			if (IsConst(_Rt_)) {
@@ -1956,7 +1958,7 @@ static void recSW() {
 					CALL32M((u32)&GPU_writeStatus);
 #ifndef __WIN32__
 					resp+= 4;
-#endif

+#endif
 					return;
 			}
 		}
@@ -2063,14 +2065,14 @@ void recSWL() {
 	if (IsConst(_Rs_)) {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
-

+
 #if 0
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
 			iSWLk(addr & 3);
 			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
@@ -2145,14 +2147,14 @@ void recSWR() {
 	if (IsConst(_Rs_)) {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
-

+
 #if 0
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
 			iSWRk(addr & 3);
 			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
@@ -2997,3 +2999,5 @@ R3000Acpu psxRec = {
 	recClear,
 	recShutdown
 };
+
+#endif
diff --git a/libpcsxcore/ix86/ix86.c b/libpcsxcore/ix86/ix86.c
index d701e899..1525ac37 100644
--- a/libpcsxcore/ix86/ix86.c
+++ b/libpcsxcore/ix86/ix86.c
@@ -23,6 +23,8 @@
  *           alexey silinov
  */
 
+#ifdef __i386__
+
 #include "ix86.h"
 
 s8  *x86Ptr;
@@ -1721,3 +1723,5 @@ void PFMINRtoR(int to, int from) {
 	ModRM(3, to, from);
 	write8(0x94);
 }
+
+#endif