MaddTheSane:

- Clean up the Xcode projects a bit.
- Added 64-bit mode on Mac.
- Made it so that the SDK was set on the Xcode projects.
- Enabled PowerPC support.
(Patch #7730).

git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@61171 e17a0e51-4ae3-4d35-97c3-1a29b211df97

12 files changed, 133 insertions, 80 deletions

diff --git a/libpcsxcore/ix86/iR3000A.c b/libpcsxcore/ix86/iR3000A.c
index 203c6c0e..a6e38978 100644
--- a/libpcsxcore/ix86/iR3000A.c
+++ b/libpcsxcore/ix86/iR3000A.c
@@ -21,6 +21,8 @@
 * i386 assembly functions for R3000A core.
 */
 
+#ifdef __i386__
+
 #include "ix86.h"
 #include <sys/mman.h>
 
@@ -73,8 +75,8 @@ static void (*recSPC[64])();
 static void (*recREG[32])();
 static void (*recCP0[32])();
 static void (*recCP2[64])();
-static void (*recCP2BSC[32])();

-

+static void (*recCP2BSC[32])();
+
 #define DYNAREC_BLOCK 50
 
 static void MapConst(int reg, u32 _const) {
@@ -163,23 +165,23 @@ static void SetBranch() {
 		return;
 	}
 
-	

-	switch( psxRegs.code >> 26 ) {

-		// Lode Runner (jr - beq)

-

-		// bltz - bgez - bltzal - bgezal / beq - bne - blez - bgtz

-		case 0x01:

-		case 0x04:

-		case 0x05:

-		case 0x06:

-		case 0x07:

-			break;

-

-		default:

-			recBSC[psxRegs.code>>26]();

-			break;

-	}

-

+	
+	switch( psxRegs.code >> 26 ) {
+		// Lode Runner (jr - beq)
+
+		// bltz - bgez - bltzal - bgezal / beq - bne - blez - bgtz
+		case 0x01:
+		case 0x04:
+		case 0x05:
+		case 0x06:
+		case 0x07:
+			break;
+
+		default:
+			recBSC[psxRegs.code>>26]();
+			break;
+	}
+
 
 	iFlushRegs();
 	MOV32MtoR(EAX, (u32)&target);
@@ -469,24 +471,24 @@ static void recExecuteBlock() {
 }
 
 static void recClear(u32 Addr, u32 Size) {
-	u32 bank,offset;

-

-	bank = Addr >> 24;

-	offset = Addr & 0xffffff;

-

-

-	// Pitfall 3D - clear dynarec slots that contain 'stale' ram data

-	// - fixes stage 1 loading crash

-	if( bank == 0x80 || bank == 0xa0 || bank == 0x00 ) {

-		offset &= 0x1fffff;

-

-		if( offset >= DYNAREC_BLOCK * 4 )

-			memset((void*)PC_REC(Addr - DYNAREC_BLOCK * 4), 0, DYNAREC_BLOCK * 4);

-		else

-			memset((void*)PC_REC(Addr - offset), 0, offset);

-	}

-	

-	

+	u32 bank,offset;
+
+	bank = Addr >> 24;
+	offset = Addr & 0xffffff;
+
+
+	// Pitfall 3D - clear dynarec slots that contain 'stale' ram data
+	// - fixes stage 1 loading crash
+	if( bank == 0x80 || bank == 0xa0 || bank == 0x00 ) {
+		offset &= 0x1fffff;
+
+		if( offset >= DYNAREC_BLOCK * 4 )
+			memset((void*)PC_REC(Addr - DYNAREC_BLOCK * 4), 0, DYNAREC_BLOCK * 4);
+		else
+			memset((void*)PC_REC(Addr - offset), 0, offset);
+	}
+	
+	
 	memset((void*)PC_REC(Addr), 0, Size * 4);
 }
 
@@ -513,13 +515,13 @@ static void recCOP0() {
 }
 
 //REC_SYS(COP2);
-static void recCOP2() {

-	MOV32MtoR(EAX, (u32)&psxRegs.CP0.n.Status);

-	AND32ItoR(EAX, 0x40000000);

-	j8Ptr[31] = JZ8(0);

+static void recCOP2() {
+	MOV32MtoR(EAX, (u32)&psxRegs.CP0.n.Status);
+	AND32ItoR(EAX, 0x40000000);
+	j8Ptr[31] = JZ8(0);
+
+	recCP2[_Funct_]();
 
-	recCP2[_Funct_]();

-

 	x86SetJ8(j8Ptr[31]);
 }
 
@@ -1791,8 +1793,8 @@ static void recSB() {
 	if (IsConst(_Rs_)) {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
-

-#if 0

+
+#if 0
 		// V-Rally 2 - no tree sprite corruption
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			if (IsConst(_Rt_)) {
@@ -1802,7 +1804,7 @@ static void recSB() {
 				MOV8RtoM((u32)&psxM[addr & 0x1fffff], EAX);
 			}
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			if (IsConst(_Rt_)) {
@@ -1836,8 +1838,8 @@ static void recSH() {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
 
-#if 0

-		// V-Rally 2 - no tree sprite corruption

+#if 0
+		// V-Rally 2 - no tree sprite corruption
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			if (IsConst(_Rt_)) {
 				MOV16ItoM((u32)&psxM[addr & 0x1fffff], (u16)iRegs[_Rt_].k);
@@ -1846,7 +1848,7 @@ static void recSH() {
 				MOV16RtoM((u32)&psxM[addr & 0x1fffff], EAX);
 			}
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			if (IsConst(_Rt_)) {
@@ -1895,8 +1897,8 @@ static void recSW() {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
 
-#if 0

-		// V-Rally 2 - no tree sprite corruption

+#if 0
+		// V-Rally 2 - no tree sprite corruption
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			if (IsConst(_Rt_)) {
 				MOV32ItoM((u32)&psxM[addr & 0x1fffff], iRegs[_Rt_].k);
@@ -1905,7 +1907,7 @@ static void recSW() {
 				MOV32RtoM((u32)&psxM[addr & 0x1fffff], EAX);
 			}
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			if (IsConst(_Rt_)) {
@@ -1956,7 +1958,7 @@ static void recSW() {
 					CALL32M((u32)&GPU_writeStatus);
 #ifndef __WIN32__
 					resp+= 4;
-#endif

+#endif
 					return;
 			}
 		}
@@ -2063,14 +2065,14 @@ void recSWL() {
 	if (IsConst(_Rs_)) {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
-

+
 #if 0
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
 			iSWLk(addr & 3);
 			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
@@ -2145,14 +2147,14 @@ void recSWR() {
 	if (IsConst(_Rs_)) {
 		u32 addr = iRegs[_Rs_].k + _Imm_;
 		int t = addr >> 16;
-

+
 #if 0
 		if ((t & 0x1fe0) == 0 && (t & 0x1fff) != 0) {
 			MOV32MtoR(EAX, (u32)&psxM[addr & 0x1ffffc]);
 			iSWRk(addr & 3);
 			MOV32RtoM((u32)&psxM[addr & 0x1ffffc], EAX);
 			return;
-		}

+		}
 #endif
 		if (t == 0x1f80 && addr < 0x1f801000) {
 			MOV32MtoR(EAX, (u32)&psxH[addr & 0xffc]);
@@ -2997,3 +2999,5 @@ R3000Acpu psxRec = {
 	recClear,
 	recShutdown
 };
+
+#endif
diff --git a/libpcsxcore/ix86/ix86.c b/libpcsxcore/ix86/ix86.c
index d701e899..1525ac37 100644
--- a/libpcsxcore/ix86/ix86.c
+++ b/libpcsxcore/ix86/ix86.c
@@ -23,6 +23,8 @@
  *           alexey silinov
  */
 
+#ifdef __i386__
+
 #include "ix86.h"
 
 s8  *x86Ptr;
@@ -1721,3 +1723,5 @@ void PFMINRtoR(int to, int from) {
 	ModRM(3, to, from);
 	write8(0x94);
 }
+
+#endif
diff --git a/libpcsxcore/ix86_64/iR3000A-64.c b/libpcsxcore/ix86_64/iR3000A-64.c
index 12004e82..85737046 100644
--- a/libpcsxcore/ix86_64/iR3000A-64.c
+++ b/libpcsxcore/ix86_64/iR3000A-64.c
@@ -21,6 +21,8 @@
 * i386 assembly functions for R3000A core.
 */
 
+#ifdef __x86_64__
+
 #include "ix86-64.h"
 #include "../r3000a.h"
 #include "../psxhle.h"
@@ -521,12 +523,12 @@ static void recCOP0() {
 //REC_SYS(COP2);
 #if 1
 static void recCOP2() {
-	MOV32MtoR(EAX, (uptr)&psxRegs.CP0.n.Status);

-	AND32ItoR(EAX, 0x40000000);

-	j8Ptr[31] = JZ8(0);

-

-	recCP2[_Funct_]();

-

+	MOV32MtoR(EAX, (uptr)&psxRegs.CP0.n.Status);
+	AND32ItoR(EAX, 0x40000000);
+	j8Ptr[31] = JZ8(0);
+
+	recCP2[_Funct_]();
+
 	x86SetJ8(j8Ptr[31]);
 }
 #endif
@@ -3009,3 +3011,4 @@ R3000Acpu psxRec = {
 	recClear,
 	recShutdown
 };
+#endif
diff --git a/libpcsxcore/ix86_64/ix86-64.c b/libpcsxcore/ix86_64/ix86-64.c
index 0582f351..582b3a40 100644
--- a/libpcsxcore/ix86_64/ix86-64.c
+++ b/libpcsxcore/ix86_64/ix86-64.c
@@ -6,6 +6,8 @@
  *			 zerofrog(@gmail.com)
  */
 
+#ifdef __x86_64__
+
 // stop compiling if NORECBUILD build (only for Visual Studio)
 #if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
 
@@ -3137,3 +3139,5 @@ void LEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
 }
 
 #endif
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86_cpudetect.c b/libpcsxcore/ix86_64/ix86_cpudetect.c
index 3c014d89..664e6b7d 100644
--- a/libpcsxcore/ix86_64/ix86_cpudetect.c
+++ b/libpcsxcore/ix86_64/ix86_cpudetect.c
@@ -15,6 +15,9 @@
  *  along with this program; if not, write to the Free Software

  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA

  */

+

+#ifdef __x86_64__

+

 #if defined (_WIN32)

 #include <windows.h>

 #endif

@@ -142,7 +145,7 @@ u64 GetCPUTick( void )
 #endif

 }

 

-#if defined __LINUX__

+#if defined(__LINUX__) || defined(__APPLE__)

 

 #include <sys/time.h>

 #include <errno.h>

@@ -485,3 +488,5 @@ void cpudetectInit( void )
    cpucaps.has3DNOWInstructionExtensions                = ( cpuinfo.x86EFlags >> 31 ) & 1; //3dnow   

    cpuinfo.cpuspeed = (u32 )(CPUSpeedHz( 1000 ) / 1000000);

 }

+

+#endif

diff --git a/libpcsxcore/ix86_64/ix86_fpu.c b/libpcsxcore/ix86_64/ix86_fpu.c
index ca49eb7c..cd58698b 100644
--- a/libpcsxcore/ix86_64/ix86_fpu.c
+++ b/libpcsxcore/ix86_64/ix86_fpu.c
@@ -1,4 +1,7 @@
 // stop compiling if NORECBUILD build (only for Visual Studio)
+
+#ifdef __x86_64__
+
 #if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
 
 #include <stdio.h>
@@ -246,3 +249,5 @@ void FCMOVNBE32( x86IntRegType from )   { FCMOV32( 0xDB, 0xD0 ); }
 void FCMOVNU32( x86IntRegType from )    { FCMOV32( 0xDB, 0xD8 ); }
 
 #endif
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86_mmx.c b/libpcsxcore/ix86_64/ix86_mmx.c
index eddbbfcc..09784a9c 100644
--- a/libpcsxcore/ix86_64/ix86_mmx.c
+++ b/libpcsxcore/ix86_64/ix86_mmx.c
@@ -1,4 +1,7 @@
 // stop compiling if NORECBUILD build (only for Visual Studio)
+
+#ifdef __x86_64__
+
 #if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
 
 #include "ix86-64.h"
@@ -644,3 +647,5 @@ void MASKMOVQRtoR(x86MMXRegType to, x86MMXRegType from)
 }
 
 #endif
+
+#endif
diff --git a/libpcsxcore/ix86_64/ix86_sse.c b/libpcsxcore/ix86_64/ix86_sse.c
index cb391dca..8a4f0217 100644
--- a/libpcsxcore/ix86_64/ix86_sse.c
+++ b/libpcsxcore/ix86_64/ix86_sse.c
@@ -1,4 +1,7 @@
 // stop compiling if NORECBUILD build (only for Visual Studio)
+
+#ifdef __x86_64__
+
 #if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD))
 
 #include <assert.h>
@@ -1453,3 +1456,5 @@ void SSE2EMU_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from ) {
 }
 
 #endif
+
+#endif
diff --git a/libpcsxcore/ppc/pR3000A.c b/libpcsxcore/ppc/pR3000A.c
index 93745f82..c3aea8f2 100644
--- a/libpcsxcore/ppc/pR3000A.c
+++ b/libpcsxcore/ppc/pR3000A.c
@@ -16,6 +16,8 @@
  *  Foundation, Inc., 51 Franklin Steet, Fifth Floor, Boston, MA 02111-1307 USA
  */
 
+#if defined (__ppc__) || defined (__ppc64__)
+
 #ifdef _MSC_VER_
 #pragma warning(disable:4244)
 #pragma warning(disable:4761)
@@ -3538,3 +3540,4 @@ R3000Acpu psxRec = {
 	recShutdown
 };
 
+#endif
diff --git a/libpcsxcore/ppc/pasm.s b/libpcsxcore/ppc/pasm.s
index 96891b42..ae1558dd 100644
--- a/libpcsxcore/ppc/pasm.s
+++ b/libpcsxcore/ppc/pasm.s
@@ -1,4 +1,11 @@
 
+#if defined (__ppc__) || defined (__ppc64__)
+
+#ifdef ELF
+#define C(label) label
+#else
+#define C(label) _##label
+#endif
 
 #define OLD_REGISTER_OFFSET	(19*4)
 #define SP_SIZE			(OLD_REGISTER_OFFSET+4+8)
@@ -6,8 +13,8 @@
 /*asm void recRun(register void (*func)(), register u32 hw1, register u32 hw2)*/
         .text
         .align  4
-        .globl  recRun
-recRun:
+        .globl  C(recRun)
+C(recRun):
 	/* prologue code */
 	mflr	r0
 	stmw	r13, -(32-13)*4(r1)
@@ -25,8 +32,8 @@ asm void returnPC()
 {*/
         .text
         .align  4
-        .globl  returnPC
-returnPC:
+        .globl  C(returnPC)
+C(returnPC):
 	// end code
 	lwz		r0, (32-13)*4+8+4(r1)
 	addi	r1, r1, (32-13)*4+8
@@ -39,15 +46,15 @@ returnPC:
 
         .text
         .align  4
-        .globl  dynMemRead8
-dynMemRead8:
+        .globl  C(dynMemRead8)
+C(dynMemRead8):
 // assumes that memory pointer is in r30
 	addis    r2,r3,-0x1f80
 	srwi.     r4,r2,16
 	bne+     .norm8
 	cmplwi   r2,0x1000
 	blt-     .norm8
-	b        psxHwRead8
+	b        C(psxHwRead8)
 .norm8:
 	clrlwi   r5,r3,3
 	lbzx     r3,r5,r30
@@ -55,15 +62,15 @@ dynMemRead8:
 
         .text
         .align  4
-        .globl  dynMemRead16
-dynMemRead16:
+        .globl  C(dynMemRead16)
+C(dynMemRead16):
 // assumes that memory pointer is in r30
 	addis    r2,r3,-0x1f80
 	srwi.     r4,r2,16
 	bne+     .norm16
 	cmplwi   r2,0x1000
 	blt-     .norm16
-	b        psxHwRead16
+	b        C(psxHwRead16)
 .norm16:
 	clrlwi   r5,r3,3
 	lhbrx    r3,r5,r30
@@ -71,15 +78,15 @@ dynMemRead16:
 
         .text
         .align  4
-        .globl  dynMemRead32
-dynMemRead32:
+        .globl  C(dynMemRead32)
+C(dynMemRead32):
 // assumes that memory pointer is in r30
 	addis    r2,r3,-0x1f80
 	srwi.     r4,r2,16
 	bne+     .norm32
 	cmplwi   r2,0x1000
 	blt-     .norm32
-	b        psxHwRead32
+	b        C(psxHwRead32)
 .norm32:
 	clrlwi   r5,r3,3
 	lwbrx    r3,r5,r30
@@ -98,15 +105,15 @@ P | !(N | !Z)
 
         .text
         .align  4
-        .globl  dynMemWrite32
-dynMemWrite32:
+        .globl  C(dynMemWrite32)
+C(dynMemWrite32):
 // assumes that memory pointer is in r30
 	addis    r2,r3,-0x1f80
 	srwi.    r5,r2,16
 	bne+     .normw32
 	cmplwi   r2,0x1000
 	blt      .normw32
-	b        psxHwWrite32
+	b        C(psxHwWrite32)
 .normw32:
 	mtcrf    0xFF, r3
 	clrlwi   r5,r3,3
@@ -122,3 +129,4 @@ dynMemWrite32:
 	stwbrx   r4,r5,r30
 	blr
 
+#endif
diff --git a/libpcsxcore/ppc/ppc.c b/libpcsxcore/ppc/ppc.c
index efaf8b6d..84ec75ea 100644
--- a/libpcsxcore/ppc/ppc.c
+++ b/libpcsxcore/ppc/ppc.c
@@ -4,6 +4,8 @@
  *           alexey silinov
  */
 
+#if defined (__ppc__) || defined (__ppc64__)
+
 #include <stdio.h>
 #include <string.h>
 
@@ -30,3 +32,4 @@ void ppcAlign(int bytes) {
 void ppcShutdown() {
 }
 
+#endif
diff --git a/libpcsxcore/ppc/reguse.c b/libpcsxcore/ppc/reguse.c
index 47d70a54..f68e48a4 100644
--- a/libpcsxcore/ppc/reguse.c
+++ b/libpcsxcore/ppc/reguse.c
@@ -1,4 +1,6 @@
 
+#if defined (__ppc__) || defined (__ppc64__)
+
 #include "../psxcommon.h"
 #include "reguse.h"
 
@@ -417,3 +419,5 @@ int isPsxRegUsed(u32 pc, int psxreg)
     else
         return 0; // the next use is a write, i.e. current value is not important
 }
+
+#endif