Added dynstr, fixed NULL pointer access
This commit is contained in:
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7ab44f41ca
commit
aecaf18a95
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@ -0,0 +1,3 @@
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[submodule "dynstr/dynstr"]
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path = dynstr/dynstr
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url = https://github.com/XaviDCR92/dynstr
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@ -0,0 +1 @@
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Subproject commit 357d4f2c0fc52ae7e5967f542161d59d09830e27
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@ -14,12 +14,12 @@ PGXP_value* CPU_reg = CPU_reg_mem;
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PGXP_value* CP0_reg = CP0_reg_mem;
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PGXP_value* CP0_reg = CP0_reg_mem;
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// Instruction register decoding
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// Instruction register decoding
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#define op(_instr) (_instr >> 26) // The op part of the instruction register
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#define op(_instr) (_instr >> 26) // The op part of the instruction register
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#define func(_instr) ((_instr) & 0x3F) // The funct part of the instruction register
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#define func(_instr) ((_instr) & 0x3F) // The funct part of the instruction register
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#define sa(_instr) ((_instr >> 6) & 0x1F) // The sa part of the instruction register
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#define sa(_instr) ((_instr >> 6) & 0x1F) // The sa part of the instruction register
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#define rd(_instr) ((_instr >> 11) & 0x1F) // The rd part of the instruction register
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#define rd(_instr) ((_instr >> 11) & 0x1F) // The rd part of the instruction register
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#define rt(_instr) ((_instr >> 16) & 0x1F) // The rt part of the instruction register
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#define rt(_instr) ((_instr >> 16) & 0x1F) // The rt part of the instruction register
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#define rs(_instr) ((_instr >> 21) & 0x1F) // The rs part of the instruction register
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#define rs(_instr) ((_instr >> 21) & 0x1F) // The rs part of the instruction register
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#define imm(_instr) (_instr & 0xFFFF) // The immediate part of the instruction register
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#define imm(_instr) (_instr & 0xFFFF) // The immediate part of the instruction register
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void PGXP_InitCPU()
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void PGXP_InitCPU()
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@ -31,7 +31,7 @@ void PGXP_InitCPU()
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// invalidate register (invalid 8 bit read)
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// invalidate register (invalid 8 bit read)
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void InvalidLoad(u32 addr, u32 code, u32 value)
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void InvalidLoad(u32 addr, u32 code, u32 value)
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{
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{
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u32 reg = ((code >> 16) & 0x1F); // The rt part of the instruction register
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u32 reg = ((code >> 16) & 0x1F); // The rt part of the instruction register
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PGXP_value* pD = NULL;
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PGXP_value* pD = NULL;
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PGXP_value p;
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PGXP_value p;
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@ -60,7 +60,7 @@ void InvalidLoad(u32 addr, u32 code, u32 value)
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// invalidate memory address (invalid 8 bit write)
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// invalidate memory address (invalid 8 bit write)
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void InvalidStore(u32 addr, u32 code, u32 value)
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void InvalidStore(u32 addr, u32 code, u32 value)
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{
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{
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u32 reg = ((code >> 16) & 0x1F); // The rt part of the instruction register
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u32 reg = ((code >> 16) & 0x1F); // The rt part of the instruction register
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PGXP_value* pD = NULL;
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PGXP_value* pD = NULL;
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PGXP_value p;
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PGXP_value p;
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@ -86,7 +86,7 @@ void PGXP_CPU_ADDI(u32 instr, u32 rtVal, u32 rsVal)
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// Rt = Rs + Imm (signed)
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// Rt = Rs + Imm (signed)
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psx_value tempImm;
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psx_value tempImm;
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PGXP_value ret;
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PGXP_value ret;
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Validate(&CPU_reg[rs(instr)], rsVal);
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Validate(&CPU_reg[rs(instr)], rsVal);
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ret = CPU_reg[rs(instr)];
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ret = CPU_reg[rs(instr)];
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tempImm.d = imm(instr);
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tempImm.d = imm(instr);
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@ -674,11 +674,11 @@ void PGXP_CPU_SLL(u32 instr, u32 rdVal, u32 rtVal)
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PGXP_value ret;
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PGXP_value ret;
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u32 sh = sa(instr);
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u32 sh = sa(instr);
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Validate(&CPU_reg[rt(instr)], rtVal);
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Validate(&CPU_reg[rt(instr)], rtVal);
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ret = CPU_reg[rt(instr)];
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ret = CPU_reg[rt(instr)];
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// TODO: Shift flags
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// TODO: Shift flags
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#if 1
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#if 1
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double x = f16Unsign(CPU_reg[rt(instr)].x);
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double x = f16Unsign(CPU_reg[rt(instr)].x);
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double y = f16Unsign(CPU_reg[rt(instr)].y);
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double y = f16Unsign(CPU_reg[rt(instr)].y);
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if (sh >= 32)
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if (sh >= 32)
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@ -797,7 +797,7 @@ void PGXP_CPU_SRL(u32 instr, u32 rdVal, u32 rtVal)
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else if ((valt.w.h & mask) == 0)
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else if ((valt.w.h & mask) == 0)
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x = x;
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x = x;
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else
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else
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x += y * (1 << (16 - sh));//f16Overflow(y);
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x += y * (1 << (16 - sh));//f16Overflow(y);
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y = y / (1 << sh);
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y = y / (1 << sh);
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x = f16Sign(x);
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x = f16Sign(x);
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@ -882,7 +882,7 @@ void PGXP_CPU_SRA(u32 instr, u32 rdVal, u32 rtVal)
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else
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else
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{
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{
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x = x / (1 << sh);
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x = x / (1 << sh);
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// check for potential sign extension in overflow
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// check for potential sign extension in overflow
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psx_value valt;
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psx_value valt;
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valt.d = rtVal;
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valt.d = rtVal;
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@ -892,7 +892,7 @@ void PGXP_CPU_SRA(u32 instr, u32 rdVal, u32 rtVal)
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else if ((valt.w.h & mask) == 0)
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else if ((valt.w.h & mask) == 0)
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x = x;
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x = x;
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else
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else
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x += y * (1 << (16 - sh));//f16Overflow(y);
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x += y * (1 << (16 - sh));//f16Overflow(y);
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y = y / (1 << sh);
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y = y / (1 << sh);
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x = f16Sign(x);
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x = f16Sign(x);
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@ -1076,7 +1076,7 @@ void PGXP_CPU_SRLV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal)
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else
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else
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{
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{
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x = x / (1 << sh);
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x = x / (1 << sh);
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// check for potential sign extension in overflow
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// check for potential sign extension in overflow
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psx_value valt;
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psx_value valt;
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valt.d = rtVal;
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valt.d = rtVal;
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@ -1086,7 +1086,7 @@ void PGXP_CPU_SRLV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal)
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else if ((valt.w.h & mask) == 0)
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else if ((valt.w.h & mask) == 0)
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x = x;
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x = x;
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else
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else
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x += y * (1 << (16 - sh));//f16Overflow(y);
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x += y * (1 << (16 - sh));//f16Overflow(y);
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y = y / (1 << sh);
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y = y / (1 << sh);
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x = f16Sign(x);
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x = f16Sign(x);
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@ -1173,7 +1173,7 @@ void PGXP_CPU_SRAV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal)
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else
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else
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{
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{
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x = x / (1 << sh);
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x = x / (1 << sh);
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// check for potential sign extension in overflow
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// check for potential sign extension in overflow
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psx_value valt;
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psx_value valt;
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valt.d = rtVal;
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valt.d = rtVal;
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@ -1183,7 +1183,7 @@ void PGXP_CPU_SRAV(u32 instr, u32 rdVal, u32 rtVal, u32 rsVal)
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else if ((valt.w.h & mask) == 0)
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else if ((valt.w.h & mask) == 0)
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x = x;
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x = x;
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else
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else
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x += y * (1 << (16 - sh));//f16Overflow(y);
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x += y * (1 << (16 - sh));//f16Overflow(y);
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y = y / (1 << sh);
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y = y / (1 << sh);
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x = f16Sign(x);
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x = f16Sign(x);
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@ -1402,4 +1402,4 @@ void PGXP_CP0_CTC0(u32 instr, u32 rdVal, u32 rtVal)
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}
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}
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void PGXP_CP0_RFE(u32 instr)
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void PGXP_CP0_RFE(u32 instr)
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{}
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{}
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@ -160,7 +160,7 @@ void CALLBACK GPUpgxpCacheVertex(short sx, short sy, const unsigned char* _pVert
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if ((fabsf(pOldVertex->x - pNewVertex->x) > 0.1f) ||
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if ((fabsf(pOldVertex->x - pNewVertex->x) > 0.1f) ||
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(fabsf(pOldVertex->y - pNewVertex->y) > 0.1f) ||
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(fabsf(pOldVertex->y - pNewVertex->y) > 0.1f) ||
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(fabsf(pOldVertex->z - pNewVertex->z) > 0.1f))
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(fabsf(pOldVertex->z - pNewVertex->z) > 0.1f))
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{
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{
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pOldVertex->mFlags = 5;
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pOldVertex->mFlags = 5;
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return;
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return;
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}
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}
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@ -390,6 +390,11 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
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// calculate offset to actual data
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// calculate offset to actual data
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int offset = 0;
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int offset = 0;
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/* Dirty hack */
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if (!pDMABlock)
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return 0;
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while ((pDMABlock[offset] != *addr) && (offset < blockSize))
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while ((pDMABlock[offset] != *addr) && (offset < blockSize))
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{
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{
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unsigned char command = (unsigned char)((pDMABlock[offset] >> 24) & 0xff);
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unsigned char command = (unsigned char)((pDMABlock[offset] >> 24) & 0xff);
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@ -455,7 +460,7 @@ int PGXP_GetVertices(unsigned int* addr, void* pOutput, int xOffs, int yOffs)
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}
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}
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// Log incorrect vertices
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// Log incorrect vertices
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//if (PGXP_tDebug &&
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//if (PGXP_tDebug &&
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// (fabs((float)pPrimData[stride * i * 2] - primStart[stride * i].x) > debug_tolerance) ||
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// (fabs((float)pPrimData[stride * i * 2] - primStart[stride * i].x) > debug_tolerance) ||
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// (fabs((float)pPrimData[(stride * i * 2) + 1] - primStart[stride * i].y) > debug_tolerance))
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// (fabs((float)pPrimData[(stride * i * 2) + 1] - primStart[stride * i].y) > debug_tolerance))
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// __Log("GPPV: v:%x (%d, %d) pgxp(%f, %f)|\n", (currentAddr + offset + 1 + (i * stride)) * 4, pPrimData[stride * i * 2], pPrimData[(stride * i * 2) + 1], primStart[stride * i].x, primStart[stride * i].y);
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// __Log("GPPV: v:%x (%d, %d) pgxp(%f, %f)|\n", (currentAddr + offset + 1 + (i * stride)) * 4, pPrimData[stride * i * 2], pPrimData[(stride * i * 2) + 1], primStart[stride * i].x, primStart[stride * i].y);
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@ -527,7 +532,7 @@ enum PGXP_vDebugMode
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vDEBUG_MAX,
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vDEBUG_MAX,
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vDEBUG_TEXCOORD,
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vDEBUG_TEXCOORD,
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vDEBUG_ID,
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vDEBUG_ID,
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};
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};
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const char red[4] = { 255, 0, 0, 255 };
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const char red[4] = { 255, 0, 0, 255 };
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@ -569,7 +574,7 @@ void ColourFromRange(float val, float min, float max, GLubyte alpha, int wrap)
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if (wrap)
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if (wrap)
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val = fmod(val, 1);
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val = fmod(val, 1);
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if (0 <= val && val<= 1.f / 8.f)
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if (0 <= val && val<= 1.f / 8.f)
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{
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{
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r = 0;
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r = 0;
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g = 0;
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g = 0;
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@ -672,7 +677,7 @@ void PGXP_colour(OGLVertex* vertex, GLubyte alpha, int prim, int isTextured, int
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glColor4ubv(vertex->c.col);
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glColor4ubv(vertex->c.col);
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break;
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break;
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}
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}
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break;
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break;
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case vDEBUG_TEXTURE:
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case vDEBUG_TEXTURE:
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// Texture only
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// Texture only
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@ -830,4 +835,4 @@ int PGXP_DrawDebugQuad(OGLVertex* vertex1, OGLVertex* vertex2, OGLVertex* vertex
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int PGXP_DrawDebugTriQuad(OGLVertex* vertex1, OGLVertex* vertex2, OGLVertex* vertex3, OGLVertex* vertex4, int colourMode, int isTextured)
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int PGXP_DrawDebugTriQuad(OGLVertex* vertex1, OGLVertex* vertex2, OGLVertex* vertex3, OGLVertex* vertex4, int colourMode, int isTextured)
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{
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{
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return DrawDebugPrim(DRAW_TRIQUAD, vertex1, vertex2, vertex3, vertex4, colourMode, isTextured);
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return DrawDebugPrim(DRAW_TRIQUAD, vertex1, vertex2, vertex3, vertex4, colourMode, isTextured);
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}
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}
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