diff options
| author | Moyster <oysterized@gmail.com> | 2018-11-30 01:59:48 +0100 |
|---|---|---|
| committer | Moyster <oysterized@gmail.com> | 2018-11-30 01:59:48 +0100 |
| commit | faa9b140d85e35e48e204c361de2e33d5dfa4d62 (patch) | |
| tree | 36671a37b2a9f238de999c207d6cba186244c01b /drivers/misc/mediatek/mach | |
| parent | b2fcfa4dd718a7040ab7316d85ac8892eb342389 (diff) | |
misc: fix a bunch of 'warning: backslash and newline separated by space'
Diffstat (limited to 'drivers/misc/mediatek/mach')
| -rw-r--r-- | drivers/misc/mediatek/mach/mt6735/include/mach/mt_spm_cpu.h | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/drivers/misc/mediatek/mach/mt6735/include/mach/mt_spm_cpu.h b/drivers/misc/mediatek/mach/mt6735/include/mach/mt_spm_cpu.h index cb14a0623..f852ee72a 100644 --- a/drivers/misc/mediatek/mach/mt6735/include/mach/mt_spm_cpu.h +++ b/drivers/misc/mediatek/mach/mt6735/include/mach/mt_spm_cpu.h @@ -305,40 +305,40 @@ extern u32 spm_irq_7; SPM_WAKE_SRC(31, APSRC_SLEEP) \ } #else -#define SPM_WAKE_SRC_LIST { \ - SPM_WAKE_SRC(0, SPM_MERGE), /* PCM timer, TWAM or CPU */ \ - SPM_WAKE_SRC(1, MD32_WDT), \ - SPM_WAKE_SRC(2, KP), \ - SPM_WAKE_SRC(3, WDT), \ - SPM_WAKE_SRC(4, GPT), \ - SPM_WAKE_SRC(5, CONN2AP), \ - SPM_WAKE_SRC(6, EINT), \ - SPM_WAKE_SRC(7, CONN_WDT), \ - SPM_WAKE_SRC(8, CCIF0_MD), \ - SPM_WAKE_SRC(9, LOW_BAT), \ - SPM_WAKE_SRC(10, MD32_SPM), \ - SPM_WAKE_SRC(11, F26M_WAKE), \ - SPM_WAKE_SRC(12, F26M_SLEEP), \ - SPM_WAKE_SRC(13, PCM_WDT), \ - SPM_WAKE_SRC(14, USB_CD), \ - SPM_WAKE_SRC(15, USB_PDN), \ - SPM_WAKE_SRC(16, LTE_WAKE), \ - SPM_WAKE_SRC(17, LTE_SLEEP), \ - SPM_WAKE_SRC(18, CCIF1_MD), \ - SPM_WAKE_SRC(19, UART0), \ - SPM_WAKE_SRC(20, AFE), \ - SPM_WAKE_SRC(21, THERM), \ - SPM_WAKE_SRC(22, CIRQ), \ - SPM_WAKE_SRC(23, MD2_WDT), \ - SPM_WAKE_SRC(24, SYSPWREQ), \ - SPM_WAKE_SRC(25, MD_WDT), \ - SPM_WAKE_SRC(26, CLDMA_MD), \ - SPM_WAKE_SRC(27, SEJ), \ - SPM_WAKE_SRC(28, ALL_MD32), \ - SPM_WAKE_SRC(29, CPU_IRQ), \ - SPM_WAKE_SRC(30, APSRC_WAKE), \ - SPM_WAKE_SRC(31, APSRC_SLEEP) \ -} +#define SPM_WAKE_SRC_LIST { \ + SPM_WAKE_SRC(0, SPM_MERGE), /* PCM timer, TWAM or CPU */ \ + SPM_WAKE_SRC(1, MD32_WDT), \ + SPM_WAKE_SRC(2, KP), \ + SPM_WAKE_SRC(3, WDT), \ + SPM_WAKE_SRC(4, GPT), \ + SPM_WAKE_SRC(5, CONN2AP), \ + SPM_WAKE_SRC(6, EINT), \ + SPM_WAKE_SRC(7, CONN_WDT), \ + SPM_WAKE_SRC(8, CCIF0_MD), \ + SPM_WAKE_SRC(9, LOW_BAT), \ + SPM_WAKE_SRC(10, MD32_SPM), \ + SPM_WAKE_SRC(11, F26M_WAKE), \ + SPM_WAKE_SRC(12, F26M_SLEEP), \ + SPM_WAKE_SRC(13, PCM_WDT), \ + SPM_WAKE_SRC(14, USB_CD), \ + SPM_WAKE_SRC(15, USB_PDN), \ + SPM_WAKE_SRC(16, LTE_WAKE), \ + SPM_WAKE_SRC(17, LTE_SLEEP), \ + SPM_WAKE_SRC(18, CCIF1_MD), \ + SPM_WAKE_SRC(19, UART0), \ + SPM_WAKE_SRC(20, AFE), \ + SPM_WAKE_SRC(21, THERM), \ + SPM_WAKE_SRC(22, CIRQ), \ + SPM_WAKE_SRC(23, MD2_WDT), \ + SPM_WAKE_SRC(24, SYSPWREQ), \ + SPM_WAKE_SRC(25, MD_WDT), \ + SPM_WAKE_SRC(26, CLDMA_MD), \ + SPM_WAKE_SRC(27, SEJ), \ + SPM_WAKE_SRC(28, ALL_MD32), \ + SPM_WAKE_SRC(29, CPU_IRQ), \ + SPM_WAKE_SRC(30, APSRC_WAKE), \ + SPM_WAKE_SRC(31, APSRC_SLEEP) \ +} #endif /* define WAKE_SRC_XXX */ #undef SPM_WAKE_SRC |