1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
|
/*
* This declarations of the PIC12F683 MCU.
*
* This file is part of the GNU PIC library for SDCC, originally
* created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
*
* This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:04 UTC.
*
* SDCC is licensed under the GNU Public license (GPL) v2. Note that
* this license covers the code to the compiler and other executables,
* but explicitly does not cover any code or objects generated by sdcc.
*
* For pic device libraries and header files which are derived from
* Microchip header (.inc) and linker script (.lkr) files Microchip
* requires that "The header files should state that they are only to be
* used with authentic Microchip devices" which makes them incompatible
* with the GPL. Pic device libraries and header files are located at
* non-free/lib and non-free/include directories respectively.
* Sdcc should be run with the --use-non-free command line option in
* order to include non-free header files and libraries.
*
* See http://sdcc.sourceforge.net/ for the latest information on sdcc.
*/
#ifndef __PIC12F683_H__
#define __PIC12F683_H__
//==============================================================================
//
// Register Addresses
//
//==============================================================================
#ifndef NO_ADDR_DEFINES
#define INDF_ADDR 0x0000
#define TMR0_ADDR 0x0001
#define PCL_ADDR 0x0002
#define STATUS_ADDR 0x0003
#define FSR_ADDR 0x0004
#define GPIO_ADDR 0x0005
#define PCLATH_ADDR 0x000A
#define INTCON_ADDR 0x000B
#define PIR1_ADDR 0x000C
#define TMR1_ADDR 0x000E
#define TMR1L_ADDR 0x000E
#define TMR1H_ADDR 0x000F
#define T1CON_ADDR 0x0010
#define TMR2_ADDR 0x0011
#define T2CON_ADDR 0x0012
#define CCPR1_ADDR 0x0013
#define CCPR1L_ADDR 0x0013
#define CCPR1H_ADDR 0x0014
#define CCP1CON_ADDR 0x0015
#define WDTCON_ADDR 0x0018
#define CMCON0_ADDR 0x0019
#define CMCON1_ADDR 0x001A
#define ADRESH_ADDR 0x001E
#define ADCON0_ADDR 0x001F
#define OPTION_REG_ADDR 0x0081
#define TRISIO_ADDR 0x0085
#define PIE1_ADDR 0x008C
#define PCON_ADDR 0x008E
#define OSCCON_ADDR 0x008F
#define OSCTUNE_ADDR 0x0090
#define PR2_ADDR 0x0092
#define WPU_ADDR 0x0095
#define WPUA_ADDR 0x0095
#define IOC_ADDR 0x0096
#define IOCA_ADDR 0x0096
#define VRCON_ADDR 0x0099
#define EEDAT_ADDR 0x009A
#define EEDATA_ADDR 0x009A
#define EEADR_ADDR 0x009B
#define EECON1_ADDR 0x009C
#define EECON2_ADDR 0x009D
#define ADRESL_ADDR 0x009E
#define ANSEL_ADDR 0x009F
#endif // #ifndef NO_ADDR_DEFINES
//==============================================================================
//
// Register Definitions
//
//==============================================================================
extern __at(0x0000) __sfr INDF;
extern __at(0x0001) __sfr TMR0;
extern __at(0x0002) __sfr PCL;
//==============================================================================
// STATUS Bits
extern __at(0x0003) __sfr STATUS;
typedef union
{
struct
{
unsigned C : 1;
unsigned DC : 1;
unsigned Z : 1;
unsigned NOT_PD : 1;
unsigned NOT_TO : 1;
unsigned RP0 : 1;
unsigned RP1 : 1;
unsigned IRP : 1;
};
struct
{
unsigned : 5;
unsigned RP : 2;
unsigned : 1;
};
} __STATUSbits_t;
extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
#define _C 0x01
#define _DC 0x02
#define _Z 0x04
#define _NOT_PD 0x08
#define _NOT_TO 0x10
#define _RP0 0x20
#define _RP1 0x40
#define _IRP 0x80
//==============================================================================
extern __at(0x0004) __sfr FSR;
//==============================================================================
// GPIO Bits
extern __at(0x0005) __sfr GPIO;
typedef union
{
struct
{
unsigned GP0 : 1;
unsigned GP1 : 1;
unsigned GP2 : 1;
unsigned GP3 : 1;
unsigned GP4 : 1;
unsigned GP5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned GP : 6;
unsigned : 2;
};
} __GPIObits_t;
extern __at(0x0005) volatile __GPIObits_t GPIObits;
#define _GP0 0x01
#define _GP1 0x02
#define _GP2 0x04
#define _GP3 0x08
#define _GP4 0x10
#define _GP5 0x20
//==============================================================================
extern __at(0x000A) __sfr PCLATH;
//==============================================================================
// INTCON Bits
extern __at(0x000B) __sfr INTCON;
typedef union
{
struct
{
unsigned GPIF : 1;
unsigned INTF : 1;
unsigned T0IF : 1;
unsigned GPIE : 1;
unsigned INTE : 1;
unsigned T0IE : 1;
unsigned PEIE : 1;
unsigned GIE : 1;
};
struct
{
unsigned : 1;
unsigned : 1;
unsigned TMR0IF : 1;
unsigned : 1;
unsigned : 1;
unsigned TMR0IE : 1;
unsigned : 1;
unsigned : 1;
};
} __INTCONbits_t;
extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
#define _GPIF 0x01
#define _INTF 0x02
#define _T0IF 0x04
#define _TMR0IF 0x04
#define _GPIE 0x08
#define _INTE 0x10
#define _T0IE 0x20
#define _TMR0IE 0x20
#define _PEIE 0x40
#define _GIE 0x80
//==============================================================================
//==============================================================================
// PIR1 Bits
extern __at(0x000C) __sfr PIR1;
typedef union
{
struct
{
unsigned TMR1IF : 1;
unsigned TMR2IF : 1;
unsigned OSFIF : 1;
unsigned CMIF : 1;
unsigned : 1;
unsigned CCP1IF : 1;
unsigned ADIF : 1;
unsigned EEIF : 1;
};
struct
{
unsigned T1IF : 1;
unsigned T2IF : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
} __PIR1bits_t;
extern __at(0x000C) volatile __PIR1bits_t PIR1bits;
#define _TMR1IF 0x01
#define _T1IF 0x01
#define _TMR2IF 0x02
#define _T2IF 0x02
#define _OSFIF 0x04
#define _CMIF 0x08
#define _CCP1IF 0x20
#define _ADIF 0x40
#define _EEIF 0x80
//==============================================================================
extern __at(0x000E) __sfr TMR1;
extern __at(0x000E) __sfr TMR1L;
extern __at(0x000F) __sfr TMR1H;
//==============================================================================
// T1CON Bits
extern __at(0x0010) __sfr T1CON;
typedef union
{
struct
{
unsigned TMR1ON : 1;
unsigned TMR1CS : 1;
unsigned NOT_T1SYNC : 1;
unsigned T1OSCEN : 1;
unsigned T1CKPS0 : 1;
unsigned T1CKPS1 : 1;
unsigned TMR1GE : 1;
unsigned T1GINV : 1;
};
struct
{
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned T1GE : 1;
unsigned : 1;
};
struct
{
unsigned : 4;
unsigned T1CKPS : 2;
unsigned : 2;
};
} __T1CONbits_t;
extern __at(0x0010) volatile __T1CONbits_t T1CONbits;
#define _TMR1ON 0x01
#define _TMR1CS 0x02
#define _NOT_T1SYNC 0x04
#define _T1OSCEN 0x08
#define _T1CKPS0 0x10
#define _T1CKPS1 0x20
#define _TMR1GE 0x40
#define _T1GE 0x40
#define _T1GINV 0x80
//==============================================================================
extern __at(0x0011) __sfr TMR2;
//==============================================================================
// T2CON Bits
extern __at(0x0012) __sfr T2CON;
typedef union
{
struct
{
unsigned T2CKPS0 : 1;
unsigned T2CKPS1 : 1;
unsigned TMR2ON : 1;
unsigned TOUTPS0 : 1;
unsigned TOUTPS1 : 1;
unsigned TOUTPS2 : 1;
unsigned TOUTPS3 : 1;
unsigned : 1;
};
struct
{
unsigned T2CKPS : 2;
unsigned : 6;
};
struct
{
unsigned : 3;
unsigned TOUTPS : 4;
unsigned : 1;
};
} __T2CONbits_t;
extern __at(0x0012) volatile __T2CONbits_t T2CONbits;
#define _T2CKPS0 0x01
#define _T2CKPS1 0x02
#define _TMR2ON 0x04
#define _TOUTPS0 0x08
#define _TOUTPS1 0x10
#define _TOUTPS2 0x20
#define _TOUTPS3 0x40
//==============================================================================
extern __at(0x0013) __sfr CCPR1;
extern __at(0x0013) __sfr CCPR1L;
extern __at(0x0014) __sfr CCPR1H;
//==============================================================================
// CCP1CON Bits
extern __at(0x0015) __sfr CCP1CON;
typedef union
{
struct
{
unsigned CCP1M0 : 1;
unsigned CCP1M1 : 1;
unsigned CCP1M2 : 1;
unsigned CCP1M3 : 1;
unsigned DC1B0 : 1;
unsigned DC1B1 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned CCP1M : 4;
unsigned : 4;
};
struct
{
unsigned : 4;
unsigned DC1B : 2;
unsigned : 2;
};
} __CCP1CONbits_t;
extern __at(0x0015) volatile __CCP1CONbits_t CCP1CONbits;
#define _CCP1M0 0x01
#define _CCP1M1 0x02
#define _CCP1M2 0x04
#define _CCP1M3 0x08
#define _DC1B0 0x10
#define _DC1B1 0x20
//==============================================================================
//==============================================================================
// WDTCON Bits
extern __at(0x0018) __sfr WDTCON;
typedef union
{
struct
{
unsigned SWDTEN : 1;
unsigned WDTPS0 : 1;
unsigned WDTPS1 : 1;
unsigned WDTPS2 : 1;
unsigned WDTPS3 : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned : 1;
unsigned WDTPS : 4;
unsigned : 3;
};
} __WDTCONbits_t;
extern __at(0x0018) volatile __WDTCONbits_t WDTCONbits;
#define _SWDTEN 0x01
#define _WDTPS0 0x02
#define _WDTPS1 0x04
#define _WDTPS2 0x08
#define _WDTPS3 0x10
//==============================================================================
//==============================================================================
// CMCON0 Bits
extern __at(0x0019) __sfr CMCON0;
typedef union
{
struct
{
unsigned CM0 : 1;
unsigned CM1 : 1;
unsigned CM2 : 1;
unsigned CIS : 1;
unsigned CINV : 1;
unsigned : 1;
unsigned COUT : 1;
unsigned : 1;
};
struct
{
unsigned CM : 3;
unsigned : 5;
};
} __CMCON0bits_t;
extern __at(0x0019) volatile __CMCON0bits_t CMCON0bits;
#define _CM0 0x01
#define _CM1 0x02
#define _CM2 0x04
#define _CIS 0x08
#define _CINV 0x10
#define _COUT 0x40
//==============================================================================
//==============================================================================
// CMCON1 Bits
extern __at(0x001A) __sfr CMCON1;
typedef struct
{
unsigned CMSYNC : 1;
unsigned T1GSS : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
} __CMCON1bits_t;
extern __at(0x001A) volatile __CMCON1bits_t CMCON1bits;
#define _CMSYNC 0x01
#define _T1GSS 0x02
//==============================================================================
extern __at(0x001E) __sfr ADRESH;
//==============================================================================
// ADCON0 Bits
extern __at(0x001F) __sfr ADCON0;
typedef union
{
struct
{
unsigned ADON : 1;
unsigned GO_NOT_DONE : 1;
unsigned CHS0 : 1;
unsigned CHS1 : 1;
unsigned CHS2 : 1;
unsigned : 1;
unsigned VCFG : 1;
unsigned ADFM : 1;
};
struct
{
unsigned : 1;
unsigned GO : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned : 1;
unsigned NOT_DONE : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned : 1;
unsigned GO_DONE : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned : 2;
unsigned CHS : 3;
unsigned : 3;
};
} __ADCON0bits_t;
extern __at(0x001F) volatile __ADCON0bits_t ADCON0bits;
#define _ADON 0x01
#define _GO_NOT_DONE 0x02
#define _GO 0x02
#define _NOT_DONE 0x02
#define _GO_DONE 0x02
#define _CHS0 0x04
#define _CHS1 0x08
#define _CHS2 0x10
#define _VCFG 0x40
#define _ADFM 0x80
//==============================================================================
//==============================================================================
// OPTION_REG Bits
extern __at(0x0081) __sfr OPTION_REG;
typedef union
{
struct
{
unsigned PS0 : 1;
unsigned PS1 : 1;
unsigned PS2 : 1;
unsigned PSA : 1;
unsigned T0SE : 1;
unsigned T0CS : 1;
unsigned INTEDG : 1;
unsigned NOT_GPPU : 1;
};
struct
{
unsigned PS : 3;
unsigned : 5;
};
} __OPTION_REGbits_t;
extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits;
#define _PS0 0x01
#define _PS1 0x02
#define _PS2 0x04
#define _PSA 0x08
#define _T0SE 0x10
#define _T0CS 0x20
#define _INTEDG 0x40
#define _NOT_GPPU 0x80
//==============================================================================
//==============================================================================
// TRISIO Bits
extern __at(0x0085) __sfr TRISIO;
typedef union
{
struct
{
unsigned TRISIO0 : 1;
unsigned TRISIO1 : 1;
unsigned TRISIO2 : 1;
unsigned TRISIO3 : 1;
unsigned TRISIO4 : 1;
unsigned TRISIO5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned TRISIO : 6;
unsigned : 2;
};
} __TRISIObits_t;
extern __at(0x0085) volatile __TRISIObits_t TRISIObits;
#define _TRISIO0 0x01
#define _TRISIO1 0x02
#define _TRISIO2 0x04
#define _TRISIO3 0x08
#define _TRISIO4 0x10
#define _TRISIO5 0x20
//==============================================================================
//==============================================================================
// PIE1 Bits
extern __at(0x008C) __sfr PIE1;
typedef union
{
struct
{
unsigned TMR1IE : 1;
unsigned TMR2IE : 1;
unsigned OSFIE : 1;
unsigned CMIE : 1;
unsigned : 1;
unsigned CCP1IE : 1;
unsigned ADIE : 1;
unsigned EEIE : 1;
};
struct
{
unsigned T1IE : 1;
unsigned T2IE : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
} __PIE1bits_t;
extern __at(0x008C) volatile __PIE1bits_t PIE1bits;
#define _TMR1IE 0x01
#define _T1IE 0x01
#define _TMR2IE 0x02
#define _T2IE 0x02
#define _OSFIE 0x04
#define _CMIE 0x08
#define _CCP1IE 0x20
#define _ADIE 0x40
#define _EEIE 0x80
//==============================================================================
//==============================================================================
// PCON Bits
extern __at(0x008E) __sfr PCON;
typedef struct
{
unsigned NOT_BOD : 1;
unsigned NOT_POR : 1;
unsigned : 1;
unsigned : 1;
unsigned SBODEN : 1;
unsigned ULPWUE : 1;
unsigned : 1;
unsigned : 1;
} __PCONbits_t;
extern __at(0x008E) volatile __PCONbits_t PCONbits;
#define _NOT_BOD 0x01
#define _NOT_POR 0x02
#define _SBODEN 0x10
#define _ULPWUE 0x20
//==============================================================================
//==============================================================================
// OSCCON Bits
extern __at(0x008F) __sfr OSCCON;
typedef union
{
struct
{
unsigned SCS : 1;
unsigned LTS : 1;
unsigned HTS : 1;
unsigned OSTS : 1;
unsigned IRCF0 : 1;
unsigned IRCF1 : 1;
unsigned IRCF2 : 1;
unsigned : 1;
};
struct
{
unsigned : 4;
unsigned IRCF : 3;
unsigned : 1;
};
} __OSCCONbits_t;
extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits;
#define _SCS 0x01
#define _LTS 0x02
#define _HTS 0x04
#define _OSTS 0x08
#define _IRCF0 0x10
#define _IRCF1 0x20
#define _IRCF2 0x40
//==============================================================================
//==============================================================================
// OSCTUNE Bits
extern __at(0x0090) __sfr OSCTUNE;
typedef union
{
struct
{
unsigned TUN0 : 1;
unsigned TUN1 : 1;
unsigned TUN2 : 1;
unsigned TUN3 : 1;
unsigned TUN4 : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned TUN : 5;
unsigned : 3;
};
} __OSCTUNEbits_t;
extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits;
#define _TUN0 0x01
#define _TUN1 0x02
#define _TUN2 0x04
#define _TUN3 0x08
#define _TUN4 0x10
//==============================================================================
extern __at(0x0092) __sfr PR2;
//==============================================================================
// WPU Bits
extern __at(0x0095) __sfr WPU;
typedef union
{
struct
{
unsigned WPU0 : 1;
unsigned WPU1 : 1;
unsigned WPU2 : 1;
unsigned : 1;
unsigned WPU4 : 1;
unsigned WPU5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned WPUA0 : 1;
unsigned WPUA1 : 1;
unsigned WPUA2 : 1;
unsigned : 1;
unsigned WPUA4 : 1;
unsigned WPUA5 : 1;
unsigned : 1;
unsigned : 1;
};
} __WPUbits_t;
extern __at(0x0095) volatile __WPUbits_t WPUbits;
#define _WPU0 0x01
#define _WPUA0 0x01
#define _WPU1 0x02
#define _WPUA1 0x02
#define _WPU2 0x04
#define _WPUA2 0x04
#define _WPU4 0x10
#define _WPUA4 0x10
#define _WPU5 0x20
#define _WPUA5 0x20
//==============================================================================
//==============================================================================
// WPUA Bits
extern __at(0x0095) __sfr WPUA;
typedef union
{
struct
{
unsigned WPU0 : 1;
unsigned WPU1 : 1;
unsigned WPU2 : 1;
unsigned : 1;
unsigned WPU4 : 1;
unsigned WPU5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned WPUA0 : 1;
unsigned WPUA1 : 1;
unsigned WPUA2 : 1;
unsigned : 1;
unsigned WPUA4 : 1;
unsigned WPUA5 : 1;
unsigned : 1;
unsigned : 1;
};
} __WPUAbits_t;
extern __at(0x0095) volatile __WPUAbits_t WPUAbits;
#define _WPUA_WPU0 0x01
#define _WPUA_WPUA0 0x01
#define _WPUA_WPU1 0x02
#define _WPUA_WPUA1 0x02
#define _WPUA_WPU2 0x04
#define _WPUA_WPUA2 0x04
#define _WPUA_WPU4 0x10
#define _WPUA_WPUA4 0x10
#define _WPUA_WPU5 0x20
#define _WPUA_WPUA5 0x20
//==============================================================================
//==============================================================================
// IOC Bits
extern __at(0x0096) __sfr IOC;
typedef union
{
struct
{
unsigned IOC0 : 1;
unsigned IOC1 : 1;
unsigned IOC2 : 1;
unsigned IOC3 : 1;
unsigned IOC4 : 1;
unsigned IOC5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned IOCA0 : 1;
unsigned IOCA1 : 1;
unsigned IOCA2 : 1;
unsigned IOCA3 : 1;
unsigned IOCA4 : 1;
unsigned IOCA5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned IOCA : 6;
unsigned : 2;
};
struct
{
unsigned IOC : 6;
unsigned : 2;
};
} __IOCbits_t;
extern __at(0x0096) volatile __IOCbits_t IOCbits;
#define _IOC0 0x01
#define _IOCA0 0x01
#define _IOC1 0x02
#define _IOCA1 0x02
#define _IOC2 0x04
#define _IOCA2 0x04
#define _IOC3 0x08
#define _IOCA3 0x08
#define _IOC4 0x10
#define _IOCA4 0x10
#define _IOC5 0x20
#define _IOCA5 0x20
//==============================================================================
//==============================================================================
// IOCA Bits
extern __at(0x0096) __sfr IOCA;
typedef union
{
struct
{
unsigned IOC0 : 1;
unsigned IOC1 : 1;
unsigned IOC2 : 1;
unsigned IOC3 : 1;
unsigned IOC4 : 1;
unsigned IOC5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned IOCA0 : 1;
unsigned IOCA1 : 1;
unsigned IOCA2 : 1;
unsigned IOCA3 : 1;
unsigned IOCA4 : 1;
unsigned IOCA5 : 1;
unsigned : 1;
unsigned : 1;
};
struct
{
unsigned IOC : 6;
unsigned : 2;
};
struct
{
unsigned IOCA : 6;
unsigned : 2;
};
} __IOCAbits_t;
extern __at(0x0096) volatile __IOCAbits_t IOCAbits;
#define _IOCA_IOC0 0x01
#define _IOCA_IOCA0 0x01
#define _IOCA_IOC1 0x02
#define _IOCA_IOCA1 0x02
#define _IOCA_IOC2 0x04
#define _IOCA_IOCA2 0x04
#define _IOCA_IOC3 0x08
#define _IOCA_IOCA3 0x08
#define _IOCA_IOC4 0x10
#define _IOCA_IOCA4 0x10
#define _IOCA_IOC5 0x20
#define _IOCA_IOCA5 0x20
//==============================================================================
//==============================================================================
// VRCON Bits
extern __at(0x0099) __sfr VRCON;
typedef union
{
struct
{
unsigned VR0 : 1;
unsigned VR1 : 1;
unsigned VR2 : 1;
unsigned VR3 : 1;
unsigned : 1;
unsigned VRR : 1;
unsigned : 1;
unsigned VREN : 1;
};
struct
{
unsigned VR : 4;
unsigned : 4;
};
} __VRCONbits_t;
extern __at(0x0099) volatile __VRCONbits_t VRCONbits;
#define _VR0 0x01
#define _VR1 0x02
#define _VR2 0x04
#define _VR3 0x08
#define _VRR 0x20
#define _VREN 0x80
//==============================================================================
extern __at(0x009A) __sfr EEDAT;
extern __at(0x009A) __sfr EEDATA;
extern __at(0x009B) __sfr EEADR;
//==============================================================================
// EECON1 Bits
extern __at(0x009C) __sfr EECON1;
typedef struct
{
unsigned RD : 1;
unsigned WR : 1;
unsigned WREN : 1;
unsigned WRERR : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
unsigned : 1;
} __EECON1bits_t;
extern __at(0x009C) volatile __EECON1bits_t EECON1bits;
#define _RD 0x01
#define _WR 0x02
#define _WREN 0x04
#define _WRERR 0x08
//==============================================================================
extern __at(0x009D) __sfr EECON2;
extern __at(0x009E) __sfr ADRESL;
//==============================================================================
// ANSEL Bits
extern __at(0x009F) __sfr ANSEL;
typedef union
{
struct
{
unsigned ANS0 : 1;
unsigned ANS1 : 1;
unsigned ANS2 : 1;
unsigned ANS3 : 1;
unsigned ADCS0 : 1;
unsigned ADCS1 : 1;
unsigned ADCS2 : 1;
unsigned : 1;
};
struct
{
unsigned ANS : 4;
unsigned : 4;
};
struct
{
unsigned : 4;
unsigned ADCS : 3;
unsigned : 1;
};
} __ANSELbits_t;
extern __at(0x009F) volatile __ANSELbits_t ANSELbits;
#define _ANS0 0x01
#define _ANS1 0x02
#define _ANS2 0x04
#define _ANS3 0x08
#define _ADCS0 0x10
#define _ADCS1 0x20
#define _ADCS2 0x40
//==============================================================================
//==============================================================================
//
// Configuration Bits
//
//==============================================================================
#define _CONFIG 0x2007
//----------------------------- CONFIG Options -------------------------------
#define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
#define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
#define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
#define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKINT.
#define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
#define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA4/OSC2/CLKOUT and RA5/OSC1/CLKIN.
#define _FOSC_EC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
#define _EC_OSC 0x3FFB // EC: I/O function on RA4/OSC2/CLKOUT pin, CLKIN on RA5/OSC1/CLKIN.
#define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
#define _INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
#define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
#define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
#define _INTOSC 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
#define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/OSC2/CLKOUT pin, I/O function on RA5/OSC1/CLKIN.
#define _FOSC_EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
#define _EXTRCIO 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
#define _EXTRC_OSC_NOCLKOUT 0x3FFE // EXTRCIO oscillator: External RC on RA5/OSC1/CLKIN, I/O function on RA4/OSC2/CLKOUT pin.
#define _FOSC_EXTRCCLK 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
#define _EXTRC 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
#define _EXTRC_OSC_CLKOUT 0x3FFF // EXTRC oscillator: External RC on RA5/OSC1/CLKIN, CLKOUT function on RA4/OSC2/CLKOUT pin.
#define _WDTE_OFF 0x3FF7 // WDT disabled.
#define _WDT_OFF 0x3FF7 // WDT disabled.
#define _WDTE_ON 0x3FFF // WDT enabled.
#define _WDT_ON 0x3FFF // WDT enabled.
#define _PWRTE_ON 0x3FEF // PWRT enabled.
#define _PWRTE_OFF 0x3FFF // PWRT disabled.
#define _MCLRE_OFF 0x3FDF // MCLR pin function is digital input, MCLR internally tied to VDD.
#define _MCLRE_ON 0x3FFF // MCLR pin function is MCLR.
#define _CP_ON 0x3FBF // Program memory code protection is enabled.
#define _CP_OFF 0x3FFF // Program memory code protection is disabled.
#define _CPD_ON 0x3F7F // Data memory code protection is enabled.
#define _CPD_OFF 0x3FFF // Data memory code protection is disabled.
#define _BOREN_OFF 0x3CFF // BOR disabled.
#define _BOD_OFF 0x3CFF // BOR disabled.
#define _BOREN_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
#define _BOD_SBODEN 0x3DFF // BOR controlled by SBOREN bit of the PCON register.
#define _BOREN_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
#define _BOD_NSLEEP 0x3EFF // BOR enabled during operation and disabled in Sleep.
#define _BOREN_ON 0x3FFF // BOR enabled.
#define _BOD_ON 0x3FFF // BOR enabled.
#define _IESO_OFF 0x3BFF // Internal External Switchover mode is disabled.
#define _IESO_ON 0x3FFF // Internal External Switchover mode is enabled.
#define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor is disabled.
#define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled.
//==============================================================================
#define _DEVID1 0x2006
#define _IDLOC0 0x2000
#define _IDLOC1 0x2001
#define _IDLOC2 0x2002
#define _IDLOC3 0x2003
//==============================================================================
#ifndef NO_BIT_DEFINES
#define ADON ADCON0bits.ADON // bit 0
#define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits
#define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits
#define NOT_DONE ADCON0bits.NOT_DONE // bit 1, shadows bit in ADCON0bits
#define GO_DONE ADCON0bits.GO_DONE // bit 1, shadows bit in ADCON0bits
#define CHS0 ADCON0bits.CHS0 // bit 2
#define CHS1 ADCON0bits.CHS1 // bit 3
#define CHS2 ADCON0bits.CHS2 // bit 4
#define VCFG ADCON0bits.VCFG // bit 6
#define ADFM ADCON0bits.ADFM // bit 7
#define ANS0 ANSELbits.ANS0 // bit 0
#define ANS1 ANSELbits.ANS1 // bit 1
#define ANS2 ANSELbits.ANS2 // bit 2
#define ANS3 ANSELbits.ANS3 // bit 3
#define ADCS0 ANSELbits.ADCS0 // bit 4
#define ADCS1 ANSELbits.ADCS1 // bit 5
#define ADCS2 ANSELbits.ADCS2 // bit 6
#define CCP1M0 CCP1CONbits.CCP1M0 // bit 0
#define CCP1M1 CCP1CONbits.CCP1M1 // bit 1
#define CCP1M2 CCP1CONbits.CCP1M2 // bit 2
#define CCP1M3 CCP1CONbits.CCP1M3 // bit 3
#define DC1B0 CCP1CONbits.DC1B0 // bit 4
#define DC1B1 CCP1CONbits.DC1B1 // bit 5
#define CM0 CMCON0bits.CM0 // bit 0
#define CM1 CMCON0bits.CM1 // bit 1
#define CM2 CMCON0bits.CM2 // bit 2
#define CIS CMCON0bits.CIS // bit 3
#define CINV CMCON0bits.CINV // bit 4
#define COUT CMCON0bits.COUT // bit 6
#define CMSYNC CMCON1bits.CMSYNC // bit 0
#define T1GSS CMCON1bits.T1GSS // bit 1
#define RD EECON1bits.RD // bit 0
#define WR EECON1bits.WR // bit 1
#define WREN EECON1bits.WREN // bit 2
#define WRERR EECON1bits.WRERR // bit 3
#define GP0 GPIObits.GP0 // bit 0
#define GP1 GPIObits.GP1 // bit 1
#define GP2 GPIObits.GP2 // bit 2
#define GP3 GPIObits.GP3 // bit 3
#define GP4 GPIObits.GP4 // bit 4
#define GP5 GPIObits.GP5 // bit 5
#define GPIF INTCONbits.GPIF // bit 0
#define INTF INTCONbits.INTF // bit 1
#define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
#define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
#define GPIE INTCONbits.GPIE // bit 3
#define INTE INTCONbits.INTE // bit 4
#define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
#define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
#define PEIE INTCONbits.PEIE // bit 6
#define GIE INTCONbits.GIE // bit 7
#define IOC0 IOCbits.IOC0 // bit 0, shadows bit in IOCbits
#define IOCA0 IOCbits.IOCA0 // bit 0, shadows bit in IOCbits
#define IOC1 IOCbits.IOC1 // bit 1, shadows bit in IOCbits
#define IOCA1 IOCbits.IOCA1 // bit 1, shadows bit in IOCbits
#define IOC2 IOCbits.IOC2 // bit 2, shadows bit in IOCbits
#define IOCA2 IOCbits.IOCA2 // bit 2, shadows bit in IOCbits
#define IOC3 IOCbits.IOC3 // bit 3, shadows bit in IOCbits
#define IOCA3 IOCbits.IOCA3 // bit 3, shadows bit in IOCbits
#define IOC4 IOCbits.IOC4 // bit 4, shadows bit in IOCbits
#define IOCA4 IOCbits.IOCA4 // bit 4, shadows bit in IOCbits
#define IOC5 IOCbits.IOC5 // bit 5, shadows bit in IOCbits
#define IOCA5 IOCbits.IOCA5 // bit 5, shadows bit in IOCbits
#define PS0 OPTION_REGbits.PS0 // bit 0
#define PS1 OPTION_REGbits.PS1 // bit 1
#define PS2 OPTION_REGbits.PS2 // bit 2
#define PSA OPTION_REGbits.PSA // bit 3
#define T0SE OPTION_REGbits.T0SE // bit 4
#define T0CS OPTION_REGbits.T0CS // bit 5
#define INTEDG OPTION_REGbits.INTEDG // bit 6
#define NOT_GPPU OPTION_REGbits.NOT_GPPU // bit 7
#define SCS OSCCONbits.SCS // bit 0
#define LTS OSCCONbits.LTS // bit 1
#define HTS OSCCONbits.HTS // bit 2
#define OSTS OSCCONbits.OSTS // bit 3
#define IRCF0 OSCCONbits.IRCF0 // bit 4
#define IRCF1 OSCCONbits.IRCF1 // bit 5
#define IRCF2 OSCCONbits.IRCF2 // bit 6
#define TUN0 OSCTUNEbits.TUN0 // bit 0
#define TUN1 OSCTUNEbits.TUN1 // bit 1
#define TUN2 OSCTUNEbits.TUN2 // bit 2
#define TUN3 OSCTUNEbits.TUN3 // bit 3
#define TUN4 OSCTUNEbits.TUN4 // bit 4
#define NOT_BOD PCONbits.NOT_BOD // bit 0
#define NOT_POR PCONbits.NOT_POR // bit 1
#define SBODEN PCONbits.SBODEN // bit 4
#define ULPWUE PCONbits.ULPWUE // bit 5
#define TMR1IE PIE1bits.TMR1IE // bit 0, shadows bit in PIE1bits
#define T1IE PIE1bits.T1IE // bit 0, shadows bit in PIE1bits
#define TMR2IE PIE1bits.TMR2IE // bit 1, shadows bit in PIE1bits
#define T2IE PIE1bits.T2IE // bit 1, shadows bit in PIE1bits
#define OSFIE PIE1bits.OSFIE // bit 2
#define CMIE PIE1bits.CMIE // bit 3
#define CCP1IE PIE1bits.CCP1IE // bit 5
#define ADIE PIE1bits.ADIE // bit 6
#define EEIE PIE1bits.EEIE // bit 7
#define TMR1IF PIR1bits.TMR1IF // bit 0, shadows bit in PIR1bits
#define T1IF PIR1bits.T1IF // bit 0, shadows bit in PIR1bits
#define TMR2IF PIR1bits.TMR2IF // bit 1, shadows bit in PIR1bits
#define T2IF PIR1bits.T2IF // bit 1, shadows bit in PIR1bits
#define OSFIF PIR1bits.OSFIF // bit 2
#define CMIF PIR1bits.CMIF // bit 3
#define CCP1IF PIR1bits.CCP1IF // bit 5
#define ADIF PIR1bits.ADIF // bit 6
#define EEIF PIR1bits.EEIF // bit 7
#define C STATUSbits.C // bit 0
#define DC STATUSbits.DC // bit 1
#define Z STATUSbits.Z // bit 2
#define NOT_PD STATUSbits.NOT_PD // bit 3
#define NOT_TO STATUSbits.NOT_TO // bit 4
#define RP0 STATUSbits.RP0 // bit 5
#define RP1 STATUSbits.RP1 // bit 6
#define IRP STATUSbits.IRP // bit 7
#define TMR1ON T1CONbits.TMR1ON // bit 0
#define TMR1CS T1CONbits.TMR1CS // bit 1
#define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2
#define T1OSCEN T1CONbits.T1OSCEN // bit 3
#define T1CKPS0 T1CONbits.T1CKPS0 // bit 4
#define T1CKPS1 T1CONbits.T1CKPS1 // bit 5
#define TMR1GE T1CONbits.TMR1GE // bit 6, shadows bit in T1CONbits
#define T1GE T1CONbits.T1GE // bit 6, shadows bit in T1CONbits
#define T1GINV T1CONbits.T1GINV // bit 7
#define T2CKPS0 T2CONbits.T2CKPS0 // bit 0
#define T2CKPS1 T2CONbits.T2CKPS1 // bit 1
#define TMR2ON T2CONbits.TMR2ON // bit 2
#define TOUTPS0 T2CONbits.TOUTPS0 // bit 3
#define TOUTPS1 T2CONbits.TOUTPS1 // bit 4
#define TOUTPS2 T2CONbits.TOUTPS2 // bit 5
#define TOUTPS3 T2CONbits.TOUTPS3 // bit 6
#define TRISIO0 TRISIObits.TRISIO0 // bit 0
#define TRISIO1 TRISIObits.TRISIO1 // bit 1
#define TRISIO2 TRISIObits.TRISIO2 // bit 2
#define TRISIO3 TRISIObits.TRISIO3 // bit 3
#define TRISIO4 TRISIObits.TRISIO4 // bit 4
#define TRISIO5 TRISIObits.TRISIO5 // bit 5
#define VR0 VRCONbits.VR0 // bit 0
#define VR1 VRCONbits.VR1 // bit 1
#define VR2 VRCONbits.VR2 // bit 2
#define VR3 VRCONbits.VR3 // bit 3
#define VRR VRCONbits.VRR // bit 5
#define VREN VRCONbits.VREN // bit 7
#define SWDTEN WDTCONbits.SWDTEN // bit 0
#define WDTPS0 WDTCONbits.WDTPS0 // bit 1
#define WDTPS1 WDTCONbits.WDTPS1 // bit 2
#define WDTPS2 WDTCONbits.WDTPS2 // bit 3
#define WDTPS3 WDTCONbits.WDTPS3 // bit 4
#define WPU0 WPUbits.WPU0 // bit 0, shadows bit in WPUbits
#define WPUA0 WPUbits.WPUA0 // bit 0, shadows bit in WPUbits
#define WPU1 WPUbits.WPU1 // bit 1, shadows bit in WPUbits
#define WPUA1 WPUbits.WPUA1 // bit 1, shadows bit in WPUbits
#define WPU2 WPUbits.WPU2 // bit 2, shadows bit in WPUbits
#define WPUA2 WPUbits.WPUA2 // bit 2, shadows bit in WPUbits
#define WPU4 WPUbits.WPU4 // bit 4, shadows bit in WPUbits
#define WPUA4 WPUbits.WPUA4 // bit 4, shadows bit in WPUbits
#define WPU5 WPUbits.WPU5 // bit 5, shadows bit in WPUbits
#define WPUA5 WPUbits.WPUA5 // bit 5, shadows bit in WPUbits
#endif // #ifndef NO_BIT_DEFINES
#endif // #ifndef __PIC12F683_H__
|
