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Diffstat (limited to 'device/non-free/include/pic14/pic12lf1552.h')
-rw-r--r--device/non-free/include/pic14/pic12lf1552.h2173
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diff --git a/device/non-free/include/pic14/pic12lf1552.h b/device/non-free/include/pic14/pic12lf1552.h
new file mode 100644
index 0000000..b16b2cf
--- /dev/null
+++ b/device/non-free/include/pic14/pic12lf1552.h
@@ -0,0 +1,2173 @@
+/*
+ * This declarations of the PIC12LF1552 MCU.
+ *
+ * This file is part of the GNU PIC library for SDCC, originally
+ * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
+ *
+ * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:07 UTC.
+ *
+ * SDCC is licensed under the GNU Public license (GPL) v2. Note that
+ * this license covers the code to the compiler and other executables,
+ * but explicitly does not cover any code or objects generated by sdcc.
+ *
+ * For pic device libraries and header files which are derived from
+ * Microchip header (.inc) and linker script (.lkr) files Microchip
+ * requires that "The header files should state that they are only to be
+ * used with authentic Microchip devices" which makes them incompatible
+ * with the GPL. Pic device libraries and header files are located at
+ * non-free/lib and non-free/include directories respectively.
+ * Sdcc should be run with the --use-non-free command line option in
+ * order to include non-free header files and libraries.
+ *
+ * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
+ */
+
+#ifndef __PIC12LF1552_H__
+#define __PIC12LF1552_H__
+
+//==============================================================================
+//
+// Register Addresses
+//
+//==============================================================================
+
+#ifndef NO_ADDR_DEFINES
+
+#define INDF0_ADDR 0x0000
+#define INDF1_ADDR 0x0001
+#define PCL_ADDR 0x0002
+#define STATUS_ADDR 0x0003
+#define FSR0_ADDR 0x0004
+#define FSR0L_ADDR 0x0004
+#define FSR0H_ADDR 0x0005
+#define FSR1_ADDR 0x0006
+#define FSR1L_ADDR 0x0006
+#define FSR1H_ADDR 0x0007
+#define BSR_ADDR 0x0008
+#define WREG_ADDR 0x0009
+#define PCLATH_ADDR 0x000A
+#define INTCON_ADDR 0x000B
+#define PORTA_ADDR 0x000C
+#define PIR1_ADDR 0x0011
+#define PIR2_ADDR 0x0012
+#define TMR0_ADDR 0x0015
+#define TRISA_ADDR 0x008C
+#define PIE1_ADDR 0x0091
+#define PIE2_ADDR 0x0092
+#define OPTION_REG_ADDR 0x0095
+#define PCON_ADDR 0x0096
+#define WDTCON_ADDR 0x0097
+#define OSCCON_ADDR 0x0099
+#define OSCSTAT_ADDR 0x009A
+#define ADRES_ADDR 0x009B
+#define ADRESL_ADDR 0x009B
+#define ADRESH_ADDR 0x009C
+#define ADCON0_ADDR 0x009D
+#define ADCON1_ADDR 0x009E
+#define ADCON2_ADDR 0x009F
+#define LATA_ADDR 0x010C
+#define BORCON_ADDR 0x0116
+#define FVRCON_ADDR 0x0117
+#define APFCON_ADDR 0x011D
+#define APFCON0_ADDR 0x011D
+#define ANSELA_ADDR 0x018C
+#define PMADR_ADDR 0x0191
+#define PMADRL_ADDR 0x0191
+#define PMADRH_ADDR 0x0192
+#define PMDAT_ADDR 0x0193
+#define PMDATL_ADDR 0x0193
+#define PMDATH_ADDR 0x0194
+#define PMCON1_ADDR 0x0195
+#define PMCON2_ADDR 0x0196
+#define WPUA_ADDR 0x020C
+#define SSP1BUF_ADDR 0x0211
+#define SSPBUF_ADDR 0x0211
+#define SSP1ADD_ADDR 0x0212
+#define SSPADD_ADDR 0x0212
+#define SSP1MSK_ADDR 0x0213
+#define SSPMSK_ADDR 0x0213
+#define SSP1STAT_ADDR 0x0214
+#define SSPSTAT_ADDR 0x0214
+#define SSP1CON1_ADDR 0x0215
+#define SSPCON_ADDR 0x0215
+#define SSPCON1_ADDR 0x0215
+#define SSP1CON2_ADDR 0x0216
+#define SSPCON2_ADDR 0x0216
+#define SSP1CON3_ADDR 0x0217
+#define SSPCON3_ADDR 0x0217
+#define IOCAP_ADDR 0x0391
+#define IOCAN_ADDR 0x0392
+#define IOCAF_ADDR 0x0393
+#define AADCON0_ADDR 0x0711
+#define AADCON1_ADDR 0x0712
+#define AADCON2_ADDR 0x0713
+#define AADCON3_ADDR 0x0714
+#define AADSTAT_ADDR 0x0715
+#define AADPRE_ADDR 0x0716
+#define AADACQ_ADDR 0x0717
+#define AADGRD_ADDR 0x0718
+#define AADCAP_ADDR 0x0719
+#define AADRES0_ADDR 0x071A
+#define AADRES0L_ADDR 0x071A
+#define AD1RES0_ADDR 0x071A
+#define ADRES0_ADDR 0x071A
+#define AADRES0H_ADDR 0x071B
+#define AADRES1_ADDR 0x071C
+#define AADRES1L_ADDR 0x071C
+#define AD1RES1_ADDR 0x071C
+#define ADRES1_ADDR 0x071C
+#define AADRES1H_ADDR 0x071D
+#define STATUS_SHAD_ADDR 0x0FE4
+#define WREG_SHAD_ADDR 0x0FE5
+#define BSR_SHAD_ADDR 0x0FE6
+#define PCLATH_SHAD_ADDR 0x0FE7
+#define FSR0L_SHAD_ADDR 0x0FE8
+#define FSR0H_SHAD_ADDR 0x0FE9
+#define FSR1L_SHAD_ADDR 0x0FEA
+#define FSR1H_SHAD_ADDR 0x0FEB
+#define STKPTR_ADDR 0x0FED
+#define TOSL_ADDR 0x0FEE
+#define TOSH_ADDR 0x0FEF
+
+#endif // #ifndef NO_ADDR_DEFINES
+
+//==============================================================================
+//
+// Register Definitions
+//
+//==============================================================================
+
+extern __at(0x0000) __sfr INDF0;
+extern __at(0x0001) __sfr INDF1;
+extern __at(0x0002) __sfr PCL;
+
+//==============================================================================
+// STATUS Bits
+
+extern __at(0x0003) __sfr STATUS;
+
+typedef struct
+ {
+ unsigned C : 1;
+ unsigned DC : 1;
+ unsigned Z : 1;
+ unsigned NOT_PD : 1;
+ unsigned NOT_TO : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __STATUSbits_t;
+
+extern __at(0x0003) volatile __STATUSbits_t STATUSbits;
+
+#define _C 0x01
+#define _DC 0x02
+#define _Z 0x04
+#define _NOT_PD 0x08
+#define _NOT_TO 0x10
+
+//==============================================================================
+
+extern __at(0x0004) __sfr FSR0;
+extern __at(0x0004) __sfr FSR0L;
+extern __at(0x0005) __sfr FSR0H;
+extern __at(0x0006) __sfr FSR1;
+extern __at(0x0006) __sfr FSR1L;
+extern __at(0x0007) __sfr FSR1H;
+
+//==============================================================================
+// BSR Bits
+
+extern __at(0x0008) __sfr BSR;
+
+typedef union
+ {
+ struct
+ {
+ unsigned BSR0 : 1;
+ unsigned BSR1 : 1;
+ unsigned BSR2 : 1;
+ unsigned BSR3 : 1;
+ unsigned BSR4 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned BSR : 5;
+ unsigned : 3;
+ };
+ } __BSRbits_t;
+
+extern __at(0x0008) volatile __BSRbits_t BSRbits;
+
+#define _BSR0 0x01
+#define _BSR1 0x02
+#define _BSR2 0x04
+#define _BSR3 0x08
+#define _BSR4 0x10
+
+//==============================================================================
+
+extern __at(0x0009) __sfr WREG;
+extern __at(0x000A) __sfr PCLATH;
+
+//==============================================================================
+// INTCON Bits
+
+extern __at(0x000B) __sfr INTCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned IOCIF : 1;
+ unsigned INTF : 1;
+ unsigned TMR0IF : 1;
+ unsigned IOCIE : 1;
+ unsigned INTE : 1;
+ unsigned TMR0IE : 1;
+ unsigned PEIE : 1;
+ unsigned GIE : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T0IF : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T0IE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+ } __INTCONbits_t;
+
+extern __at(0x000B) volatile __INTCONbits_t INTCONbits;
+
+#define _IOCIF 0x01
+#define _INTF 0x02
+#define _TMR0IF 0x04
+#define _T0IF 0x04
+#define _IOCIE 0x08
+#define _INTE 0x10
+#define _TMR0IE 0x20
+#define _T0IE 0x20
+#define _PEIE 0x40
+#define _GIE 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// PORTA Bits
+
+extern __at(0x000C) __sfr PORTA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RA0 : 1;
+ unsigned RA1 : 1;
+ unsigned RA2 : 1;
+ unsigned RA3 : 1;
+ unsigned RA4 : 1;
+ unsigned RA5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned RA : 6;
+ unsigned : 2;
+ };
+ } __PORTAbits_t;
+
+extern __at(0x000C) volatile __PORTAbits_t PORTAbits;
+
+#define _RA0 0x01
+#define _RA1 0x02
+#define _RA2 0x04
+#define _RA3 0x08
+#define _RA4 0x10
+#define _RA5 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// PIR1 Bits
+
+extern __at(0x0011) __sfr PIR1;
+
+typedef struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned SSP1IF : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned ADIF : 1;
+ unsigned : 1;
+ } __PIR1bits_t;
+
+extern __at(0x0011) volatile __PIR1bits_t PIR1bits;
+
+#define _SSP1IF 0x08
+#define _ADIF 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// PIR2 Bits
+
+extern __at(0x0012) __sfr PIR2;
+
+typedef struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned BCL1IF : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __PIR2bits_t;
+
+extern __at(0x0012) volatile __PIR2bits_t PIR2bits;
+
+#define _BCL1IF 0x08
+
+//==============================================================================
+
+extern __at(0x0015) __sfr TMR0;
+
+//==============================================================================
+// TRISA Bits
+
+extern __at(0x008C) __sfr TRISA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISA0 : 1;
+ unsigned TRISA1 : 1;
+ unsigned TRISA2 : 1;
+ unsigned TRISA3 : 1;
+ unsigned TRISA4 : 1;
+ unsigned TRISA5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned TRISA : 6;
+ unsigned : 2;
+ };
+ } __TRISAbits_t;
+
+extern __at(0x008C) volatile __TRISAbits_t TRISAbits;
+
+#define _TRISA0 0x01
+#define _TRISA1 0x02
+#define _TRISA2 0x04
+#define _TRISA3 0x08
+#define _TRISA4 0x10
+#define _TRISA5 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// PIE1 Bits
+
+extern __at(0x0091) __sfr PIE1;
+
+typedef struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned SSP1IE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned ADIE : 1;
+ unsigned : 1;
+ } __PIE1bits_t;
+
+extern __at(0x0091) volatile __PIE1bits_t PIE1bits;
+
+#define _SSP1IE 0x08
+#define _ADIE 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// PIE2 Bits
+
+extern __at(0x0092) __sfr PIE2;
+
+typedef struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned BCL1IE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __PIE2bits_t;
+
+extern __at(0x0092) volatile __PIE2bits_t PIE2bits;
+
+#define _BCL1IE 0x08
+
+//==============================================================================
+
+
+//==============================================================================
+// OPTION_REG Bits
+
+extern __at(0x0095) __sfr OPTION_REG;
+
+typedef union
+ {
+ struct
+ {
+ unsigned PS0 : 1;
+ unsigned PS1 : 1;
+ unsigned PS2 : 1;
+ unsigned PSA : 1;
+ unsigned TMR0SE : 1;
+ unsigned TMR0CS : 1;
+ unsigned INTEDG : 1;
+ unsigned NOT_WPUEN : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T0SE : 1;
+ unsigned T0CS : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned PS : 3;
+ unsigned : 5;
+ };
+ } __OPTION_REGbits_t;
+
+extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
+
+#define _PS0 0x01
+#define _PS1 0x02
+#define _PS2 0x04
+#define _PSA 0x08
+#define _TMR0SE 0x10
+#define _T0SE 0x10
+#define _TMR0CS 0x20
+#define _T0CS 0x20
+#define _INTEDG 0x40
+#define _NOT_WPUEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// PCON Bits
+
+extern __at(0x0096) __sfr PCON;
+
+typedef struct
+ {
+ unsigned NOT_BOR : 1;
+ unsigned NOT_POR : 1;
+ unsigned NOT_RI : 1;
+ unsigned NOT_RMCLR : 1;
+ unsigned NOT_RWDT : 1;
+ unsigned : 1;
+ unsigned STKUNF : 1;
+ unsigned STKOVF : 1;
+ } __PCONbits_t;
+
+extern __at(0x0096) volatile __PCONbits_t PCONbits;
+
+#define _NOT_BOR 0x01
+#define _NOT_POR 0x02
+#define _NOT_RI 0x04
+#define _NOT_RMCLR 0x08
+#define _NOT_RWDT 0x10
+#define _STKUNF 0x40
+#define _STKOVF 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// WDTCON Bits
+
+extern __at(0x0097) __sfr WDTCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SWDTEN : 1;
+ unsigned WDTPS0 : 1;
+ unsigned WDTPS1 : 1;
+ unsigned WDTPS2 : 1;
+ unsigned WDTPS3 : 1;
+ unsigned WDTPS4 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned WDTPS : 5;
+ unsigned : 2;
+ };
+ } __WDTCONbits_t;
+
+extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
+
+#define _SWDTEN 0x01
+#define _WDTPS0 0x02
+#define _WDTPS1 0x04
+#define _WDTPS2 0x08
+#define _WDTPS3 0x10
+#define _WDTPS4 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// OSCCON Bits
+
+extern __at(0x0099) __sfr OSCCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SCS0 : 1;
+ unsigned SCS1 : 1;
+ unsigned : 1;
+ unsigned IRCF0 : 1;
+ unsigned IRCF1 : 1;
+ unsigned IRCF2 : 1;
+ unsigned IRCF3 : 1;
+ unsigned SPLLEN : 1;
+ };
+
+ struct
+ {
+ unsigned SCS : 2;
+ unsigned : 6;
+ };
+
+ struct
+ {
+ unsigned : 3;
+ unsigned IRCF : 4;
+ unsigned : 1;
+ };
+ } __OSCCONbits_t;
+
+extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
+
+#define _SCS0 0x01
+#define _SCS1 0x02
+#define _IRCF0 0x08
+#define _IRCF1 0x10
+#define _IRCF2 0x20
+#define _IRCF3 0x40
+#define _SPLLEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// OSCSTAT Bits
+
+extern __at(0x009A) __sfr OSCSTAT;
+
+typedef struct
+ {
+ unsigned HFIOFS : 1;
+ unsigned LFIOFR : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned HFIOFR : 1;
+ unsigned OSTS : 1;
+ unsigned PLLR : 1;
+ unsigned : 1;
+ } __OSCSTATbits_t;
+
+extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
+
+#define _HFIOFS 0x01
+#define _LFIOFR 0x02
+#define _HFIOFR 0x10
+#define _OSTS 0x20
+#define _PLLR 0x40
+
+//==============================================================================
+
+extern __at(0x009B) __sfr ADRES;
+extern __at(0x009B) __sfr ADRESL;
+extern __at(0x009C) __sfr ADRESH;
+
+//==============================================================================
+// ADCON0 Bits
+
+extern __at(0x009D) __sfr ADCON0;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADON : 1;
+ unsigned GO_NOT_DONE : 1;
+ unsigned CHS0 : 1;
+ unsigned CHS1 : 1;
+ unsigned CHS2 : 1;
+ unsigned CHS3 : 1;
+ unsigned CHS4 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned ADGO : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned GO : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 2;
+ unsigned CHS : 5;
+ unsigned : 1;
+ };
+ } __ADCON0bits_t;
+
+extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
+
+#define _ADCON0_ADON 0x01
+#define _ADCON0_GO_NOT_DONE 0x02
+#define _ADCON0_ADGO 0x02
+#define _ADCON0_GO 0x02
+#define _ADCON0_CHS0 0x04
+#define _ADCON0_CHS1 0x08
+#define _ADCON0_CHS2 0x10
+#define _ADCON0_CHS3 0x20
+#define _ADCON0_CHS4 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// ADCON1 Bits
+
+extern __at(0x009E) __sfr ADCON1;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADPREF0 : 1;
+ unsigned ADPREF1 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned ADCS0 : 1;
+ unsigned ADCS1 : 1;
+ unsigned ADCS2 : 1;
+ unsigned ADFM : 1;
+ };
+
+ struct
+ {
+ unsigned ADPREF : 2;
+ unsigned : 6;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned ADCS : 3;
+ unsigned : 1;
+ };
+ } __ADCON1bits_t;
+
+extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
+
+#define _ADCON1_ADPREF0 0x01
+#define _ADCON1_ADPREF1 0x02
+#define _ADCON1_ADCS0 0x10
+#define _ADCON1_ADCS1 0x20
+#define _ADCON1_ADCS2 0x40
+#define _ADCON1_ADFM 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// ADCON2 Bits
+
+extern __at(0x009F) __sfr ADCON2;
+
+typedef union
+ {
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned TRIGSEL0 : 1;
+ unsigned TRIGSEL1 : 1;
+ unsigned TRIGSEL2 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned TRIGSEL : 3;
+ unsigned : 1;
+ };
+ } __ADCON2bits_t;
+
+extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
+
+#define _ADCON2_TRIGSEL0 0x10
+#define _ADCON2_TRIGSEL1 0x20
+#define _ADCON2_TRIGSEL2 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// LATA Bits
+
+extern __at(0x010C) __sfr LATA;
+
+typedef struct
+ {
+ unsigned LATA0 : 1;
+ unsigned LATA1 : 1;
+ unsigned LATA2 : 1;
+ unsigned : 1;
+ unsigned LATA4 : 1;
+ unsigned LATA5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __LATAbits_t;
+
+extern __at(0x010C) volatile __LATAbits_t LATAbits;
+
+#define _LATA0 0x01
+#define _LATA1 0x02
+#define _LATA2 0x04
+#define _LATA4 0x10
+#define _LATA5 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// BORCON Bits
+
+extern __at(0x0116) __sfr BORCON;
+
+typedef struct
+ {
+ unsigned BORRDY : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned BORFS : 1;
+ unsigned SBOREN : 1;
+ } __BORCONbits_t;
+
+extern __at(0x0116) volatile __BORCONbits_t BORCONbits;
+
+#define _BORRDY 0x01
+#define _BORFS 0x40
+#define _SBOREN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// FVRCON Bits
+
+extern __at(0x0117) __sfr FVRCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADFVR0 : 1;
+ unsigned ADFVR1 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned TSRNG : 1;
+ unsigned TSEN : 1;
+ unsigned FVRRDY : 1;
+ unsigned FVREN : 1;
+ };
+
+ struct
+ {
+ unsigned ADFVR : 2;
+ unsigned : 6;
+ };
+ } __FVRCONbits_t;
+
+extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
+
+#define _ADFVR0 0x01
+#define _ADFVR1 0x02
+#define _TSRNG 0x10
+#define _TSEN 0x20
+#define _FVRRDY 0x40
+#define _FVREN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// APFCON Bits
+
+extern __at(0x011D) __sfr APFCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned SDSEL : 1;
+ unsigned SSSEL : 1;
+ unsigned SDOSEL : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned SS1SEL : 1;
+ unsigned SDO1SEL : 1;
+ unsigned : 1;
+ };
+ } __APFCONbits_t;
+
+extern __at(0x011D) volatile __APFCONbits_t APFCONbits;
+
+#define _SDSEL 0x10
+#define _SSSEL 0x20
+#define _SS1SEL 0x20
+#define _SDOSEL 0x40
+#define _SDO1SEL 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// APFCON0 Bits
+
+extern __at(0x011D) __sfr APFCON0;
+
+typedef union
+ {
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned SDSEL : 1;
+ unsigned SSSEL : 1;
+ unsigned SDOSEL : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned SS1SEL : 1;
+ unsigned SDO1SEL : 1;
+ unsigned : 1;
+ };
+ } __APFCON0bits_t;
+
+extern __at(0x011D) volatile __APFCON0bits_t APFCON0bits;
+
+#define _APFCON0_SDSEL 0x10
+#define _APFCON0_SSSEL 0x20
+#define _APFCON0_SS1SEL 0x20
+#define _APFCON0_SDOSEL 0x40
+#define _APFCON0_SDO1SEL 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// ANSELA Bits
+
+extern __at(0x018C) __sfr ANSELA;
+
+typedef struct
+ {
+ unsigned ANSA0 : 1;
+ unsigned ANSA1 : 1;
+ unsigned ANSA2 : 1;
+ unsigned : 1;
+ unsigned ANSA4 : 1;
+ unsigned ANSA5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __ANSELAbits_t;
+
+extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
+
+#define _ANSA0 0x01
+#define _ANSA1 0x02
+#define _ANSA2 0x04
+#define _ANSA4 0x10
+#define _ANSA5 0x20
+
+//==============================================================================
+
+extern __at(0x0191) __sfr PMADR;
+extern __at(0x0191) __sfr PMADRL;
+extern __at(0x0192) __sfr PMADRH;
+extern __at(0x0193) __sfr PMDAT;
+extern __at(0x0193) __sfr PMDATL;
+extern __at(0x0194) __sfr PMDATH;
+
+//==============================================================================
+// PMCON1 Bits
+
+extern __at(0x0195) __sfr PMCON1;
+
+typedef struct
+ {
+ unsigned RD : 1;
+ unsigned WR : 1;
+ unsigned WREN : 1;
+ unsigned WRERR : 1;
+ unsigned FREE : 1;
+ unsigned LWLO : 1;
+ unsigned CFGS : 1;
+ unsigned : 1;
+ } __PMCON1bits_t;
+
+extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
+
+#define _RD 0x01
+#define _WR 0x02
+#define _WREN 0x04
+#define _WRERR 0x08
+#define _FREE 0x10
+#define _LWLO 0x20
+#define _CFGS 0x40
+
+//==============================================================================
+
+extern __at(0x0196) __sfr PMCON2;
+
+//==============================================================================
+// WPUA Bits
+
+extern __at(0x020C) __sfr WPUA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned WPUA0 : 1;
+ unsigned WPUA1 : 1;
+ unsigned WPUA2 : 1;
+ unsigned WPUA3 : 1;
+ unsigned WPUA4 : 1;
+ unsigned WPUA5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned WPUA : 6;
+ unsigned : 2;
+ };
+ } __WPUAbits_t;
+
+extern __at(0x020C) volatile __WPUAbits_t WPUAbits;
+
+#define _WPUA0 0x01
+#define _WPUA1 0x02
+#define _WPUA2 0x04
+#define _WPUA3 0x08
+#define _WPUA4 0x10
+#define _WPUA5 0x20
+
+//==============================================================================
+
+extern __at(0x0211) __sfr SSP1BUF;
+extern __at(0x0211) __sfr SSPBUF;
+extern __at(0x0212) __sfr SSP1ADD;
+extern __at(0x0212) __sfr SSPADD;
+extern __at(0x0213) __sfr SSP1MSK;
+extern __at(0x0213) __sfr SSPMSK;
+
+//==============================================================================
+// SSP1STAT Bits
+
+extern __at(0x0214) __sfr SSP1STAT;
+
+typedef struct
+ {
+ unsigned BF : 1;
+ unsigned UA : 1;
+ unsigned R_NOT_W : 1;
+ unsigned S : 1;
+ unsigned P : 1;
+ unsigned D_NOT_A : 1;
+ unsigned CKE : 1;
+ unsigned SMP : 1;
+ } __SSP1STATbits_t;
+
+extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
+
+#define _BF 0x01
+#define _UA 0x02
+#define _R_NOT_W 0x04
+#define _S 0x08
+#define _P 0x10
+#define _D_NOT_A 0x20
+#define _CKE 0x40
+#define _SMP 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPSTAT Bits
+
+extern __at(0x0214) __sfr SSPSTAT;
+
+typedef struct
+ {
+ unsigned BF : 1;
+ unsigned UA : 1;
+ unsigned R_NOT_W : 1;
+ unsigned S : 1;
+ unsigned P : 1;
+ unsigned D_NOT_A : 1;
+ unsigned CKE : 1;
+ unsigned SMP : 1;
+ } __SSPSTATbits_t;
+
+extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
+
+#define _SSPSTAT_BF 0x01
+#define _SSPSTAT_UA 0x02
+#define _SSPSTAT_R_NOT_W 0x04
+#define _SSPSTAT_S 0x08
+#define _SSPSTAT_P 0x10
+#define _SSPSTAT_D_NOT_A 0x20
+#define _SSPSTAT_CKE 0x40
+#define _SSPSTAT_SMP 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSP1CON1 Bits
+
+extern __at(0x0215) __sfr SSP1CON1;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SSPM0 : 1;
+ unsigned SSPM1 : 1;
+ unsigned SSPM2 : 1;
+ unsigned SSPM3 : 1;
+ unsigned CKP : 1;
+ unsigned SSPEN : 1;
+ unsigned SSPOV : 1;
+ unsigned WCOL : 1;
+ };
+
+ struct
+ {
+ unsigned SSPM : 4;
+ unsigned : 4;
+ };
+ } __SSP1CON1bits_t;
+
+extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
+
+#define _SSPM0 0x01
+#define _SSPM1 0x02
+#define _SSPM2 0x04
+#define _SSPM3 0x08
+#define _CKP 0x10
+#define _SSPEN 0x20
+#define _SSPOV 0x40
+#define _WCOL 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPCON Bits
+
+extern __at(0x0215) __sfr SSPCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SSPM0 : 1;
+ unsigned SSPM1 : 1;
+ unsigned SSPM2 : 1;
+ unsigned SSPM3 : 1;
+ unsigned CKP : 1;
+ unsigned SSPEN : 1;
+ unsigned SSPOV : 1;
+ unsigned WCOL : 1;
+ };
+
+ struct
+ {
+ unsigned SSPM : 4;
+ unsigned : 4;
+ };
+ } __SSPCONbits_t;
+
+extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
+
+#define _SSPCON_SSPM0 0x01
+#define _SSPCON_SSPM1 0x02
+#define _SSPCON_SSPM2 0x04
+#define _SSPCON_SSPM3 0x08
+#define _SSPCON_CKP 0x10
+#define _SSPCON_SSPEN 0x20
+#define _SSPCON_SSPOV 0x40
+#define _SSPCON_WCOL 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPCON1 Bits
+
+extern __at(0x0215) __sfr SSPCON1;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SSPM0 : 1;
+ unsigned SSPM1 : 1;
+ unsigned SSPM2 : 1;
+ unsigned SSPM3 : 1;
+ unsigned CKP : 1;
+ unsigned SSPEN : 1;
+ unsigned SSPOV : 1;
+ unsigned WCOL : 1;
+ };
+
+ struct
+ {
+ unsigned SSPM : 4;
+ unsigned : 4;
+ };
+ } __SSPCON1bits_t;
+
+extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
+
+#define _SSPCON1_SSPM0 0x01
+#define _SSPCON1_SSPM1 0x02
+#define _SSPCON1_SSPM2 0x04
+#define _SSPCON1_SSPM3 0x08
+#define _SSPCON1_CKP 0x10
+#define _SSPCON1_SSPEN 0x20
+#define _SSPCON1_SSPOV 0x40
+#define _SSPCON1_WCOL 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSP1CON2 Bits
+
+extern __at(0x0216) __sfr SSP1CON2;
+
+typedef struct
+ {
+ unsigned SEN : 1;
+ unsigned RSEN : 1;
+ unsigned PEN : 1;
+ unsigned RCEN : 1;
+ unsigned ACKEN : 1;
+ unsigned ACKDT : 1;
+ unsigned ACKSTAT : 1;
+ unsigned GCEN : 1;
+ } __SSP1CON2bits_t;
+
+extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
+
+#define _SEN 0x01
+#define _RSEN 0x02
+#define _PEN 0x04
+#define _RCEN 0x08
+#define _ACKEN 0x10
+#define _ACKDT 0x20
+#define _ACKSTAT 0x40
+#define _GCEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPCON2 Bits
+
+extern __at(0x0216) __sfr SSPCON2;
+
+typedef struct
+ {
+ unsigned SEN : 1;
+ unsigned RSEN : 1;
+ unsigned PEN : 1;
+ unsigned RCEN : 1;
+ unsigned ACKEN : 1;
+ unsigned ACKDT : 1;
+ unsigned ACKSTAT : 1;
+ unsigned GCEN : 1;
+ } __SSPCON2bits_t;
+
+extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
+
+#define _SSPCON2_SEN 0x01
+#define _SSPCON2_RSEN 0x02
+#define _SSPCON2_PEN 0x04
+#define _SSPCON2_RCEN 0x08
+#define _SSPCON2_ACKEN 0x10
+#define _SSPCON2_ACKDT 0x20
+#define _SSPCON2_ACKSTAT 0x40
+#define _SSPCON2_GCEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSP1CON3 Bits
+
+extern __at(0x0217) __sfr SSP1CON3;
+
+typedef struct
+ {
+ unsigned DHEN : 1;
+ unsigned AHEN : 1;
+ unsigned SBCDE : 1;
+ unsigned SDAHT : 1;
+ unsigned BOEN : 1;
+ unsigned SCIE : 1;
+ unsigned PCIE : 1;
+ unsigned ACKTIM : 1;
+ } __SSP1CON3bits_t;
+
+extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
+
+#define _DHEN 0x01
+#define _AHEN 0x02
+#define _SBCDE 0x04
+#define _SDAHT 0x08
+#define _BOEN 0x10
+#define _SCIE 0x20
+#define _PCIE 0x40
+#define _ACKTIM 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPCON3 Bits
+
+extern __at(0x0217) __sfr SSPCON3;
+
+typedef struct
+ {
+ unsigned DHEN : 1;
+ unsigned AHEN : 1;
+ unsigned SBCDE : 1;
+ unsigned SDAHT : 1;
+ unsigned BOEN : 1;
+ unsigned SCIE : 1;
+ unsigned PCIE : 1;
+ unsigned ACKTIM : 1;
+ } __SSPCON3bits_t;
+
+extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
+
+#define _SSPCON3_DHEN 0x01
+#define _SSPCON3_AHEN 0x02
+#define _SSPCON3_SBCDE 0x04
+#define _SSPCON3_SDAHT 0x08
+#define _SSPCON3_BOEN 0x10
+#define _SSPCON3_SCIE 0x20
+#define _SSPCON3_PCIE 0x40
+#define _SSPCON3_ACKTIM 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// IOCAP Bits
+
+extern __at(0x0391) __sfr IOCAP;
+
+typedef union
+ {
+ struct
+ {
+ unsigned IOCAP0 : 1;
+ unsigned IOCAP1 : 1;
+ unsigned IOCAP2 : 1;
+ unsigned IOCAP3 : 1;
+ unsigned IOCAP4 : 1;
+ unsigned IOCAP5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned IOCAP : 6;
+ unsigned : 2;
+ };
+ } __IOCAPbits_t;
+
+extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
+
+#define _IOCAP0 0x01
+#define _IOCAP1 0x02
+#define _IOCAP2 0x04
+#define _IOCAP3 0x08
+#define _IOCAP4 0x10
+#define _IOCAP5 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// IOCAN Bits
+
+extern __at(0x0392) __sfr IOCAN;
+
+typedef union
+ {
+ struct
+ {
+ unsigned IOCAN0 : 1;
+ unsigned IOCAN1 : 1;
+ unsigned IOCAN2 : 1;
+ unsigned IOCAN3 : 1;
+ unsigned IOCAN4 : 1;
+ unsigned IOCAN5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned IOCAN : 6;
+ unsigned : 2;
+ };
+ } __IOCANbits_t;
+
+extern __at(0x0392) volatile __IOCANbits_t IOCANbits;
+
+#define _IOCAN0 0x01
+#define _IOCAN1 0x02
+#define _IOCAN2 0x04
+#define _IOCAN3 0x08
+#define _IOCAN4 0x10
+#define _IOCAN5 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// IOCAF Bits
+
+extern __at(0x0393) __sfr IOCAF;
+
+typedef union
+ {
+ struct
+ {
+ unsigned IOCAF0 : 1;
+ unsigned IOCAF1 : 1;
+ unsigned IOCAF2 : 1;
+ unsigned IOCAF3 : 1;
+ unsigned IOCAF4 : 1;
+ unsigned IOCAF5 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned IOCAF : 6;
+ unsigned : 2;
+ };
+ } __IOCAFbits_t;
+
+extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
+
+#define _IOCAF0 0x01
+#define _IOCAF1 0x02
+#define _IOCAF2 0x04
+#define _IOCAF3 0x08
+#define _IOCAF4 0x10
+#define _IOCAF5 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// AADCON0 Bits
+
+extern __at(0x0711) __sfr AADCON0;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADON : 1;
+ unsigned GO_NOT_DONE : 1;
+ unsigned CHS0 : 1;
+ unsigned CHS1 : 1;
+ unsigned CHS2 : 1;
+ unsigned CHS3 : 1;
+ unsigned CHS4 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 2;
+ unsigned CHS : 5;
+ unsigned : 1;
+ };
+ } __AADCON0bits_t;
+
+extern __at(0x0711) volatile __AADCON0bits_t AADCON0bits;
+
+#define _ADON 0x01
+#define _GO_NOT_DONE 0x02
+#define _CHS0 0x04
+#define _CHS1 0x08
+#define _CHS2 0x10
+#define _CHS3 0x20
+#define _CHS4 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// AADCON1 Bits
+
+extern __at(0x0712) __sfr AADCON1;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADPREF0 : 1;
+ unsigned ADPREF1 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned ADCS0 : 1;
+ unsigned ADCS1 : 1;
+ unsigned ADCS2 : 1;
+ unsigned ADFM : 1;
+ };
+
+ struct
+ {
+ unsigned ADPREF : 2;
+ unsigned : 6;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned ADCS : 3;
+ unsigned : 1;
+ };
+ } __AADCON1bits_t;
+
+extern __at(0x0712) volatile __AADCON1bits_t AADCON1bits;
+
+#define _ADPREF0 0x01
+#define _ADPREF1 0x02
+#define _ADCS0 0x10
+#define _ADCS1 0x20
+#define _ADCS2 0x40
+#define _ADFM 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// AADCON2 Bits
+
+extern __at(0x0713) __sfr AADCON2;
+
+typedef union
+ {
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned TRIGSEL0 : 1;
+ unsigned TRIGSEL1 : 1;
+ unsigned TRIGSEL2 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned TRIGSEL : 3;
+ unsigned : 1;
+ };
+ } __AADCON2bits_t;
+
+extern __at(0x0713) volatile __AADCON2bits_t AADCON2bits;
+
+#define _TRIGSEL0 0x10
+#define _TRIGSEL1 0x20
+#define _TRIGSEL2 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// AADCON3 Bits
+
+extern __at(0x0714) __sfr AADCON3;
+
+typedef struct
+ {
+ unsigned ADDSEN : 1;
+ unsigned ADIPEN : 1;
+ unsigned : 1;
+ unsigned ADOOEN : 1;
+ unsigned ADOEN : 1;
+ unsigned : 1;
+ unsigned ADIPPOL : 1;
+ unsigned ADEPPOL : 1;
+ } __AADCON3bits_t;
+
+extern __at(0x0714) volatile __AADCON3bits_t AADCON3bits;
+
+#define _ADDSEN 0x01
+#define _ADIPEN 0x02
+#define _ADOOEN 0x08
+#define _ADOEN 0x10
+#define _ADIPPOL 0x40
+#define _ADEPPOL 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// AADSTAT Bits
+
+extern __at(0x0715) __sfr AADSTAT;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADSTG0 : 1;
+ unsigned ADSTG1 : 1;
+ unsigned ADCONV : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned ADSTG : 2;
+ unsigned : 6;
+ };
+ } __AADSTATbits_t;
+
+extern __at(0x0715) volatile __AADSTATbits_t AADSTATbits;
+
+#define _ADSTG0 0x01
+#define _ADSTG1 0x02
+#define _ADCONV 0x04
+
+//==============================================================================
+
+
+//==============================================================================
+// AADPRE Bits
+
+extern __at(0x0716) __sfr AADPRE;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADPRE0 : 1;
+ unsigned ADPRE1 : 1;
+ unsigned ADPRE2 : 1;
+ unsigned ADPRE3 : 1;
+ unsigned ADPRE4 : 1;
+ unsigned ADPRE5 : 1;
+ unsigned ADPRE6 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned ADPRE : 7;
+ unsigned : 1;
+ };
+ } __AADPREbits_t;
+
+extern __at(0x0716) volatile __AADPREbits_t AADPREbits;
+
+#define _ADPRE0 0x01
+#define _ADPRE1 0x02
+#define _ADPRE2 0x04
+#define _ADPRE3 0x08
+#define _ADPRE4 0x10
+#define _ADPRE5 0x20
+#define _ADPRE6 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// AADACQ Bits
+
+extern __at(0x0717) __sfr AADACQ;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADACQ0 : 1;
+ unsigned ADACQ1 : 1;
+ unsigned ADACQ2 : 1;
+ unsigned ADACQ3 : 1;
+ unsigned ADACQ4 : 1;
+ unsigned ADACQ5 : 1;
+ unsigned ADACQ6 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned ADACQ : 7;
+ unsigned : 1;
+ };
+ } __AADACQbits_t;
+
+extern __at(0x0717) volatile __AADACQbits_t AADACQbits;
+
+#define _ADACQ0 0x01
+#define _ADACQ1 0x02
+#define _ADACQ2 0x04
+#define _ADACQ3 0x08
+#define _ADACQ4 0x10
+#define _ADACQ5 0x20
+#define _ADACQ6 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// AADGRD Bits
+
+extern __at(0x0718) __sfr AADGRD;
+
+typedef struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned GRDPOL : 1;
+ unsigned GRDAOE : 1;
+ unsigned GRDBOE : 1;
+ } __AADGRDbits_t;
+
+extern __at(0x0718) volatile __AADGRDbits_t AADGRDbits;
+
+#define _GRDPOL 0x20
+#define _GRDAOE 0x40
+#define _GRDBOE 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// AADCAP Bits
+
+extern __at(0x0719) __sfr AADCAP;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADDCAP0 : 1;
+ unsigned ADDCAP1 : 1;
+ unsigned ADDCAP2 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned ADDCAP : 3;
+ unsigned : 5;
+ };
+ } __AADCAPbits_t;
+
+extern __at(0x0719) volatile __AADCAPbits_t AADCAPbits;
+
+#define _ADDCAP0 0x01
+#define _ADDCAP1 0x02
+#define _ADDCAP2 0x04
+
+//==============================================================================
+
+extern __at(0x071A) __sfr AADRES0;
+extern __at(0x071A) __sfr AADRES0L;
+extern __at(0x071A) __sfr AD1RES0;
+extern __at(0x071A) __sfr ADRES0;
+extern __at(0x071B) __sfr AADRES0H;
+extern __at(0x071C) __sfr AADRES1;
+extern __at(0x071C) __sfr AADRES1L;
+extern __at(0x071C) __sfr AD1RES1;
+extern __at(0x071C) __sfr ADRES1;
+extern __at(0x071D) __sfr AADRES1H;
+
+//==============================================================================
+// STATUS_SHAD Bits
+
+extern __at(0x0FE4) __sfr STATUS_SHAD;
+
+typedef struct
+ {
+ unsigned C_SHAD : 1;
+ unsigned DC_SHAD : 1;
+ unsigned Z_SHAD : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __STATUS_SHADbits_t;
+
+extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
+
+#define _C_SHAD 0x01
+#define _DC_SHAD 0x02
+#define _Z_SHAD 0x04
+
+//==============================================================================
+
+extern __at(0x0FE5) __sfr WREG_SHAD;
+extern __at(0x0FE6) __sfr BSR_SHAD;
+extern __at(0x0FE7) __sfr PCLATH_SHAD;
+extern __at(0x0FE8) __sfr FSR0L_SHAD;
+extern __at(0x0FE9) __sfr FSR0H_SHAD;
+extern __at(0x0FEA) __sfr FSR1L_SHAD;
+extern __at(0x0FEB) __sfr FSR1H_SHAD;
+extern __at(0x0FED) __sfr STKPTR;
+extern __at(0x0FEE) __sfr TOSL;
+extern __at(0x0FEF) __sfr TOSH;
+
+//==============================================================================
+//
+// Configuration Bits
+//
+//==============================================================================
+
+#define _CONFIG1 0x8007
+#define _CONFIG2 0x8008
+
+//----------------------------- CONFIG1 Options -------------------------------
+
+#define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin.
+#define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin.
+#define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin.
+#define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin.
+#define _WDTE_OFF 0x3FE7 // WDT disabled.
+#define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register.
+#define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep.
+#define _WDTE_ON 0x3FFF // WDT enabled.
+#define _PWRTE_ON 0x3FDF // PWRT enabled.
+#define _PWRTE_OFF 0x3FFF // PWRT disabled.
+#define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input.
+#define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR.
+#define _CP_ON 0x3F7F // Program memory code protection is enabled.
+#define _CP_OFF 0x3FFF // Program memory code protection is disabled.
+#define _BOREN_OFF 0x39FF // Brown-out Reset disabled.
+#define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register.
+#define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep.
+#define _BOREN_ON 0x3FFF // Brown-out Reset enabled.
+#define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin.
+#define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin.
+
+//----------------------------- CONFIG2 Options -------------------------------
+
+#define _WRT_ALL 0x3FFC // 000h to FFFh write protected, no addresses may be modified by PMCON control.
+#define _WRT_HALF 0x3FFD // 000h to 7FFh write protected, 800h to FFFh may be modified by PMCON control.
+#define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to FFFh may be modified by PMCON control.
+#define _WRT_OFF 0x3FFF // Write protection off.
+#define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset.
+#define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset.
+#define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected.
+#define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
+#define _BORV_19 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected.
+#define _LPBOR_ON 0x37FF // Low-Power BOR is enabled.
+#define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled.
+#define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming.
+#define _LVP_ON 0x3FFF // Low-voltage programming enabled.
+
+//==============================================================================
+
+#define _DEVID1 0x8006
+
+#define _IDLOC0 0x8000
+#define _IDLOC1 0x8001
+#define _IDLOC2 0x8002
+#define _IDLOC3 0x8003
+
+//==============================================================================
+
+#ifndef NO_BIT_DEFINES
+
+#define ADACQ0 AADACQbits.ADACQ0 // bit 0
+#define ADACQ1 AADACQbits.ADACQ1 // bit 1
+#define ADACQ2 AADACQbits.ADACQ2 // bit 2
+#define ADACQ3 AADACQbits.ADACQ3 // bit 3
+#define ADACQ4 AADACQbits.ADACQ4 // bit 4
+#define ADACQ5 AADACQbits.ADACQ5 // bit 5
+#define ADACQ6 AADACQbits.ADACQ6 // bit 6
+
+#define ADDCAP0 AADCAPbits.ADDCAP0 // bit 0
+#define ADDCAP1 AADCAPbits.ADDCAP1 // bit 1
+#define ADDCAP2 AADCAPbits.ADDCAP2 // bit 2
+
+#define ADON AADCON0bits.ADON // bit 0
+#define GO_NOT_DONE AADCON0bits.GO_NOT_DONE // bit 1
+#define CHS0 AADCON0bits.CHS0 // bit 2
+#define CHS1 AADCON0bits.CHS1 // bit 3
+#define CHS2 AADCON0bits.CHS2 // bit 4
+#define CHS3 AADCON0bits.CHS3 // bit 5
+#define CHS4 AADCON0bits.CHS4 // bit 6
+
+#define ADPREF0 AADCON1bits.ADPREF0 // bit 0
+#define ADPREF1 AADCON1bits.ADPREF1 // bit 1
+#define ADCS0 AADCON1bits.ADCS0 // bit 4
+#define ADCS1 AADCON1bits.ADCS1 // bit 5
+#define ADCS2 AADCON1bits.ADCS2 // bit 6
+#define ADFM AADCON1bits.ADFM // bit 7
+
+#define TRIGSEL0 AADCON2bits.TRIGSEL0 // bit 4
+#define TRIGSEL1 AADCON2bits.TRIGSEL1 // bit 5
+#define TRIGSEL2 AADCON2bits.TRIGSEL2 // bit 6
+
+#define ADDSEN AADCON3bits.ADDSEN // bit 0
+#define ADIPEN AADCON3bits.ADIPEN // bit 1
+#define ADOOEN AADCON3bits.ADOOEN // bit 3
+#define ADOEN AADCON3bits.ADOEN // bit 4
+#define ADIPPOL AADCON3bits.ADIPPOL // bit 6
+#define ADEPPOL AADCON3bits.ADEPPOL // bit 7
+
+#define GRDPOL AADGRDbits.GRDPOL // bit 5
+#define GRDAOE AADGRDbits.GRDAOE // bit 6
+#define GRDBOE AADGRDbits.GRDBOE // bit 7
+
+#define ADPRE0 AADPREbits.ADPRE0 // bit 0
+#define ADPRE1 AADPREbits.ADPRE1 // bit 1
+#define ADPRE2 AADPREbits.ADPRE2 // bit 2
+#define ADPRE3 AADPREbits.ADPRE3 // bit 3
+#define ADPRE4 AADPREbits.ADPRE4 // bit 4
+#define ADPRE5 AADPREbits.ADPRE5 // bit 5
+#define ADPRE6 AADPREbits.ADPRE6 // bit 6
+
+#define ADSTG0 AADSTATbits.ADSTG0 // bit 0
+#define ADSTG1 AADSTATbits.ADSTG1 // bit 1
+#define ADCONV AADSTATbits.ADCONV // bit 2
+
+#define ANSA0 ANSELAbits.ANSA0 // bit 0
+#define ANSA1 ANSELAbits.ANSA1 // bit 1
+#define ANSA2 ANSELAbits.ANSA2 // bit 2
+#define ANSA4 ANSELAbits.ANSA4 // bit 4
+#define ANSA5 ANSELAbits.ANSA5 // bit 5
+
+#define SDSEL APFCONbits.SDSEL // bit 4
+#define SSSEL APFCONbits.SSSEL // bit 5, shadows bit in APFCONbits
+#define SS1SEL APFCONbits.SS1SEL // bit 5, shadows bit in APFCONbits
+#define SDOSEL APFCONbits.SDOSEL // bit 6, shadows bit in APFCONbits
+#define SDO1SEL APFCONbits.SDO1SEL // bit 6, shadows bit in APFCONbits
+
+#define BORRDY BORCONbits.BORRDY // bit 0
+#define BORFS BORCONbits.BORFS // bit 6
+#define SBOREN BORCONbits.SBOREN // bit 7
+
+#define BSR0 BSRbits.BSR0 // bit 0
+#define BSR1 BSRbits.BSR1 // bit 1
+#define BSR2 BSRbits.BSR2 // bit 2
+#define BSR3 BSRbits.BSR3 // bit 3
+#define BSR4 BSRbits.BSR4 // bit 4
+
+#define ADFVR0 FVRCONbits.ADFVR0 // bit 0
+#define ADFVR1 FVRCONbits.ADFVR1 // bit 1
+#define TSRNG FVRCONbits.TSRNG // bit 4
+#define TSEN FVRCONbits.TSEN // bit 5
+#define FVRRDY FVRCONbits.FVRRDY // bit 6
+#define FVREN FVRCONbits.FVREN // bit 7
+
+#define IOCIF INTCONbits.IOCIF // bit 0
+#define INTF INTCONbits.INTF // bit 1
+#define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits
+#define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits
+#define IOCIE INTCONbits.IOCIE // bit 3
+#define INTE INTCONbits.INTE // bit 4
+#define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits
+#define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits
+#define PEIE INTCONbits.PEIE // bit 6
+#define GIE INTCONbits.GIE // bit 7
+
+#define IOCAF0 IOCAFbits.IOCAF0 // bit 0
+#define IOCAF1 IOCAFbits.IOCAF1 // bit 1
+#define IOCAF2 IOCAFbits.IOCAF2 // bit 2
+#define IOCAF3 IOCAFbits.IOCAF3 // bit 3
+#define IOCAF4 IOCAFbits.IOCAF4 // bit 4
+#define IOCAF5 IOCAFbits.IOCAF5 // bit 5
+
+#define IOCAN0 IOCANbits.IOCAN0 // bit 0
+#define IOCAN1 IOCANbits.IOCAN1 // bit 1
+#define IOCAN2 IOCANbits.IOCAN2 // bit 2
+#define IOCAN3 IOCANbits.IOCAN3 // bit 3
+#define IOCAN4 IOCANbits.IOCAN4 // bit 4
+#define IOCAN5 IOCANbits.IOCAN5 // bit 5
+
+#define IOCAP0 IOCAPbits.IOCAP0 // bit 0
+#define IOCAP1 IOCAPbits.IOCAP1 // bit 1
+#define IOCAP2 IOCAPbits.IOCAP2 // bit 2
+#define IOCAP3 IOCAPbits.IOCAP3 // bit 3
+#define IOCAP4 IOCAPbits.IOCAP4 // bit 4
+#define IOCAP5 IOCAPbits.IOCAP5 // bit 5
+
+#define LATA0 LATAbits.LATA0 // bit 0
+#define LATA1 LATAbits.LATA1 // bit 1
+#define LATA2 LATAbits.LATA2 // bit 2
+#define LATA4 LATAbits.LATA4 // bit 4
+#define LATA5 LATAbits.LATA5 // bit 5
+
+#define PS0 OPTION_REGbits.PS0 // bit 0
+#define PS1 OPTION_REGbits.PS1 // bit 1
+#define PS2 OPTION_REGbits.PS2 // bit 2
+#define PSA OPTION_REGbits.PSA // bit 3
+#define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits
+#define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits
+#define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits
+#define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits
+#define INTEDG OPTION_REGbits.INTEDG // bit 6
+#define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7
+
+#define SCS0 OSCCONbits.SCS0 // bit 0
+#define SCS1 OSCCONbits.SCS1 // bit 1
+#define IRCF0 OSCCONbits.IRCF0 // bit 3
+#define IRCF1 OSCCONbits.IRCF1 // bit 4
+#define IRCF2 OSCCONbits.IRCF2 // bit 5
+#define IRCF3 OSCCONbits.IRCF3 // bit 6
+#define SPLLEN OSCCONbits.SPLLEN // bit 7
+
+#define HFIOFS OSCSTATbits.HFIOFS // bit 0
+#define LFIOFR OSCSTATbits.LFIOFR // bit 1
+#define HFIOFR OSCSTATbits.HFIOFR // bit 4
+#define OSTS OSCSTATbits.OSTS // bit 5
+#define PLLR OSCSTATbits.PLLR // bit 6
+
+#define NOT_BOR PCONbits.NOT_BOR // bit 0
+#define NOT_POR PCONbits.NOT_POR // bit 1
+#define NOT_RI PCONbits.NOT_RI // bit 2
+#define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3
+#define NOT_RWDT PCONbits.NOT_RWDT // bit 4
+#define STKUNF PCONbits.STKUNF // bit 6
+#define STKOVF PCONbits.STKOVF // bit 7
+
+#define SSP1IE PIE1bits.SSP1IE // bit 3
+#define ADIE PIE1bits.ADIE // bit 6
+
+#define BCL1IE PIE2bits.BCL1IE // bit 3
+
+#define SSP1IF PIR1bits.SSP1IF // bit 3
+#define ADIF PIR1bits.ADIF // bit 6
+
+#define BCL1IF PIR2bits.BCL1IF // bit 3
+
+#define RD PMCON1bits.RD // bit 0
+#define WR PMCON1bits.WR // bit 1
+#define WREN PMCON1bits.WREN // bit 2
+#define WRERR PMCON1bits.WRERR // bit 3
+#define FREE PMCON1bits.FREE // bit 4
+#define LWLO PMCON1bits.LWLO // bit 5
+#define CFGS PMCON1bits.CFGS // bit 6
+
+#define RA0 PORTAbits.RA0 // bit 0
+#define RA1 PORTAbits.RA1 // bit 1
+#define RA2 PORTAbits.RA2 // bit 2
+#define RA3 PORTAbits.RA3 // bit 3
+#define RA4 PORTAbits.RA4 // bit 4
+#define RA5 PORTAbits.RA5 // bit 5
+
+#define SSPM0 SSP1CON1bits.SSPM0 // bit 0
+#define SSPM1 SSP1CON1bits.SSPM1 // bit 1
+#define SSPM2 SSP1CON1bits.SSPM2 // bit 2
+#define SSPM3 SSP1CON1bits.SSPM3 // bit 3
+#define CKP SSP1CON1bits.CKP // bit 4
+#define SSPEN SSP1CON1bits.SSPEN // bit 5
+#define SSPOV SSP1CON1bits.SSPOV // bit 6
+#define WCOL SSP1CON1bits.WCOL // bit 7
+
+#define SEN SSP1CON2bits.SEN // bit 0
+#define RSEN SSP1CON2bits.RSEN // bit 1
+#define PEN SSP1CON2bits.PEN // bit 2
+#define RCEN SSP1CON2bits.RCEN // bit 3
+#define ACKEN SSP1CON2bits.ACKEN // bit 4
+#define ACKDT SSP1CON2bits.ACKDT // bit 5
+#define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6
+#define GCEN SSP1CON2bits.GCEN // bit 7
+
+#define DHEN SSP1CON3bits.DHEN // bit 0
+#define AHEN SSP1CON3bits.AHEN // bit 1
+#define SBCDE SSP1CON3bits.SBCDE // bit 2
+#define SDAHT SSP1CON3bits.SDAHT // bit 3
+#define BOEN SSP1CON3bits.BOEN // bit 4
+#define SCIE SSP1CON3bits.SCIE // bit 5
+#define PCIE SSP1CON3bits.PCIE // bit 6
+#define ACKTIM SSP1CON3bits.ACKTIM // bit 7
+
+#define BF SSP1STATbits.BF // bit 0
+#define UA SSP1STATbits.UA // bit 1
+#define R_NOT_W SSP1STATbits.R_NOT_W // bit 2
+#define S SSP1STATbits.S // bit 3
+#define P SSP1STATbits.P // bit 4
+#define D_NOT_A SSP1STATbits.D_NOT_A // bit 5
+#define CKE SSP1STATbits.CKE // bit 6
+#define SMP SSP1STATbits.SMP // bit 7
+
+#define C STATUSbits.C // bit 0
+#define DC STATUSbits.DC // bit 1
+#define Z STATUSbits.Z // bit 2
+#define NOT_PD STATUSbits.NOT_PD // bit 3
+#define NOT_TO STATUSbits.NOT_TO // bit 4
+
+#define C_SHAD STATUS_SHADbits.C_SHAD // bit 0
+#define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1
+#define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2
+
+#define TRISA0 TRISAbits.TRISA0 // bit 0
+#define TRISA1 TRISAbits.TRISA1 // bit 1
+#define TRISA2 TRISAbits.TRISA2 // bit 2
+#define TRISA3 TRISAbits.TRISA3 // bit 3
+#define TRISA4 TRISAbits.TRISA4 // bit 4
+#define TRISA5 TRISAbits.TRISA5 // bit 5
+
+#define SWDTEN WDTCONbits.SWDTEN // bit 0
+#define WDTPS0 WDTCONbits.WDTPS0 // bit 1
+#define WDTPS1 WDTCONbits.WDTPS1 // bit 2
+#define WDTPS2 WDTCONbits.WDTPS2 // bit 3
+#define WDTPS3 WDTCONbits.WDTPS3 // bit 4
+#define WDTPS4 WDTCONbits.WDTPS4 // bit 5
+
+#define WPUA0 WPUAbits.WPUA0 // bit 0
+#define WPUA1 WPUAbits.WPUA1 // bit 1
+#define WPUA2 WPUAbits.WPUA2 // bit 2
+#define WPUA3 WPUAbits.WPUA3 // bit 3
+#define WPUA4 WPUAbits.WPUA4 // bit 4
+#define WPUA5 WPUAbits.WPUA5 // bit 5
+
+#endif // #ifndef NO_BIT_DEFINES
+
+#endif // #ifndef __PIC12LF1552_H__