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| author | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
|---|---|---|
| committer | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
| commit | 268a53de823a6750d6256ee1fb1e7707b4b45740 (patch) | |
| tree | 42c1799a9a82b2f7d9790ee9fe181d72a7274751 /support/sdbinutils/bfd/cpu-d10v.c | |
| download | sdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz | |
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'support/sdbinutils/bfd/cpu-d10v.c')
| -rw-r--r-- | support/sdbinutils/bfd/cpu-d10v.c | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/support/sdbinutils/bfd/cpu-d10v.c b/support/sdbinutils/bfd/cpu-d10v.c new file mode 100644 index 0000000..7331a0b --- /dev/null +++ b/support/sdbinutils/bfd/cpu-d10v.c @@ -0,0 +1,75 @@ +/* BFD support for the D10V processor + Copyright (C) 1996-2018 Free Software Foundation, Inc. + Contributed by Martin Hunt (hunt@cygnus.com). + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ + +#include "sysdep.h" +#include "bfd.h" +#include "libbfd.h" + +static const bfd_arch_info_type d10v_ts3_info = +{ + 16, /* 16 bits in a word. */ + 18, /* really 16 bits in an address, but code has 18 bit range. */ + 8, /* 8 bits in a byte. */ + bfd_arch_d10v, + bfd_mach_d10v_ts3, + "d10v", + "d10v:ts3", + 4, /* Section alignment power. */ + FALSE, + bfd_default_compatible, + bfd_default_scan, + bfd_arch_default_fill, + 0, +}; + +static const bfd_arch_info_type d10v_ts2_info = +{ + 16, + 18, + 8, + bfd_arch_d10v, + bfd_mach_d10v_ts2, + "d10v", + "d10v:ts2", + 4, + FALSE, + bfd_default_compatible, + bfd_default_scan, + bfd_arch_default_fill, + & d10v_ts3_info, +}; + +const bfd_arch_info_type bfd_d10v_arch = +{ + 16, + 18, + 8, + bfd_arch_d10v, + bfd_mach_d10v, + "d10v", + "d10v", + 4, + TRUE, + bfd_default_compatible, + bfd_default_scan, + bfd_arch_default_fill, + & d10v_ts2_info, +}; |
