summaryrefslogtreecommitdiff
path: root/sim/ucsim/doc/chip.fig
diff options
context:
space:
mode:
authorXavier ASUS <xavi92psx@gmail.com>2019-10-18 00:31:54 +0200
committerXavier ASUS <xavi92psx@gmail.com>2019-10-18 00:31:54 +0200
commit268a53de823a6750d6256ee1fb1e7707b4b45740 (patch)
tree42c1799a9a82b2f7d9790ee9fe181d72a7274751 /sim/ucsim/doc/chip.fig
downloadsdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'sim/ucsim/doc/chip.fig')
-rw-r--r--sim/ucsim/doc/chip.fig108
1 files changed, 108 insertions, 0 deletions
diff --git a/sim/ucsim/doc/chip.fig b/sim/ucsim/doc/chip.fig
new file mode 100644
index 0000000..49e0d02
--- /dev/null
+++ b/sim/ucsim/doc/chip.fig
@@ -0,0 +1,108 @@
+#FIG 3.2
+Landscape
+Center
+Metric
+A4
+100.00
+Single
+-2
+1200 2
+6 3375 2610 5130 2925
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+ 3375 2610 5130 2610 5130 2925 3375 2925 3375 2610
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3600 2925 3600 2790
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3825 2925 3825 2790
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4050 2925 4050 2790
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4905 2925 4905 2790
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4680 2925 4680 2790
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 2790
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4365 2790 4365 2790
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4500 2790
+-6
+6 3375 2295 5130 2610
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+ 3375 2295 5130 2295 5130 2610 3375 2610 3375 2295
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3600 2610 3600 2475
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3825 2610 3825 2475
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4050 2610 4050 2475
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4905 2610 4905 2475
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4680 2610 4680 2475
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 2475
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4365 2475 4365 2475
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4500 2475
+-6
+6 3375 2925 5130 3240
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+ 3375 2925 5130 2925 5130 3240 3375 3240 3375 2925
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3600 3240 3600 3105
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3825 3240 3825 3105
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4050 3240 4050 3105
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4905 3240 4905 3105
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4680 3240 4680 3105
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 3105
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4365 3105 4365 3105
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4500 3105
+-6
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 1 2
+ 0 0 1.00 60.00 120.00
+ 0 0 1.00 60.00 120.00
+ 3375 3600 5130 3600
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+ 3375 1215 5130 1215 5130 1530 3375 1530 3375 1215
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3600 1530 3600 1395
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 3825 1530 3825 1395
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4050 1530 4050 1395
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4905 1530 4905 1395
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4680 1530 4680 1395
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 1395
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+ 4365 1395 4365 1395
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4500 1395
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 1710
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 1890
+2 1 0 3 0 7 50 -1 -1 0.000 0 0 -1 0 0 1
+ 4230 2070
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 1 2
+ 0 0 1.00 60.00 120.00
+ 0 0 1.00 60.00 120.00
+ 5445 3240 5445 1215
+4 1 0 50 -1 16 12 0.0000 4 180 885 4230 3555 width (bits)\001
+4 0 0 50 -1 16 12 0.0000 4 180 870 5535 2295 size (cells)\001
+4 2 0 50 -1 16 12 0.0000 4 120 150 3285 3195 0.\001
+4 2 0 50 -1 16 12 0.0000 4 120 150 3285 2475 2.\001
+4 2 0 50 -1 16 12 0.0000 4 135 150 3285 2835 1.\001
+4 2 0 50 -1 16 12 0.0000 4 135 540 3285 1440 size-1.\001
+4 1 0 50 -1 16 12 0.0000 4 180 735 4230 3825 (cellsize)\001