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authorXavier ASUS <xavi92psx@gmail.com>2019-10-18 00:31:54 +0200
committerXavier ASUS <xavi92psx@gmail.com>2019-10-18 00:31:54 +0200
commit268a53de823a6750d6256ee1fb1e7707b4b45740 (patch)
tree42c1799a9a82b2f7d9790ee9fe181d72a7274751 /device/non-free/include/pic16/pic18f2539.h
downloadsdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'device/non-free/include/pic16/pic18f2539.h')
-rw-r--r--device/non-free/include/pic16/pic18f2539.h2115
1 files changed, 2115 insertions, 0 deletions
diff --git a/device/non-free/include/pic16/pic18f2539.h b/device/non-free/include/pic16/pic18f2539.h
new file mode 100644
index 0000000..70c0aba
--- /dev/null
+++ b/device/non-free/include/pic16/pic18f2539.h
@@ -0,0 +1,2115 @@
+/*
+ * This declarations of the PIC18F2539 MCU.
+ *
+ * This file is part of the GNU PIC library for SDCC, originally
+ * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
+ *
+ * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:44 UTC.
+ *
+ * SDCC is licensed under the GNU Public license (GPL) v2. Note that
+ * this license covers the code to the compiler and other executables,
+ * but explicitly does not cover any code or objects generated by sdcc.
+ *
+ * For pic device libraries and header files which are derived from
+ * Microchip header (.inc) and linker script (.lkr) files Microchip
+ * requires that "The header files should state that they are only to be
+ * used with authentic Microchip devices" which makes them incompatible
+ * with the GPL. Pic device libraries and header files are located at
+ * non-free/lib and non-free/include directories respectively.
+ * Sdcc should be run with the --use-non-free command line option in
+ * order to include non-free header files and libraries.
+ *
+ * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
+ */
+
+#ifndef __PIC18F2539_H__
+#define __PIC18F2539_H__
+
+//==============================================================================
+
+//==============================================================================
+//
+// Register Definitions
+//
+//==============================================================================
+
+
+//==============================================================================
+// PORTA Bits
+
+extern __at(0x0F80) __sfr PORTA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RA0 : 1;
+ unsigned RA1 : 1;
+ unsigned RA2 : 1;
+ unsigned RA3 : 1;
+ unsigned RA4 : 1;
+ unsigned RA5 : 1;
+ unsigned RA6 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned AN0 : 1;
+ unsigned AN1 : 1;
+ unsigned AN2 : 1;
+ unsigned AN3 : 1;
+ unsigned T0CKI : 1;
+ unsigned AN4 : 1;
+ unsigned OSC2 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned VREFM : 1;
+ unsigned VREFP : 1;
+ unsigned : 1;
+ unsigned SS : 1;
+ unsigned CLK0 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned LVDIN : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned RA : 7;
+ unsigned : 1;
+ };
+ } __PORTAbits_t;
+
+extern __at(0x0F80) volatile __PORTAbits_t PORTAbits;
+
+#define _PORTA_RA0 0x01
+#define _PORTA_AN0 0x01
+#define _PORTA_RA1 0x02
+#define _PORTA_AN1 0x02
+#define _PORTA_RA2 0x04
+#define _PORTA_AN2 0x04
+#define _PORTA_VREFM 0x04
+#define _PORTA_RA3 0x08
+#define _PORTA_AN3 0x08
+#define _PORTA_VREFP 0x08
+#define _PORTA_RA4 0x10
+#define _PORTA_T0CKI 0x10
+#define _PORTA_RA5 0x20
+#define _PORTA_AN4 0x20
+#define _PORTA_SS 0x20
+#define _PORTA_LVDIN 0x20
+#define _PORTA_RA6 0x40
+#define _PORTA_OSC2 0x40
+#define _PORTA_CLK0 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// PORTB Bits
+
+extern __at(0x0F81) __sfr PORTB;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RB0 : 1;
+ unsigned RB1 : 1;
+ unsigned RB2 : 1;
+ unsigned RB3 : 1;
+ unsigned RB4 : 1;
+ unsigned RB5 : 1;
+ unsigned RB6 : 1;
+ unsigned RB7 : 1;
+ };
+
+ struct
+ {
+ unsigned INT0 : 1;
+ unsigned INT1 : 1;
+ unsigned INT2 : 1;
+ unsigned INT3 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned INT : 4;
+ unsigned : 4;
+ };
+ } __PORTBbits_t;
+
+extern __at(0x0F81) volatile __PORTBbits_t PORTBbits;
+
+#define _PORTB_RB0 0x01
+#define _PORTB_INT0 0x01
+#define _PORTB_RB1 0x02
+#define _PORTB_INT1 0x02
+#define _PORTB_RB2 0x04
+#define _PORTB_INT2 0x04
+#define _PORTB_RB3 0x08
+#define _PORTB_INT3 0x08
+#define _PORTB_RB4 0x10
+#define _PORTB_RB5 0x20
+#define _PORTB_RB6 0x40
+#define _PORTB_RB7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// PORTC Bits
+
+extern __at(0x0F82) __sfr PORTC;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RC0 : 1;
+ unsigned T1OSI : 1;
+ unsigned CCP1 : 1;
+ unsigned RC3 : 1;
+ unsigned RC4 : 1;
+ unsigned RC5 : 1;
+ unsigned RC6 : 1;
+ unsigned RC7 : 1;
+ };
+
+ struct
+ {
+ unsigned T1OSO : 1;
+ unsigned CCP2 : 1;
+ unsigned RC2 : 1;
+ unsigned SCK : 1;
+ unsigned SDI : 1;
+ unsigned SDO : 1;
+ unsigned TX : 1;
+ unsigned RX : 1;
+ };
+
+ struct
+ {
+ unsigned T1CKI : 1;
+ unsigned RC1 : 1;
+ unsigned : 1;
+ unsigned SCL : 1;
+ unsigned SDA : 1;
+ unsigned : 1;
+ unsigned CK : 1;
+ unsigned : 1;
+ };
+ } __PORTCbits_t;
+
+extern __at(0x0F82) volatile __PORTCbits_t PORTCbits;
+
+#define _PORTC_RC0 0x01
+#define _PORTC_T1OSO 0x01
+#define _PORTC_T1CKI 0x01
+#define _PORTC_T1OSI 0x02
+#define _PORTC_CCP2 0x02
+#define _PORTC_RC1 0x02
+#define _PORTC_CCP1 0x04
+#define _PORTC_RC2 0x04
+#define _PORTC_RC3 0x08
+#define _PORTC_SCK 0x08
+#define _PORTC_SCL 0x08
+#define _PORTC_RC4 0x10
+#define _PORTC_SDI 0x10
+#define _PORTC_SDA 0x10
+#define _PORTC_RC5 0x20
+#define _PORTC_SDO 0x20
+#define _PORTC_RC6 0x40
+#define _PORTC_TX 0x40
+#define _PORTC_CK 0x40
+#define _PORTC_RC7 0x80
+#define _PORTC_RX 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// LATA Bits
+
+extern __at(0x0F89) __sfr LATA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned LATA0 : 1;
+ unsigned LATA1 : 1;
+ unsigned LATA2 : 1;
+ unsigned LATA3 : 1;
+ unsigned LATA4 : 1;
+ unsigned LATA5 : 1;
+ unsigned LATA6 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned LATA : 7;
+ unsigned : 1;
+ };
+ } __LATAbits_t;
+
+extern __at(0x0F89) volatile __LATAbits_t LATAbits;
+
+#define _LATA0 0x01
+#define _LATA1 0x02
+#define _LATA2 0x04
+#define _LATA3 0x08
+#define _LATA4 0x10
+#define _LATA5 0x20
+#define _LATA6 0x40
+
+//==============================================================================
+
+
+//==============================================================================
+// LATB Bits
+
+extern __at(0x0F8A) __sfr LATB;
+
+typedef struct
+ {
+ unsigned LATB0 : 1;
+ unsigned LATB1 : 1;
+ unsigned LATB2 : 1;
+ unsigned LATB3 : 1;
+ unsigned LATB4 : 1;
+ unsigned LATB5 : 1;
+ unsigned LATB6 : 1;
+ unsigned LATB7 : 1;
+ } __LATBbits_t;
+
+extern __at(0x0F8A) volatile __LATBbits_t LATBbits;
+
+#define _LATB0 0x01
+#define _LATB1 0x02
+#define _LATB2 0x04
+#define _LATB3 0x08
+#define _LATB4 0x10
+#define _LATB5 0x20
+#define _LATB6 0x40
+#define _LATB7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// LATC Bits
+
+extern __at(0x0F8B) __sfr LATC;
+
+typedef struct
+ {
+ unsigned LATC0 : 1;
+ unsigned LATC1 : 1;
+ unsigned LATC2 : 1;
+ unsigned LATC3 : 1;
+ unsigned LATC4 : 1;
+ unsigned LATC5 : 1;
+ unsigned LATC6 : 1;
+ unsigned LATC7 : 1;
+ } __LATCbits_t;
+
+extern __at(0x0F8B) volatile __LATCbits_t LATCbits;
+
+#define _LATC0 0x01
+#define _LATC1 0x02
+#define _LATC2 0x04
+#define _LATC3 0x08
+#define _LATC4 0x10
+#define _LATC5 0x20
+#define _LATC6 0x40
+#define _LATC7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// DDRA Bits
+
+extern __at(0x0F92) __sfr DDRA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISA0 : 1;
+ unsigned TRISA1 : 1;
+ unsigned TRISA2 : 1;
+ unsigned TRISA3 : 1;
+ unsigned TRISA4 : 1;
+ unsigned TRISA5 : 1;
+ unsigned TRISA6 : 1;
+ unsigned RA7 : 1;
+ };
+
+ struct
+ {
+ unsigned RA0 : 1;
+ unsigned RA1 : 1;
+ unsigned RA2 : 1;
+ unsigned RA3 : 1;
+ unsigned RA4 : 1;
+ unsigned RA5 : 1;
+ unsigned RA6 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned TRISA : 7;
+ unsigned : 1;
+ };
+ } __DDRAbits_t;
+
+extern __at(0x0F92) volatile __DDRAbits_t DDRAbits;
+
+#define _TRISA0 0x01
+#define _RA0 0x01
+#define _TRISA1 0x02
+#define _RA1 0x02
+#define _TRISA2 0x04
+#define _RA2 0x04
+#define _TRISA3 0x08
+#define _RA3 0x08
+#define _TRISA4 0x10
+#define _RA4 0x10
+#define _TRISA5 0x20
+#define _RA5 0x20
+#define _TRISA6 0x40
+#define _RA6 0x40
+#define _RA7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// TRISA Bits
+
+extern __at(0x0F92) __sfr TRISA;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISA0 : 1;
+ unsigned TRISA1 : 1;
+ unsigned TRISA2 : 1;
+ unsigned TRISA3 : 1;
+ unsigned TRISA4 : 1;
+ unsigned TRISA5 : 1;
+ unsigned TRISA6 : 1;
+ unsigned RA7 : 1;
+ };
+
+ struct
+ {
+ unsigned RA0 : 1;
+ unsigned RA1 : 1;
+ unsigned RA2 : 1;
+ unsigned RA3 : 1;
+ unsigned RA4 : 1;
+ unsigned RA5 : 1;
+ unsigned RA6 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned TRISA : 7;
+ unsigned : 1;
+ };
+ } __TRISAbits_t;
+
+extern __at(0x0F92) volatile __TRISAbits_t TRISAbits;
+
+#define _TRISA_TRISA0 0x01
+#define _TRISA_RA0 0x01
+#define _TRISA_TRISA1 0x02
+#define _TRISA_RA1 0x02
+#define _TRISA_TRISA2 0x04
+#define _TRISA_RA2 0x04
+#define _TRISA_TRISA3 0x08
+#define _TRISA_RA3 0x08
+#define _TRISA_TRISA4 0x10
+#define _TRISA_RA4 0x10
+#define _TRISA_TRISA5 0x20
+#define _TRISA_RA5 0x20
+#define _TRISA_TRISA6 0x40
+#define _TRISA_RA6 0x40
+#define _TRISA_RA7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// DDRB Bits
+
+extern __at(0x0F93) __sfr DDRB;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISB0 : 1;
+ unsigned TRISB1 : 1;
+ unsigned TRISB2 : 1;
+ unsigned TRISB3 : 1;
+ unsigned TRISB4 : 1;
+ unsigned TRISB5 : 1;
+ unsigned TRISB6 : 1;
+ unsigned TRISB7 : 1;
+ };
+
+ struct
+ {
+ unsigned RB0 : 1;
+ unsigned RB1 : 1;
+ unsigned RB2 : 1;
+ unsigned RB3 : 1;
+ unsigned RB4 : 1;
+ unsigned RB5 : 1;
+ unsigned RB6 : 1;
+ unsigned RB7 : 1;
+ };
+ } __DDRBbits_t;
+
+extern __at(0x0F93) volatile __DDRBbits_t DDRBbits;
+
+#define _TRISB0 0x01
+#define _RB0 0x01
+#define _TRISB1 0x02
+#define _RB1 0x02
+#define _TRISB2 0x04
+#define _RB2 0x04
+#define _TRISB3 0x08
+#define _RB3 0x08
+#define _TRISB4 0x10
+#define _RB4 0x10
+#define _TRISB5 0x20
+#define _RB5 0x20
+#define _TRISB6 0x40
+#define _RB6 0x40
+#define _TRISB7 0x80
+#define _RB7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// TRISB Bits
+
+extern __at(0x0F93) __sfr TRISB;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISB0 : 1;
+ unsigned TRISB1 : 1;
+ unsigned TRISB2 : 1;
+ unsigned TRISB3 : 1;
+ unsigned TRISB4 : 1;
+ unsigned TRISB5 : 1;
+ unsigned TRISB6 : 1;
+ unsigned TRISB7 : 1;
+ };
+
+ struct
+ {
+ unsigned RB0 : 1;
+ unsigned RB1 : 1;
+ unsigned RB2 : 1;
+ unsigned RB3 : 1;
+ unsigned RB4 : 1;
+ unsigned RB5 : 1;
+ unsigned RB6 : 1;
+ unsigned RB7 : 1;
+ };
+ } __TRISBbits_t;
+
+extern __at(0x0F93) volatile __TRISBbits_t TRISBbits;
+
+#define _TRISB_TRISB0 0x01
+#define _TRISB_RB0 0x01
+#define _TRISB_TRISB1 0x02
+#define _TRISB_RB1 0x02
+#define _TRISB_TRISB2 0x04
+#define _TRISB_RB2 0x04
+#define _TRISB_TRISB3 0x08
+#define _TRISB_RB3 0x08
+#define _TRISB_TRISB4 0x10
+#define _TRISB_RB4 0x10
+#define _TRISB_TRISB5 0x20
+#define _TRISB_RB5 0x20
+#define _TRISB_TRISB6 0x40
+#define _TRISB_RB6 0x40
+#define _TRISB_TRISB7 0x80
+#define _TRISB_RB7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// DDRC Bits
+
+extern __at(0x0F94) __sfr DDRC;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISC0 : 1;
+ unsigned RC1 : 1;
+ unsigned RC2 : 1;
+ unsigned TRISC3 : 1;
+ unsigned TRISC4 : 1;
+ unsigned TRISC5 : 1;
+ unsigned TRISC6 : 1;
+ unsigned TRISC7 : 1;
+ };
+
+ struct
+ {
+ unsigned RC0 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned RC3 : 1;
+ unsigned RC4 : 1;
+ unsigned RC5 : 1;
+ unsigned RC6 : 1;
+ unsigned RC7 : 1;
+ };
+ } __DDRCbits_t;
+
+extern __at(0x0F94) volatile __DDRCbits_t DDRCbits;
+
+#define _TRISC0 0x01
+#define _RC0 0x01
+#define _RC1 0x02
+#define _RC2 0x04
+#define _TRISC3 0x08
+#define _RC3 0x08
+#define _TRISC4 0x10
+#define _RC4 0x10
+#define _TRISC5 0x20
+#define _RC5 0x20
+#define _TRISC6 0x40
+#define _RC6 0x40
+#define _TRISC7 0x80
+#define _RC7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// TRISC Bits
+
+extern __at(0x0F94) __sfr TRISC;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TRISC0 : 1;
+ unsigned RC1 : 1;
+ unsigned RC2 : 1;
+ unsigned TRISC3 : 1;
+ unsigned TRISC4 : 1;
+ unsigned TRISC5 : 1;
+ unsigned TRISC6 : 1;
+ unsigned TRISC7 : 1;
+ };
+
+ struct
+ {
+ unsigned RC0 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned RC3 : 1;
+ unsigned RC4 : 1;
+ unsigned RC5 : 1;
+ unsigned RC6 : 1;
+ unsigned RC7 : 1;
+ };
+ } __TRISCbits_t;
+
+extern __at(0x0F94) volatile __TRISCbits_t TRISCbits;
+
+#define _TRISC_TRISC0 0x01
+#define _TRISC_RC0 0x01
+#define _TRISC_RC1 0x02
+#define _TRISC_RC2 0x04
+#define _TRISC_TRISC3 0x08
+#define _TRISC_RC3 0x08
+#define _TRISC_TRISC4 0x10
+#define _TRISC_RC4 0x10
+#define _TRISC_TRISC5 0x20
+#define _TRISC_RC5 0x20
+#define _TRISC_TRISC6 0x40
+#define _TRISC_RC6 0x40
+#define _TRISC_TRISC7 0x80
+#define _TRISC_RC7 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// PIE1 Bits
+
+extern __at(0x0F9D) __sfr PIE1;
+
+typedef struct
+ {
+ unsigned TMR1IE : 1;
+ unsigned TMR2IE : 1;
+ unsigned CCP1IE : 1;
+ unsigned SSPIE : 1;
+ unsigned TXIE : 1;
+ unsigned RCIE : 1;
+ unsigned ADIE : 1;
+ unsigned PSPIE : 1;
+ } __PIE1bits_t;
+
+extern __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
+
+#define _TMR1IE 0x01
+#define _TMR2IE 0x02
+#define _CCP1IE 0x04
+#define _SSPIE 0x08
+#define _TXIE 0x10
+#define _RCIE 0x20
+#define _ADIE 0x40
+#define _PSPIE 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// PIR1 Bits
+
+extern __at(0x0F9E) __sfr PIR1;
+
+typedef struct
+ {
+ unsigned TMR1IF : 1;
+ unsigned TMR2IF : 1;
+ unsigned CCP1IF : 1;
+ unsigned SSPIF : 1;
+ unsigned TXIF : 1;
+ unsigned RCIF : 1;
+ unsigned ADIF : 1;
+ unsigned PSPIF : 1;
+ } __PIR1bits_t;
+
+extern __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
+
+#define _TMR1IF 0x01
+#define _TMR2IF 0x02
+#define _CCP1IF 0x04
+#define _SSPIF 0x08
+#define _TXIF 0x10
+#define _RCIF 0x20
+#define _ADIF 0x40
+#define _PSPIF 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// IPR1 Bits
+
+extern __at(0x0F9F) __sfr IPR1;
+
+typedef struct
+ {
+ unsigned TMR1IP : 1;
+ unsigned TMR2IP : 1;
+ unsigned CCP1IP : 1;
+ unsigned SSPIP : 1;
+ unsigned TXIP : 1;
+ unsigned RCIP : 1;
+ unsigned ADIP : 1;
+ unsigned PSPIP : 1;
+ } __IPR1bits_t;
+
+extern __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
+
+#define _TMR1IP 0x01
+#define _TMR2IP 0x02
+#define _CCP1IP 0x04
+#define _SSPIP 0x08
+#define _TXIP 0x10
+#define _RCIP 0x20
+#define _ADIP 0x40
+#define _PSPIP 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// PIE2 Bits
+
+extern __at(0x0FA0) __sfr PIE2;
+
+typedef struct
+ {
+ unsigned CCP2IE : 1;
+ unsigned TMR3IE : 1;
+ unsigned LVDIE : 1;
+ unsigned BCLIE : 1;
+ unsigned EEIE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __PIE2bits_t;
+
+extern __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
+
+#define _CCP2IE 0x01
+#define _TMR3IE 0x02
+#define _LVDIE 0x04
+#define _BCLIE 0x08
+#define _EEIE 0x10
+
+//==============================================================================
+
+
+//==============================================================================
+// PIR2 Bits
+
+extern __at(0x0FA1) __sfr PIR2;
+
+typedef struct
+ {
+ unsigned CCP2IF : 1;
+ unsigned TMR3IF : 1;
+ unsigned LVDIF : 1;
+ unsigned BCLIF : 1;
+ unsigned EEIF : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __PIR2bits_t;
+
+extern __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
+
+#define _CCP2IF 0x01
+#define _TMR3IF 0x02
+#define _LVDIF 0x04
+#define _BCLIF 0x08
+#define _EEIF 0x10
+
+//==============================================================================
+
+
+//==============================================================================
+// IPR2 Bits
+
+extern __at(0x0FA2) __sfr IPR2;
+
+typedef struct
+ {
+ unsigned CCP2IP : 1;
+ unsigned TMR3IP : 1;
+ unsigned LVDIP : 1;
+ unsigned BCLIP : 1;
+ unsigned EEIP : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __IPR2bits_t;
+
+extern __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
+
+#define _CCP2IP 0x01
+#define _TMR3IP 0x02
+#define _LVDIP 0x04
+#define _BCLIP 0x08
+#define _EEIP 0x10
+
+//==============================================================================
+
+
+//==============================================================================
+// EECON1 Bits
+
+extern __at(0x0FA6) __sfr EECON1;
+
+typedef struct
+ {
+ unsigned RD : 1;
+ unsigned WR : 1;
+ unsigned WREN : 1;
+ unsigned WRERR : 1;
+ unsigned FREE : 1;
+ unsigned : 1;
+ unsigned CFGS : 1;
+ unsigned EEPGD : 1;
+ } __EECON1bits_t;
+
+extern __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
+
+#define _RD 0x01
+#define _WR 0x02
+#define _WREN 0x04
+#define _WRERR 0x08
+#define _FREE 0x10
+#define _CFGS 0x40
+#define _EEPGD 0x80
+
+//==============================================================================
+
+extern __at(0x0FA7) __sfr EECON2;
+extern __at(0x0FA8) __sfr EEDATA;
+extern __at(0x0FA9) __sfr EEADR;
+
+//==============================================================================
+// RCSTA Bits
+
+extern __at(0x0FAB) __sfr RCSTA;
+
+typedef struct
+ {
+ unsigned RX9D : 1;
+ unsigned OERR : 1;
+ unsigned FERR : 1;
+ unsigned ADDEN : 1;
+ unsigned CREN : 1;
+ unsigned SREN : 1;
+ unsigned RX9 : 1;
+ unsigned SPEN : 1;
+ } __RCSTAbits_t;
+
+extern __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
+
+#define _RX9D 0x01
+#define _OERR 0x02
+#define _FERR 0x04
+#define _ADDEN 0x08
+#define _CREN 0x10
+#define _SREN 0x20
+#define _RX9 0x40
+#define _SPEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// TXSTA Bits
+
+extern __at(0x0FAC) __sfr TXSTA;
+
+typedef struct
+ {
+ unsigned TX9D : 1;
+ unsigned TRMT : 1;
+ unsigned BRGH : 1;
+ unsigned : 1;
+ unsigned SYNC : 1;
+ unsigned TXEN : 1;
+ unsigned TX9 : 1;
+ unsigned CSRC : 1;
+ } __TXSTAbits_t;
+
+extern __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
+
+#define _TX9D 0x01
+#define _TRMT 0x02
+#define _BRGH 0x04
+#define _SYNC 0x10
+#define _TXEN 0x20
+#define _TX9 0x40
+#define _CSRC 0x80
+
+//==============================================================================
+
+extern __at(0x0FAD) __sfr TXREG;
+extern __at(0x0FAE) __sfr RCREG;
+extern __at(0x0FAF) __sfr SPBRG;
+
+//==============================================================================
+// T3CON Bits
+
+extern __at(0x0FB1) __sfr T3CON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TMR3ON : 1;
+ unsigned TMR3CS : 1;
+ unsigned NOT_T3SYNC : 1;
+ unsigned T3CCP1 : 1;
+ unsigned T3CKPS0 : 1;
+ unsigned T3CKPS1 : 1;
+ unsigned T3CCP2 : 1;
+ unsigned RD16 : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T3SYNC : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned T3CKPS : 2;
+ unsigned : 2;
+ };
+ } __T3CONbits_t;
+
+extern __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
+
+#define _T3CON_TMR3ON 0x01
+#define _T3CON_TMR3CS 0x02
+#define _T3CON_NOT_T3SYNC 0x04
+#define _T3CON_T3SYNC 0x04
+#define _T3CON_T3CCP1 0x08
+#define _T3CON_T3CKPS0 0x10
+#define _T3CON_T3CKPS1 0x20
+#define _T3CON_T3CCP2 0x40
+#define _T3CON_RD16 0x80
+
+//==============================================================================
+
+extern __at(0x0FB2) __sfr TMR3;
+extern __at(0x0FB2) __sfr TMR3L;
+extern __at(0x0FB3) __sfr TMR3H;
+
+//==============================================================================
+// CCP2CON Bits
+
+extern __at(0x0FBA) __sfr CCP2CON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned CCP2M0 : 1;
+ unsigned CCP2M1 : 1;
+ unsigned CCP2M2 : 1;
+ unsigned CCP2M3 : 1;
+ unsigned CCP2Y : 1;
+ unsigned CCP2X : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned DC2B0 : 1;
+ unsigned DC2B1 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned DCCPX : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned CCP2M : 4;
+ unsigned : 4;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned DC2B : 2;
+ unsigned : 2;
+ };
+ } __CCP2CONbits_t;
+
+extern __at(0x0FBA) volatile __CCP2CONbits_t CCP2CONbits;
+
+#define _CCP2M0 0x01
+#define _CCP2M1 0x02
+#define _CCP2M2 0x04
+#define _CCP2M3 0x08
+#define _CCP2Y 0x10
+#define _DC2B0 0x10
+#define _CCP2X 0x20
+#define _DC2B1 0x20
+#define _DCCPX 0x20
+
+//==============================================================================
+
+extern __at(0x0FBB) __sfr CCPR2;
+extern __at(0x0FBB) __sfr CCPR2L;
+extern __at(0x0FBC) __sfr CCPR2H;
+
+//==============================================================================
+// CCP1CON Bits
+
+extern __at(0x0FBD) __sfr CCP1CON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned CCP1M0 : 1;
+ unsigned CCP1M1 : 1;
+ unsigned CCP1M2 : 1;
+ unsigned CCP1M3 : 1;
+ unsigned CCP1Y : 1;
+ unsigned CCP1X : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned DC1B0 : 1;
+ unsigned DC1B1 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned CCP1M : 4;
+ unsigned : 4;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned DC1B : 2;
+ unsigned : 2;
+ };
+ } __CCP1CONbits_t;
+
+extern __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits;
+
+#define _CCP1M0 0x01
+#define _CCP1M1 0x02
+#define _CCP1M2 0x04
+#define _CCP1M3 0x08
+#define _CCP1Y 0x10
+#define _DC1B0 0x10
+#define _CCP1X 0x20
+#define _DC1B1 0x20
+
+//==============================================================================
+
+extern __at(0x0FBE) __sfr CCPR1;
+extern __at(0x0FBE) __sfr CCPR1L;
+extern __at(0x0FBF) __sfr CCPR1H;
+
+//==============================================================================
+// ADCON1 Bits
+
+extern __at(0x0FC1) __sfr ADCON1;
+
+typedef union
+ {
+ struct
+ {
+ unsigned PCFG0 : 1;
+ unsigned PCFG1 : 1;
+ unsigned PCFG2 : 1;
+ unsigned PCFG3 : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned ADCS2 : 1;
+ unsigned ADFM : 1;
+ };
+
+ struct
+ {
+ unsigned PCFG : 4;
+ unsigned : 4;
+ };
+ } __ADCON1bits_t;
+
+extern __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
+
+#define _PCFG0 0x01
+#define _PCFG1 0x02
+#define _PCFG2 0x04
+#define _PCFG3 0x08
+#define _ADCS2 0x40
+#define _ADFM 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// ADCON0 Bits
+
+extern __at(0x0FC2) __sfr ADCON0;
+
+typedef union
+ {
+ struct
+ {
+ unsigned ADON : 1;
+ unsigned : 1;
+ unsigned GO_NOT_DONE : 1;
+ unsigned CHS0 : 1;
+ unsigned CHS1 : 1;
+ unsigned CHS2 : 1;
+ unsigned ADCS0 : 1;
+ unsigned ADCS1 : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned GO : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned NOT_DONE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned DONE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned GO_DONE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned : 3;
+ unsigned CHS : 3;
+ unsigned : 2;
+ };
+
+ struct
+ {
+ unsigned : 6;
+ unsigned ADCS : 2;
+ };
+ } __ADCON0bits_t;
+
+extern __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
+
+#define _ADON 0x01
+#define _GO_NOT_DONE 0x04
+#define _GO 0x04
+#define _NOT_DONE 0x04
+#define _DONE 0x04
+#define _GO_DONE 0x04
+#define _CHS0 0x08
+#define _CHS1 0x10
+#define _CHS2 0x20
+#define _ADCS0 0x40
+#define _ADCS1 0x80
+
+//==============================================================================
+
+extern __at(0x0FC3) __sfr ADRES;
+extern __at(0x0FC3) __sfr ADRESL;
+extern __at(0x0FC4) __sfr ADRESH;
+
+//==============================================================================
+// SSPCON2 Bits
+
+extern __at(0x0FC5) __sfr SSPCON2;
+
+typedef struct
+ {
+ unsigned SEN : 1;
+ unsigned RSEN : 1;
+ unsigned PEN : 1;
+ unsigned RCEN : 1;
+ unsigned ACKEN : 1;
+ unsigned ACKDT : 1;
+ unsigned ACKSTAT : 1;
+ unsigned GCEN : 1;
+ } __SSPCON2bits_t;
+
+extern __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
+
+#define _SEN 0x01
+#define _RSEN 0x02
+#define _PEN 0x04
+#define _RCEN 0x08
+#define _ACKEN 0x10
+#define _ACKDT 0x20
+#define _ACKSTAT 0x40
+#define _GCEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPCON1 Bits
+
+extern __at(0x0FC6) __sfr SSPCON1;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SSPM0 : 1;
+ unsigned SSPM1 : 1;
+ unsigned SSPM2 : 1;
+ unsigned SSPM3 : 1;
+ unsigned CKP : 1;
+ unsigned SSPEN : 1;
+ unsigned SSPOV : 1;
+ unsigned WCOL : 1;
+ };
+
+ struct
+ {
+ unsigned SSPM : 4;
+ unsigned : 4;
+ };
+ } __SSPCON1bits_t;
+
+extern __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
+
+#define _SSPM0 0x01
+#define _SSPM1 0x02
+#define _SSPM2 0x04
+#define _SSPM3 0x08
+#define _CKP 0x10
+#define _SSPEN 0x20
+#define _SSPOV 0x40
+#define _WCOL 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// SSPSTAT Bits
+
+extern __at(0x0FC7) __sfr SSPSTAT;
+
+typedef union
+ {
+ struct
+ {
+ unsigned BF : 1;
+ unsigned UA : 1;
+ unsigned R_NOT_W : 1;
+ unsigned S : 1;
+ unsigned P : 1;
+ unsigned D_NOT_A : 1;
+ unsigned CKE : 1;
+ unsigned SMP : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned R_W : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned D_A : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+ } __SSPSTATbits_t;
+
+extern __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
+
+#define _BF 0x01
+#define _UA 0x02
+#define _R_NOT_W 0x04
+#define _R_W 0x04
+#define _S 0x08
+#define _P 0x10
+#define _D_NOT_A 0x20
+#define _D_A 0x20
+#define _CKE 0x40
+#define _SMP 0x80
+
+//==============================================================================
+
+extern __at(0x0FC8) __sfr SSPADD;
+extern __at(0x0FC9) __sfr SSPBUF;
+
+//==============================================================================
+// T2CON Bits
+
+extern __at(0x0FCA) __sfr T2CON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned T2CKPS0 : 1;
+ unsigned T2CKPS1 : 1;
+ unsigned TMR2ON : 1;
+ unsigned TOUTPS0 : 1;
+ unsigned TOUTPS1 : 1;
+ unsigned TOUTPS2 : 1;
+ unsigned TOUTPS3 : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned T2CKPS : 2;
+ unsigned : 6;
+ };
+
+ struct
+ {
+ unsigned : 3;
+ unsigned TOUTPS : 4;
+ unsigned : 1;
+ };
+ } __T2CONbits_t;
+
+extern __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
+
+#define _T2CKPS0 0x01
+#define _T2CKPS1 0x02
+#define _TMR2ON 0x04
+#define _TOUTPS0 0x08
+#define _TOUTPS1 0x10
+#define _TOUTPS2 0x20
+#define _TOUTPS3 0x40
+
+//==============================================================================
+
+extern __at(0x0FCB) __sfr PR2;
+extern __at(0x0FCC) __sfr TMR2;
+
+//==============================================================================
+// T1CON Bits
+
+extern __at(0x0FCD) __sfr T1CON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned TMR1ON : 1;
+ unsigned TMR1CS : 1;
+ unsigned NOT_T1SYNC : 1;
+ unsigned T1OSCEN : 1;
+ unsigned T1CKPS0 : 1;
+ unsigned T1CKPS1 : 1;
+ unsigned : 1;
+ unsigned RD16 : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T1SYNC : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T1RD16 : 1;
+ };
+
+ struct
+ {
+ unsigned : 4;
+ unsigned T1CKPS : 2;
+ unsigned : 2;
+ };
+ } __T1CONbits_t;
+
+extern __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
+
+#define _TMR1ON 0x01
+#define _TMR1CS 0x02
+#define _NOT_T1SYNC 0x04
+#define _T1SYNC 0x04
+#define _T1OSCEN 0x08
+#define _T1CKPS0 0x10
+#define _T1CKPS1 0x20
+#define _RD16 0x80
+#define _T1RD16 0x80
+
+//==============================================================================
+
+extern __at(0x0FCE) __sfr TMR1;
+extern __at(0x0FCE) __sfr TMR1L;
+extern __at(0x0FCF) __sfr TMR1H;
+
+//==============================================================================
+// RCON Bits
+
+extern __at(0x0FD0) __sfr RCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned NOT_BOR : 1;
+ unsigned NOT_POR : 1;
+ unsigned NOT_PD : 1;
+ unsigned NOT_TO : 1;
+ unsigned NOT_RI : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned IPEN : 1;
+ };
+
+ struct
+ {
+ unsigned BOR : 1;
+ unsigned POR : 1;
+ unsigned PD : 1;
+ unsigned TO : 1;
+ unsigned RI : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned NOT_IPEN : 1;
+ };
+ } __RCONbits_t;
+
+extern __at(0x0FD0) volatile __RCONbits_t RCONbits;
+
+#define _NOT_BOR 0x01
+#define _BOR 0x01
+#define _NOT_POR 0x02
+#define _POR 0x02
+#define _NOT_PD 0x04
+#define _PD 0x04
+#define _NOT_TO 0x08
+#define _TO 0x08
+#define _NOT_RI 0x10
+#define _RI 0x10
+#define _IPEN 0x80
+#define _NOT_IPEN 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// WDTCON Bits
+
+extern __at(0x0FD1) __sfr WDTCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned SWDTEN : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned SWDTE : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+ } __WDTCONbits_t;
+
+extern __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
+
+#define _SWDTEN 0x01
+#define _SWDTE 0x01
+
+//==============================================================================
+
+
+//==============================================================================
+// LVDCON Bits
+
+extern __at(0x0FD2) __sfr LVDCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned LVDL0 : 1;
+ unsigned LVDL1 : 1;
+ unsigned LVDL2 : 1;
+ unsigned LVDL3 : 1;
+ unsigned LVDEN : 1;
+ unsigned IRVST : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned LVDL : 4;
+ unsigned : 4;
+ };
+ } __LVDCONbits_t;
+
+extern __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits;
+
+#define _LVDL0 0x01
+#define _LVDL1 0x02
+#define _LVDL2 0x04
+#define _LVDL3 0x08
+#define _LVDEN 0x10
+#define _IRVST 0x20
+
+//==============================================================================
+
+
+//==============================================================================
+// OSCCON Bits
+
+extern __at(0x0FD3) __sfr OSCCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RESERVED : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+
+ struct
+ {
+ unsigned SCS : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ };
+ } __OSCCONbits_t;
+
+extern __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
+
+#define _RESERVED 0x01
+#define _SCS 0x01
+
+//==============================================================================
+
+
+//==============================================================================
+// T0CON Bits
+
+extern __at(0x0FD5) __sfr T0CON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned T0PS0 : 1;
+ unsigned T0PS1 : 1;
+ unsigned T0PS2 : 1;
+ unsigned PSA : 1;
+ unsigned T0SE : 1;
+ unsigned T0CS : 1;
+ unsigned T08BIT : 1;
+ unsigned TMR0ON : 1;
+ };
+
+ struct
+ {
+ unsigned T0PS : 3;
+ unsigned : 5;
+ };
+ } __T0CONbits_t;
+
+extern __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
+
+#define _T0PS0 0x01
+#define _T0PS1 0x02
+#define _T0PS2 0x04
+#define _PSA 0x08
+#define _T0SE 0x10
+#define _T0CS 0x20
+#define _T08BIT 0x40
+#define _TMR0ON 0x80
+
+//==============================================================================
+
+extern __at(0x0FD6) __sfr TMR0;
+extern __at(0x0FD6) __sfr TMR0L;
+extern __at(0x0FD7) __sfr TMR0H;
+
+//==============================================================================
+// STATUS Bits
+
+extern __at(0x0FD8) __sfr STATUS;
+
+typedef struct
+ {
+ unsigned C : 1;
+ unsigned DC : 1;
+ unsigned Z : 1;
+ unsigned OV : 1;
+ unsigned N : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ } __STATUSbits_t;
+
+extern __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
+
+#define _C 0x01
+#define _DC 0x02
+#define _Z 0x04
+#define _OV 0x08
+#define _N 0x10
+
+//==============================================================================
+
+extern __at(0x0FD9) __sfr FSR2L;
+extern __at(0x0FDA) __sfr FSR2H;
+extern __at(0x0FDB) __sfr PLUSW2;
+extern __at(0x0FDC) __sfr PREINC2;
+extern __at(0x0FDD) __sfr POSTDEC2;
+extern __at(0x0FDE) __sfr POSTINC2;
+extern __at(0x0FDF) __sfr INDF2;
+extern __at(0x0FE0) __sfr BSR;
+extern __at(0x0FE1) __sfr FSR1L;
+extern __at(0x0FE2) __sfr FSR1H;
+extern __at(0x0FE3) __sfr PLUSW1;
+extern __at(0x0FE4) __sfr PREINC1;
+extern __at(0x0FE5) __sfr POSTDEC1;
+extern __at(0x0FE6) __sfr POSTINC1;
+extern __at(0x0FE7) __sfr INDF1;
+extern __at(0x0FE8) __sfr WREG;
+extern __at(0x0FE9) __sfr FSR0L;
+extern __at(0x0FEA) __sfr FSR0H;
+extern __at(0x0FEB) __sfr PLUSW0;
+extern __at(0x0FEC) __sfr PREINC0;
+extern __at(0x0FED) __sfr POSTDEC0;
+extern __at(0x0FEE) __sfr POSTINC0;
+extern __at(0x0FEF) __sfr INDF0;
+
+//==============================================================================
+// INTCON3 Bits
+
+extern __at(0x0FF0) __sfr INTCON3;
+
+typedef union
+ {
+ struct
+ {
+ unsigned INT1IF : 1;
+ unsigned INT2IF : 1;
+ unsigned : 1;
+ unsigned INT1IE : 1;
+ unsigned INT2IE : 1;
+ unsigned : 1;
+ unsigned INT1IP : 1;
+ unsigned INT2IP : 1;
+ };
+
+ struct
+ {
+ unsigned INT1F : 1;
+ unsigned INT2F : 1;
+ unsigned : 1;
+ unsigned INT1E : 1;
+ unsigned INT2E : 1;
+ unsigned : 1;
+ unsigned INT1P : 1;
+ unsigned INT2P : 1;
+ };
+ } __INTCON3bits_t;
+
+extern __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
+
+#define _INT1IF 0x01
+#define _INT1F 0x01
+#define _INT2IF 0x02
+#define _INT2F 0x02
+#define _INT1IE 0x08
+#define _INT1E 0x08
+#define _INT2IE 0x10
+#define _INT2E 0x10
+#define _INT1IP 0x40
+#define _INT1P 0x40
+#define _INT2IP 0x80
+#define _INT2P 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// INTCON2 Bits
+
+extern __at(0x0FF1) __sfr INTCON2;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RBIP : 1;
+ unsigned INT3P : 1;
+ unsigned TMR0IP : 1;
+ unsigned INTEDG3 : 1;
+ unsigned INTEDG2 : 1;
+ unsigned INTEDG1 : 1;
+ unsigned INTEDG0 : 1;
+ unsigned NOT_RBPU : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned T0IP : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned RBPU : 1;
+ };
+ } __INTCON2bits_t;
+
+extern __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
+
+#define _RBIP 0x01
+#define _INT3P 0x02
+#define _TMR0IP 0x04
+#define _T0IP 0x04
+#define _INTEDG3 0x08
+#define _INTEDG2 0x10
+#define _INTEDG1 0x20
+#define _INTEDG0 0x40
+#define _NOT_RBPU 0x80
+#define _RBPU 0x80
+
+//==============================================================================
+
+
+//==============================================================================
+// INTCON Bits
+
+extern __at(0x0FF2) __sfr INTCON;
+
+typedef union
+ {
+ struct
+ {
+ unsigned RBIF : 1;
+ unsigned INT0IF : 1;
+ unsigned TMR0IF : 1;
+ unsigned RBIE : 1;
+ unsigned INT0IE : 1;
+ unsigned TMR0IE : 1;
+ unsigned PEIE_GIEL : 1;
+ unsigned GIE_GIEH : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned INT0F : 1;
+ unsigned T0IF : 1;
+ unsigned : 1;
+ unsigned INT0E : 1;
+ unsigned T0IE : 1;
+ unsigned PEIE : 1;
+ unsigned GIE : 1;
+ };
+
+ struct
+ {
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned : 1;
+ unsigned GIEL : 1;
+ unsigned GIEH : 1;
+ };
+ } __INTCONbits_t;
+
+extern __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
+
+#define _RBIF 0x01
+#define _INT0IF 0x02
+#define _INT0F 0x02
+#define _TMR0IF 0x04
+#define _T0IF 0x04
+#define _RBIE 0x08
+#define _INT0IE 0x10
+#define _INT0E 0x10
+#define _TMR0IE 0x20
+#define _T0IE 0x20
+#define _PEIE_GIEL 0x40
+#define _PEIE 0x40
+#define _GIEL 0x40
+#define _GIE_GIEH 0x80
+#define _GIE 0x80
+#define _GIEH 0x80
+
+//==============================================================================
+
+extern __at(0x0FF3) __sfr PROD;
+extern __at(0x0FF3) __sfr PRODL;
+extern __at(0x0FF4) __sfr PRODH;
+extern __at(0x0FF5) __sfr TABLAT;
+extern __at(0x0FF6) __sfr TBLPTR;
+extern __at(0x0FF6) __sfr TBLPTRL;
+extern __at(0x0FF7) __sfr TBLPTRH;
+extern __at(0x0FF8) __sfr TBLPTRU;
+extern __at(0x0FF9) __sfr PC;
+extern __at(0x0FF9) __sfr PCL;
+extern __at(0x0FFA) __sfr PCLATH;
+extern __at(0x0FFB) __sfr PCLATU;
+
+//==============================================================================
+// STKPTR Bits
+
+extern __at(0x0FFC) __sfr STKPTR;
+
+typedef union
+ {
+ struct
+ {
+ unsigned STKPTR0 : 1;
+ unsigned STKPTR1 : 1;
+ unsigned STKPTR2 : 1;
+ unsigned STKPTR3 : 1;
+ unsigned STKPTR4 : 1;
+ unsigned : 1;
+ unsigned STKUNF : 1;
+ unsigned STKFUL : 1;
+ };
+
+ struct
+ {
+ unsigned STKPTR : 5;
+ unsigned : 3;
+ };
+ } __STKPTRbits_t;
+
+extern __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
+
+#define _STKPTR0 0x01
+#define _STKPTR1 0x02
+#define _STKPTR2 0x04
+#define _STKPTR3 0x08
+#define _STKPTR4 0x10
+#define _STKUNF 0x40
+#define _STKFUL 0x80
+
+//==============================================================================
+
+extern __at(0x0FFD) __sfr TOS;
+extern __at(0x0FFD) __sfr TOSL;
+extern __at(0x0FFE) __sfr TOSH;
+extern __at(0x0FFF) __sfr TOSU;
+
+//==============================================================================
+//
+// Configuration Bits
+//
+//==============================================================================
+
+#define __CONFIG1H 0x300001
+#define __CONFIG2L 0x300002
+#define __CONFIG2H 0x300003
+#define __CONFIG4L 0x300006
+#define __CONFIG5L 0x300008
+#define __CONFIG5H 0x300009
+#define __CONFIG6L 0x30000A
+#define __CONFIG6H 0x30000B
+#define __CONFIG7L 0x30000C
+#define __CONFIG7H 0x30000D
+
+//----------------------------- CONFIG1H Options -------------------------------
+
+#define _OSC_HS_1H 0xFA // HS oscillator.
+#define _OSC_EC_1H 0xFC // EC oscillator w/ OSC2 configured as divide-by-4 clock output.
+#define _OSC_ECIO_1H 0xFD // EC oscillator w/ OSC2 configured as RA6.
+#define _OSC_HSPLL_1H 0xFE // HS oscillator with PLL enabled; clock frequency = (4 x FOSC).
+
+//----------------------------- CONFIG2L Options -------------------------------
+
+#define _PWRT_ON_2L 0xFE // PWRT enabled.
+#define _PWRT_OFF_2L 0xFF // PWRT disabled.
+#define _BOR_OFF_2L 0xFD // Brown-out Reset disabled.
+#define _BOR_ON_2L 0xFF // Brown-out Reset enabled.
+#define _BORV_45_2L 0xF3 // VBOR set to 4.5V.
+#define _BORV_42_2L 0xF7 // VBOR set to 4.2V.
+#define _BORV_27_2L 0xFB // VBOR set to 2.7V.
+#define _BORV_25_2L 0xFF // VBOR set to 2.5V.
+
+//----------------------------- CONFIG2H Options -------------------------------
+
+#define _WDT_OFF_2H 0xFE // WDT disabled (control is placed on the SWDTEN bit).
+#define _WDT_ON_2H 0xFF // WDT enabled.
+#define _WDTPS_1_2H 0xF1 // 1:1.
+#define _WDTPS_2_2H 0xF3 // 1:2.
+#define _WDTPS_4_2H 0xF5 // 1:4.
+#define _WDTPS_8_2H 0xF7 // 1:8.
+#define _WDTPS_16_2H 0xF9 // 1:16.
+#define _WDTPS_32_2H 0xFB // 1:32.
+#define _WDTPS_64_2H 0xFD // 1:64.
+#define _WDTPS_128_2H 0xFF // 1:128.
+
+//----------------------------- CONFIG4L Options -------------------------------
+
+#define _STVR_OFF_4L 0xFE // Stack Full/Underflow will not cause RESET.
+#define _STVR_ON_4L 0xFF // Stack Full/Underflow will cause RESET.
+#define _LVP_OFF_4L 0xFB // Low Voltage ICSP disabled.
+#define _LVP_ON_4L 0xFF // Low Voltage ICSP enabled.
+#define _DEBUG_ON_4L 0x7F // Background Debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.
+#define _DEBUG_OFF_4L 0xFF // Background Debugger disabled. RB6 and RB7 configured as general purpose I/O pins.
+
+//----------------------------- CONFIG5L Options -------------------------------
+
+#define _CP0_ON_5L 0xFE // Block 0 (000200-001FFFh) code protected.
+#define _CP0_OFF_5L 0xFF // Block 0 (000200-001FFFh) not code protected.
+#define _CP1_ON_5L 0xFD // Block 1 (002000-003FFFh) code protected.
+#define _CP1_OFF_5L 0xFF // Block 1 (002000-003FFFh) not code protected.
+#define _CP2_ON_5L 0xFB // Block 2 (004000-005FFFh) code protected.
+#define _CP2_OFF_5L 0xFF // Block 2 (004000-005FFFh) not code protected.
+
+//----------------------------- CONFIG5H Options -------------------------------
+
+#define _CPB_ON_5H 0xBF // Boot block (000000-0001FFh) code protected.
+#define _CPB_OFF_5H 0xFF // Boot block (000000-0001FFh) not code protected.
+#define _CPD_ON_5H 0x7F // Data EEPROM code protected.
+#define _CPD_OFF_5H 0xFF // Data EEPROM not code protected.
+
+//----------------------------- CONFIG6L Options -------------------------------
+
+#define _WRT0_ON_6L 0xFE // Block 0 (000200h-001FFFh) write protected.
+#define _WRT0_OFF_6L 0xFF // Block 0 (000200h-001FFFh) not write protected.
+#define _WRT1_ON_6L 0xFD // Block 1 (002000-003FFFh) write protected.
+#define _WRT1_OFF_6L 0xFF // Block 1 (002000-003FFFh) not write protected.
+#define _WRT2_ON_6L 0xFB // Block 2 (004000-005FFFh) write protected.
+#define _WRT2_OFF_6L 0xFF // Block 2 (004000-005FFFh) not write protected.
+
+//----------------------------- CONFIG6H Options -------------------------------
+
+#define _WRTC_ON_6H 0xDF // Configuration registers (300000-3000FFh) write protected.
+#define _WRTC_OFF_6H 0xFF // Configuration registers (300000-3000FFh) not write protected.
+#define _WRTB_ON_6H 0xBF // Boot block (000000-0001FFh) write protected.
+#define _WRTB_OFF_6H 0xFF // Boot block (000000-0001FFh) not write protected.
+#define _WRTD_ON_6H 0x7F // Data EEPROM write protected.
+#define _WRTD_OFF_6H 0xFF // Data EEPROM not write protected.
+
+//----------------------------- CONFIG7L Options -------------------------------
+
+#define _EBTR0_ON_7L 0xFE // Block 0 (000200h-001FFFh) protected from Table Reads executed in other blocks.
+#define _EBTR0_OFF_7L 0xFF // Block 0 (000200h-001FFFh) not protected from Table Reads executed in other blocks.
+#define _EBTR1_ON_7L 0xFD // Block 1 (002000-003FFFh) protected from Table Reads executed in other blocks.
+#define _EBTR1_OFF_7L 0xFF // Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks.
+#define _EBTR2_ON_7L 0xFB // Block 2 (004000-005FFFh) protected from Table Reads executed in other blocks.
+#define _EBTR2_OFF_7L 0xFF // Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks.
+
+//----------------------------- CONFIG7H Options -------------------------------
+
+#define _EBTRB_ON_7H 0xBF // Boot block (000000-0001FFh) protected from Table Reads executed in other blocks.
+#define _EBTRB_OFF_7H 0xFF // Boot block (000000-0001FFh) not protected from Table Reads executed in other blocks.
+
+//==============================================================================
+
+#define __DEVID1 0x3FFFFE
+#define __DEVID2 0x3FFFFF
+
+#define __IDLOC0 0x200000
+#define __IDLOC1 0x200001
+#define __IDLOC2 0x200002
+#define __IDLOC3 0x200003
+#define __IDLOC4 0x200004
+#define __IDLOC5 0x200005
+#define __IDLOC6 0x200006
+#define __IDLOC7 0x200007
+
+#endif // #ifndef __PIC18F2539_H__