diff options
| author | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
|---|---|---|
| committer | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
| commit | 268a53de823a6750d6256ee1fb1e7707b4b45740 (patch) | |
| tree | 42c1799a9a82b2f7d9790ee9fe181d72a7274751 /device/lib/stm8/_strstr.rel | |
| download | sdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz | |
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'device/lib/stm8/_strstr.rel')
| -rw-r--r-- | device/lib/stm8/_strstr.rel | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/device/lib/stm8/_strstr.rel b/device/lib/stm8/_strstr.rel new file mode 100644 index 0000000..587c9fa --- /dev/null +++ b/device/lib/stm8/_strstr.rel @@ -0,0 +1,57 @@ +XH3 +H B areas 2 global symbols +M _strstr +O -mstm8 +S .__.ABS. Def000000 +A _CODE size 0 flags 0 addr 0 +A DATA size 0 flags 0 addr 0 +A INITIALIZED size 0 flags 0 addr 0 +A DABS size 0 flags 8 addr 0 +A HOME size 0 flags 0 addr 0 +A GSINIT size 0 flags 0 addr 0 +A GSFINAL size 0 flags 0 addr 0 +A CONST size 0 flags 0 addr 0 +A INITIALIZER size 0 flags 0 addr 0 +A CODE size 68 flags 0 addr 0 +S _strstr Def000000 +A CABS size 0 flags 8 addr 0 +T 00 00 00 +R 00 00 00 09 +T 00 00 00 52 0D 16 10 17 01 16 12 17 03 93 F6 6B +R 00 00 00 09 +T 00 00 0D 0D 26 04 1E 01 20 51 +R 00 00 00 09 +T 00 00 14 +R 00 00 00 09 +T 00 00 14 16 01 17 08 +R 00 00 00 09 +T 00 00 18 +R 00 00 00 09 +T 00 00 18 1E 08 F6 27 47 1E 03 16 08 17 0A 1F 0C +R 00 00 00 09 +T 00 00 25 +R 00 00 00 09 +T 00 00 25 1E 0A F6 6B 07 1E 0C F6 6B 05 0D 07 27 +R 00 00 00 09 +T 00 00 32 20 0D 05 27 1C 5F 7B 07 97 7B 05 6B 07 +R 00 00 00 09 +T 00 00 3F 0F 06 72 F0 06 5D 26 0C 1E 0A 5C 1F 0A +R 00 00 00 09 +T 00 00 4C 1E 0C 5C 1F 0C 20 D2 +R 00 00 00 09 +T 00 00 53 +R 00 00 00 09 +T 00 00 53 0D 05 26 04 1E 01 20 0A +R 00 00 00 09 +T 00 00 5B +R 00 00 00 09 +T 00 00 5B 1E 08 5C 1F 08 1F 01 20 B4 +R 00 00 00 09 +T 00 00 64 +R 00 00 00 09 +T 00 00 64 5F +R 00 00 00 09 +T 00 00 65 +R 00 00 00 09 +T 00 00 65 5B 0D 81 +R 00 00 00 09 |
