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| author | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
|---|---|---|
| committer | Xavier ASUS <xavi92psx@gmail.com> | 2019-10-18 00:31:54 +0200 |
| commit | 268a53de823a6750d6256ee1fb1e7707b4b45740 (patch) | |
| tree | 42c1799a9a82b2f7d9790ee9fe181d72a7274751 /device/lib/stm8/_memcmp.lst | |
| download | sdcc-gas-268a53de823a6750d6256ee1fb1e7707b4b45740.tar.gz | |
sdcc-3.9.0 fork implementing GNU assembler syntax
This fork aims to provide better support for stm8-binutils
Diffstat (limited to 'device/lib/stm8/_memcmp.lst')
| -rw-r--r-- | device/lib/stm8/_memcmp.lst | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/device/lib/stm8/_memcmp.lst b/device/lib/stm8/_memcmp.lst new file mode 100644 index 0000000..3822791 --- /dev/null +++ b/device/lib/stm8/_memcmp.lst @@ -0,0 +1,101 @@ + 1 ;-------------------------------------------------------- + 2 ; File Created by SDCC : free open source ANSI-C Compiler + 3 ; Version 3.9.3 #11345 (Linux) + 4 ;-------------------------------------------------------- + 5 .module _memcmp + 6 .optsdcc -mstm8 + 7 + 8 ;-------------------------------------------------------- + 9 ; Public variables in this module + 10 ;-------------------------------------------------------- + 11 .globl _memcmp + 12 ;-------------------------------------------------------- + 13 ; ram data + 14 ;-------------------------------------------------------- + 15 .area DATA + 16 ;-------------------------------------------------------- + 17 ; ram data + 18 ;-------------------------------------------------------- + 19 .area INITIALIZED + 20 ;-------------------------------------------------------- + 21 ; absolute external ram data + 22 ;-------------------------------------------------------- + 23 .area DABS (ABS) + 24 + 25 ; default segment ordering for linker + 26 .area HOME + 27 .area GSINIT + 28 .area GSFINAL + 29 .area CONST + 30 .area INITIALIZER + 31 .area CODE + 32 + 33 ;-------------------------------------------------------- + 34 ; global & static initialisations + 35 ;-------------------------------------------------------- + 36 .area HOME + 37 .area GSINIT + 38 .area GSFINAL + 39 .area GSINIT + 40 ;-------------------------------------------------------- + 41 ; Home + 42 ;-------------------------------------------------------- + 43 .area HOME + 44 .area HOME + 45 ;-------------------------------------------------------- + 46 ; code + 47 ;-------------------------------------------------------- + 48 .area CODE + 49 ; ../_memcmp.c: 31: int memcmp (const void * buf1, const void * buf2, size_t count) + 50 ; ----------------------------------------- + 51 ; function memcmp + 52 ; ----------------------------------------- + 000000 53 _memcmp: + 000000 52 05 [ 2] 54 sub sp, #5 + 55 ; ../_memcmp.c: 33: if (!count) + 56 ; ../_memcmp.c: 34: return(0); + 000002 1E 0C [ 2] 57 ldw x, (0x0c, sp) + 58 ; ../_memcmp.c: 36: while ( --count && *((char *)buf1) == *((char *)buf2) ) { + 000004 27 34 [ 1] 59 jreq 00107$ + 000006 16 0C [ 2] 60 ldw y, (0x0c, sp) + 000008 17 04 [ 2] 61 ldw (0x04, sp), y + 00000A 62 00104$: + 00000A 1E 04 [ 2] 63 ldw x, (0x04, sp) + 00000C 5A [ 2] 64 decw x + 00000D 1F 04 [ 2] 65 ldw (0x04, sp), x + 00000F 1E 08 [ 2] 66 ldw x, (0x08, sp) + 000011 16 0A [ 2] 67 ldw y, (0x0a, sp) + 000013 17 01 [ 2] 68 ldw (0x01, sp), y + 000015 F6 [ 1] 69 ld a, (x) + 000016 6B 03 [ 1] 70 ld (0x03, sp), a + 000018 16 01 [ 2] 71 ldw y, (0x01, sp) + 00001A 90 F6 [ 1] 72 ld a, (y) + 00001C 16 04 [ 2] 73 ldw y, (0x04, sp) + 00001E 27 0E [ 1] 74 jreq 00106$ + 000020 11 03 [ 1] 75 cp a, (0x03, sp) + 000022 26 0A [ 1] 76 jrne 00106$ + 77 ; ../_memcmp.c: 37: buf1 = (char *)buf1 + 1; + 000024 5C [ 1] 78 incw x + 000025 1F 08 [ 2] 79 ldw (0x08, sp), x + 80 ; ../_memcmp.c: 38: buf2 = (char *)buf2 + 1; + 000027 1E 01 [ 2] 81 ldw x, (0x01, sp) + 000029 5C [ 1] 82 incw x + 00002A 1F 0A [ 2] 83 ldw (0x0a, sp), x + 00002C 20 DC [ 2] 84 jra 00104$ + 00002E 85 00106$: + 86 ; ../_memcmp.c: 41: return( *((unsigned char *)buf1) - *((unsigned char *)buf2) ); + 00002E 5F [ 1] 87 clrw x + 00002F 41 [ 1] 88 exg a, xl + 000030 7B 03 [ 1] 89 ld a, (0x03, sp) + 000032 41 [ 1] 90 exg a, xl + 000033 6B 05 [ 1] 91 ld (0x05, sp), a + 000035 0F 04 [ 1] 92 clr (0x04, sp) + 000037 72 F0 04 [ 2] 93 subw x, (0x04, sp) + 00003A 94 00107$: + 95 ; ../_memcmp.c: 42: } + 00003A 5B 05 [ 2] 96 addw sp, #5 + 00003C 81 [ 4] 97 ret + 98 .area CODE + 99 .area CONST + 100 .area INITIALIZER + 101 .area CABS (ABS) |