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authorXavier ASUS <xavi92psx@gmail.com>2019-10-23 03:38:32 +0200
committerXavier ASUS <xavi92psx@gmail.com>2019-10-23 03:38:32 +0200
commit2cece67cb5af0339e4ab1f18b0bce2f0b4e6ebdd (patch)
treeb2fbf4e99f194213527304c9189abe65c163ac0b /device/lib/stm8/_fslt.lst
parented26eb00026800d1d2ff6289627216c7d1f0d459 (diff)
downloadsdcc-gas-2cece67cb5af0339e4ab1f18b0bce2f0b4e6ebdd.tar.gz
Removed intermediate files
Diffstat (limited to 'device/lib/stm8/_fslt.lst')
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diff --git a/device/lib/stm8/_fslt.lst b/device/lib/stm8/_fslt.lst
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- 1 ;--------------------------------------------------------
- 2 ; File Created by SDCC : free open source ANSI-C Compiler
- 3 ; Version 3.9.3 #11345 (Linux)
- 4 ;--------------------------------------------------------
- 5 .module _fslt
- 6 .optsdcc -mstm8
- 7
- 8 ;--------------------------------------------------------
- 9 ; Public variables in this module
- 10 ;--------------------------------------------------------
- 11 .globl ___fslt
- 12 ;--------------------------------------------------------
- 13 ; ram data
- 14 ;--------------------------------------------------------
- 15 .area DATA
- 16 ;--------------------------------------------------------
- 17 ; ram data
- 18 ;--------------------------------------------------------
- 19 .area INITIALIZED
- 20 ;--------------------------------------------------------
- 21 ; absolute external ram data
- 22 ;--------------------------------------------------------
- 23 .area DABS (ABS)
- 24
- 25 ; default segment ordering for linker
- 26 .area HOME
- 27 .area GSINIT
- 28 .area GSFINAL
- 29 .area CONST
- 30 .area INITIALIZER
- 31 .area CODE
- 32
- 33 ;--------------------------------------------------------
- 34 ; global & static initialisations
- 35 ;--------------------------------------------------------
- 36 .area HOME
- 37 .area GSINIT
- 38 .area GSFINAL
- 39 .area GSINIT
- 40 ;--------------------------------------------------------
- 41 ; Home
- 42 ;--------------------------------------------------------
- 43 .area HOME
- 44 .area HOME
- 45 ;--------------------------------------------------------
- 46 ; code
- 47 ;--------------------------------------------------------
- 48 .area CODE
- 49 ; ../_fslt.c: 108: char __fslt (float a1, float a2)
- 50 ; -----------------------------------------
- 51 ; function __fslt
- 52 ; -----------------------------------------
- 000000 53 ___fslt:
- 000000 52 10 [ 2] 54 sub sp, #16
- 55 ; ../_fslt.c: 112: fl1.f = a1;
- 000002 16 15 [ 2] 56 ldw y, (0x15, sp)
- 000004 17 03 [ 2] 57 ldw (0x03, sp), y
- 000006 16 13 [ 2] 58 ldw y, (0x13, sp)
- 000008 17 01 [ 2] 59 ldw (0x01, sp), y
- 60 ; ../_fslt.c: 113: fl2.f = a2;
- 00000A 16 19 [ 2] 61 ldw y, (0x19, sp)
- 00000C 17 07 [ 2] 62 ldw (0x07, sp), y
- 00000E 16 17 [ 2] 63 ldw y, (0x17, sp)
- 000010 17 05 [ 2] 64 ldw (0x05, sp), y
- 65 ; ../_fslt.c: 115: if (((fl1.l | fl2.l) & 0x7FFFFFFF) == 0)
- 000012 16 03 [ 2] 66 ldw y, (0x03, sp)
- 000014 17 0F [ 2] 67 ldw (0x0f, sp), y
- 000016 16 01 [ 2] 68 ldw y, (0x01, sp)
- 000018 17 0D [ 2] 69 ldw (0x0d, sp), y
- 00001A 1E 07 [ 2] 70 ldw x, (0x07, sp)
- 00001C 16 05 [ 2] 71 ldw y, (0x05, sp)
- 00001E 9F [ 1] 72 ld a, xl
- 00001F 1A 10 [ 1] 73 or a, (0x10, sp)
- 000021 6B 0C [ 1] 74 ld (0x0c, sp), a
- 000023 9E [ 1] 75 ld a, xh
- 000024 1A 0F [ 1] 76 or a, (0x0f, sp)
- 000026 6B 0B [ 1] 77 ld (0x0b, sp), a
- 000028 90 9F [ 1] 78 ld a, yl
- 00002A 1A 0E [ 1] 79 or a, (0x0e, sp)
- 00002C 6B 0A [ 1] 80 ld (0x0a, sp), a
- 00002E 90 9E [ 1] 81 ld a, yh
- 000030 1A 0D [ 1] 82 or a, (0x0d, sp)
- 000032 A4 7F [ 1] 83 and a, #0x7f
- 000034 6B 0D [ 1] 84 ld (0x0d, sp), a
- 000036 16 0B [ 2] 85 ldw y, (0x0b, sp)
- 000038 17 0F [ 2] 86 ldw (0x0f, sp), y
- 00003A 7B 0A [ 1] 87 ld a, (0x0a, sp)
- 00003C 6B 0E [ 1] 88 ld (0x0e, sp), a
- 00003E 1E 0F [ 2] 89 ldw x, (0x0f, sp)
- 000040 26 07 [ 1] 90 jrne 00102$
- 000042 1E 0D [ 2] 91 ldw x, (0x0d, sp)
- 000044 26 03 [ 1] 92 jrne 00102$
- 93 ; ../_fslt.c: 116: return (0);
- 000046 4F [ 1] 94 clr a
- 000047 20 5F [ 2] 95 jra 00110$
- 000049 96 00102$:
- 97 ; ../_fslt.c: 118: if (fl1.l<0 && fl2.l<0) {
- 000049 16 03 [ 2] 98 ldw y, (0x03, sp)
- 00004B 17 0F [ 2] 99 ldw (0x0f, sp), y
- 00004D 16 01 [ 2] 100 ldw y, (0x01, sp)
- 00004F 17 0D [ 2] 101 ldw (0x0d, sp), y
- 000051 0D 0D [ 1] 102 tnz (0x0d, sp)
- 000053 2A 31 [ 1] 103 jrpl 00106$
- 000055 16 07 [ 2] 104 ldw y, (0x07, sp)
- 000057 17 0F [ 2] 105 ldw (0x0f, sp), y
- 000059 16 05 [ 2] 106 ldw y, (0x05, sp)
- 00005B 17 0D [ 2] 107 ldw (0x0d, sp), y
- 00005D 0D 0D [ 1] 108 tnz (0x0d, sp)
- 00005F 2A 25 [ 1] 109 jrpl 00106$
- 110 ; ../_fslt.c: 119: if (fl2.l < fl1.l)
- 000061 16 07 [ 2] 111 ldw y, (0x07, sp)
- 000063 17 0B [ 2] 112 ldw (0x0b, sp), y
- 000065 16 05 [ 2] 113 ldw y, (0x05, sp)
- 000067 17 09 [ 2] 114 ldw (0x09, sp), y
- 000069 16 03 [ 2] 115 ldw y, (0x03, sp)
- 00006B 17 0F [ 2] 116 ldw (0x0f, sp), y
- 00006D 16 01 [ 2] 117 ldw y, (0x01, sp)
- 00006F 17 0D [ 2] 118 ldw (0x0d, sp), y
- 000071 1E 0B [ 2] 119 ldw x, (0x0b, sp)
- 000073 13 0F [ 2] 120 cpw x, (0x0f, sp)
- 000075 7B 0A [ 1] 121 ld a, (0x0a, sp)
- 000077 12 0E [ 1] 122 sbc a, (0x0e, sp)
- 000079 7B 09 [ 1] 123 ld a, (0x09, sp)
- 00007B 12 0D [ 1] 124 sbc a, (0x0d, sp)
- 00007D 2E 04 [ 1] 125 jrsge 00104$
- 126 ; ../_fslt.c: 120: return (1);
- 00007F A6 01 [ 1] 127 ld a, #0x01
- 000081 20 25 [ 2] 128 jra 00110$
- 000083 129 00104$:
- 130 ; ../_fslt.c: 121: return (0);
- 000083 4F [ 1] 131 clr a
- 000084 20 22 [ 2] 132 jra 00110$
- 000086 133 00106$:
- 134 ; ../_fslt.c: 124: if (fl1.l < fl2.l)
- 000086 16 03 [ 2] 135 ldw y, (0x03, sp)
- 000088 17 0B [ 2] 136 ldw (0x0b, sp), y
- 00008A 16 01 [ 2] 137 ldw y, (0x01, sp)
- 00008C 17 09 [ 2] 138 ldw (0x09, sp), y
- 00008E 16 07 [ 2] 139 ldw y, (0x07, sp)
- 000090 17 0F [ 2] 140 ldw (0x0f, sp), y
- 000092 16 05 [ 2] 141 ldw y, (0x05, sp)
- 000094 17 0D [ 2] 142 ldw (0x0d, sp), y
- 000096 1E 0B [ 2] 143 ldw x, (0x0b, sp)
- 000098 13 0F [ 2] 144 cpw x, (0x0f, sp)
- 00009A 7B 0A [ 1] 145 ld a, (0x0a, sp)
- 00009C 12 0E [ 1] 146 sbc a, (0x0e, sp)
- 00009E 7B 09 [ 1] 147 ld a, (0x09, sp)
- 0000A0 12 0D [ 1] 148 sbc a, (0x0d, sp)
- 0000A2 2E 03 [ 1] 149 jrsge 00109$
- 150 ; ../_fslt.c: 125: return (1);
- 0000A4 A6 01 [ 1] 151 ld a, #0x01
- 152 ; ../_fslt.c: 126: return (0);
- 0000A6 21 153 .byte 0x21
- 0000A7 154 00109$:
- 0000A7 4F [ 1] 155 clr a
- 0000A8 156 00110$:
- 157 ; ../_fslt.c: 127: }
- 0000A8 5B 10 [ 2] 158 addw sp, #16
- 0000AA 81 [ 4] 159 ret
- 160 .area CODE
- 161 .area CONST
- 162 .area INITIALIZER
- 163 .area CABS (ABS)
generated by cgit v1.2.3 (git 2.39.1) at 2026-07-17 23:37:47 +0000