sdcc-3.9.0 fork implementing GNU assembler syntax

This fork aims to provide better support for stm8-binutils

3 files changed, 2296 insertions, 0 deletions

diff --git a/device/lib/pic16/libc/utils/cnvfrac.S b/device/lib/pic16/libc/utils/cnvfrac.S
new file mode 100644
index 0000000..d16275e
--- /dev/null
+++ b/device/lib/pic16/libc/utils/cnvfrac.S
@@ -0,0 +1,1433 @@
+;--------------------------------------------------------------------------
+;  cnvfrac.S - convertion routine of 24 bits floating point to ASCII
+;
+;  Copyright (C) 2004, Vangelis Rokas <vrokas at otenet.gr>
+;
+;  This library is free software; you can redistribute it and/or modify it
+;  under the terms of the GNU General Public License as published by the
+;  Free Software Foundation; either version 2, or (at your option) any
+;  later version.
+;
+;  This library is distributed in the hope that it will be useful,
+;  but WITHOUT ANY WARRANTY; without even the implied warranty of
+;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;  GNU General Public License for more details.
+;
+;  You should have received a copy of the GNU General Public License 
+;  along with this library; see the file COPYING. If not, write to the
+;  Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
+;   MA 02110-1301, USA.
+;
+;  As a special exception, if you link this library with other files,
+;  some of which are compiled with SDCC, to produce an executable,
+;  this library does not by itself cause the resulting executable to
+;  be covered by the GNU General Public License. This exception does
+;  not however invalidate any other reasons why the executable file
+;  might be covered by the GNU General Public License.
+;--------------------------------------------------------------------------
+
+	radix dec
+	list
+	nolist
+
+
+WREG	equ	0xfe8
+POSTINC0	equ	0xfee
+POSTDEC1	equ	0xfe5
+PREINC1	equ	0xfe4
+STATUS	equ	0xfd8
+
+
+	global	_convert_frac
+
+
+.registers	udata_ovr	0x000
+r0x00	res	1
+r0x01	res	1
+r0x02	res	1
+r0x03	res	1
+round_digit	res	1
+d0x00	res	1
+d0x01	res	1
+d0x02	res	1
+d0x03	res	1
+d0x04	res	1
+d0x05	res	1
+d0x06	res	1
+d0x07	res	1
+d0x08	res	1
+d0x09	res	1
+d0x10	res	1
+d0x11	res	1
+d0x12	res	1
+d0x13	res	1
+d0x14	res	1
+d0x15	res	1
+d0x16	res	1
+d0x17	res	1
+d0x18	res	1
+d0x19	res	1
+d0x20	res	1
+d0x21	res	1
+d0x22	res	1
+d0x23	res	1
+d0x24	res	1
+
+
+S__convert_frac	code
+_convert_frac:
+
+	movff	d0x00, POSTDEC1
+	movff	d0x01, POSTDEC1
+	movff	d0x02, POSTDEC1
+	movff	d0x03, POSTDEC1
+	movff	d0x04, POSTDEC1
+	movff	d0x05, POSTDEC1
+	movff	d0x06, POSTDEC1
+	movff	d0x07, POSTDEC1
+	movff	d0x08, POSTDEC1
+	movff	d0x09, POSTDEC1
+	movff	d0x10, POSTDEC1
+	movff	d0x11, POSTDEC1
+	movff	d0x12, POSTDEC1
+	movff	d0x13, POSTDEC1
+	movff	d0x14, POSTDEC1
+	movff	d0x15, POSTDEC1
+	movff	d0x16, POSTDEC1
+	movff	d0x17, POSTDEC1
+	movff	d0x18, POSTDEC1
+	movff	d0x19, POSTDEC1
+	movff	d0x20, POSTDEC1
+	movff	d0x21, POSTDEC1
+	movff	d0x22, POSTDEC1
+	movff	d0x23, POSTDEC1
+	movff	d0x24, POSTDEC1
+
+
+; adding digit 0
+;	movff	0xf7f, 0xfe8
+
+	movlw	0
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	5
+
+
+	clrf	d0x01
+@1:
+	addlw	-10
+	bnc	@2
+	incf	d0x01, f
+	bra	@1
+@2:
+	addlw	10
+	movwf	d0x00
+
+
+	decfsz	round_digit, f
+	bra	@3
+	addlw	251
+	bnc	@3
+	incf	d0x01, f
+
+@3:
+
+; adding digit 1
+	movf	d0x01, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	2
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	5
+
+
+	clrf	d0x02
+@4:
+	addlw	-10
+	bnc	@5
+	incf	d0x02, f
+	bra	@4
+@5:
+	addlw	10
+	movwf	d0x01
+
+
+	decfsz	round_digit, f
+	bra	@6
+	addlw	251
+	bnc	@6
+	incf	d0x02, f
+
+@6:
+
+; adding digit 2
+	movf	d0x02, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	6
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	2
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	5
+
+
+	clrf	d0x03
+@7:
+	addlw	-10
+	bnc	@8
+	incf	d0x03, f
+	bra	@7
+@8:
+	addlw	10
+	movwf	d0x02
+
+
+	decfsz	round_digit, f
+	bra	@9
+	addlw	251
+	bnc	@9
+	incf	d0x03, f
+
+@9:
+
+; adding digit 3
+	movf	d0x03, w
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	1
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	2
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	5
+
+
+	clrf	d0x04
+@10:
+	addlw	-10
+	bnc	@11
+	incf	d0x04, f
+	bra	@10
+@11:
+	addlw	10
+	movwf	d0x03
+
+
+	decfsz	round_digit, f
+	bra	@12
+	addlw	251
+	bnc	@12
+	incf	d0x04, f
+
+@12:
+
+; adding digit 4
+	movf	d0x04, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	9
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	8
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	6
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	2
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	5
+
+
+	clrf	d0x05
+@13:
+	addlw	-10
+	bnc	@14
+	incf	d0x05, f
+	bra	@13
+@14:
+	addlw	10
+	movwf	d0x04
+
+
+	decfsz	round_digit, f
+	bra	@15
+	addlw	251
+	bnc	@15
+	incf	d0x05, f
+
+@15:
+
+; adding digit 5
+	movf	d0x05, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	3
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	7
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	5
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	1
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	2
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	5
+
+
+	clrf	d0x06
+@16:
+	addlw	-10
+	bnc	@17
+	incf	d0x06, f
+	bra	@16
+@17:
+	addlw	10
+	movwf	d0x05
+
+
+	decfsz	round_digit, f
+	bra	@18
+	addlw	251
+	bnc	@18
+	incf	d0x06, f
+
+@18:
+
+; adding digit 6
+	movf	d0x06, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	5
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	1
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	3
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	6
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	2
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	5
+
+
+	clrf	d0x07
+@19:
+	addlw	-10
+	bnc	@20
+	incf	d0x07, f
+	bra	@19
+@20:
+	addlw	10
+	movwf	d0x06
+
+
+	decfsz	round_digit, f
+	bra	@21
+	addlw	251
+	bnc	@21
+	incf	d0x07, f
+
+@21:
+
+; adding digit 7
+	movf	d0x07, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	7
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	5
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	1
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	2
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	5
+
+
+	clrf	d0x08
+@22:
+	addlw	-10
+	bnc	@23
+	incf	d0x08, f
+	bra	@22
+@23:
+	addlw	10
+	movwf	d0x07
+
+
+	decfsz	round_digit, f
+	bra	@24
+	addlw	251
+	bnc	@24
+	incf	d0x08, f
+
+@24:
+
+; adding digit 8
+	movf	d0x08, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	7
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	5
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	1
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	2
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	4
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	8
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	6
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	2
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	5
+
+
+	clrf	d0x09
+@25:
+	addlw	-10
+	bnc	@26
+	incf	d0x09, f
+	bra	@25
+@26:
+	addlw	10
+	movwf	d0x08
+
+
+	decfsz	round_digit, f
+	bra	@27
+	addlw	251
+	bnc	@27
+	incf	d0x09, f
+
+@27:
+
+; adding digit 9
+	movf	d0x09, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	4
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	9
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	9
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	8
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	6
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	2
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	5
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	1
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	2
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	5
+
+
+	clrf	d0x10
+@28:
+	addlw	-10
+	bnc	@29
+	incf	d0x10, f
+	bra	@28
+@29:
+	addlw	10
+	movwf	d0x09
+
+
+	decfsz	round_digit, f
+	bra	@30
+	addlw	251
+	bnc	@30
+	incf	d0x10, f
+
+@30:
+
+; adding digit 10
+	movf	d0x10, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	4
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	8
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	7
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	5
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	1
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	3
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	6
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	3
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	6
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	2
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	5
+
+
+	clrf	d0x11
+@31:
+	addlw	-10
+	bnc	@32
+	incf	d0x11, f
+	bra	@31
+@32:
+	addlw	10
+	movwf	d0x10
+
+
+	decfsz	round_digit, f
+	bra	@33
+	addlw	251
+	bnc	@33
+	incf	d0x11, f
+
+@33:
+
+; adding digit 11
+	movf	d0x11, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	6
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	2
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	5
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	1
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	3
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	6
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	2
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	5
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	1
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	2
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	5
+
+
+	clrf	d0x12
+@34:
+	addlw	-10
+	bnc	@35
+	incf	d0x12, f
+	bra	@34
+@35:
+	addlw	10
+	movwf	d0x11
+
+
+	decfsz	round_digit, f
+	bra	@36
+	addlw	251
+	bnc	@36
+	incf	d0x12, f
+
+@36:
+
+; adding digit 12
+	movf	d0x12, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	4
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	9
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	8
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	7
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	4
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	8
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	7
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	4
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	9
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	8
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	6
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	2
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	5
+
+
+	clrf	d0x13
+@37:
+	addlw	-10
+	bnc	@38
+	incf	d0x13, f
+	bra	@37
+@38:
+	addlw	10
+	movwf	d0x12
+
+
+	decfsz	round_digit, f
+	bra	@39
+	addlw	251
+	bnc	@39
+	incf	d0x13, f
+
+@39:
+
+; adding digit 13
+	movf	d0x13, w
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	1
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	3
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	7
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	4
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	9
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	9
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	8
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	7
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	5
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	1
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	2
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	5
+
+
+	clrf	d0x14
+@40:
+	addlw	-10
+	bnc	@41
+	incf	d0x14, f
+	bra	@40
+@41:
+	addlw	10
+	movwf	d0x13
+
+
+	decfsz	round_digit, f
+	bra	@42
+	addlw	251
+	bnc	@42
+	incf	d0x14, f
+
+@42:
+
+; adding digit 14
+	movf	d0x14, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	6
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	2
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	4
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	8
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	6
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	3
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	6
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	3
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	7
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	5
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	1
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	3
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	6
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	2
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	5
+
+
+	clrf	d0x15
+@43:
+	addlw	-10
+	bnc	@44
+	incf	d0x15, f
+	bra	@43
+@44:
+	addlw	10
+	movwf	d0x14
+
+
+	decfsz	round_digit, f
+	bra	@45
+	addlw	251
+	bnc	@45
+	incf	d0x15, f
+
+@45:
+
+; adding digit 15
+	movf	d0x15, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	9
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	9
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	8
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	6
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	3
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	7
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	4
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	9
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	8
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	7
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	5
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	1
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	2
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	5
+
+
+	clrf	d0x16
+@46:
+	addlw	-10
+	bnc	@47
+	incf	d0x16, f
+	bra	@46
+@47:
+	addlw	10
+	movwf	d0x15
+
+
+	decfsz	round_digit, f
+	bra	@48
+	addlw	251
+	bnc	@48
+	incf	d0x16, f
+
+@48:
+
+; adding digit 16
+	movf	d0x16, w
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	5
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	1
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	3
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	7
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	5
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	1
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	2
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	5
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	1
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	3
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	7
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	4
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	8
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	6
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	2
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	5
+
+
+	clrf	d0x17
+@49:
+	addlw	-10
+	bnc	@50
+	incf	d0x17, f
+	bra	@49
+@50:
+	addlw	10
+	movwf	d0x16
+
+
+	decfsz	round_digit, f
+	bra	@51
+	addlw	251
+	bnc	@51
+	incf	d0x17, f
+
+@51:
+
+; adding digit 17
+	movf	d0x17, w
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	1
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	2
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	4
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	9
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	9
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	8
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	6
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	2
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	5
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	1
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	2
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	5
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	1
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	2
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	5
+
+
+	clrf	d0x18
+@52:
+	addlw	-10
+	bnc	@53
+	incf	d0x18, f
+	bra	@52
+@53:
+	addlw	10
+	movwf	d0x17
+
+
+	decfsz	round_digit, f
+	bra	@54
+	addlw	251
+	bnc	@54
+	incf	d0x18, f
+
+@54:
+
+; adding digit 18
+	movf	d0x18, w
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	1
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	3
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	7
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	5
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	1
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	2
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	4
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	8
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	6
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	3
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	6
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	2
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	5
+
+
+	clrf	d0x19
+@55:
+	addlw	-10
+	bnc	@56
+	incf	d0x19, f
+	bra	@55
+@56:
+	addlw	10
+	movwf	d0x18
+
+
+	decfsz	round_digit, f
+	bra	@57
+	addlw	251
+	bnc	@57
+	incf	d0x19, f
+
+@57:
+
+; adding digit 19
+	movf	d0x19, w
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	1
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	3
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	6
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	2
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	4
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	8
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	7
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	5
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	1
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	2
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	5
+
+
+	clrf	d0x20
+@58:
+	addlw	-10
+	bnc	@59
+	incf	d0x20, f
+	bra	@58
+@59:
+	addlw	10
+	movwf	d0x19
+
+
+	decfsz	round_digit, f
+	bra	@60
+	addlw	251
+	bnc	@60
+	incf	d0x20, f
+
+@60:
+
+; adding digit 20
+	movf	d0x20, w
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	1
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	2
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	4
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	9
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	9
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	9
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	8
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	6
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	2
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	5
+
+
+	clrf	d0x21
+@61:
+	addlw	-10
+	bnc	@62
+	incf	d0x21, f
+	bra	@61
+@62:
+	addlw	10
+	movwf	d0x20
+
+
+	decfsz	round_digit, f
+	bra	@63
+	addlw	251
+	bnc	@63
+	incf	d0x21, f
+
+@63:
+
+; adding digit 21
+	movf	d0x21, w
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	1
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	3
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	7
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	5
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	1
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	2
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	5
+
+
+	clrf	d0x22
+@64:
+	addlw	-10
+	bnc	@65
+	incf	d0x22, f
+	bra	@64
+@65:
+	addlw	10
+	movwf	d0x21
+
+
+	decfsz	round_digit, f
+	bra	@66
+	addlw	251
+	bnc	@66
+	incf	d0x22, f
+
+@66:
+
+; adding digit 22
+	movf	d0x22, w
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	1
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	3
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	6
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	2
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	5
+
+
+	clrf	d0x23
+@67:
+	addlw	-10
+	bnc	@68
+	incf	d0x23, f
+	bra	@67
+@68:
+	addlw	10
+	movwf	d0x22
+
+
+	decfsz	round_digit, f
+	bra	@69
+	addlw	251
+	bnc	@69
+	incf	d0x23, f
+
+@69:
+
+; adding digit 23
+	movf	d0x23, w
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	1
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	2
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	5
+
+
+	clrf	d0x24
+@70:
+	addlw	-10
+	bnc	@71
+	incf	d0x24, f
+	bra	@70
+@71:
+	addlw	10
+	movwf	d0x23
+
+
+	decfsz	round_digit, f
+	bra	@72
+	addlw	251
+	bnc	@72
+	incf	d0x24, f
+
+@72:
+
+
+; finalization
+@73:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x22, w
+@74:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x21, w
+@75:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x20, w
+@76:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x19, w
+@77:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x18, w
+@78:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x17, w
+@79:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x16, w
+@80:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x15, w
+@81:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x14, w
+@82:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x13, w
+@83:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x12, w
+@84:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x11, w
+@85:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x10, w
+@86:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x09, w
+@87:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x08, w
+@88:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x07, w
+@89:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x06, w
+@90:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x05, w
+@91:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x04, w
+@92:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x03, w
+@93:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x02, w
+@94:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x01, w
+@95:
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x00, w
+@96:
+	addlw	48
+	movwf	POSTINC0
+
+	movlw	23
+
+	movff	PREINC1, d0x24
+	movff	PREINC1, d0x23
+	movff	PREINC1, d0x22
+	movff	PREINC1, d0x21
+	movff	PREINC1, d0x20
+	movff	PREINC1, d0x19
+	movff	PREINC1, d0x18
+	movff	PREINC1, d0x17
+	movff	PREINC1, d0x16
+	movff	PREINC1, d0x15
+	movff	PREINC1, d0x14
+	movff	PREINC1, d0x13
+	movff	PREINC1, d0x12
+	movff	PREINC1, d0x11
+	movff	PREINC1, d0x10
+	movff	PREINC1, d0x09
+	movff	PREINC1, d0x08
+	movff	PREINC1, d0x07
+	movff	PREINC1, d0x06
+	movff	PREINC1, d0x05
+	movff	PREINC1, d0x04
+	movff	PREINC1, d0x03
+	movff	PREINC1, d0x02
+	movff	PREINC1, d0x01
+	movff	PREINC1, d0x00
+	return
+
+	end
+
+; Converstion table
+;
+;00	0.5000000000000000000000000	5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;01	0.2500000000000000000000000	2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;02	0.1250000000000000000000000	1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;03	0.0625000000000000000000000	0 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;04	0.0312500000000000000000000	0 3 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;05	0.0156250000000000000000000	0 1 5 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;06	0.0078125000000000000000000	0 0 7 8 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;07	0.0039062500000000000000000	0 0 3 9 0 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;08	0.0019531250000000000000000	0 0 1 9 5 3 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;09	0.0009765625000000000000000	0 0 0 9 7 6 5 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;10	0.0004882812500000000000000	0 0 0 4 8 8 2 8 1 2 5 0 0 0 0 0 0 0 0 0 0 0 0 0 
+;11	0.0002441406250000000000000	0 0 0 2 4 4 1 4 0 6 2 5 0 0 0 0 0 0 0 0 0 0 0 0 
+;12	0.0001220703125000000000000	0 0 0 1 2 2 0 7 0 3 1 2 5 0 0 0 0 0 0 0 0 0 0 0 
+;13	0.0000610351562500000000000	0 0 0 0 6 1 0 3 5 1 5 6 2 5 0 0 0 0 0 0 0 0 0 0 
+;14	0.0000305175781250000000000	0 0 0 0 3 0 5 1 7 5 7 8 1 2 5 0 0 0 0 0 0 0 0 0 
+;15	0.0000152587890625000000000	0 0 0 0 1 5 2 5 8 7 8 9 0 6 2 5 0 0 0 0 0 0 0 0 
+;16	0.0000076293945312500000000	0 0 0 0 0 7 6 2 9 3 9 4 5 3 1 2 5 0 0 0 0 0 0 0 
+;17	0.0000038146972656250000000	0 0 0 0 0 3 8 1 4 6 9 7 2 6 5 6 2 5 0 0 0 0 0 0 
+;18	0.0000019073486328125000000	0 0 0 0 0 1 9 0 7 3 4 8 6 3 2 8 1 2 5 0 0 0 0 0 
+;19	0.0000009536743164062500000	0 0 0 0 0 0 9 5 3 6 7 4 3 1 6 4 0 6 2 5 0 0 0 0 
+;20	0.0000004768371582031250000	0 0 0 0 0 0 4 7 6 8 3 7 1 5 8 2 0 3 1 2 5 0 0 0 
+;21	0.0000002384185791015625000	0 0 0 0 0 0 2 3 8 4 1 8 5 7 9 1 0 1 5 6 2 5 0 0 
+;22	0.0000001192092895507812500	0 0 0 0 0 0 1 1 9 2 0 9 2 8 9 5 5 0 7 8 1 2 5 0 
+;23	0.0000000596046447753906250	0 0 0 0 0 0 0 5 9 6 0 4 6 4 4 7 7 5 3 9 0 6 2 5 
diff --git a/device/lib/pic16/libc/utils/cnvint.S b/device/lib/pic16/libc/utils/cnvint.S
new file mode 100644
index 0000000..85a35dc
--- /dev/null
+++ b/device/lib/pic16/libc/utils/cnvint.S
@@ -0,0 +1,551 @@
+;--------------------------------------------------------------------------
+;  cnvint.S - convertion routine of 24 bits integer to ASCII
+;
+;  Copyright (C) 2004, Vangelis Rokas <vrokas at otenet.gr>
+;
+;  This library is free software; you can redistribute it and/or modify it
+;  under the terms of the GNU General Public License as published by the
+;  Free Software Foundation; either version 2, or (at your option) any
+;  later version.
+;
+;  This library is distributed in the hope that it will be useful,
+;  but WITHOUT ANY WARRANTY; without even the implied warranty of
+;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;  GNU General Public License for more details.
+;
+;  You should have received a copy of the GNU General Public License 
+;  along with this library; see the file COPYING. If not, write to the
+;  Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
+;   MA 02110-1301, USA.
+;
+;  As a special exception, if you link this library with other files,
+;  some of which are compiled with SDCC, to produce an executable,
+;  this library does not by itself cause the resulting executable to
+;  be covered by the GNU General Public License. This exception does
+;  not however invalidate any other reasons why the executable file
+;  might be covered by the GNU General Public License.
+;--------------------------------------------------------------------------
+
+	radix dec
+	list
+	nolist
+
+
+POSTINC0	equ	0xfee
+POSTDEC1	equ	0xfe5
+PREINC1	equ	0xfe4
+STATUS	equ	0xfd8
+
+
+	global	_convert_int
+
+
+.registers	udata_ovr	0x000
+r0x00	res	1
+r0x01	res	1
+r0x02	res	1
+r0x03	res	1
+d0x00	res	1
+d0x01	res	1
+d0x02	res	1
+d0x03	res	1
+d0x04	res	1
+d0x05	res	1
+d0x06	res	1
+d0x07	res	1
+d0x08	res	1
+d0x09	res	1
+digit_count	res	1
+
+
+S__convert_int	code
+_convert_int:
+
+	movff	r0x00, POSTDEC1
+	movff	r0x01, POSTDEC1
+	movff	r0x02, POSTDEC1
+	movff	r0x03, POSTDEC1
+	movff	d0x00, POSTDEC1
+	movff	d0x01, POSTDEC1
+	movff	d0x02, POSTDEC1
+	movff	d0x03, POSTDEC1
+	movff	d0x04, POSTDEC1
+	movff	d0x05, POSTDEC1
+	movff	d0x06, POSTDEC1
+	movff	d0x07, POSTDEC1
+	movff	d0x08, POSTDEC1
+	movff	d0x09, POSTDEC1
+	movff	digit_count, POSTDEC1
+
+
+; adding digit 0
+	movlw	0
+
+	btfsc	r0x00, 0		; bit 0
+	addlw	1
+
+	btfsc	r0x00, 1		; bit 1
+	addlw	2
+
+	btfsc	r0x00, 2		; bit 2
+	addlw	4
+
+	btfsc	r0x00, 3		; bit 3
+	addlw	8
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	6
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	2
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	4
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	8
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	6
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	2
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	4
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	8
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	6
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	2
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	4
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	8
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	6
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	2
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	4
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	8
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	6
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	2
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	4
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	8
+
+
+	clrf	d0x01
+@1:
+	addlw	-10
+	bnc	@2
+	incf	d0x01, f
+	bra	@1
+@2:
+	addlw	10
+	movwf	d0x00
+
+; adding digit 1
+	movf	d0x01, w
+
+	btfsc	r0x00, 4		; bit 4
+	addlw	1
+
+	btfsc	r0x00, 5		; bit 5
+	addlw	3
+
+	btfsc	r0x00, 6		; bit 6
+	addlw	6
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	2
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	5
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	1
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	2
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	4
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	9
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	9
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	8
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	6
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	3
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	7
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	4
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	8
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	7
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	5
+
+
+	clrf	d0x02
+@3:
+	addlw	-10
+	bnc	@4
+	incf	d0x02, f
+	bra	@3
+@4:
+	addlw	10
+	movwf	d0x01
+
+; adding digit 2
+	movf	d0x02, w
+
+	btfsc	r0x00, 7		; bit 7
+	addlw	1
+
+	btfsc	r0x01, 0		; bit 8
+	addlw	2
+
+	btfsc	r0x01, 1		; bit 9
+	addlw	5
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	1
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	3
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	7
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	5
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	1
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	2
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	5
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	1
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	3
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	6
+
+
+	clrf	d0x03
+@5:
+	addlw	-10
+	bnc	@6
+	incf	d0x03, f
+	bra	@5
+@6:
+	addlw	10
+	movwf	d0x02
+
+; adding digit 3
+	movf	d0x03, w
+
+	btfsc	r0x01, 2		; bit 10
+	addlw	1
+
+	btfsc	r0x01, 3		; bit 11
+	addlw	2
+
+	btfsc	r0x01, 4		; bit 12
+	addlw	4
+
+	btfsc	r0x01, 5		; bit 13
+	addlw	8
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	6
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	2
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	5
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	1
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	2
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	4
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	8
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	7
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	4
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	8
+
+
+	clrf	d0x04
+@7:
+	addlw	-10
+	bnc	@8
+	incf	d0x04, f
+	bra	@7
+@8:
+	addlw	10
+	movwf	d0x03
+
+; adding digit 4
+	movf	d0x04, w
+
+	btfsc	r0x01, 6		; bit 14
+	addlw	1
+
+	btfsc	r0x01, 7		; bit 15
+	addlw	3
+
+	btfsc	r0x02, 0		; bit 16
+	addlw	6
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	3
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	6
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	2
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	4
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	9
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	9
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	8
+
+
+	clrf	d0x05
+@9:
+	addlw	-10
+	bnc	@10
+	incf	d0x05, f
+	bra	@9
+@10:
+	addlw	10
+	movwf	d0x04
+
+; adding digit 5
+	movf	d0x05, w
+
+	btfsc	r0x02, 1		; bit 17
+	addlw	1
+
+	btfsc	r0x02, 2		; bit 18
+	addlw	2
+
+	btfsc	r0x02, 3		; bit 19
+	addlw	5
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	1
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	3
+
+
+	clrf	d0x06
+@11:
+	addlw	-10
+	bnc	@12
+	incf	d0x06, f
+	bra	@11
+@12:
+	addlw	10
+	movwf	d0x05
+
+; adding digit 6
+	movf	d0x06, w
+
+	btfsc	r0x02, 4		; bit 20
+	addlw	1
+
+	btfsc	r0x02, 5		; bit 21
+	addlw	2
+
+	btfsc	r0x02, 6		; bit 22
+	addlw	4
+
+	btfsc	r0x02, 7		; bit 23
+	addlw	8
+
+
+	clrf	d0x07
+@13:
+	addlw	-10
+	bnc	@14
+	incf	d0x07, f
+	bra	@13
+@14:
+	addlw	10
+	movwf	d0x06
+
+; adding digit 7
+	movf	d0x07, w
+
+	clrf	digit_count
+
+
+; finalization
+	bnz	@15
+	movf	d0x06, w
+	bnz	@16
+	movf	d0x05, w
+	bnz	@17
+	movf	d0x04, w
+	bnz	@18
+	movf	d0x03, w
+	bnz	@19
+	movf	d0x02, w
+	bnz	@20
+	movf	d0x01, w
+	bnz	@21
+	movf	d0x00, w
+	bra	@22
+@15:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x06, w
+@16:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x05, w
+@17:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x04, w
+@18:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x03, w
+@19:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x02, w
+@20:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x01, w
+@21:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+	movf	d0x00, w
+@22:
+	incf	digit_count, f
+	addlw	48
+	movwf	POSTINC0
+
+	movf	digit_count, w
+
+	movff	PREINC1, digit_count
+	movff	PREINC1, d0x09
+	movff	PREINC1, d0x08
+	movff	PREINC1, d0x07
+	movff	PREINC1, d0x06
+	movff	PREINC1, d0x05
+	movff	PREINC1, d0x04
+	movff	PREINC1, d0x03
+	movff	PREINC1, d0x02
+	movff	PREINC1, d0x01
+	movff	PREINC1, d0x00
+	movff	PREINC1, r0x03
+	movff	PREINC1, r0x02
+	movff	PREINC1, r0x01
+	movff	PREINC1, r0x00
+	return
+
+	end
+
+; Converstion table
+;
+;00	000000000000000000000001	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
+;01	000000000000000000000002	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 
+;02	000000000000000000000004	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 
+;03	000000000000000000000008	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 
+;04	000000000000000000000016	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 6 
+;05	000000000000000000000032	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 2 
+;06	000000000000000000000064	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 4 
+;07	000000000000000000000128	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 8 
+;08	000000000000000000000256	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 5 6 
+;09	000000000000000000000512	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 1 2 
+;10	000000000000000000001024	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2 4 
+;11	000000000000000000002048	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 4 8 
+;12	000000000000000000004096	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 9 6 
+;13	000000000000000000008192	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 1 9 2 
+;14	000000000000000000016384	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 6 3 8 4 
+;15	000000000000000000032768	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 2 7 6 8 
+;16	000000000000000000065536	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 5 5 3 6 
+;17	000000000000000000131072	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 0 7 2 
+;18	000000000000000000262144	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 6 2 1 4 4 
+;19	000000000000000000524288	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 2 4 2 8 8 
+;20	000000000000000001048576	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 8 5 7 6 
+;21	000000000000000002097152	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 9 7 1 5 2 
+;22	000000000000000004194304	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 1 9 4 3 0 4 
+;23	000000000000000008388608	0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 3 8 8 6 0 8 
diff --git a/device/lib/pic16/libc/utils/cvtdec.S b/device/lib/pic16/libc/utils/cvtdec.S
new file mode 100644
index 0000000..0e6fa42
--- /dev/null
+++ b/device/lib/pic16/libc/utils/cvtdec.S
@@ -0,0 +1,312 @@
+;--------------------------------------------------------------------------
+;  cvtdec.S - convert a 16-bit binary word to 5 BCD bytes
+;
+;  Copyright (C) 2004, George Gallant <ggallant571 AT verizon.net>
+;
+;  This library is free software; you can redistribute it and/or modify it
+;  under the terms of the GNU General Public License as published by the
+;  Free Software Foundation; either version 2, or (at your option) any
+;  later version.
+;
+;  This library is distributed in the hope that it will be useful,
+;  but WITHOUT ANY WARRANTY; without even the implied warranty of
+;  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;  GNU General Public License for more details.
+;
+;  You should have received a copy of the GNU General Public License 
+;  along with this library; see the file COPYING. If not, write to the
+;  Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
+;   MA 02110-1301, USA.
+;
+;  As a special exception, if you link this library with other files,
+;  some of which are compiled with SDCC, to produce an executable,
+;  this library does not by itself cause the resulting executable to
+;  be covered by the GNU General Public License. This exception does
+;  not however invalidate any other reasons why the executable file
+;  might be covered by the GNU General Public License.
+;--------------------------------------------------------------------------
+
+;--
+;
+;	File:	cvtdec.asm
+;	Author:	George Gallant
+;	Date:	19OCT04
+;	
+;	This routine is based on the code and algorithm by
+;	Nikolai Golovchenko and Scott Dattalo presented in
+;	the piclist webb site on radix conversion methods.
+;	Modified to support integers from 0 to 65535 and coded
+;	for the pic18 chip set.
+;
+;			   Digit
+;	BIT  Weight  4   3   2   1   0
+;	---  ------ --- --- --- --- ---
+;	 0      1    0   0   0   0   1
+;	 1      2    0   0   0   0   2
+;	 2      4    0   0   0   0   4
+;	 3      8    0   0   0   0   8
+;	
+;	 4     16    0   0   0   1   6
+;	 5     32    0   0   0   3   2
+;	 6     64    0   0   0   6   4
+;	 7    128    0   0   1   2   8
+;
+;	 8    256    0   0   2   5   6
+;	 9    512    0   0   5   1   2
+;	10   1024    0   1   0   2   4
+;	11   2048    0   2   0   4   8
+;
+;	12   4096    0   4   0   9   6
+;	13   8192    0   8   1   9   2
+;	14  16384    1   6   3   8   4
+;	15  32768    3   2   7   6   8
+;
+;--
+		nolist
+		include	<p18fxxx.inc>
+		list
+
+		udata
+
+		global	digits
+
+digits:		res	6
+
+		code
+
+		global	cvt_dec_word
+
+;--
+;
+;	Convert a 16-bit binary word to 5 BCD bytes
+;
+;	On Call
+;		PROD	16 bit word
+;		FSR0	pointer to ascii buffer
+;
+;	On Return
+;		digits[4:0] contain the BCD integers
+;
+;	Notes:	1. strip leading zeros
+;		2. only positive integers on input
+;		3. FSR0, PROD & W are modified and not preserved
+;
+;--
+cvt_dec_word:	clrw				;calculate digit 0 - lsd
+
+		btfsc	PRODL,0			;bit0
+		addlw	1
+
+		btfsc	PRODL,1			;bit1
+		addlw	2
+
+		btfsc	PRODL,2			;bit2
+		addlw	4
+
+		btfsc	PRODL,3			;bit3
+		addlw	8
+
+		btfsc	PRODL,4			;bit4
+		addlw	6
+
+		btfsc	PRODL,5			;bit5
+		addlw	2
+
+		btfsc	PRODL,6			;bit6
+		addlw	4
+
+		btfsc	PRODL,7			;bit7
+		addlw	8
+
+		btfsc	PRODH,0			;bit8
+		addlw	6
+
+		btfsc	PRODH,1			;bit9
+		addlw	2
+
+		btfsc	PRODH,2			;bit10
+		addlw	4
+
+		btfsc	PRODH,3			;bit11
+		addlw	8
+
+		btfsc	PRODH,4			;bit12
+		addlw	6
+
+		btfsc	PRODH,5			;bit13
+		addlw	2
+
+		btfsc	PRODH,6			;bit14
+		addlw	4
+
+		btfsc	PRODH,7			;bit15
+		addlw	8
+
+		clrf	digits+1		;setup for carry in 10's
+@1:		addlw	-10
+		bnc	@2
+		incf	digits+1,f
+		bra	@1
+
+@2:		addlw	10
+		movwf	digits+0
+
+;	calculate digit 1
+
+		movf	digits+1,w
+
+		btfsc	PRODL,4			;bit4
+		addlw	1
+
+		btfsc	PRODL,5			;bit5
+		addlw	3
+
+		btfsc	PRODL,6			;bit6
+		addlw	6
+
+		btfsc	PRODL,7			;bit7
+		addlw	2
+
+		btfsc	PRODH,0			;bit8
+		addlw	5
+
+		btfsc	PRODH,1			;bit9
+		addlw	1
+
+		btfsc	PRODH,2			;bit10
+		addlw	2
+
+		btfsc	PRODH,3			;bit11
+		addlw	4
+
+		btfsc	PRODH,4			;bit12
+		addlw	9
+
+		btfsc	PRODH,5			;bit13
+		addlw	9
+
+		btfsc	PRODH,6			;bit14
+		addlw	8
+
+		btfsc	PRODH,7			;bit15
+		addlw	6
+
+		clrf	digits+2		;setup for carry into 100's
+@3:		addlw	-10
+		bnc	@4
+		incf	digits+2,f
+		bra	@3
+
+@4:		addlw	10
+		movwf	digits+1
+
+;	calculate digit 2
+
+		movf	digits+2,w
+
+		btfsc	PRODL,7			;bit7
+		addlw	1
+
+		btfsc	PRODH,0			;bit8
+		addlw	2
+
+		btfsc	PRODH,1			;bit9
+		addlw	5
+
+		btfsc	PRODH,5			;bit13
+		addlw	1
+
+		btfsc	PRODH,6			;bit14
+		addlw	3
+
+		btfsc	PRODH,7			;bit15
+		addlw	7
+
+		clrf	digits+3		;setup for carry into 1000's
+@5:		addlw	-10
+		bnc	@6
+		incf	digits+3,f
+		bra	@5
+@6:		addlw	10
+
+		movwf	digits+2
+
+;	calculate digit 3
+
+		movf	digits+3,w
+
+		btfsc	PRODH,2			;bit10
+		addlw	1
+
+		btfsc	PRODH,3			;bit11
+		addlw	2
+
+		btfsc	PRODH,4			;bit12
+		addlw	4
+
+		btfsc	PRODH,5			;bit13
+		addlw	8
+
+		btfsc	PRODH,6			;bit14
+		addlw	6
+
+		btfsc	PRODH,7			;bit15
+		addlw	2
+
+		clrf	digits+4		;setup for carry into 10000's
+@7:		addlw	-10
+		bnc	@8
+		incf	digits+4,f
+		bra	@7
+
+@8:		addlw	10
+		movwf	digits+3
+
+;	calculate digit 4
+
+		movf	digits+4,w
+
+		btfsc	PRODH,6			;bit14
+		addlw	1
+
+		btfsc	PRODH,7			;bit15
+		addlw	3
+
+@9:		addlw	-10
+		bc	@9
+
+		addlw	10
+;		movwf	digits+4
+
+;		movf	digits+4,w
+		bnz	@11
+		movf	digits+3,w
+		bnz	@12
+		movf	digits+2,w
+		bnz	@13
+		movf	digits+1,w
+		bnz	@14
+		bra	@15
+
+@11:		addlw	0x30
+		movwf	POSTINC0
+
+		movf	digits+3,w
+@12:		addlw	0x30
+		movwf	POSTINC0
+
+		movf	digits+2,w
+@13:		addlw	0x30
+		movwf	POSTINC0
+
+		movf	digits+1,w
+@14:		addlw	0x30
+		movwf	POSTINC0
+
+@15:		movf	digits+0,w
+		addlw	0x30
+		movwf	POSTINC0
+
+		return
+
+		end