diff options
| author | spicyjpeg <thatspicyjpeg@gmail.com> | 2024-01-08 18:33:11 +0100 |
|---|---|---|
| committer | spicyjpeg <thatspicyjpeg@gmail.com> | 2024-01-08 18:33:11 +0100 |
| commit | dd85f9f993427ae69ab905486f8ef372d3960664 (patch) | |
| tree | 605e6aec308795ee466fa12b090067c6517ea2d7 /libpsn00b/psxgpu | |
| parent | 06e65bea3a778b2dae5af77a7935ae3868ddd4d3 (diff) | |
| download | psn00bsdk-dd85f9f993427ae69ab905486f8ef372d3960664.tar.gz | |
Fix bugs in libc, psxgpu, psxpress, clean up headers
Diffstat (limited to 'libpsn00b/psxgpu')
| -rw-r--r-- | libpsn00b/psxgpu/drawing.c | 4 | ||||
| -rw-r--r-- | libpsn00b/psxgpu/image.c | 18 |
2 files changed, 15 insertions, 7 deletions
diff --git a/libpsn00b/psxgpu/drawing.c b/libpsn00b/psxgpu/drawing.c index 161b2f7..85bf6a8 100644 --- a/libpsn00b/psxgpu/drawing.c +++ b/libpsn00b/psxgpu/drawing.c @@ -108,11 +108,11 @@ void DrawBufferIRQ2(const uint32_t *buf, size_t length) { _send_buffer(DRAWOP_TYPE_GPU_IRQ, buf, length); } -void DrawPrim(const uint32_t *pri) { +void DrawPrim(const void *pri) { _sdk_validate_args_void(pri); DrawSync(0); - DrawBuffer2(&pri[1], getlen(pri)); + DrawBuffer2(((const uint32_t *) pri) + 1, getlen(pri)); } /* Helper functions */ diff --git a/libpsn00b/psxgpu/image.c b/libpsn00b/psxgpu/image.c index e02c3c2..3a2bb8f 100644 --- a/libpsn00b/psxgpu/image.c +++ b/libpsn00b/psxgpu/image.c @@ -45,16 +45,24 @@ static void _dma_transfer(const RECT *rect, uint32_t *data, int write) { GPU_GP1 = 0x04000000; // Disable DMA request GPU_GP0 = 0x01000000; // Flush cache - GPU_GP0 = write ? 0xa0000000 : 0xc0000000; + uint32_t dreq_mode, status_mask; + if (write) { + GPU_GP0 = 0xa0000000; // Begin VRAM write + dreq_mode = 0x04000002; // Enable DMA request, route to GP0 + status_mask = 1 << 28; + } else { + GPU_GP0 = 0xc0000000; // Begin VRAM read + dreq_mode = 0x04000003; // Enable DMA request, route to GPU_READ + status_mask = 1 << 27; + } + //GPU_GP0 = rect->x | (rect->y << 16); GPU_GP0 = *((const uint32_t *) &(rect->x)); //GPU_GP0 = rect->w | (rect->h << 16); GPU_GP0 = *((const uint32_t *) &(rect->w)); + GPU_GP1 = dreq_mode; - // Enable DMA request, route to GP0 (2) or from GPU_READ (3) - GPU_GP1 = 0x04000002 | (write ^ 1); - - while ((DMA_CHCR(DMA_GPU) & (1 << 24)) || !(GPU_GP1 & (1 << 28))) + while ((DMA_CHCR(DMA_GPU) & (1 << 24)) || !(GPU_GP1 & status_mask)) __asm__ volatile(""); DMA_MADR(DMA_GPU) = (uint32_t) data; |
