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authorspicyjpeg <thatspicyjpeg@gmail.com>2023-05-11 15:59:56 +0200
committerspicyjpeg <thatspicyjpeg@gmail.com>2023-05-11 15:59:56 +0200
commitca6b54f3c15a7b00a5ede64ba452f2955a421a1e (patch)
tree847ee5c32003f83ebaf7be4e20a93543c72a218f /libpsn00b/include
parent0a797d2964517ac88e818b0741c5e7674c6fa018 (diff)
downloadpsn00bsdk-ca6b54f3c15a7b00a5ede64ba452f2955a421a1e.tar.gz
Add MoveImage(), SetDrawOpType(), GPU IRQ support
Diffstat (limited to 'libpsn00b/include')
-rw-r--r--libpsn00b/include/hwregs_c.h38
-rw-r--r--libpsn00b/include/psxgpu.h40
-rw-r--r--libpsn00b/include/psxspu.h2
3 files changed, 46 insertions, 34 deletions
diff --git a/libpsn00b/include/hwregs_c.h b/libpsn00b/include/hwregs_c.h
index 3fd5b2c..2152986 100644
--- a/libpsn00b/include/hwregs_c.h
+++ b/libpsn00b/include/hwregs_c.h
@@ -34,7 +34,7 @@
#define CD_DATA _MMIO8(IOBASE | 0x1802)
#define CD_IRQ _MMIO8(IOBASE | 0x1803)
-#define CD_REG(N) _MMIO8(IOBASE | 0x1800 + (N))
+#define CD_REG(N) _MMIO8((IOBASE | 0x1800) + (N))
/* SPU */
@@ -73,13 +73,13 @@
// These are not named SPU_VOICE_* to avoid name clashes with SPU attribute
// flags defined in psxspu.h.
-#define SPU_CH_VOL_L(N) _MMIO16(IOBASE | 0x1c00 + 16 * (N))
-#define SPU_CH_VOL_R(N) _MMIO16(IOBASE | 0x1c02 + 16 * (N))
-#define SPU_CH_FREQ(N) _MMIO16(IOBASE | 0x1c04 + 16 * (N))
-#define SPU_CH_ADDR(N) _MMIO16(IOBASE | 0x1c06 + 16 * (N))
-#define SPU_CH_ADSR1(N) _MMIO16(IOBASE | 0x1c08 + 16 * (N))
-#define SPU_CH_ADSR2(N) _MMIO16(IOBASE | 0x1c0a + 16 * (N))
-#define SPU_CH_LOOP_ADDR(N) _MMIO16(IOBASE | 0x1c0e + 16 * (N))
+#define SPU_CH_VOL_L(N) _MMIO16((IOBASE | 0x1c00) + (16 * (N)))
+#define SPU_CH_VOL_R(N) _MMIO16((IOBASE | 0x1c02) + (16 * (N)))
+#define SPU_CH_FREQ(N) _MMIO16((IOBASE | 0x1c04) + (16 * (N)))
+#define SPU_CH_ADDR(N) _MMIO16((IOBASE | 0x1c06) + (16 * (N)))
+#define SPU_CH_ADSR1(N) _MMIO16((IOBASE | 0x1c08) + (16 * (N)))
+#define SPU_CH_ADSR2(N) _MMIO16((IOBASE | 0x1c0a) + (16 * (N)))
+#define SPU_CH_LOOP_ADDR(N) _MMIO16((IOBASE | 0x1c0e) + (16 * (N)))
/* MDEC */
@@ -91,11 +91,11 @@
// IMPORTANT: even though SIO_DATA is a 32-bit register, it should only be
// accessed as 8-bit. Reading it as 16 or 32-bit works fine on real hardware,
// but leads to problems in some emulators.
-#define SIO_DATA(N) _MMIO8 (IOBASE | 0x1040 + 16 * (N))
-#define SIO_STAT(N) _MMIO16(IOBASE | 0x1044 + 16 * (N))
-#define SIO_MODE(N) _MMIO16(IOBASE | 0x1048 + 16 * (N))
-#define SIO_CTRL(N) _MMIO16(IOBASE | 0x104a + 16 * (N))
-#define SIO_BAUD(N) _MMIO16(IOBASE | 0x104e + 16 * (N))
+#define SIO_DATA(N) _MMIO8 ((IOBASE | 0x1040) + (16 * (N)))
+#define SIO_STAT(N) _MMIO16((IOBASE | 0x1044) + (16 * (N)))
+#define SIO_MODE(N) _MMIO16((IOBASE | 0x1048) + (16 * (N)))
+#define SIO_CTRL(N) _MMIO16((IOBASE | 0x104a) + (16 * (N)))
+#define SIO_BAUD(N) _MMIO16((IOBASE | 0x104e) + (16 * (N)))
/* IRQ controller */
@@ -107,15 +107,15 @@
#define DMA_DPCR _MMIO32(IOBASE | 0x10f0)
#define DMA_DICR _MMIO32(IOBASE | 0x10f4)
-#define DMA_MADR(N) _MMIO32(IOBASE | 0x1080 + 16 * (N))
-#define DMA_BCR(N) _MMIO32(IOBASE | 0x1084 + 16 * (N))
-#define DMA_CHCR(N) _MMIO32(IOBASE | 0x1088 + 16 * (N))
+#define DMA_MADR(N) _MMIO32((IOBASE | 0x1080) + (16 * (N)))
+#define DMA_BCR(N) _MMIO32((IOBASE | 0x1084) + (16 * (N)))
+#define DMA_CHCR(N) _MMIO32((IOBASE | 0x1088) + (16 * (N)))
/* Timers */
-#define TIMER_VALUE(N) _MMIO32(IOBASE | 0x1100 + 16 * (N))
-#define TIMER_CTRL(N) _MMIO32(IOBASE | 0x1104 + 16 * (N))
-#define TIMER_RELOAD(N) _MMIO32(IOBASE | 0x1108 + 16 * (N))
+#define TIMER_VALUE(N) _MMIO32((IOBASE | 0x1100) + (16 * (N)))
+#define TIMER_CTRL(N) _MMIO32((IOBASE | 0x1104) + (16 * (N)))
+#define TIMER_RELOAD(N) _MMIO32((IOBASE | 0x1108) + (16 * (N)))
/* Memory/bus control */
diff --git a/libpsn00b/include/psxgpu.h b/libpsn00b/include/psxgpu.h
index 9b99fe9..2e9e4eb 100644
--- a/libpsn00b/include/psxgpu.h
+++ b/libpsn00b/include/psxgpu.h
@@ -44,6 +44,11 @@ typedef enum _GPU_VideoMode {
MODE_PAL = 1
} GPU_VideoMode;
+typedef enum _GPU_DrawOpType {
+ DRAWOP_TYPE_DMA = 1,
+ DRAWOP_TYPE_GPU_IRQ = 2
+} GPU_DrawOpType;
+
/* Structure macros */
#define setVector(v, _x, _y, _z) \
@@ -142,11 +147,11 @@ typedef enum _GPU_VideoMode {
((tge) ? (getcode_T(p) |= 1) : (getcode_T(p) &= ~1))
#define getTPage(tp, abr, x, y) ( \
- (((x) / 64) & 15) | \
- ((((y) / 256) & 1) << 4) | \
- (((abr) & 3) << 5) | \
- (((tp) & 3) << 7) | \
- ((((y) / 512) & 1) << 11) \
+ (((x) & 0x3c0) >> 6) | \
+ (((y) & 0x100) >> 4) | \
+ (((y) & 0x200) << 2) | \
+ (((abr) & 3) << 5) | \
+ (((tp) & 3) << 7) \
)
#define getClut(x, y) (((y) << 6) | (((x) >> 4) & 0x3f))
@@ -210,8 +215,8 @@ typedef enum _GPU_VideoMode {
#define setDrawTPage_T(p, dfe, dtd, tpage) \
(p)->code[0] = (0xe1000000 | \
(tpage) | \
- ((dtd) << 9) | \
- ((dfe) << 10) \
+ (((dtd) & 1) << 9) | \
+ (((dfe) & 1) << 10) \
)
#define setDrawTPage(p, dfe, dtd, tpage) \
setlen(p, 1), setDrawTPage_T(p, dfe, dtd, tpage)
@@ -261,6 +266,11 @@ typedef enum _GPU_VideoMode {
#define setDrawStp(p, pbw, mt) \
setlen(p, 1), setDrawStp_T(p, pbw, mt)
+#define setDrawIRQ_T(p) \
+ (p)->code[0] = 0x1f000000
+#define setDrawIRQ(p) \
+ setlen(p, 1), setDrawIRQ_T(p)
+
/* Primitive structure definitions */
typedef struct _P_TAG_T {
@@ -475,12 +485,11 @@ _DEF_PRIM(FILL,
uint16_t w, h;
)
-_DEF_PRIM(BLIT,
+_DEF_PRIM(DR_MOVE,
uint8_t p0, p1, p2, code;
uint16_t x0, y0;
uint16_t x1, y1;
uint16_t w, h;
- uint32_t pad[4];
)
_DEF_PRIM(DR_AREA,
@@ -498,6 +507,9 @@ _DEF_PRIM(DR_TPAGE,
_DEF_PRIM(DR_STP,
uint32_t code[1];
)
+_DEF_PRIM(DR_IRQ,
+ uint32_t code[1];
+)
_DEF_PRIM(DR_ENV,
DR_TPAGE_T tpage;
@@ -579,12 +591,8 @@ int VSync(int mode);
void *VSyncHaltFunction(void (*func)(void));
void *VSyncCallback(void (*func)(void));
-int EnqueueDrawOp(
- void (*func)(uint32_t, uint32_t, uint32_t),
- uint32_t arg1,
- uint32_t arg2,
- uint32_t arg3
-);
+void SetDrawOpType(GPU_DrawOpType type);
+int EnqueueDrawOp(void (*func)(), uint32_t arg1, uint32_t arg2, uint32_t arg3);
int DrawSync(int mode);
void *DrawSyncCallback(void (*func)(void));
@@ -600,6 +608,8 @@ void ClearOTag(uint32_t *ot, size_t length);
int DrawOTag(const uint32_t *ot);
int DrawOTagEnv(const uint32_t *ot, DRAWENV *env);
void DrawOTag2(const uint32_t *ot);
+int DrawBuffer(const uint32_t *buf, size_t length);
+void DrawBuffer2(const uint32_t *buf, size_t length);
void DrawPrim(const uint32_t *pri);
void AddPrim(uint32_t *ot, const void *pri);
diff --git a/libpsn00b/include/psxspu.h b/libpsn00b/include/psxspu.h
index d829821..b544952 100644
--- a/libpsn00b/include/psxspu.h
+++ b/libpsn00b/include/psxspu.h
@@ -156,7 +156,9 @@ size_t SpuRead(uint32_t *data, size_t size);
size_t SpuWrite(const uint32_t *data, size_t size);
size_t SpuWritePartly(const uint32_t *data, size_t size);
SPU_TransferMode SpuSetTransferMode(SPU_TransferMode mode);
+SPU_TransferMode SpuGetTransferMode(void);
uint32_t SpuSetTransferStartAddr(uint32_t addr);
+uint32_t SpuGetTransferStartAddr(void);
int SpuIsTransferCompleted(int mode);
#ifdef __cplusplus