Merge pull request #46 from spicyjpeg/psxmdec

Critical ldscript fixes, initial MDEC support and CI updates

10 files changed, 432 insertions, 107 deletions

diff --git a/libpsn00b/include/assert.h b/libpsn00b/include/assert.h
index 3114b57..e27f2ed 100644
--- a/libpsn00b/include/assert.h
+++ b/libpsn00b/include/assert.h
@@ -1,6 +1,20 @@
-#ifndef _ASSERT_H
-#define _ASSERT_H
+/*
+ * PSn00bSDK assert macro
+ * (C) 2022 spicyjpeg - MPL licensed
+ */
 
-void assert(int e);
+#ifndef __ASSERT_H
+#define __ASSERT_H
 
-#endif
\ No newline at end of file
+void _assert_abort(const char *file, int line, const char *expr);
+
+#ifdef DEBUG
+#define assert(expr) { \
+	if (!(expr)) \
+		_assert_abort(__FILE__, __LINE__, #expr); \
+}
+#else
+#define assert(x)
+#endif
+
+#endif
diff --git a/libpsn00b/include/dlfcn.h b/libpsn00b/include/dlfcn.h
index 6874d06..5848a95 100644
--- a/libpsn00b/include/dlfcn.h
+++ b/libpsn00b/include/dlfcn.h
@@ -1,19 +1,18 @@
 /*
  * PSn00bSDK dynamic linker
- * (C) 2021 spicyjpeg - MPL licensed
+ * (C) 2021-2022 spicyjpeg - MPL licensed
  */
 
 #ifndef __DLFCN_H
 #define __DLFCN_H 
 
-#include <sys/types.h>
+#include <stdint.h>
 #include <elf.h>
 
 /* Helper macro for setting $t9 before calling a function */
 
-#define DL_CALL(func, ...) { \
+#define DL_PRE_CALL(func) { \
 	__asm__ volatile("move $t9, %0;" :: "r"(func) : "$t9"); \
-	func(__VA_ARGS__); \
 }
 
 /* Types */
diff --git a/libpsn00b/include/elf.h b/libpsn00b/include/elf.h
index b4c4408..abfb3d5 100644
--- a/libpsn00b/include/elf.h
+++ b/libpsn00b/include/elf.h
@@ -12,7 +12,7 @@
 #ifndef __ELF_H
 #define __ELF_H 
 
-#include <sys/types.h>
+#include <stdint.h>
 
 typedef enum {
 	DT_NULL		= 0,		/* Marks end of dynamic section */
diff --git a/libpsn00b/include/hwregs_a.h b/libpsn00b/include/hwregs_a.h
index 0680679..8a504f5 100644
--- a/libpsn00b/include/hwregs_a.h
+++ b/libpsn00b/include/hwregs_a.h
@@ -6,11 +6,13 @@
 
 .set IOBASE,			0x1f80		# IO segment base
 
-# GPU
-.set GP0,				0x1810		# Also GPUREAD
-.set GP1,				0x1814		# Also GPUSTAT
+## GPU
+
+.set GPU_GP0,			0x1810		# Also GPUREAD
+.set GPU_GP1,			0x1814		# Also GPUSTAT
+
+## CD drive
 
-# CD
 .set CD_STAT,			0x1800
 .set CD_CMD,			0x1801		# Also response FIFO
 .set CD_DATA,			0x1802		# Also parameters
@@ -21,14 +23,14 @@
 .set CD_REG2,			0x1802
 .set CD_REG3,			0x1803
 
-.set SBUS_5,			0x1018
-.set COM_DELAY,			0x1020
+## SPU
 
-# SPU (must be used with 16-bit load/store instructions)
 .set SPU_VOICE_BASE,	0x1c00
 
-.set SPU_MASTER_VOL,	0x1d80
-.set SPU_REVERB_VOL,	0x1d84
+.set SPU_MASTER_VOL_L,	0x1d80
+.set SPU_MASTER_VOL_R,	0x1d82
+.set SPU_REVERB_VOL_L,	0x1d84
+.set SPU_REVERB_VOL_R,	0x1d86
 .set SPU_KEY_ON,		0x1d88
 .set SPU_KEY_OFF,		0x1d8c
 .set SPU_FM_MODE,		0x1d90
@@ -41,81 +43,107 @@
 .set SPU_ADDR,			0x1da6
 .set SPU_DATA,			0x1da8
 
-.set SPUCNT,			0x1daa
-.set SPUDTCNT,			0x1dac
-.set SPUSTAT,			0x1dae
+.set SPU_CTRL,			0x1daa
+.set SPU_DMA_CTRL,		0x1dac
+.set SPU_STAT,			0x1dae
 
-.set SPU_CD_VOL,		0x1db0
-.set SPU_EXT_VOL,		0x1db4
-.set SPU_CURRENT_VOL,	0x1db8
+.set SPU_CD_VOL_L,		0x1db0
+.set SPU_CD_VOL_R,		0x1db2
+.set SPU_EXT_VOL_L,		0x1db4
+.set SPU_EXT_VOL_R,		0x1db6
+.set SPU_CURRENT_VOL_L,	0x1db8
+.set SPU_CURRENT_VOL_R,	0x1dba
 
 .set SPU_VOICE_VOL_L,	0x00
 .set SPU_VOICE_VOL_R,	0x02
 .set SPU_VOICE_FREQ,	0x04
 .set SPU_VOICE_ADDR,	0x06
 .set SPU_VOICE_ADSR_L,	0x08
-.set SPU_VOICE_ADSR_H,	0x0a		
+.set SPU_VOICE_ADSR_H,	0x0a
 .set SPU_VOICE_LOOP,	0x0e
 
-# MDEC
+## MDEC
+
 .set MDEC0,				0x1820
 .set MDEC1,				0x1824
 
-# Pads
-.set JOY_TXRX,	0x1040
-.set JOY_STAT,	0x1044
-.set JOY_MODE,	0x1048
-.set JOY_CTRL,	0x104A
-.set JOY_BAUD,	0x104E
-
-# Serial
-.set SIO_TXRX,	0x1050
-.set SIO_STAT,	0x1054
-.set SIO_MODE,	0x1058
-.set SIO_CTRL,	0x105a
-.set SIO_BAUD,	0x105e
-
-# IRQ
-.set ISTAT,		0x1070
-.set IMASK,		0x1074
-
-# DMA
-.set DPCR,		0x10f0     
-.set DICR,		0x10f4
-
-.set D0_MADR,	0x1080
-.set D0_BCR,	0x1084
-.set D0_CHCR,	0x1088
-
-.set D1_MADR,	0x1090
-.set D1_BCR,	0x1094
-.set D1_CHCR,	0x1098
-
-.set D2_MADR,	0x10a0
-.set D2_BCR,	0x10a4
-.set D2_CHCR,	0x10a8
-
-.set D3_MADR,	0x10b0
-.set D3_BCR,	0x10b4
-.set D3_CHCR,	0x10b8
-
-.set D4_MADR,	0x10c0
-.set D4_BCR,	0x10c4
-.set D4_CHCR,	0x10c8
-
-.set D6_MADR,	0x10e0
-.set D6_BCR,	0x10e4
-.set D6_CHCR,	0x10e8
-
-# Timers
-.set T0_CNT,	0x1100
-.set T0_MODE,	0x1104
-.set T0_TGT,	0x1108
-
-.set T1_CNT,	0x1110
-.set T1_MODE,	0x1114
-.set T1_TGT,	0x1118
-
-.set T2_CNT,	0x1120
-.set T2_MODE,	0x1124
-.set T2_TGT,	0x1128
+## SPI controller port
+
+.set JOY_TXRX,			0x1040
+.set JOY_STAT,			0x1044
+.set JOY_MODE,			0x1048
+.set JOY_CTRL,			0x104a
+.set JOY_BAUD,			0x104e
+
+## Serial port
+
+.set SIO_TXRX,			0x1050
+.set SIO_STAT,			0x1054
+.set SIO_MODE,			0x1058
+.set SIO_CTRL,			0x105a
+.set SIO_BAUD,			0x105e
+
+## IRQ controller
+
+.set IRQ_STAT,			0x1070
+.set IRQ_MASK,			0x1074
+
+## DMA
+
+.set DMA_DPCR,			0x10f0
+.set DMA_DICR,			0x10f4
+
+.set DMA0_MADR,			0x1080
+.set DMA0_BCR,			0x1084
+.set DMA0_CHCR,			0x1088
+
+.set DMA1_MADR,			0x1090
+.set DMA1_BCR,			0x1094
+.set DMA1_CHCR,			0x1098
+
+.set DMA2_MADR,			0x10a0
+.set DMA2_BCR,			0x10a4
+.set DMA2_CHCR,			0x10a8
+
+.set DMA3_MADR,			0x10b0
+.set DMA3_BCR,			0x10b4
+.set DMA3_CHCR,			0x10b8
+
+.set DMA4_MADR,			0x10c0
+.set DMA4_BCR,			0x10c4
+.set DMA4_CHCR,			0x10c8
+
+.set DMA5_MADR,			0x10d0
+.set DMA5_BCR,			0x10d4
+.set DMA5_CHCR,			0x10d8
+
+.set DMA6_MADR,			0x10e0
+.set DMA6_BCR,			0x10e4
+.set DMA6_CHCR,			0x10e8
+
+## Timers
+
+.set TIMER0_VALUE,		0x1100
+.set TIMER0_CTRL,		0x1104
+.set TIMER0_RELOAD,		0x1108
+
+.set TIMER1_VALUE,		0x1110
+.set TIMER1_CTRL,		0x1114
+.set TIMER1_RELOAD,		0x1118
+
+.set TIMER2_VALUE,		0x1120
+.set TIMER2_CTRL,		0x1124
+.set TIMER2_RELOAD,		0x1128
+
+## Memory control
+
+.set EXP1_ADDR,			0x1000
+.set EXP2_ADDR,			0x1004
+.set EXP1_DELAY_SIZE,	0x1008
+.set EXP3_DELAY_SIZE,	0x100c
+.set BIOS_DELAY_SIZE,	0x1010
+.set SPU_DELAY_SIZE,	0x1014
+.set CD_DELAY_SIZE,		0x1018
+.set EXP2_DELAY_SIZE,	0x101c
+.set COM_DELAY_CFG,		0x1020
+.set RAM_SIZE_CFG,		0x1060
diff --git a/libpsn00b/include/hwregs_c.h b/libpsn00b/include/hwregs_c.h
new file mode 100644
index 0000000..e533c56
--- /dev/null
+++ b/libpsn00b/include/hwregs_c.h
@@ -0,0 +1,129 @@
+/*
+ * PSn00bSDK hardware registers definitions
+ * (C) 2022 spicyjpeg - MPL licensed
+ */
+
+#ifndef __HWREGS_C_H
+#define __HWREGS_C_H
+
+#include <stdint.h>
+
+#define _MMIO8(addr)		*((volatile uint8_t *) (addr))
+#define _MMIO16(addr)		*((volatile uint16_t *) (addr))
+#define _MMIO32(addr)		*((volatile uint32_t *) (addr))
+
+/* Constants */
+
+#define F_CPU				33868800UL
+#define F_GPU				53222400UL
+
+/* GPU */
+
+#define GPU_GP0				_MMIO32(0x1f801810)
+#define GPU_GP1				_MMIO32(0x1f801814)
+
+/* CD drive */
+
+#define CD_STAT				_MMIO8(0x1f801800)
+#define CD_CMD				_MMIO8(0x1f801801)
+#define CD_DATA				_MMIO8(0x1f801802)
+#define CD_IRQ				_MMIO8(0x1f801803)
+
+#define CD_REG(N)			_MMIO8(0x1f801800 + (N))
+
+/* SPU */
+
+#define SPU_MASTER_VOL_L	_MMIO16(0x1f801d80)
+#define SPU_MASTER_VOL_R	_MMIO16(0x1f801d82)
+#define SPU_REVERB_VOL_L	_MMIO16(0x1f801d84)
+#define SPU_REVERB_VOL_R	_MMIO16(0x1f801d86)
+#define SPU_KEY_ON			_MMIO32(0x1f801d88)
+#define SPU_KEY_OFF			_MMIO32(0x1f801d8c)
+#define SPU_FM_MODE			_MMIO32(0x1f801d90)
+#define SPU_NOISE_MODE		_MMIO32(0x1f801d94)
+#define SPU_REVERB_ON		_MMIO32(0x1f801d98)
+#define SPU_CHAN_STATUS		_MMIO32(0x1f801d9c)
+
+#define SPU_REVERB_ADDR		_MMIO16(0x1f801da2)
+#define SPU_IRQ_ADDR		_MMIO16(0x1f801da4)
+#define SPU_ADDR			_MMIO16(0x1f801da6)
+#define SPU_DATA			_MMIO16(0x1f801da8)
+
+#define SPU_CTRL			_MMIO16(0x1f801daa)
+#define SPU_DMA_CTRL		_MMIO16(0x1f801dac)
+#define SPU_STAT			_MMIO16(0x1f801dae)
+
+#define SPU_CD_VOL_L		_MMIO16(0x1f801db0)
+#define SPU_CD_VOL_R		_MMIO16(0x1f801db2)
+#define SPU_EXT_VOL_L		_MMIO16(0x1f801db4)
+#define SPU_EXT_VOL_R		_MMIO16(0x1f801db6)
+#define SPU_CURRENT_VOL_L	_MMIO16(0x1f801db8)
+#define SPU_CURRENT_VOL_R	_MMIO16(0x1f801dba)
+
+// These are not named SPU_VOICE_* to avoid name clashes with SPU attribute
+// flags defined in psxspu.h.
+#define SPU_CH_VOL_L(N)		_MMIO16(0x1f801c00 + 16 * (N))
+#define SPU_CH_VOL_R(N)		_MMIO16(0x1f801c02 + 16 * (N))
+#define SPU_CH_FREQ(N)		_MMIO16(0x1f801c04 + 16 * (N))
+#define SPU_CH_ADDR(N)		_MMIO16(0x1f801c06 + 16 * (N))
+#define SPU_CH_ADSR(N)		_MMIO32(0x1f801c08 + 16 * (N))
+#define SPU_CH_LOOP_ADDR(N)	_MMIO16(0x1f801c0e + 16 * (N))
+
+/* MDEC */
+
+#define MDEC0				_MMIO32(0x1f801820)
+#define MDEC1				_MMIO32(0x1f801824)
+
+/* SPI controller port */
+
+// IMPORTANT: even though JOY_TXRX is a 32-bit register, it should only be
+// accessed as 8-bit. Reading it as 16 or 32-bit works fine on real hardware,
+// but leads to problems in some emulators.
+#define JOY_TXRX			_MMIO8(0x1f801040)
+#define JOY_STAT			_MMIO16(0x1f801044)
+#define JOY_MODE			_MMIO16(0x1f801048)
+#define JOY_CTRL			_MMIO16(0x1f80104a)
+#define JOY_BAUD			_MMIO16(0x1f80104e)
+
+/* Serial port */
+
+#define SIO_TXRX			_MMIO8(0x1f801050)
+#define SIO_STAT			_MMIO16(0x1f801054)
+#define SIO_MODE			_MMIO16(0x1f801058)
+#define SIO_CTRL			_MMIO16(0x1f80105a)
+#define SIO_BAUD			_MMIO16(0x1f80105e)
+
+/* IRQ controller */
+
+#define IRQ_STAT			_MMIO32(0x1f801070)
+#define IRQ_MASK			_MMIO32(0x1f801074)
+
+/* DMA */
+
+#define DMA_DPCR			_MMIO32(0x1f8010f0)
+#define DMA_DICR			_MMIO32(0x1f8010f4)
+
+#define DMA_MADR(N)			_MMIO32(0x1f801080 + 16 * (N))
+#define DMA_BCR(N)			_MMIO32(0x1f801084 + 16 * (N))
+#define DMA_CHCR(N)			_MMIO32(0x1f801088 + 16 * (N))
+
+/* Timers */
+
+#define TIMER_VALUE(N)		_MMIO32(0x1f801100 + 16 * (N))
+#define TIMER_CTRL(N)		_MMIO32(0x1f801104 + 16 * (N))
+#define TIMER_RELOAD(N)		_MMIO32(0x1f801108 + 16 * (N))
+
+/* Memory control */
+
+#define EXP1_ADDR			_MMIO32(0x1f801000)
+#define EXP2_ADDR			_MMIO32(0x1f801004)
+#define EXP1_DELAY_SIZE		_MMIO32(0x1f801008)
+#define EXP3_DELAY_SIZE		_MMIO32(0x1f80100c)
+#define BIOS_DELAY_SIZE		_MMIO32(0x1f801010)
+#define SPU_DELAY_SIZE		_MMIO32(0x1f801014)
+#define CD_DELAY_SIZE		_MMIO32(0x1f801018)
+#define EXP2_DELAY_SIZE		_MMIO32(0x1f80101c)
+#define COM_DELAY_CFG		_MMIO32(0x1f801020)
+#define RAM_SIZE_CFG		_MMIO32(0x1f801060)
+
+#endif
diff --git a/libpsn00b/include/psxapi.h b/libpsn00b/include/psxapi.h
index ec0dfea..1298d29 100644
--- a/libpsn00b/include/psxapi.h
+++ b/libpsn00b/include/psxapi.h
@@ -121,6 +121,12 @@ struct EXEC {
 	unsigned int sp,fp,rp,ret,base;
 };
 
+struct JMP_BUF {
+	unsigned int	ra, sp, fp;
+	unsigned int	s0, s1, s2, s3, s4, s5, s6, s7;
+	unsigned int	gp;
+};
+
 // Not recommended to use these functions to install IRQ handlers
 
 typedef struct {
@@ -211,8 +217,19 @@ void ChangeClearRCnt(int t, int m);
 int Exec(struct EXEC *exec, int argc, char **argv);
 void FlushCache(void);
 
+// BIOS setjmp functions
+void b_setjmp(struct JMP_BUF *buf);
+void b_longjmp(struct JMP_BUF *buf, int param);
+void SetDefaultExitFromException(void);
+void SetCustomExitFromException(struct JMP_BUF *buf);
+
 // Misc functions
 int GetSystemInfo(int index);
+void *GetB0Table(void);
+void *GetC0Table(void);
+
+void *_kernel_malloc(int size);
+void _kernel_free(void *ptr);
 
 void _boot(void);
 
diff --git a/libpsn00b/include/psxpad.h b/libpsn00b/include/psxpad.h
index 9638ec1..32f7f8a 100644
--- a/libpsn00b/include/psxpad.h
+++ b/libpsn00b/include/psxpad.h
@@ -75,12 +75,16 @@ typedef enum {
 
 typedef enum {
 	PAD_CMD_INIT_PRESSURE	= '@', // Initialize DS2 button pressure sensors (in config mode)
-	PAD_CMD_READ			= 'B', // Read pad state and set rumble
+	PAD_CMD_READ			= 'B', // Read pad state (exchange poll request/response)
 	PAD_CMD_CONFIG_MODE		= 'C', // Toggle DualShock configuration mode
 	PAD_CMD_SET_ANALOG		= 'D', // Set analog mode/LED state (in config mode)
 	PAD_CMD_GET_ANALOG		= 'E', // Get analog mode/LED state (in config mode)
-	PAD_CMD_REQUEST_CONFIG	= 'M', // Configure request/unlock vibration (in config mode)
-	PAD_CMD_RESPONSE_CONFIG	= 'O', // Configure response/unlock DS2 pressure (in config mode)
+	PAD_CMD_GET_MOTOR_INFO	= 'F', // Get information about a vibration motor (in config mode)
+	PAD_CMD_GET_MOTOR_LIST	= 'G', // Get list of all vibration motors (in config mode)
+	PAD_CMD_GET_MOTOR_STATE	= 'H', // Get current state of vibration motors (in config mode)
+	PAD_CMD_GET_MODE		= 'L', // Get list of supported controller modes? (in config mode)
+	PAD_CMD_REQUEST_CONFIG	= 'M', // Configure poll request format (in config mode)
+	PAD_CMD_RESPONSE_CONFIG	= 'O', // Configure poll response format (in config mode)
 
 	MCD_CMD_READ_SECTOR		= 'R', // Read 128-byte sector
 	MCD_CMD_IDENTIFY		= 'S', // Retrieve ID and card size information (Sony cards only)
diff --git a/libpsn00b/include/psxpress.h b/libpsn00b/include/psxpress.h
new file mode 100644
index 0000000..b060170
--- /dev/null
+++ b/libpsn00b/include/psxpress.h
@@ -0,0 +1,153 @@
+/*
+ * PSn00bSDK MDEC library
+ * (C) 2022 spicyjpeg - MPL licensed
+ */
+
+#ifndef __PSXPRESS_H
+#define __PSXPRESS_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+/* Structure definitions */
+
+typedef struct _DECDCTENV {
+	uint8_t iq_y[64];	// Luma quantization table, stored in zigzag order
+	uint8_t iq_c[64];	// Chroma quantization table, stored in zigzag order
+	int16_t dct[64];	// Inverse DCT matrix (2.14 fixed-point)
+} DECDCTENV;
+
+typedef enum _DECDCTMODE {
+	DECDCT_MODE_24BPP		= 1,
+	DECDCT_MODE_16BPP		= 0,
+	DECDCT_MODE_16BPP_BIT15	= 2,
+	DECDCT_MODE_RAW			= -1
+} DECDCTMODE;
+
+/* Public API */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Resets the MDEC and aborts any MDEC DMA transfers. If mode = 0, the
+ * default IDCT matrix and quantization tables are also loaded and the MDEC is
+ * put into color output mode, discarding any custom environment previously set
+ * with DecDCTPutEnv().
+ *
+ * DecDCTReset(0) must be called at least once prior to using the MDEC.
+ *
+ * @param mode
+ */
+void DecDCTReset(int32_t mode);
+
+/**
+ * @brief Uploads the specified decoding environment's quantization tables and
+ * IDCT matrix to the MDEC, or restores the default tables if a null pointer is
+ * passed. Calling this function is normally not required as DecDCTReset(0)
+ * initializes the MDEC with the default tables, but it may be useful for e.g.
+ * decoding JPEG or a format with custom quantization tables.
+ *
+ * The second argument, not present in the official SDK, specifies whether the
+ * MDEC shall be put into color (0) or monochrome (1) output mode. In
+ * monochrome mode each DCT block decoded from the input stream is transformed
+ * into an 8x8x8bpp bitmap, while in color mode each group of 6 DCT blocks (Cr,
+ * Cb, Y1-4) is used to form a 16x16 RGB bitmap.
+ *
+ * This function uses DecDCTinSync() to wait for the MDEC to become ready and
+ * should not be called during decoding or after calling DecDCTin().
+ *
+ * @param env Pointer to DECDCTENV or 0 for default tables
+ * @param mono 0 for color (normal), 1 for monochrome
+ */
+void DecDCTPutEnv(const DECDCTENV *env, int32_t mono);
+
+/**
+ * @brief Sets up the MDEC to start fetching and decoding a stream from the
+ * given address in main RAM. The first 32-bit word is initially copied to the
+ * MDEC0 register, then all subsequent data is read in 128-byte (32-word)
+ * chunks. The length of the stream (in 32-bit units, minus the first word)
+ * must be encoded in the lower 16 bits of the first word, as expected by the
+ * MDEC.
+ *
+ * The mode argument optionally specifies the output color depth (0 for 16bpp,
+ * 1 for 24bpp) if not already set in the first word. Passing -1 will result in
+ * DecDCTin() copying the first word as-is to MDEC0 without manipulating any of
+ * its bits.
+ *
+ * @param data
+ * @param mode DECDCT_MODE_* or -1
+ */
+void DecDCTin(const uint32_t *data, int32_t mode);
+
+/**
+ * @brief Configures the MDEC to automatically fetch data (the input stream,
+ * IDCT matrix or quantization tables) in 128-byte (32-word) chunks from the
+ * specified address in main RAM. The transfer is stopped, and any callback
+ * registered with DMACallback(0) is fired, once a certain number of 32-bit
+ * words have been read; usually the length should match the number of input
+ * words expected by the MDEC. If the MDEC expects more data its operation will
+ * be paused and can be resumed by calling DecDCTinRaw() again.
+ *
+ * This is a low-level variant of DecDCTin() that only sets up the DMA transfer
+ * and does not write anything to the MDEC0 register. The actual transfer won't
+ * start until the MDEC is given a valid command.
+ * 
+ * @param data
+ * @param length Number of 32-bit words to read (must be multiple of 32)
+ */
+void DecDCTinRaw(const uint32_t *data, size_t length);
+
+/**
+ * @brief Waits for the MDEC to finish decoding the input stream (if mode = 0)
+ * or returns whether it is busy (if mode = 1). MDEC commands can be issued
+ * only when the MDEC isn't busy.
+ *
+ * WARNING: DecDCTinSync(0) might time out and return -1 if the MDEC can't
+ * output decoded data, e.g. if the length passed DecDCTout() was too small and
+ * no callback is registered to set up further transfers. DecDCTinSync(0) shall
+ * only be used alongside DMACallback(1) or if the entirety of the decoded
+ * stream (usually a whole frame) is being written to main RAM.
+ *
+ * @param mode
+ * @return 0 or -1 in case of a timeout (mode = 0) / MDEC busy flag (mode = 1)
+ */
+int32_t DecDCTinSync(int32_t mode);
+
+/**
+ * @brief Configures the MDEC to automatically transfer decoded image data in
+ * 128-byte (32-word) chunks to the specified address in main RAM. MDEC
+ * operation is paused once a certain number of 32-bit words have been output
+ * and can be resumed by calling DecDCTout() again: the MDEC will continue
+ * decoding the input stream from where it left off. Any callback registered
+ * with DMACallback(1) is also fired whenever the transfer ends.
+ *
+ * This behavior allows the MDEC's output to be buffered into 16-pixel-wide
+ * vertical strips in main RAM, which can then be uploaded to VRAM using
+ * LoadImage().
+ *
+ * @param data
+ * @param length Number of 32-bit words to output (must be multiple of 32)
+ */
+void DecDCTout(uint32_t *data, size_t length);
+
+/**
+ * @brief Waits until the transfer set up by DecDCTout() finishes (if mode = 0)
+ * or returns whether it is still in progress (if mode = 1).
+ *
+ * WARNING: DecDCToutSync(0) might time out and return -1 if the MDEC is unable
+ * to consume enough input data in order to produce the desired amount of data.
+ * If the input stream isn't contiguous in memory, DMACallback(0) shall be used
+ * to register a callback that calls DecDCTin() to feed the MDEC.
+ *
+ * @param mode
+ * @return 0 or -1 in case of a timeout (mode = 0) / DMA busy flag (mode = 1)
+ */
+int32_t DecDCToutSync(int32_t mode);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libpsn00b/include/stdint.h b/libpsn00b/include/stdint.h
deleted file mode 100644
index 83acb00..0000000
--- a/libpsn00b/include/stdint.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef _STDINT_H
-#define _STDINT_H
-
-typedef unsigned int		size_t;
-
-typedef char				int8_t;
-typedef short				int16_t;
-typedef int					int32_t;
-typedef long long			int64_t;
-
-typedef unsigned char		uint8_t;
-typedef unsigned short		uint16_t;
-typedef unsigned int		uint32_t;
-typedef unsigned long long	uint64_t;
-
-#endif // _STDINT_H
\ No newline at end of file
diff --git a/libpsn00b/include/stdlib.h b/libpsn00b/include/stdlib.h
index de3ab47..4c4fcd3 100644
--- a/libpsn00b/include/stdlib.h
+++ b/libpsn00b/include/stdlib.h
@@ -38,16 +38,13 @@ long labs(long i);
 long long strtoll(const char *nptr, char **endptr, int base);
 long strtol(const char *nptr, char **endptr, int base);
 long double strtold(const char *nptr, char **endptr);
-// BIOS temporary
-int atoi(const char *s);
-long atol(const char *s);
 
 // Note: these use floats internally!
 double strtod(const char *nptr, char **endptr);
 float strtof(const char *nptr, char **endptr);
 
 // Memory allocation functions
-unsigned int *GetBSSend();
+void _mem_init(int ram_size, int stack_max_size);
 void InitHeap(unsigned int *addr, int size);
 int SetHeapSize(int size);
 void *malloc(int size);