diff options
| author | spicyjpeg <thatspicyjpeg@gmail.com> | 2022-11-15 08:07:24 +0100 |
|---|---|---|
| committer | spicyjpeg <thatspicyjpeg@gmail.com> | 2022-11-15 08:07:24 +0100 |
| commit | 85d765f30595fe7f27c1b065c5a1934c3d389cef (patch) | |
| tree | b2a30eaa7f61b8238fdcdfd33867a5e44a4efbf0 /libpsn00b/include | |
| parent | 4139331d233b7a962e747c5564fa68a285f81cc8 (diff) | |
| download | psn00bsdk-85d765f30595fe7f27c1b065c5a1934c3d389cef.tar.gz | |
Misc. libpsn00b bugfixes, new critical section macros
Diffstat (limited to 'libpsn00b/include')
| -rw-r--r-- | libpsn00b/include/dlfcn.h | 2 | ||||
| -rw-r--r-- | libpsn00b/include/hwregs_a.inc | 2 | ||||
| -rw-r--r-- | libpsn00b/include/psxapi.h | 42 | ||||
| -rw-r--r-- | libpsn00b/include/psxgpu.h | 4 |
4 files changed, 44 insertions, 6 deletions
diff --git a/libpsn00b/include/dlfcn.h b/libpsn00b/include/dlfcn.h index 3c5260d..f6a5baf 100644 --- a/libpsn00b/include/dlfcn.h +++ b/libpsn00b/include/dlfcn.h @@ -24,7 +24,7 @@ * GCC will generate code to set $t9 appropriately. */ #define DL_PRE_CALL(func) \ - __asm__ volatile("move $t9, %0;" :: "r"(func) : "$t9"); + __asm__ volatile("move $t9, %0;" :: "r"(func) : "$t9") /* Structure and enum definitions */ diff --git a/libpsn00b/include/hwregs_a.inc b/libpsn00b/include/hwregs_a.inc index ca38542..b0c6954 100644 --- a/libpsn00b/include/hwregs_a.inc +++ b/libpsn00b/include/hwregs_a.inc @@ -3,7 +3,7 @@ ## Constants -.set IOBASE, 0x1f80 +.set IOBASE, 0xbf80 .set F_CPU, 33868800 .set F_GPU, 53222400 diff --git a/libpsn00b/include/psxapi.h b/libpsn00b/include/psxapi.h index 5d1097e..7353ed2 100644 --- a/libpsn00b/include/psxapi.h +++ b/libpsn00b/include/psxapi.h @@ -8,6 +8,7 @@ #include <stdint.h> #include <stddef.h> +#include <hwregs_c.h> /* Definitions */ @@ -143,6 +144,43 @@ typedef struct { int _reserved; } INT_RP; +/* Fast interrupt disabling macros */ + +// Clearing the IRQ_MASK register is faster than manipulating cop0r12, even +// though it requires declaring a "hidden" local variable to save its state to; +// it's also resilient to race conditions as there's no read-modify-write +// operation during which an interrupt can occur. Note that interrupt flags in +// the IRQ_STAT register will get set even if the respective enable bits in +// IRQ_MASK are cleared, so doing this will properly defer IRQs rather than +// dropping them. +#define FastEnterCriticalSection() \ + uint16_t __saved_irq_mask = IRQ_MASK; (IRQ_MASK = 0) +#define FastExitCriticalSection() \ + (IRQ_MASK = __saved_irq_mask) + +/*#define FastEnterCriticalSection() { \ + uint32_t r0, r1; \ + __asm__ volatile( \ + "mfc0 %0, $12;" \ + "li %1, -1026;" \ + "and %1, %0;" \ + "mtc0 %1, $12;" \ + "nop;" \ + : "=r"(r0), "=r"(r1) :: \ + ); \ +} +#define FastExitCriticalSection() { \ + uint32_t r0; \ + __asm__ volatile( \ + "mfc0 %0, $12;" \ + "nop;" \ + "ori %0, 0x0401;" \ + "mtc0 %0, $12;" \ + "nop;" \ + : "=r"(r0) :: \ + ); \ +}*/ + /* API */ #ifdef __cplusplus @@ -179,9 +217,9 @@ int DelDev(const char *name); void ListDev(void); void AddDummyTty(void); -void EnterCriticalSection(void); +int EnterCriticalSection(void); void ExitCriticalSection(void); -void SwEnterCriticalSection(void); +int SwEnterCriticalSection(void); void SwExitCriticalSection(void); void _InitCd(void); diff --git a/libpsn00b/include/psxgpu.h b/libpsn00b/include/psxgpu.h index 68e3bff..b0c5302 100644 --- a/libpsn00b/include/psxgpu.h +++ b/libpsn00b/include/psxgpu.h @@ -525,10 +525,10 @@ void *DrawSyncCallback(void (*func)(void)); int LoadImage(const RECT *rect, const uint32_t *data); int StoreImage(const RECT *rect, uint32_t *data); -int MoveImage(const RECT *rect, int x, int y); +//int MoveImage(const RECT *rect, int x, int y); void LoadImage2(const RECT *rect, const uint32_t *data); void StoreImage2(const RECT *rect, uint32_t *data); -void MoveImage2(const RECT *rect, int x, int y); +//void MoveImage2(const RECT *rect, int x, int y); void ClearOTagR(uint32_t *ot, size_t length); void ClearOTag(uint32_t *ot, size_t length); |
