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authorJohn Wilbert M. Villamor <lameguy64@gmail.com>2019-06-23 07:42:16 +0800
committerJohn Wilbert M. Villamor <lameguy64@gmail.com>2019-06-23 07:42:16 +0800
commit7be9178c0f9b0e698a305ecc5c0c41fcc596a4fc (patch)
treee98c627e1da5c764563774b89b0c06d7ac5ad0a4 /doc
parentae9e545c3ed33d39ce21ae13ceb8337fa34901b8 (diff)
downloadpsn00bsdk-7be9178c0f9b0e698a305ecc5c0c41fcc596a4fc.tar.gz
LibPSn00b officially v0.10b, added psxsio library, better DrawSync() and VSync(), better reference manual.
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-rw-r--r--doc/dev notes.txt38
2 files changed, 23 insertions, 15 deletions
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+++ b/doc/dev notes.txt
@@ -10,21 +10,28 @@ I run into more previously undocumented quirks in the future.
need to allocate N words on the stack first when calling a function that has
N arguments (addiu $sp, -(4*N) where N = number of arguments of the function
being called) even if the arguments are on registers a0 to a3 and the C
-functions don't always use the space allotted in stack.
+functions don't always use the space allotted in stack. When calling a
+function with a variable number of arguments (printf) always allocate
+16 bytes of stack.
-* A custom handler hooked using BIOS function B(19h)
-(SetCustomExitFromException) is only triggered when there's an interrupt
-that hasn't been acknowledged by previous IRQ handlers that have been
-executed prior. This is also the best point to acknowledge any interrupts
-without breaking compatibility with built-in BIOS features and is what the
-official SDK uses to handle interrupts.
+* Hooking a custom handler using BIOS function HookEntryInt (B(19h), known
+as SetCustomExitFromException in nocash docs) is only triggered when there's
+an IRQ that is not yet acknowledged by previous IRQ handlers built into the
+kernel. This is also the best point to acknowledge any IRQs without breaking
+compatibility with built-in BIOS IRQ handlers and is what the official SDK
+uses to handle IRQs. To make sure this handler is triggered on every interrupt
+you must call ChangeClearPad(0) and ChangeClearRCnt(3, 0) (which are functions
+(B(5Bh)) and C(0Ah) respectively) otherwise the pad and root counter handlers
+in the kernel will acknowledge the interrupt before your handler, preventing
+you from handling them yourself.
-* It is not advisable to acknowledge interrupts in event handlers like in
-PSXSDK as it would break BIOS features that depend on interrupts. Clearing
-the VBlank IRQ in a event handler for example prevents the BIOS controller
+* It is not advisable to handle interrupts using event handlers like in
+PSXSDK as it breaks BIOS features that depend on interrupts. Clearing the
+VBlank IRQ in a event handler for example prevents the BIOS controller
functions from working as it depends on the VBlank IRQ to determine when to
query controllers. Acknowledge interrupts using a custom handler set by BIOS
-function B(19h) (SetCustomExitFromException).
+function HookEntryInt (B(19h), known as SetCustomExitFromException in nocash
+docs).
* When running in high resolution mode you must additionally wait for bit 31
in GPUSTAT (1F801814h) to alternate on every frame (frame 0: wait until 0,
@@ -34,10 +41,11 @@ to displayed area enabled. Performing this check in a low resolution/non
interlaced mode is harmless.
* There's a hardware bug in the GPU FillVRAM command GP0(02h) where if you
-set the height to 512 pixels the primitive is executed with a height of 0 as
-the hardware does not appear to interpret the last bit of the height value.
-This is most apparent when putting a DRAWENV with the height of 512 pixels
-(for PAL for example) and background clearing is enabled.
+set the height to 512 pixels the primitive is processed with a height of 0
+as the hardware does not appear to interpret the last bit of the height
+value. This is most apparent when putting a DRAWENV with the height of 512
+pixels (for PAL for example) and background clearing is enabled, hence why
+DRAWENV.isbg is not effective in the official SDK.
* In the official SDK, DMA IRQs appear to be enabled only when a callback
function is set (ie. DrawSyncCallback() enables IRQ for DMA channel 2). DMA