diff options
| author | spicyjpeg <thatspicyjpeg@gmail.com> | 2022-08-21 23:36:45 +0200 |
|---|---|---|
| committer | spicyjpeg <thatspicyjpeg@gmail.com> | 2022-08-21 23:36:45 +0200 |
| commit | f2e946cc0f9730c0da56aae533b3429a0381003e (patch) | |
| tree | 7ae3607a4708d8cdae096fa07dea774cead6ae4d | |
| parent | c845878cb43da4f7470914a064109db2270fd7e6 (diff) | |
| download | psn00bsdk-f2e946cc0f9730c0da56aae533b3429a0381003e.tar.gz | |
Fix psxetc bugs, IRQ controller register size
| -rw-r--r-- | doc/known_bugs.md | 11 | ||||
| -rw-r--r-- | libpsn00b/include/hwregs_c.h | 6 | ||||
| -rw-r--r-- | libpsn00b/psxetc/interrupts.c | 5 | ||||
| -rw-r--r-- | libpsn00b/psxgpu/common.c | 2 |
4 files changed, 11 insertions, 13 deletions
diff --git a/doc/known_bugs.md b/doc/known_bugs.md index 9e83f03..3fbfdc2 100644 --- a/doc/known_bugs.md +++ b/doc/known_bugs.md @@ -32,12 +32,9 @@ fixed. `psxspu`: -- `SpuCtrlSync()` locks up on MAME, making any code that tries to initialize - the SPU hang. It works on other emulators as well as on real hardware. - -- Calls to `SpuSetTransferMode()` are ignored. SPU transfers are always - performed using DMA, which imposes limitations such as the data length having - to be a multiple of 16 words (64 bytes, see above). +- `SpuInit()`, `SpuRead()` and `SpuWrite()` may take several seconds on MAME + due to the SPU status register being emulated incorrectly. They work as + expected on other emulators as well as on real hardware. `psxetc`: @@ -51,4 +48,4 @@ fixed. See [README.md in the examples directory](../examples/README.md#examples-summary). ----------------------------------------- -_Last updated on 2022-06-29 by spicyjpeg_ +_Last updated on 2022-08-21 by spicyjpeg_ diff --git a/libpsn00b/include/hwregs_c.h b/libpsn00b/include/hwregs_c.h index 7b80590..b205b87 100644 --- a/libpsn00b/include/hwregs_c.h +++ b/libpsn00b/include/hwregs_c.h @@ -14,7 +14,7 @@ /* Constants */ -#define IOBASE 0x1f800000 +#define IOBASE 0xbf800000 #define F_CPU 33868800UL #define F_GPU 53222400UL @@ -96,8 +96,8 @@ /* IRQ controller */ -#define IRQ_STAT _MMIO32(IOBASE | 0x1070) -#define IRQ_MASK _MMIO32(IOBASE | 0x1074) +#define IRQ_STAT _MMIO16(IOBASE | 0x1070) +#define IRQ_MASK _MMIO16(IOBASE | 0x1074) /* DMA */ diff --git a/libpsn00b/psxetc/interrupts.c b/libpsn00b/psxetc/interrupts.c index 32e91f0..859209a 100644 --- a/libpsn00b/psxetc/interrupts.c +++ b/libpsn00b/psxetc/interrupts.c @@ -18,7 +18,8 @@ static void (*_irq_handlers[NUM_IRQ_CHANNELS])(void); static void (*_dma_handlers[NUM_DMA_CHANNELS])(void); static int _num_dma_handlers = 0; -static uint32_t _saved_irq_mask, _saved_dma_dpcr, _saved_dma_dicr; +static uint16_t _saved_irq_mask; +static uint32_t _saved_dma_dpcr, _saved_dma_dicr; static int _isr_installed = 0; /* Custom ISR jmp_buf */ @@ -52,7 +53,7 @@ static const struct JMP_BUF _isr_jmp_buf = { /* Internal IRQ and DMA handlers */ static void _global_isr(void) { - uint32_t stat = IRQ_STAT, mask = IRQ_MASK; + uint16_t stat = IRQ_STAT, mask = IRQ_MASK; // Clear all IRQ flags in one shot. This is not the "proper" way to do it // but it's much faster than clearing one flag at a time. diff --git a/libpsn00b/psxgpu/common.c b/libpsn00b/psxgpu/common.c index de60df4..cef1508 100644 --- a/libpsn00b/psxgpu/common.c +++ b/libpsn00b/psxgpu/common.c @@ -215,7 +215,7 @@ void DrawOTag(const uint32_t *ot) { // condition where the DMA transfer could end while interrupts are being // disabled. Interrupts are disabled through the IRQ_MASK register rather // than by calling EnterCriticalSection() for performance reasons. - uint32_t mask = IRQ_MASK; + uint16_t mask = IRQ_MASK; IRQ_MASK = 0; if (DMA_CHCR(2) & (1 << 24)) { |