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-rwxr-xr-xlibpcsxcore/debug.c41
-rwxr-xr-xlibpcsxcore/debug.h3
-rwxr-xr-xlibpcsxcore/disr3000a.c6
3 files changed, 37 insertions, 13 deletions
diff --git a/libpcsxcore/debug.c b/libpcsxcore/debug.c
index fc717da6..99d2a53a 100755
--- a/libpcsxcore/debug.c
+++ b/libpcsxcore/debug.c
@@ -127,7 +127,9 @@ Execution flow control commands (3xx):
391
Restarts execution.
395 [number]
- Traces execution, 1 instruction by default. Formatted using %i
+ Traces execution, 1 instruction by default. Formatted using %i.
+396 [number]
+ Disassemble and print current PC in trace mode.
398
Soft (quick) resets.
399
@@ -204,6 +206,8 @@ Execution flow control commands acknowledge (4xx):
Resuming.
495 <message>
Tracing.
+496 <message>
+ Printing.
498 <message>
Soft resetting.
499 <message>
@@ -225,7 +229,7 @@ Error messages (5xx):
Invalid breakpoint address.
*/
-static int debugger_active = 0, paused = 0, trace = 0, reset = 0, resetting = 0;
+static int debugger_active = 0, paused = 0, trace = 0, printpc = 0, reset = 0, resetting = 0;
static int mapping_e = 0, mapping_r8 = 0, mapping_r16 = 0, mapping_r32 = 0, mapping_w8 = 0, mapping_w16 = 0, mapping_w32 = 0;
static int breakmp_e = 0, breakmp_r8 = 0, breakmp_r16 = 0, breakmp_r32 = 0, breakmp_w8 = 0, breakmp_w16 = 0, breakmp_w32 = 0;
@@ -389,6 +393,13 @@ void ProcessDebug() {
}
}
if (!paused) {
+ if(trace && printpc)
+ {
+ char reply[256];
+ sprintf(reply, "219 %s\r\n", disR3000AF(psxMemRead32(psxRegs.pc), psxRegs.pc));
+ WriteSocket(reply, strlen(reply));
+ }
+
DebugCheckBP(psxRegs.pc, BE);
}
if (mapping_e) {
@@ -466,11 +477,11 @@ static void ProcessCommands() {
if (!arguments) {
reply[0] = 0;
for (i = 0; i < 32; i++) {
- sprintf(reply, "%s211 %02X=%08X\r\n", reply, i, psxRegs.GPR.r[i]);
+ sprintf(reply, "%s211 %02X(%2.2s)=%08X\r\n", reply, i, disRNameGPR[i], psxRegs.GPR.r[i]);
}
} else {
if ((code >= 0) && (code < 32)) {
- sprintf(reply, "211 %02X=%08X\r\n", code, psxRegs.GPR.r[code]);
+ sprintf(reply, "211 %02X(%2.2s)=%08X\r\n", code, disRNameGPR[code], psxRegs.GPR.r[code]);
} else {
sprintf(reply, "511 Invalid GPR register: %X\r\n", code);
}
@@ -489,11 +500,11 @@ static void ProcessCommands() {
if (!arguments) {
reply[0] = 0;
for (i = 0; i < 32; i++) {
- sprintf(reply, "%s213 %02X=%08X\r\n", reply, i, psxRegs.CP0.r[i]);
+ sprintf(reply, "%s213 %02X(%8.8s)=%08X\r\n", reply, i, disRNameCP0[i], psxRegs.CP0.r[i]);
}
} else {
if ((code >= 0) && (code < 32)) {
- sprintf(reply, "213 %02X=%08X\r\n", code, psxRegs.CP0.r[code]);
+ sprintf(reply, "213 %02X(%8.8s)=%08X\r\n", code, disRNameCP0[code], psxRegs.CP0.r[code]);
} else {
sprintf(reply, "511 Invalid COP0 register: %X\r\n", code);
}
@@ -509,11 +520,11 @@ static void ProcessCommands() {
if (!arguments) {
reply[0] = 0;
for (i = 0; i < 32; i++) {
- sprintf(reply, "%s214 %02X=%08X\r\n", reply, i, psxRegs.CP2C.r[i]);
+ sprintf(reply, "%s214 %02X(%6.6s)=%08X\r\n", reply, i, disRNameCP2C[i], psxRegs.CP2C.r[i]);
}
} else {
if ((code >= 0) && (code < 32)) {
- sprintf(reply, "214 %02X=%08X\r\n", code, psxRegs.CP2C.r[code]);
+ sprintf(reply, "214 %02X(%6.6s)=%08X\r\n", code, disRNameCP2C[code], psxRegs.CP2C.r[code]);
} else {
sprintf(reply, "511 Invalid COP2C register: %X\r\n", code);
}
@@ -529,11 +540,11 @@ static void ProcessCommands() {
if (!arguments) {
reply[0] = 0;
for (i = 0; i < 32; i++) {
- sprintf(reply, "%s215 %02X=%08X\r\n", reply, i, psxRegs.CP2D.r[i]);
+ sprintf(reply, "%s215 %02X(%4.4s)=%08X\r\n", reply, i, disRNameCP2D[i], psxRegs.CP2D.r[i]);
}
} else {
if ((code >= 0) && (code < 32)) {
- sprintf(reply, "215 %02X=%08X\r\n", code, psxRegs.CP2D.r[code]);
+ sprintf(reply, "215 %02X(%4.4s)=%08X\r\n", code, disRNameCP2D[code], psxRegs.CP2D.r[code]);
} else {
sprintf(reply, "511 Invalid COP2D register: %X\r\n", code);
}
@@ -1045,6 +1056,16 @@ static void ProcessCommands() {
paused = 0;
sprintf(reply, "495 Tracing\r\n");
break;
+ case 0x396:
+ p = arguments;
+ if (arguments) {
+ printpc = strtol(arguments, &p, 10);
+ }
+ if (p == arguments) {
+ printpc = !printpc;
+ }
+ sprintf(reply, "496 Printing %s\r\n", printpc ? "enabled" : "disabled");
+ break;
case 0x398:
paused = 0;
trace = 0;
diff --git a/libpcsxcore/debug.h b/libpcsxcore/debug.h
index 0551a7f9..47c9cd7a 100755
--- a/libpcsxcore/debug.h
+++ b/libpcsxcore/debug.h
@@ -39,6 +39,9 @@ void DebugCheckBP(u32 address, enum breakpoint_types type);
void PauseDebugger();
void ResumeDebugger();
+extern char *disRNameGPR[];
+extern char *disRNameCP2D[];
+extern char *disRNameCP2C[];
extern char *disRNameCP0[];
char* disR3000AF(u32 code, u32 pc);
diff --git a/libpcsxcore/disr3000a.c b/libpcsxcore/disr3000a.c
index 2140008f..a403f0ff 100755
--- a/libpcsxcore/disr3000a.c
+++ b/libpcsxcore/disr3000a.c
@@ -26,19 +26,19 @@
char ostr[256];
// Names of registers
-static char *disRNameGPR[] = {
+char *disRNameGPR[] = {
"r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra"};
-static char *disRNameCP2D[] = {
+char *disRNameCP2D[] = {
"VXY0", "VZ0", "VXY1", "VZ1", "VXY2", "VZ2", "RGB", "OTZ",
"IR0", "IR1", "IR2", "IR3", "SXY0", "SXY1", "SXY2", "SXYP",
"SZ0", "SZ1", "SZ2", "SZ3", "RGB0", "RGB1", "RGB2", "RES1",
"MAC0", "MAC1", "MAC2", "MAC3", "IRGB", "ORGB", "LZCS", "LZCR"};
-static char *disRNameCP2C[] = {
+char *disRNameCP2C[] = {
"R11R12", "R13R21", "R22R23", "R31R32", "R33", "TRX", "TRY", "TRZ",
"L11L12", "L13L21", "L22L23", "L31L32", "L33", "RBK", "BBK", "GBK",
"LR1LR2", "LR3LG1", "LG2LG3", "LB1LB2", "LB3", "RFC", "GFC", "BFC",
generated by cgit v1.2.3 (git 2.39.1) at 2026-06-02 03:03:47 +0000