diff options
| author | SND\edgbla_cp <SND\edgbla_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97> | 2010-05-14 23:42:13 +0000 |
|---|---|---|
| committer | SND\edgbla_cp <SND\edgbla_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97> | 2010-05-14 23:42:13 +0000 |
| commit | f4ce286d13ff5faf21561f6ba126b8c31cb68c05 (patch) | |
| tree | 8174fa34d26b317e71a29aced1f316d843acc64d /libpcsxcore | |
| parent | c28a09fb48846a73db009bc4cea7c165e5939dc5 (diff) | |
| download | pcsxr-f4ce286d13ff5faf21561f6ba126b8c31cb68c05.tar.gz | |
spu dma was fixed.
Road Rash 3D, Syphon Filter 2, Twisted Metal: Small Browl, Thousand Arms...
git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@48088 e17a0e51-4ae3-4d35-97c3-1a29b211df97
Diffstat (limited to 'libpcsxcore')
| -rw-r--r-- | libpcsxcore/psxdma.c | 9 | ||||
| -rw-r--r-- | libpcsxcore/psxdma.h | 7 | ||||
| -rw-r--r-- | libpcsxcore/r3000a.c | 6 |
3 files changed, 20 insertions, 2 deletions
diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c index e5222be9..91dfea96 100644 --- a/libpcsxcore/psxdma.c +++ b/libpcsxcore/psxdma.c @@ -26,6 +26,11 @@ // Dma0/1 in Mdec.c // Dma3 in CdRom.c +void spuInterrupt() { + HW_DMA4_CHCR &= SWAP32(~0x01000000); + DMA_INTERRUPT(4); +} + void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU u16 *ptr; u32 size; @@ -43,7 +48,8 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU break; } SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2); - break; + SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2); + return; case 0x01000200: //spu to cpu transfer #ifdef PSXDMA_LOG @@ -108,7 +114,6 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU GPU_writeDataMem(ptr, size); GPUDMA_INT((size / 4)); return; -// break; case 0x01000401: // dma chain #ifdef PSXDMA_LOG diff --git a/libpcsxcore/psxdma.h b/libpcsxcore/psxdma.h index f4d11623..0db6533f 100644 --- a/libpcsxcore/psxdma.h +++ b/libpcsxcore/psxdma.h @@ -35,6 +35,12 @@ extern "C" { psxRegs.intCycle[3 + 24] = psxRegs.cycle; \ } +#define SPUDMA_INT(eCycle) { \ + psxRegs.interrupt |= 0x04000000; \ + psxRegs.intCycle[1 + 24 + 1] = eCycle; \ + psxRegs.intCycle[1 + 24] = psxRegs.cycle; \ +} + #define MDECOUTDMA_INT(eCycle) { \ psxRegs.interrupt |= 0x02000000; \ psxRegs.intCycle[5 + 24 + 1] = eCycle; \ @@ -46,6 +52,7 @@ void psxDma3(u32 madr, u32 bcr, u32 chcr); void psxDma4(u32 madr, u32 bcr, u32 chcr); void psxDma6(u32 madr, u32 bcr, u32 chcr); void gpuInterrupt(); +void spuInterrupt(); #ifdef __cplusplus } diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c index d8b3255a..b60f058d 100644 --- a/libpcsxcore/r3000a.c +++ b/libpcsxcore/r3000a.c @@ -145,6 +145,12 @@ void psxBranchTest() { mdec1Interrupt(); } } + if (psxRegs.interrupt & 0x04000000) { // spu dma + if ((psxRegs.cycle - psxRegs.intCycle[1+24]) >= psxRegs.intCycle[1+24+1]) { + psxRegs.interrupt&=~0x04000000; + spuInterrupt(); + } + } } if (psxHu32(0x1070) & psxHu32(0x1074)) { |