Change "valid" flag to multiple bit flags

Validity of a pgxp value can now be set for any of four components using individual bit flags. This also allows the potential expansion of more flag data for each component.

6 files changed, 76 insertions, 48 deletions

diff --git a/libpcsxcore/pgxp_cpu.c b/libpcsxcore/pgxp_cpu.c
index c9022046..7f15bd81 100644
--- a/libpcsxcore/pgxp_cpu.c
+++ b/libpcsxcore/pgxp_cpu.c
@@ -49,7 +49,7 @@ void InvalidLoad(u32 addr, u32 code, u32 value)
 		p.count = value;
 	}
 
-	p.valid = 0;
+	p.flags = 0;
 
 	// invalidate register
 	CPU_reg[reg] = p;
@@ -69,7 +69,7 @@ void InvalidStore(u32 addr, u32 code, u32 value)
 	if (pD)
 		p = *pD;
 
-	p.valid = 0;
+	p.flags = 0;
 	p.count = (reg * 1000) + value;
 
 	// invalidate memory
@@ -128,7 +128,7 @@ void PGXP_CPU_ANDI(u32 instr, u32 rtVal, u32 rsVal)
 		break;
 	default:
 		// x is undefined, invalidate value
-		CPU_reg[rt(instr)].valid = 0;
+		CPU_reg[rt(instr)].flags = 0;
 	}
 
 	CPU_reg[rt(instr)].value = rtVal;
@@ -142,7 +142,7 @@ void PGXP_CPU_ORI(u32 instr, u32 rtVal, u32 rsVal)
 
 	// Invalidate on non-zero values for now
 	if (imm(instr) != 0)
-		CPU_reg[rt(instr)].valid = 0;
+		CPU_reg[rt(instr)].flags = 0;
 
 	CPU_reg[rt(instr)].value = rtVal;
 }
@@ -155,7 +155,7 @@ void PGXP_CPU_XORI(u32 instr, u32 rtVal, u32 rsVal)
 
 	// Invalidate on non-zero values for now
 	if (imm(instr) != 0)
-		CPU_reg[rt(instr)].valid = 0;
+		CPU_reg[rt(instr)].flags = 0;
 
 	CPU_reg[rt(instr)].value = rtVal;
 }
@@ -210,7 +210,7 @@ void PGXP_CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -221,7 +221,7 @@ void PGXP_CPU_ADD(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	ret.x += CPU_reg[rt(instr)].x;
 	ret.y += CPU_reg[rt(instr)].y;
 
-	ret.valid &= CPU_reg[rt(instr)].valid;
+	ret.halfFlags[0] &= CPU_reg[rt(instr)].halfFlags[0];
 	ret.gFlags |= CPU_reg[rt(instr)].gFlags;
 	ret.lFlags |= CPU_reg[rt(instr)].lFlags;
 	ret.hFlags |= CPU_reg[rt(instr)].hFlags;
@@ -245,7 +245,7 @@ void PGXP_CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -256,7 +256,7 @@ void PGXP_CPU_SUB(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	ret.x -= CPU_reg[rt(instr)].x;
 	ret.y -= CPU_reg[rt(instr)].y;
 
-	ret.valid &= CPU_reg[rt(instr)].valid;
+	ret.halfFlags[0] &= CPU_reg[rt(instr)].halfFlags[0];
 	ret.gFlags |= CPU_reg[rt(instr)].gFlags;
 	ret.lFlags |= CPU_reg[rt(instr)].lFlags;
 	ret.hFlags |= CPU_reg[rt(instr)].hFlags;
@@ -282,7 +282,7 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -293,7 +293,7 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	valt.d = rtVal;
 
 	//	CPU_reg[rd(instr)].valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
-	ret.valid = 1;
+	ret.flags = VALID_01;
 
 	if (vald.w.l == 0)
 	{
@@ -304,17 +304,18 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	{
 		ret.x = CPU_reg[rs(instr)].x;
 		ret.lFlags = CPU_reg[rs(instr)].lFlags;
-		ret.valid &= CPU_reg[rs(instr)].valid;
+		ret.compFlags[0] = CPU_reg[rs(instr)].compFlags[0];
 	}
 	else if (vald.w.l == valt.w.l)
 	{
 		ret.x = CPU_reg[rt(instr)].x;
 		ret.lFlags = CPU_reg[rt(instr)].lFlags;
-		ret.valid &= CPU_reg[rt(instr)].valid;
+		ret.compFlags[0] = CPU_reg[rt(instr)].compFlags[0];
 	}
 	else
 	{
-		ret.valid = 0;
+		ret.x = (float)vald.sw.l;
+		ret.compFlags[0] = VALID;
 		ret.lFlags = 0;
 	}
 
@@ -327,23 +328,24 @@ void PGXP_CPU_AND(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	{
 		ret.y = CPU_reg[rs(instr)].y;
 		ret.hFlags = CPU_reg[rs(instr)].hFlags;
-		ret.valid &= CPU_reg[rs(instr)].valid;
+		ret.compFlags[1] &= CPU_reg[rs(instr)].compFlags[1];
 	}
 	else if (vald.w.h == valt.w.h)
 	{
 		ret.y = CPU_reg[rt(instr)].y;
 		ret.hFlags = CPU_reg[rt(instr)].hFlags;
-		ret.valid &= CPU_reg[rt(instr)].valid;
+		ret.compFlags[1] &= CPU_reg[rt(instr)].compFlags[1];
 	}
 	else
 	{
-		ret.valid = 0;
+		ret.y = (float)vald.sw.h;
+		ret.compFlags[1] = VALID;
 		ret.hFlags = 0;
 	}
 
 	// iCB Hack: Force validity if even one half is valid
-	if ((ret.hFlags & VALID_HALF) || (ret.lFlags & VALID_HALF))
-		ret.valid = 1;
+	//if ((ret.hFlags & VALID_HALF) || (ret.lFlags & VALID_HALF))
+	//	ret.valid = 1;
 	// /iCB Hack
 
 	ret.value = rdVal;
@@ -376,7 +378,7 @@ void PGXP_CPU_SLT(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -400,7 +402,7 @@ void PGXP_CPU_SLTU(u32 instr, u32 rdVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -425,7 +427,7 @@ void PGXP_CPU_MULT(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -437,7 +439,7 @@ void PGXP_CPU_MULT(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	CPU_Hi.x = vs * vt;// CPU_reg[rs(instr)].y * CPU_reg[rt(instr)].y;
 	CPU_Lo.y = (CPU_Hi.x - ((s32)CPU_Hi.x)) * (float)(1 << 16);// CPU_reg[rs(instr)].x * CPU_reg[rt(instr)].x; // Get fractional part
 
-	CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
+	CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
 
 	CPU_Lo.value = loVal;
 	CPU_Hi.value = hiVal;
@@ -450,7 +452,7 @@ void PGXP_CPU_MULTU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -462,7 +464,7 @@ void PGXP_CPU_MULTU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	CPU_Hi.x = vs * vt;// fabs(CPU_reg[rs(instr)].y) * fabs(CPU_reg[rt(instr)].y);
 	CPU_Lo.y = (CPU_Hi.x - ((s32)CPU_Hi.x)) * (float)(1 << 16);// fabs(CPU_reg[rs(instr)].x) * fabs(CPU_reg[rt(instr)].x);	// Get fractional part
 
-	CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
+	CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
 
 	CPU_Lo.value = loVal;
 	CPU_Hi.value = hiVal;
@@ -476,7 +478,7 @@ void PGXP_CPU_DIV(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	//// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -489,7 +491,7 @@ void PGXP_CPU_DIV(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	CPU_Hi.x = fmod(vs, vt);
 	CPU_Lo.x -= CPU_Hi.x;
 
-	CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
+	CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
 
 	CPU_Lo.value = loVal;
 	CPU_Hi.value = hiVal;
@@ -503,7 +505,7 @@ void PGXP_CPU_DIVU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	Validate(&CPU_reg[rt(instr)], rtVal);
 
 	//// iCB: Only require one valid input
-	if (!(CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid) && (CPU_reg[rs(instr)].valid || CPU_reg[rt(instr)].valid))
+	if (((CPU_reg[rt(instr)].flags & VALID_01) != VALID_01) != ((CPU_reg[rs(instr)].flags & VALID_01) != VALID_01))
 	{
 		MakeValid(&CPU_reg[rs(instr)], rsVal);
 		MakeValid(&CPU_reg[rt(instr)], rtVal);
@@ -516,7 +518,7 @@ void PGXP_CPU_DIVU(u32 instr, u32 hiVal, u32 loVal, u32 rsVal, u32 rtVal)
 	CPU_Hi.x = fmod(fabs(vs), fabs(vt));
 	CPU_Lo.x -= CPU_Hi.x;
 
-	CPU_Lo.valid = CPU_Hi.valid = CPU_reg[rs(instr)].valid && CPU_reg[rt(instr)].valid;
+	CPU_Lo.halfFlags[0] = CPU_Hi.halfFlags[0] = (CPU_reg[rs(instr)].halfFlags[0] & CPU_reg[rt(instr)].halfFlags[0]);
 
 	CPU_Lo.value = loVal;
 	CPU_Hi.value = hiVal;
@@ -760,7 +762,7 @@ void PGXP_CPU_SWR(u32 instr, u32 rtVal, u32 addr)
 void PGXP_CPU_SH(u32 instr, u16 rtVal, u32 addr)
 {
 	// validate and copy half value
-	MaskValidate(&CPU_reg[rt(instr)], rtVal, 0xFFFF);
+	MaskValidate(&CPU_reg[rt(instr)], rtVal, 0xFFFF, VALID_0);
 	WriteMem16(&CPU_reg[rt(instr)], addr);
 }
 
diff --git a/libpcsxcore/pgxp_debug.c b/libpcsxcore/pgxp_debug.c
index 724ed7a0..4bd1567e 100644
--- a/libpcsxcore/pgxp_debug.c
+++ b/libpcsxcore/pgxp_debug.c
@@ -299,20 +299,20 @@ void PrintOperands(char* szBuffer, u32 instr, u32 flags, const char* szDelim, ps
 
 			if (pReg)
 			{
-				sprintf(szTempBuffer, "%s %s [%x(%d, %d) %x(%.2f, %.2f, %.2f)%x : %x] ", szPre, szOpdName,
+				sprintf(szTempBuffer, "%s %s [%x(%d, %d) %x(%.2f, %.2f, %.2f)%x : %x:%x:%x:%x] ", szPre, szOpdName,
 					psx_reg.d, psx_reg.sw.l, psx_reg.sw.h,
-					pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->valid);
+					pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->compFlags[0], pReg->compFlags[1], pReg->compFlags[2], pReg->compFlags[3]);
 				strcat(szBuffer, szTempBuffer);
 			}
 			else if(flag == fOp_Ad)
 			{
 				pReg = GetPtr(psx_reg.d);
 				if(pReg)
-					sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) %x(%.2f, %.2f, %.2f)%x : %x] ", szPre, szOpdName,
+					sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) %x(%.2f, %.2f, %.2f)%x : %x:%x:%x:%x] ", szPre, szOpdName,
 						psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d),
-						pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->valid);
+						pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->compFlags[0], pReg->compFlags[1], pReg->compFlags[2], pReg->compFlags[3]);
 				else
-					sprintf(szTempBuffer, "%s %s [%x(%d, %d) INVALID_ADDRESS!] ", szPre, szOpdName,
+					sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) INVALID_ADDRESS!] ", szPre, szOpdName,
 						psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d));
 				strcat(szBuffer, szTempBuffer);
 			}
diff --git a/libpcsxcore/pgxp_gte.c b/libpcsxcore/pgxp_gte.c
index a52cc7e9..bc317ba0 100644
--- a/libpcsxcore/pgxp_gte.c
+++ b/libpcsxcore/pgxp_gte.c
@@ -83,7 +83,7 @@ void PGXP_pushSXYZ2f(float _x, float _y, float _z, unsigned int _v)
 	SXY2.y		= _y;

 	SXY2.z		= Config.PGXP_Texture ? _z : 1.f;

 	SXY2.value	= _v;

-	SXY2.valid	= 1;

+	SXY2.flags	= VALID_ALL;

 	SXY2.count	= uCount++;

 

 	// cache value in GPU plugin

@@ -94,7 +94,7 @@ void PGXP_pushSXYZ2f(float _x, float _y, float _z, unsigned int _v)
 		GPU_pgxpCacheVertex(0, 0, NULL);

 

 #ifdef GTE_LOG

-	GTE_LOG("PGXP_PUSH (%f, %f) %u %u|", SXY2.x, SXY2.y, SXY2.valid, SXY2.count);

+	GTE_LOG("PGXP_PUSH (%f, %f) %u %u|", SXY2.x, SXY2.y, SXY2.flags, SXY2.count);

 #endif

 }

 

@@ -179,7 +179,7 @@ void PGXP_RTPS(u32 _n, u32 _v)
 

 int PGXP_NLCIP_valid()

 {

-	if (SXY0.valid && SXY1.valid && SXY2.valid && Config.PGXP_GTE && (Config.PGXP_Mode > 0))

+	if (((SXY0.flags & SXY1.flags & SXY2.flags & VALID_01) == VALID_01) && Config.PGXP_GTE && (Config.PGXP_Mode > 0))

 		return 1;

 	return 0;

 }

diff --git a/libpcsxcore/pgxp_mem.c b/libpcsxcore/pgxp_mem.c
index c3fdc9eb..1613ebed 100644
--- a/libpcsxcore/pgxp_mem.c
+++ b/libpcsxcore/pgxp_mem.c
@@ -141,6 +141,7 @@ void ValidateAndCopyMem(PGXP_value* dest, u32 addr, u32 value)
 
 void ValidateAndCopyMem16(PGXP_value* dest, u32 addr, u32 value)
 {
+	u32 validMask = 0;
 	psx_value val, mask;
 	PGXP_value* pMem = GetPtr(addr);
 	if (pMem != NULL)
@@ -151,15 +152,17 @@ void ValidateAndCopyMem16(PGXP_value* dest, u32 addr, u32 value)
 		{
 			val.w.h = value;
 			mask.w.h = 0xFFFF;
+			validMask = VALID_1;
 		}
 		else
 		{
 			val.w.l = value;
 			mask.w.l = 0xFFFF;
+			validMask = VALID_0;
 		}
 
 		// validate and copy whole value
-		MaskValidate(pMem, val.d, mask.d);
+		MaskValidate(pMem, val.d, mask.d, validMask);
 		*dest = *pMem;
 
 		// if high word then shift
@@ -167,12 +170,14 @@ void ValidateAndCopyMem16(PGXP_value* dest, u32 addr, u32 value)
 		{
 			dest->x = dest->y;
 			dest->lFlags = dest->hFlags;
+			dest->compFlags[0] = dest->compFlags[1];
 		}
 
 		// truncate value
 		dest->y = 0.f;
 		dest->hFlags = 0;
 		dest->value = value;
+		dest->compFlags[1] = VALID;	// iCB: High word is valid, just 0
 		return;
 	}
 
@@ -200,16 +205,18 @@ void WriteMem16(PGXP_value* src, u32 addr)
 		{
 			dest->y = src->x;
 			dest->hFlags = src->lFlags;
+			dest->compFlags[1] = src->compFlags[0];
 			pVal->w.h = (u16)src->value;
 		}
 		else
 		{
 			dest->x = src->x;
 			dest->lFlags = src->lFlags;
+			dest->compFlags[0] = src->compFlags[0];
 			pVal->w.l = (u16)src->value;
 		}
 
-		dest->valid = dest->valid && src->valid;
+		//dest->valid = dest->valid && src->valid;
 		dest->gFlags |= src->gFlags;				// inherit flags from both values (?)
 	}
 }
diff --git a/libpcsxcore/pgxp_value.c b/libpcsxcore/pgxp_value.c
index 5d29097d..5c46a7d4 100644
--- a/libpcsxcore/pgxp_value.c
+++ b/libpcsxcore/pgxp_value.c
@@ -5,12 +5,12 @@ void MakeValid(PGXP_value *pV, u32 psxV)
 {
 	psx_value psx;
 	psx.d = psxV;
-	if (!pV->valid)
+	if (VALID_01 != (pV->flags & VALID_01))
 	{
 		pV->x = psx.sw.l;
 		pV->y = psx.sw.h;
 		pV->z = 1.f;
-		pV->valid = 1;
+		pV->flags |= VALID_ALL;
 		pV->value = psx.d;
 	}
 }
@@ -18,11 +18,11 @@ void MakeValid(PGXP_value *pV, u32 psxV)
 void Validate(PGXP_value *pV, u32 psxV)
 {
 	// assume pV is not NULL
-	pV->valid = (pV->valid) && (pV->value == psxV);
+	pV->flags &= pV->value == psxV ? ALL : INV_VALID_ALL;
 }
 
-void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask)
+void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask, u32 validMask)
 {
 	// assume pV is not NULL
-	pV->valid = (pV->valid) && ((pV->value & mask) == (psxV & mask));
+	pV->flags &= ((pV->value & mask) == (psxV & mask)) ? ALL : (ALL ^ (validMask));
 }
\ No newline at end of file
diff --git a/libpcsxcore/pgxp_value.h b/libpcsxcore/pgxp_value.h
index 4dad4d20..e92f5f4a 100644
--- a/libpcsxcore/pgxp_value.h
+++ b/libpcsxcore/pgxp_value.h
@@ -51,7 +51,12 @@ typedef struct PGXP_value_Tag
 	float			x;
 	float			y;
 	float			z;
-	unsigned int	valid;
+	union
+	{
+		unsigned int	flags;
+		unsigned char	compFlags[4];
+		unsigned short	halfFlags[2];
+	};
 	unsigned int	count;
 	unsigned int	value;
 
@@ -76,12 +81,26 @@ typedef enum
 	VALID_HALF = (1 << 0)
 } PGXP_half_flags;
 
+//typedef enum
+//{
+#define NONE	 0
+#define ALL		 0xFFFFFFFF
+#define VALID	 1
+#define VALID_0  (VALID << 0)
+#define VALID_1  (VALID << 8)
+#define VALID_2  (VALID << 16)
+#define VALID_3  (VALID << 24)
+#define VALID_01  (VALID_0 | VALID_1)
+#define VALID_ALL  (VALID_0 | VALID_1 | VALID_2 | VALID_3)
+#define INV_VALID_ALL  (ALL ^ VALID_ALL)
+//} PGXP_value_flags;
+
 static const PGXP_value PGXP_value_invalid_address = { 0.f, 0.f, 0.f, 0, 0, 0, INVALID_ADDRESS, 0, 0 };
-static const PGXP_value PGXP_value_zero = { 0.f, 0.f, 0.f, 0, 0, 1, 0, 0, 0 };
+static const PGXP_value PGXP_value_zero = { 0.f, 0.f, 0.f, 0, 0, VALID_ALL, 0, 0, 0 };
 
 void MakeValid(PGXP_value *pV, u32 psxV);
 void Validate(PGXP_value *pV, u32 psxV);
-void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask);
+void MaskValidate(PGXP_value *pV, u32 psxV, u32 mask, u32 validMask);
 
 
 typedef union