refactored the interrupt scheduling code a bit to make it a little more readable than using those "magic" numbers.

git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@55866 e17a0e51-4ae3-4d35-97c3-1a29b211df97

7 files changed, 71 insertions, 59 deletions

diff --git a/libpcsxcore/cdrom.c b/libpcsxcore/cdrom.c
index 92e4b7f2..27ea971e 100644
--- a/libpcsxcore/cdrom.c
+++ b/libpcsxcore/cdrom.c
@@ -92,14 +92,16 @@ static struct CdrStat stat;
 static struct SubQ *subq;
 
 #define CDR_INT(eCycle) { \
-	psxRegs.interrupt |= 0x4; \
-	psxRegs.intCycle[2 + 1] = eCycle; \
-	psxRegs.intCycle[2] = psxRegs.cycle; }
+	psxRegs.interrupt |= (1 << PSXINT_CDR); \
+	psxRegs.intCycle[PSXINT_CDR].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_CDR].sCycle = psxRegs.cycle; \
+}
 
 #define CDREAD_INT(eCycle) { \
-	psxRegs.interrupt |= 0x40000; \
-	psxRegs.intCycle[2 + 16 + 1] = eCycle; \
-	psxRegs.intCycle[2 + 16] = psxRegs.cycle; }
+	psxRegs.interrupt |= (1 << PSXINT_CDREAD); \
+	psxRegs.intCycle[PSXINT_CDREAD].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_CDREAD].sCycle = psxRegs.cycle; \
+}
 
 #define StartReading(type, eCycle) { \
    	cdr.Reading = type; \
@@ -111,7 +113,7 @@ static struct SubQ *subq;
 #define StopReading() { \
 	if (cdr.Reading) { \
 		cdr.Reading = 0; \
-		psxRegs.interrupt &= ~0x40000; \
+		psxRegs.interrupt &= ~(1 << PSXINT_CDREAD); \
 	} \
 	cdr.StatP &= ~0x20;\
 }
diff --git a/libpcsxcore/mdec.c b/libpcsxcore/mdec.c
index 5e84152a..f9b8d580 100644
--- a/libpcsxcore/mdec.c
+++ b/libpcsxcore/mdec.c
@@ -543,12 +543,11 @@ void mdec1Interrupt() {
 	if (HW_DMA1_CHCR & SWAP32(0x01000000)) {
 		// Set a fixed value totaly arbitrarie another sound value is
 		// PSXCLK / 60 or PSXCLK / 50 since the bug happened at end of frame.
-		// PSXCLK / 1000 seems good for FF9. (for FF9 need < ~28000)
+		// PSXCLK / 500 seems good for FF9.
 		// CAUTION: commented interrupt-handling may lead to problems, keep an eye ;-)
-		MDECOUTDMA_INT(PSXCLK / 1000 * BIAS);
-//		psxRegs.interrupt |= 0x02000000;
-//		psxRegs.intCycle[5 + 24 + 1] *= 8;
-//		psxRegs.intCycle[5 + 24] = psxRegs.cycle;
+		MDECOUTDMA_INT(PSXCLK / 500);
+//		MDECOUTDMA_INT(psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle * 8);
+
 		HW_DMA1_CHCR &= SWAP32(~0x01000000);
 		DMA_INTERRUPT(1);
 	} else {
diff --git a/libpcsxcore/misc.c b/libpcsxcore/misc.c
index ef492440..6d7b31dd 100644
--- a/libpcsxcore/misc.c
+++ b/libpcsxcore/misc.c
@@ -456,7 +456,7 @@ static const char PcsxHeader[32] = "STv4 PCSX v" PACKAGE_VERSION;
 
 // Savestate Versioning!
 // If you make changes to the savestate version, please increment the value below.
-static const u32 SaveVersion = 0x8b410004;
+static const u32 SaveVersion = 0x8b410005;
 
 int SaveState(const char *file) {
 	gzFile f;
diff --git a/libpcsxcore/psxdma.h b/libpcsxcore/psxdma.h
index 0db6533f..eb554334 100644
--- a/libpcsxcore/psxdma.h
+++ b/libpcsxcore/psxdma.h
@@ -30,21 +30,21 @@ extern "C" {
 #include "psxmem.h"
 
 #define GPUDMA_INT(eCycle) { \
-	psxRegs.interrupt |= 0x01000000; \
-	psxRegs.intCycle[3 + 24 + 1] = eCycle; \
-	psxRegs.intCycle[3 + 24] = psxRegs.cycle; \
+	psxRegs.interrupt |= (1 << PSXINT_GPUDMA); \
+	psxRegs.intCycle[PSXINT_GPUDMA].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_GPUDMA].sCycle = psxRegs.cycle; \
 }
 
 #define SPUDMA_INT(eCycle) { \
-    psxRegs.interrupt |= 0x04000000; \
-    psxRegs.intCycle[1 + 24 + 1] = eCycle; \
-    psxRegs.intCycle[1 + 24] = psxRegs.cycle; \
+	psxRegs.interrupt |= (1 << PSXINT_SPUDMA); \
+	psxRegs.intCycle[PSXINT_SPUDMA].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_SPUDMA].sCycle = psxRegs.cycle; \
 }
 
 #define MDECOUTDMA_INT(eCycle) { \
-	psxRegs.interrupt |= 0x02000000; \
-	psxRegs.intCycle[5 + 24 + 1] = eCycle; \
-	psxRegs.intCycle[5 + 24] = psxRegs.cycle; \
+	psxRegs.interrupt |= (1 << PSXINT_MDECOUTDMA); \
+	psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle = psxRegs.cycle; \
 }
 
 void psxDma2(u32 madr, u32 bcr, u32 chcr);
diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
index 8c6289e6..27c247bd 100644
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
@@ -115,39 +115,39 @@ void psxBranchTest() {
 		psxRcntUpdate();
 
 	if (psxRegs.interrupt) {
-		if ((psxRegs.interrupt & 0x80) && !Config.Sio) { // sio
-			if ((psxRegs.cycle - psxRegs.intCycle[7]) >= psxRegs.intCycle[7 + 1]) {
-				psxRegs.interrupt &= ~0x80;
+		if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 				sioInterrupt();
 			}
 		}
-		if (psxRegs.interrupt & 0x04) { // cdr
-			if ((psxRegs.cycle - psxRegs.intCycle[2]) >= psxRegs.intCycle[2 + 1]) {
-				psxRegs.interrupt &= ~0x04;
+		if (psxRegs.interrupt & (1 << PSXINT_CDR)) { // cdr
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDR].sCycle) >= psxRegs.intCycle[PSXINT_CDR].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_CDR);
 				cdrInterrupt();
 			}
 		}
-		if (psxRegs.interrupt & 0x040000) { // cdr read
-			if ((psxRegs.cycle - psxRegs.intCycle[2 + 16]) >= psxRegs.intCycle[2 + 16 + 1]) {
-				psxRegs.interrupt &= ~0x040000;
+		if (psxRegs.interrupt & (1 << PSXINT_CDREAD)) { // cdr read
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_CDREAD].sCycle) >= psxRegs.intCycle[PSXINT_CDREAD].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_CDREAD);
 				cdrReadInterrupt();
 			}
 		}
-		if (psxRegs.interrupt & 0x01000000) { // gpu dma
-			if ((psxRegs.cycle - psxRegs.intCycle[3 + 24]) >= psxRegs.intCycle[3 + 24 + 1]) {
-				psxRegs.interrupt &= ~0x01000000;
+		if (psxRegs.interrupt & (1 << PSXINT_GPUDMA)) { // gpu dma
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUDMA].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_GPUDMA);
 				gpuInterrupt();
 			}
 		}
-		if (psxRegs.interrupt & 0x02000000) { // mdec out dma
-			if ((psxRegs.cycle - psxRegs.intCycle[5 + 24]) >= psxRegs.intCycle[5 + 24 + 1]) {
-				psxRegs.interrupt &= ~0x02000000;
+		if (psxRegs.interrupt & (1 << PSXINT_MDECOUTDMA)) { // mdec out dma
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_MDECOUTDMA);
 				mdec1Interrupt();
 			}
 		}
-		if (psxRegs.interrupt & 0x04000000) { // spu dma
-			if ((psxRegs.cycle - psxRegs.intCycle[1 + 24]) >= psxRegs.intCycle[1 + 24 + 1]) {
-				psxRegs.interrupt &= ~0x04000000;
+		if (psxRegs.interrupt & (1 << PSXINT_SPUDMA)) { // spu dma
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPUDMA].sCycle) >= psxRegs.intCycle[PSXINT_SPUDMA].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_SPUDMA);
 				spuInterrupt();
 			}
 		}
diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index 51cd37cc..ca5d3eba 100644
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -145,6 +145,15 @@ typedef union {
 	PAIR p[32];
 } psxCP2Ctrl;
 
+enum {
+	PSXINT_SIO = 0,
+	PSXINT_CDR,
+	PSXINT_CDREAD,
+	PSXINT_GPUDMA,
+	PSXINT_MDECOUTDMA,
+	PSXINT_SPUDMA
+};
+
 typedef struct {
 	psxGPRRegs GPR;		/* General Purpose Registers */
 	psxCP0Regs CP0;		/* Coprocessor0 Registers */
@@ -154,7 +163,7 @@ typedef struct {
     u32 code;			/* The instruction */
 	u32 cycle;
 	u32 interrupt;
-	u32 intCycle[32];
+	struct { u32 sCycle, cycle; } intCycle[32];
 } psxRegisters;
 
 extern psxRegisters psxRegs;
diff --git a/libpcsxcore/sio.c b/libpcsxcore/sio.c
index 977c71d1..ab1f226d 100644
--- a/libpcsxcore/sio.c
+++ b/libpcsxcore/sio.c
@@ -65,23 +65,25 @@ static unsigned int padst;
 
 char Mcd1Data[MCD_SIZE], Mcd2Data[MCD_SIZE];
 
+#define SIO_INT(eCycle) { \
+	if (!Config.Sio) { \
+		psxRegs.interrupt |= (1 << PSXINT_SIO); \
+		psxRegs.intCycle[PSXINT_SIO].cycle = eCycle; \
+		psxRegs.intCycle[PSXINT_SIO].sCycle = psxRegs.cycle; \
+	} \
+}
+
 // clk cycle byte
 // 4us * 8bits = (PSXCLK / 1000000) * 32; (linuzappz)
 // TODO: add SioModePrescaler and BaudReg
-static inline void SIO_INT() {
-	if (!Config.Sio) {
-		psxRegs.interrupt |= 0x80;
-		psxRegs.intCycle[7 + 1] = 400;
-		psxRegs.intCycle[7] = psxRegs.cycle;
-	}
-}
+#define SIO_CYCLES		535
 
 void sioWrite8(unsigned char value) {
 #ifdef PAD_LOG
 	PAD_LOG("sio write8 %x\n", value);
 #endif
 	switch (padst) {
-		case 1: SIO_INT();
+		case 1: SIO_INT(SIO_CYCLES);
 			if ((value & 0x40) == 0x40) {
 				padst = 2; parp = 1;
 				if (!Config.UseNet) {
@@ -119,7 +121,7 @@ void sioWrite8(unsigned char value) {
 			parp++;
 /*			if (buf[1] == 0x45) {
 				buf[parp] = 0;
-				SIO_INT();
+				SIO_INT(SIO_CYCLES);
 				return;
 			}*/
 			if (!Config.UseNet) {
@@ -130,13 +132,13 @@ void sioWrite8(unsigned char value) {
 			}
 
 			if (parp == bufcount) { padst = 0; return; }
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 	}
 
 	switch (mcdst) {
 		case 1:
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			if (rdwr) { parp++; return; }
 			parp = 1;
 			switch (value) {
@@ -146,7 +148,7 @@ void sioWrite8(unsigned char value) {
 			}
 			return;
 		case 2: // address H
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			adrH = value;
 			*buf = 0;
 			parp = 0;
@@ -154,7 +156,7 @@ void sioWrite8(unsigned char value) {
 			mcdst = 3;
 			return;
 		case 3: // address L
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			adrL = value;
 			*buf = adrH;
 			parp = 0;
@@ -162,7 +164,7 @@ void sioWrite8(unsigned char value) {
 			mcdst = 4;
 			return;
 		case 4:
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			parp = 0;
 			switch (rdwr) {
 				case 1: // read
@@ -204,7 +206,7 @@ void sioWrite8(unsigned char value) {
 			if (rdwr == 2) {
 				if (parp < 128) buf[parp + 1] = value;
 			}
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 	}
 
@@ -252,7 +254,7 @@ void sioWrite8(unsigned char value) {
 			bufcount = 2;
 			parp = 0;
 			padst = 1;
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 		case 0x81: // start memcard
 			StatReg |= RX_RDY;
@@ -261,7 +263,7 @@ void sioWrite8(unsigned char value) {
 			bufcount = 3;
 			mcdst = 1;
 			rdwr = 0;
-			SIO_INT();
+			SIO_INT(SIO_CYCLES);
 			return;
 	}
 }
@@ -279,7 +281,7 @@ void sioWriteCtrl16(unsigned short value) {
 	if ((CtrlReg & SIO_RESET) || (!CtrlReg)) {
 		padst = 0; mcdst = 0; parp = 0;
 		StatReg = TX_RDY | TX_EMPTY;
-		psxRegs.interrupt &= ~0x80;
+		psxRegs.interrupt &= ~(1 << PSXINT_SIO);
 	}
 }