diff options
| author | SND\shalma_cp <SND\shalma_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97> | 2010-09-05 00:35:53 +0000 |
|---|---|---|
| committer | SND\shalma_cp <SND\shalma_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97> | 2010-09-05 00:35:53 +0000 |
| commit | 78e935a3e7ec856d50849b3e2a6df7949f56a634 (patch) | |
| tree | da95662359a570325828c0f59419b034546f1026 /libpcsxcore/r3000a.c | |
| parent | d492504ee69f77cf3111a7715ac228000b69a2de (diff) | |
| download | pcsxr-78e935a3e7ec856d50849b3e2a6df7949f56a634.tar.gz | |
Rebel Assault 2 needs longer DMA times (black screens in-game)
git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@56821 e17a0e51-4ae3-4d35-97c3-1a29b211df97
Diffstat (limited to 'libpcsxcore/r3000a.c')
| -rw-r--r-- | libpcsxcore/r3000a.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c index acc8eb60..550a17bb 100644 --- a/libpcsxcore/r3000a.c +++ b/libpcsxcore/r3000a.c @@ -114,7 +114,7 @@ void psxBranchTest() { if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter) psxRcntUpdate(); - if (psxRegs.interrupt) { + if (psxRegs.interrupt) {
if ((psxRegs.interrupt & (1 << PSXINT_SIO)) && !Config.Sio) { // sio if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SIO].sCycle) >= psxRegs.intCycle[PSXINT_SIO].cycle) { psxRegs.interrupt &= ~(1 << PSXINT_SIO); @@ -151,12 +151,26 @@ void psxBranchTest() { spuInterrupt(); } } - if (psxRegs.interrupt & (1 << PSXINT_GPUBUSY)) { // gpu busy - if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUBUSY].sCycle) >= psxRegs.intCycle[PSXINT_GPUBUSY].cycle) { - psxRegs.interrupt &= ~(1 << PSXINT_GPUBUSY); - GPU_idle(); - } - } + if (psxRegs.interrupt & (1 << PSXINT_GPUBUSY)) { // gpu busy + if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUBUSY].sCycle) >= psxRegs.intCycle[PSXINT_GPUBUSY].cycle) { + psxRegs.interrupt &= ~(1 << PSXINT_GPUBUSY); + GPU_idle(); + } + }
+ + if (psxRegs.interrupt & (1 << PSXINT_MDECINDMA)) { // mdec in
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_MDECINDMA].sCycle) >= psxRegs.intCycle[PSXINT_MDECINDMA].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_MDECINDMA);
+ mdec0Interrupt();
+ }
+ }
+
+ if (psxRegs.interrupt & (1 << PSXINT_GPUOTCDMA)) { // gpu otc
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle) >= psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_GPUOTCDMA);
+ gpuotcInterrupt();
+ }
+ }
} if (psxHu32(0x1070) & psxHu32(0x1074)) { |