summaryrefslogtreecommitdiff
path: root/libpcsxcore/psxmem.c
diff options
context:
space:
mode:
authorSND\dario86_cp <SND\dario86_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97>2011-03-12 18:54:28 +0000
committerSND\dario86_cp <SND\dario86_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97>2011-03-12 18:54:28 +0000
commita58cfdac407bc1d8fedc11acd924b275ba28cc51 (patch)
treeb4c2e08c34ef1bfe0ba947ef8eed931c9a43fc0e /libpcsxcore/psxmem.c
parent9bdd06684bcc627c06ddcf4c406f6b48f0dfe389 (diff)
downloadpcsxr-a58cfdac407bc1d8fedc11acd924b275ba28cc51.tar.gz
Commited patch in issue #8171 (by darktjm).
git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@64524 e17a0e51-4ae3-4d35-97c3-1a29b211df97
Diffstat (limited to 'libpcsxcore/psxmem.c')
-rw-r--r--libpcsxcore/psxmem.c28
1 files changed, 13 insertions, 15 deletions
diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
index ba3f8a19..28e25e1e 100644
--- a/libpcsxcore/psxmem.c
+++ b/libpcsxcore/psxmem.c
@@ -31,9 +31,9 @@
#endif
s8 *psxM = NULL; // Kernel & User Memory (2 Meg)
-s8 *psxP = NULL; // Parallel Port (64K)
s8 *psxR = NULL; // BIOS ROM (512K)
-s8 *psxH = NULL; // Scratch Pad (1K) & Hardware Registers (8K)
+// Parallel Port (64K) is attached to psxM
+// Scratch Pad (1K) & Hardware Registers (8K) are attached to psxM
u8 **psxMemWLUT = NULL;
u8 **psxMemRLUT = NULL;
@@ -65,13 +65,10 @@ int psxMemInit() {
memset(psxMemRLUT, 0, 0x10000 * sizeof(void *));
memset(psxMemWLUT, 0, 0x10000 * sizeof(void *));
- psxM = mmap(0, 0x00220000,
+ psxM = mmap(0, PSXM_SIZE + PSXP_SIZE + PSXH_SIZE,
PROT_WRITE | PROT_READ, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
- psxP = &psxM[0x200000];
- psxH = &psxM[0x210000];
-
- psxR = (s8 *)malloc(0x00080000);
+ psxR = (s8 *)malloc(PSXR_SIZE);
if (psxMemRLUT == NULL || psxMemWLUT == NULL ||
psxM == NULL || psxP == NULL || psxH == NULL) {
@@ -109,8 +106,8 @@ void psxMemReset() {
FILE *f = NULL;
char bios[1024];
- memset(psxM, 0, 0x00200000);
- memset(psxP, 0, 0x00010000);
+ memset(psxM, 0, PSXM_SIZE);
+ memset(psxP, 0, PSXP_SIZE);
// Load BIOS
if (strcmp(Config.Bios, "HLE") != 0) {
@@ -119,10 +116,11 @@ void psxMemReset() {
if (f == NULL) {
SysMessage(_("Could not open BIOS:\"%s\". Enabling HLE Bios!\n"), bios);
- memset(psxR, 0, 0x80000);
+ memset(psxR, 0, PSXR_SIZE);
Config.HLE = TRUE;
} else {
- fread(psxR, 1, 0x80000, f);
+ if(fread(psxR, PSXR_SIZE, 1, f) != 1)
+ perror(bios);
fclose(f);
Config.HLE = FALSE;
}
@@ -130,7 +128,7 @@ void psxMemReset() {
}
void psxMemShutdown() {
- munmap(psxM, 0x00220000);
+ munmap(psxM, PSXM_SIZE + PSXP_SIZE + PSXH_SIZE);
free(psxR);
free(psxMemRLUT);
@@ -325,15 +323,15 @@ void psxMemWrite32(u32 mem, u32 value) {
} else {
int i;
- // a0-44: used for cache flushing
+ // a0-44: used for cache flushing
switch (value) {
case 0x800: case 0x804:
if (writeok == 0) break;
writeok = 0;
memset(psxMemWLUT + 0x0000, 0, 0x80 * sizeof(void *));
memset(psxMemWLUT + 0x8000, 0, 0x80 * sizeof(void *));
- memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(void *));
-
+ memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(void *));
+
psxRegs.ICache_valid = 0;
break;
case 0x00: case 0x1e988: