Updated Free Software Foundation address (Jem256).

git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@75156 e17a0e51-4ae3-4d35-97c3-1a29b211df97

1 files changed, 25 insertions, 25 deletions

diff --git a/libpcsxcore/psxdma.h b/libpcsxcore/psxdma.h
index 63618ada..fdd5cf99 100644
--- a/libpcsxcore/psxdma.h
+++ b/libpcsxcore/psxdma.h
@@ -14,7 +14,7 @@
  *   You should have received a copy of the GNU General Public License     *
  *   along with this program; if not, write to the                         *
  *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
+ *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
 #ifndef __PSXDMA_H__
@@ -47,35 +47,35 @@ extern "C" {
 	psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle = psxRegs.cycle; \
 }
 
-#define MDECINDMA_INT(eCycle) { \

-	psxRegs.interrupt |= (1 << PSXINT_MDECINDMA); \

-	psxRegs.intCycle[PSXINT_MDECINDMA].cycle = eCycle; \

-	psxRegs.intCycle[PSXINT_MDECINDMA].sCycle = psxRegs.cycle; \

-}

-

-#define GPUOTCDMA_INT(eCycle) { \

-	psxRegs.interrupt |= (1 << PSXINT_GPUOTCDMA); \

-	psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle = eCycle; \

-	psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle = psxRegs.cycle; \

-}

-

-#define CDRDMA_INT(eCycle) { \

-	psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \

-	psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \

-	psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \

-}

-

-/*

-DMA5 = N/A (PIO)

-*/

+#define MDECINDMA_INT(eCycle) { \
+	psxRegs.interrupt |= (1 << PSXINT_MDECINDMA); \
+	psxRegs.intCycle[PSXINT_MDECINDMA].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_MDECINDMA].sCycle = psxRegs.cycle; \
+}
+
+#define GPUOTCDMA_INT(eCycle) { \
+	psxRegs.interrupt |= (1 << PSXINT_GPUOTCDMA); \
+	psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle = psxRegs.cycle; \
+}
+
+#define CDRDMA_INT(eCycle) { \
+	psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \
+	psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \
+	psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \
+}
+
+/*
+DMA5 = N/A (PIO)
+*/
 
 void psxDma3(u32 madr, u32 bcr, u32 chcr);
 void psxDma4(u32 madr, u32 bcr, u32 chcr);
 void psxDma6(u32 madr, u32 bcr, u32 chcr);
 void spuInterrupt();
-void mdec0Interrupt();

-void gpuotcInterrupt();

-void cdrDmaInterrupt();

+void mdec0Interrupt();
+void gpuotcInterrupt();
+void cdrDmaInterrupt();
 
 #ifdef __cplusplus
 }