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authorXavier Del Campo Romero <xavi92@disroot.org>2025-11-06 21:31:05 +0100
committerXavier Del Campo Romero <xavi92@disroot.org>2025-11-06 21:31:05 +0100
commitc33a13fba8a0674fcc2d835021cc37f6cfe3d8fa (patch)
tree635df4c656f2fdf5bf9b5951b91f2adaeb3ea4ab /src/op
parent6d9d80362f9932bbc87e162b8ef7df06c73e27e1 (diff)
downloadnanowasm-c33a13fba8a0674fcc2d835021cc37f6cfe3d8fa.tar.gz
Add i32_store8
Diffstat (limited to 'src/op')
-rw-r--r--src/op/CMakeLists.txt1
-rw-r--r--src/op/i32_store8.c90
2 files changed, 91 insertions, 0 deletions
diff --git a/src/op/CMakeLists.txt b/src/op/CMakeLists.txt
index 53036f0..d537327 100644
--- a/src/op/CMakeLists.txt
+++ b/src/op/CMakeLists.txt
@@ -29,6 +29,7 @@ target_sources(${PROJECT_NAME} PRIVATE
i32_ne.c
i32_or.c
i32_store.c
+ i32_store8.c
i32_sub.c
i64_const.c
i64_store.c
diff --git a/src/op/i32_store8.c b/src/op/i32_store8.c
new file mode 100644
index 0000000..ea125bf
--- /dev/null
+++ b/src/op/i32_store8.c
@@ -0,0 +1,90 @@
+/*
+ * nanowasm, a tiny WebAssembly/Wasm interpreter
+ * Copyright (C) 2023-2025 Xavier Del Campo Romero
+ *
+ * This Source Code Form is subject to the terms of the Mozilla Public
+ * License, v. 2.0. If a copy of the MPL was not distributed with this
+ * file, You can obtain one at https://mozilla.org/MPL/2.0/.
+ */
+
+#include <nanowasm/nw.h>
+#include <nw/linear.h>
+#include <nw/io.h>
+#include <nw/interp.h>
+#include <nw/stack.h>
+#include <nw/log.h>
+#include <nw/ops.h>
+#include <nw/routines.h>
+
+static enum nw_state store(struct nw_interp *const i)
+{
+ struct nw_i_sm_store *const s = &i->sm.store;
+ const enum nw_state n = nwp_linear_store(i, &s->io, s->addr + s->imm.offset);
+
+ if (n)
+ return n;
+
+ nwp_interp_resume(i);
+ return NW_AGAIN;
+}
+
+static enum nw_state pop_addr(struct nw_interp *const i)
+{
+ struct nw_i_sm_store *const s = &i->sm.store;
+ const enum nw_state n = nwp_stack_pop(i, &s->io);
+
+ if (n)
+ return n;
+ else
+ {
+ struct nw_sm_io io = {0};
+
+ io.buf = &s->value.i8;
+ io.n = sizeof s->value.i8;
+ s->io = io;
+ i->next = store;
+ }
+
+ return NW_AGAIN;
+}
+
+static enum nw_state pop_value(struct nw_interp *const i)
+{
+ struct nw_i_sm_store *const s = &i->sm.store;
+ const enum nw_state n = nwp_stack_pop(i, &s->io);
+
+ if (n)
+ return n;
+ else
+ {
+ const struct nw_sm_io io = {0};
+
+ s->value.i8 = nwp_leuint32(&s->value.v32);
+ s->io = io;
+ s->io.buf = &s->addr;
+ s->io.n = sizeof s->addr;
+ i->next = pop_addr;
+ }
+
+ return NW_AGAIN;
+}
+
+static void prepare(struct nw_interp *const i)
+{
+ const struct nw_i_sm_store s = {0};
+ struct nw_i_sm_store *const ps = &i->sm.store;
+ struct nw_sm_io *const io = &ps->io;
+ struct nw_i_sm_imm_out out;
+
+ out = i->sm.imm.out;
+ *ps = s;
+ ps->imm = out;
+ io->buf = &ps->value.i32;
+ io->n = sizeof ps->value.i32;
+ i->next = pop_value;
+}
+
+void nwp_op_i32_store8(struct nw_interp *const i)
+{
+ nwp_mem_imm(i, prepare);
+}