initial releasecm-13.0

74 files changed, 16020 insertions, 0 deletions

diff --git a/kernel-headers/bits_api.h b/kernel-headers/bits_api.h
new file mode 100644
index 0000000..845b6d1
--- /dev/null
+++ b/kernel-headers/bits_api.h
@@ -0,0 +1,314 @@
+#ifndef _BITS_API_H_
+#define _BITS_API_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_public.h"
+#include "hal_api.h"
+
+typedef VAL_UINT32_T(*fgPrepare32FN)(VAL_HANDLE_T * a_phBitsHandle);
+
+/**
+ * @par Structure
+ *  VBITS_HANDLE_T
+ * @par Description
+ *  This is a parameter for bitstream parsing utility related function
+ */
+typedef struct __VBITS_HANDLE_T {
+	VAL_HANDLE_T    hHALHandle;                             /* /< HAL Handle */
+	VAL_HANDLE_T    hVALHandle;                             /* /< VAL Handle */
+	VAL_MEM_ADDR_T  BitsStart;                              /* /< Bits Start */
+	VAL_MEMORY_T    rHandleMem;                             /* /< Handle memory */
+	VAL_UINT32_T    nReadingMode;                           /* /< 0 for software, 1 for mmap, 2 for hardware */
+	VAL_ULONG_T     StartAddr;                              /* /< used for software mode fast access */
+	VAL_ULONG_T     nSize;                                  /* /< Size */
+	VAL_UINT32_T    nBitCnt;                                /* /< bits count */
+	VAL_UINT32_T    nZeroCnt;                               /* /< zero count */
+	VAL_UINT32_T    Cur32Bits;                              /* /< current 32 bits */
+	VAL_UINT32_T    CurBitCnt;                              /* /< current bits count */
+	VAL_UINT32_T    n03RemoveCount;                         /* /< 03 Remove Count */
+	VAL_UINT32_T    n03CountBit;                            /* /< 03 Count Bit */
+	VAL_INT32_T     n03FirstIndex;                          /* /< 03 First Index */
+	VAL_INT32_T     n03SecondIndex;                         /* /< 03 Second Index */
+	VAL_UINT32_T    n03RemoveIgnore;                        /* /< 03 Remove Ignore */
+	VAL_BOOL_T      bFirstCheck;                            /* /< First Check */
+	VAL_BOOL_T      bEverRemove;                            /* /< Ever Remove */
+	VAL_BOOL_T      bIgnoreByBS;                            /* /< Ignore By BS */
+	VAL_BOOL_T      bEOF;                                   /* /< EOF */
+	fgPrepare32FN   Prepare32Bits;                          /* /< Prepare 32 Bits */
+	VAL_DRIVER_TYPE_T vFormat;                              /* /< Format */
+	VAL_UINT32_T    value;                                  /* /< value */
+} VBITS_HANDLE_T;
+
+
+/**
+ * @par Enumeration
+ *   VBITS_READTYPE_T
+ * @par Description
+ *   This is the item used for bits read type
+ */
+typedef enum VBITS_READTYPE_T {
+	VBITS_SOFTWARE = 0,         /* /< software */
+	VBITS_MMAP,                 /* /< mmap */
+	VBITS_HARDWARE,             /* /< hardware */
+	VBITS_MAX                   /* /< MAX value */
+} VBITS_READTYPE_T;
+/*=============================================================================
+ *                             Function Declaration
+ *===========================================================================*/
+
+
+/**
+ * @par Function
+ *   eBufEnable
+ * @par Description
+ *   The hal init & HW enable function
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   hHALHandle         [IN/OUT] The hal handle
+ * @param
+ *   nMode              [IN] VBITS_READTYPE_T
+ * @param
+ *   vFormat            [IN] VAL_DRIVER_TYPE_T
+ * @par Returns
+ *   VAL_UINT32_T, return VAL_RESULT_NO_ERROR if success, return VAL_RESULT_UNKNOWN_ERROR if failed
+ */
+VAL_UINT32_T eBufEnable(
+	VAL_HANDLE_T *a_phBitsHandle,
+	VAL_HANDLE_T hHALHandle,
+	VAL_UINT32_T nMode,
+	VAL_DRIVER_TYPE_T vFormat
+);
+
+
+/**
+ * @par Function
+ *   eBufEnable
+ * @par Description
+ *   The HW disable function
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   hHALHandle         [IN/OUT] The hal handle
+ * @param
+ *   nMode              [IN] VBITS_READTYPE_T
+ * @param
+ *   vFormat            [IN] VAL_DRIVER_TYPE_T
+ * @par Returns
+ *   VAL_UINT32_T, return VAL_RESULT_NO_ERROR if success, return VAL_RESULT_UNKNOWN_ERROR if failed
+ */
+VAL_UINT32_T eBufDisable(
+	VAL_HANDLE_T *a_phBitsHandle,
+	VAL_HANDLE_T hHALHandle,
+	VAL_UINT32_T nMode,
+	VAL_DRIVER_TYPE_T vFormat
+);
+
+
+/**
+ * @par Function
+ *   eBufInit
+ * @par Description
+ *   The common init function
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   hVALHandle         [IN/OUT] The val handle
+ * @param
+ *   hHALHandle         [IN/OUT] The hal handle
+ * @param
+ *   rBufAddrStart      [IN] The buffer start address
+ * @param
+ *   nMode              [IN] VBITS_READTYPE_T
+ * @param
+ *   vFormat            [IN] VAL_DRIVER_TYPE_T
+ * @par Returns
+ *   VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return others if failed
+ */
+VAL_RESULT_T eBufInit(
+	VAL_HANDLE_T *a_phBitsHandle,
+	VAL_HANDLE_T hVALHandle,
+	VAL_HANDLE_T hHALHandle,
+	VAL_MEM_ADDR_T rBufAddrStart,
+	VAL_UINT32_T nMode,
+	VAL_DRIVER_TYPE_T vFormat
+);
+
+
+/**
+ * @par Function
+ *   eBufDeinit
+ * @par Description
+ *   The common deinit function
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return others if failed
+ */
+VAL_RESULT_T eBufDeinit(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   eBufGetBitCnt
+ * @par Description
+ *   The function is used to get current bit count
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_UINT32_T, return current bit count
+ */
+VAL_UINT32_T eBufGetBitCnt(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   eBufGetBits
+ * @par Description
+ *   The function is used to get current bits by numBits
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   numBits            [IN] The number bits
+ * @par Returns
+ *   VAL_UINT32_T, return current bits by numBits
+ */
+VAL_UINT32_T eBufGetBits(VAL_HANDLE_T *a_phBitsHandle, VAL_UINT32_T numBits);
+
+
+/**
+ * @par Function
+ *   eBufNextBits
+ * @par Description
+ *   The function is used to show current bits by numBits
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   numBits            [IN] The number bits
+ * @par Returns
+ *   VAL_UINT32_T, return current bits by numBits
+ */
+VAL_UINT32_T eBufNextBits(VAL_HANDLE_T *a_phBitsHandle, VAL_UINT32_T numBits);
+
+
+/**
+ * @par Function
+ *   eBufGetUEGolomb
+ * @par Description
+ *   The function is used to get unsigned EGolomb bits
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_UINT32_T, return current unsigned EGolomb bits
+ */
+VAL_UINT32_T eBufGetUEGolomb(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   eBufGetSEGolomb
+ * @par Description
+ *   The function is used to get signed EGolomb bits
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_INT32_T, return current signed EGolomb bits
+ */
+VAL_INT32_T  eBufGetSEGolomb(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   eBufCheckEOF
+ * @par Description
+ *   The function is used to check EOF bitstream
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_BOOL_T, return EOF or not
+ */
+VAL_BOOL_T   eBufCheckEOF(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   eBufGetBufSize
+ * @par Description
+ *   The function is used to get buffer size
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_BOOL_T, return buffer size
+ */
+VAL_UINT32_T eBufGetBufSize(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   NextBytesAlignment
+ * @par Description
+ *   The function is used to jump bitstream pointer to next bytesalignment
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   nBytesAlignment    [IN] BytesAlignment
+ * @par Returns
+ *   void
+ */
+void NextBytesAlignment(VAL_HANDLE_T *a_phBitsHandle, VAL_UINT32_T nBytesAlignment);
+
+
+/**
+ * @par Function
+ *   eBufInitBS
+ * @par Description
+ *   The function is used to init bit stream
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   cmd_queue          [IN] command queue
+ * @param
+ *   pIndex             [IN] command queue index
+ * @par Returns
+ *   VAL_BOOL_T, return VAL_TRUE if success, return VAL_FALSE if failed
+ */
+VAL_BOOL_T   eBufInitBS(VAL_HANDLE_T *a_phBitsHandle, P_VCODEC_DRV_CMD_T cmd_queue, VAL_UINT32_T *pIndex);
+
+
+/**
+ * @par Function
+ *   eBufGetPAddr
+ * @par Description
+ *   The function is used to get physical address
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @par Returns
+ *   VAL_UINT32_T, return physical address
+ */
+VAL_UINT32_T eBufGetPAddr(VAL_HANDLE_T *a_phBitsHandle);
+
+
+/**
+ * @par Function
+ *   eBufGetPAddr
+ * @par Description
+ *   The function is used to re init
+ * @param
+ *   a_phBitsHandle     [IN/OUT] The bits handle
+ * @param
+ *   nBytes             [IN] The Bytes
+ * @param
+ *   nBits              [IN] The Bits
+ * @par Returns
+ *   VAL_BOOL_T, return VAL_TRUE if success, return VAL_FALSE if failed
+ */
+VAL_BOOL_T eBufReInite(VAL_HANDLE_T *a_phBitsHandle, VAL_UINT32_T nBytes, VAL_UINT32_T nBits);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_API_H_ */
diff --git a/kernel-headers/cmdq_def.h b/kernel-headers/cmdq_def.h
new file mode 100644
index 0000000..3bc347f
--- /dev/null
+++ b/kernel-headers/cmdq_def.h
@@ -0,0 +1,317 @@
+#ifndef __CMDQ_DEF_H__
+#define __CMDQ_DEF_H__
+
+#include <linux/kernel.h>
+
+#define CMDQ_DRIVER_DEVICE_NAME         "mtk_cmdq"
+
+/* Load HW event from device tree */
+#define CMDQ_DVENT_FROM_DTS
+
+/* #define CMDQ_COMMON_ENG_SUPPORT */
+#ifdef CMDQ_COMMON_ENG_SUPPORT
+#include "cmdq_engine_common.h"
+#else
+#include "cmdq_engine.h"
+#endif
+
+#define CMDQ_SPECIAL_SUBSYS_ADDR (99)
+
+#define CMDQ_GPR_SUPPORT
+#define CMDQ_PROFILE_MARKER_SUPPORT
+
+#ifdef CMDQ_PROFILE_MARKER_SUPPORT
+#define CMDQ_MAX_PROFILE_MARKER_IN_TASK (5)
+#endif
+
+#define CMDQ_INVALID_THREAD             (-1)
+
+#define CMDQ_MAX_THREAD_COUNT           (16)
+#define CMDQ_MAX_TASK_IN_THREAD         (16)
+#define CMDQ_MAX_READ_SLOT_COUNT        (4)
+#define CMDQ_INIT_FREE_TASK_COUNT       (8)
+
+#define CMDQ_MAX_HIGH_PRIORITY_THREAD_COUNT (7)	/* Thread that are high-priority (display threads) */
+#define CMDQ_MIN_SECURE_THREAD_ID		(12)
+#define CMDQ_MAX_SECURE_THREAD_COUNT	(3)
+typedef enum CMDQ_SCENARIO_ENUM {
+	CMDQ_SCENARIO_JPEG_DEC = 0,
+	CMDQ_SCENARIO_PRIMARY_DISP = 1,
+	CMDQ_SCENARIO_PRIMARY_MEMOUT = 2,
+	CMDQ_SCENARIO_PRIMARY_ALL = 3,
+	CMDQ_SCENARIO_SUB_DISP = 4,
+	CMDQ_SCENARIO_SUB_MEMOUT = 5,
+	CMDQ_SCENARIO_SUB_ALL = 6,
+	CMDQ_SCENARIO_MHL_DISP = 7,
+	CMDQ_SCENARIO_RDMA0_DISP = 8,
+	CMDQ_SCENARIO_RDMA0_COLOR0_DISP = 9,
+	CMDQ_SCENARIO_RDMA1_DISP = 10,
+
+	/* Trigger loop scenario does not enable HWs */
+	CMDQ_SCENARIO_TRIGGER_LOOP = 11,
+
+	/* client from user space, so the cmd buffer is in user space. */
+	CMDQ_SCENARIO_USER_MDP = 12,
+
+	CMDQ_SCENARIO_DEBUG = 13,
+	CMDQ_SCENARIO_DEBUG_PREFETCH = 14,
+
+	/* ESD check */
+	CMDQ_SCENARIO_DISP_ESD_CHECK = 15,
+	/* for screen capture to wait for RDMA-done without blocking config thread */
+	CMDQ_SCENARIO_DISP_SCREEN_CAPTURE = 16,
+
+	/* notifiy there are some tasks exec done in secure path */
+	CMDQ_SCENARIO_SECURE_NOTIFY_LOOP = 17,
+
+	CMDQ_SCENARIO_DISP_PRIMARY_DISABLE_SECURE_PATH = 18,
+	CMDQ_SCENARIO_DISP_SUB_DISABLE_SECURE_PATH = 19,
+
+	/* color path request from kernel */
+	CMDQ_SCENARIO_DISP_COLOR = 20,
+	/* color path request from user sapce */
+	CMDQ_SCENARIO_USER_DISP_COLOR = 21,
+
+	/* [phased out]client from user space, so the cmd buffer is in user space. */
+	CMDQ_SCENARIO_USER_SPACE = 22,
+
+	CMDQ_SCENARIO_DISP_MIRROR_MODE = 23,
+
+	CMDQ_SCENARIO_DISP_CONFIG_AAL = 24,
+	CMDQ_SCENARIO_DISP_CONFIG_PRIMARY_GAMMA = 25,
+	CMDQ_SCENARIO_DISP_CONFIG_SUB_GAMMA = 26,
+	CMDQ_SCENARIO_DISP_CONFIG_PRIMARY_DITHER = 27,
+	CMDQ_SCENARIO_DISP_CONFIG_SUB_DITHER = 28,
+	CMDQ_SCENARIO_DISP_CONFIG_PRIMARY_PWM = 29,
+	CMDQ_SCENARIO_DISP_CONFIG_SUB_PWM = 30,
+	CMDQ_SCENARIO_DISP_CONFIG_PRIMARY_PQ = 31,
+	CMDQ_SCENARIO_DISP_CONFIG_SUB_PQ = 32,
+	CMDQ_SCENARIO_DISP_CONFIG_OD = 33,
+
+	CMDQ_SCENARIO_RDMA2_DISP = 34,
+
+	CMDQ_SCENARIO_HIGHP_TRIGGER_LOOP = 35,	/* for primary trigger loop enable pre-fetch usage */
+	CMDQ_SCENARIO_LOWP_TRIGGER_LOOP = 36,	/* for low priority monitor loop to polling bus status*/
+
+	CMDQ_SCENARIO_KERNEL_CONFIG_GENERAL = 37,
+
+	CMDQ_MAX_SCENARIO_COUNT	/* ALWAYS keep at the end */
+} CMDQ_SCENARIO_ENUM;
+
+typedef enum CMDQ_DATA_REGISTER_ENUM {
+	/* Value Reg, we use 32-bit */
+	/* Address Reg, we use 64-bit */
+	/* Note that R0-R15 and P0-P7 actullay share same memory */
+	/* and R1 cannot be used. */
+
+	CMDQ_DATA_REG_JPEG = 0x00,	/* R0 */
+	CMDQ_DATA_REG_JPEG_DST = 0x11,	/* P1 */
+
+	CMDQ_DATA_REG_PQ_COLOR = 0x04,	/* R4 */
+	CMDQ_DATA_REG_PQ_COLOR_DST = 0x13,	/* P3 */
+
+	CMDQ_DATA_REG_2D_SHARPNESS_0 = 0x05,	/* R5 */
+	CMDQ_DATA_REG_2D_SHARPNESS_0_DST = 0x14,	/* P4 */
+
+	CMDQ_DATA_REG_2D_SHARPNESS_1 = 0x0a,	/* R10 */
+	CMDQ_DATA_REG_2D_SHARPNESS_1_DST = 0x16,	/* P6 */
+
+	CMDQ_DATA_REG_DEBUG = 0x0b,	/* R11 */
+	CMDQ_DATA_REG_DEBUG_DST = 0x17,	/* P7 */
+
+	/* sentinel value for invalid register ID */
+	CMDQ_DATA_REG_INVALID = -1,
+} CMDQ_DATA_REGISTER_ENUM;
+
+typedef enum CMDQ_MDP_PA_BASE_ENUM {
+	CMDQ_MDP_PA_BASE_MM_MUTEX,
+	CMDQ_MAX_MDP_PA_BASE_COUNT,		/* ALWAYS keep at the end */
+} CMDQ_MDP_PA_BASE_ENUM;
+
+/* CMDQ Events */
+#undef DECLARE_CMDQ_EVENT
+#ifdef CMDQ_DVENT_FROM_DTS
+#define DECLARE_CMDQ_EVENT(name_struct, val, dts_name) name_struct = val,
+typedef enum CMDQ_EVENT_ENUM {
+#include "cmdq_event_common.h"
+} CMDQ_EVENT_ENUM;
+#else
+#define DECLARE_CMDQ_EVENT(name_struct, val) name_struct = val,
+typedef enum CMDQ_EVENT_ENUM {
+#if CMDQ_D1_EVENT
+#include "cmdq_event_D1.h"
+#elif CMDQ_D2_EVENT
+#include "cmdq_event_D2.h"
+#elif CMDQ_D3_EVENT
+#include "cmdq_event_D3.h"
+#else
+#include "cmdq_event.h"
+#endif
+} CMDQ_EVENT_ENUM;
+#endif
+#undef DECLARE_CMDQ_EVENT
+
+/* CMDQ subsys */
+#undef DECLARE_CMDQ_SUBSYS
+#define DECLARE_CMDQ_SUBSYS(name_struct, val, grp, dts_name) name_struct = val,
+typedef enum CMDQ_SUBSYS_ENUM {
+#include "cmdq_subsys_common.h"
+
+	/* ALWAYS keep at the end */
+	CMDQ_SUBSYS_MAX_COUNT
+} CMDQ_SUBSYS_ENUM;
+#undef DECLARE_CMDQ_SUBSYS
+
+#define CMDQ_SUBSYS_GRPNAME_MAX		(30)
+/* GCE subsys information */
+typedef struct SubsysStruct {
+	uint32_t msb;
+	int32_t subsysID;
+	uint32_t mask;
+	char grpName[CMDQ_SUBSYS_GRPNAME_MAX];
+} SubsysStruct;
+
+typedef struct cmdqDTSDataStruct {
+	/* [Out] GCE event table */
+	int32_t eventTable[CMDQ_SYNC_TOKEN_MAX];
+	/* [Out] GCE subsys ID table */
+	SubsysStruct subsys[CMDQ_SUBSYS_MAX_COUNT];
+	/* [Out] MDP Base address */
+	uint32_t MDPBaseAddress[CMDQ_MAX_MDP_PA_BASE_COUNT];
+} cmdqDTSDataStruct;
+
+/* Custom "wide" pointer type for 64-bit job handle (pointer to VA) */
+typedef unsigned long long cmdqJobHandle_t;
+/* Custom "wide" pointer type for 64-bit compatibility. Always cast from uint32_t*. */
+typedef unsigned long long cmdqU32Ptr_t;
+
+#define CMDQ_U32_PTR(x) ((uint32_t *)(unsigned long)x)
+
+typedef struct cmdqReadRegStruct {
+	uint32_t count;		/* number of entries in regAddresses */
+	cmdqU32Ptr_t regAddresses;	/* an array of 32-bit register addresses (uint32_t) */
+} cmdqReadRegStruct;
+
+typedef struct cmdqRegValueStruct {
+	/* number of entries in result */
+	uint32_t count;
+
+	/* array of 32-bit register values (uint32_t). */
+	/* in the same order as cmdqReadRegStruct */
+	cmdqU32Ptr_t regValues;
+} cmdqRegValueStruct;
+
+typedef struct cmdqReadAddressStruct {
+	uint32_t count;		/* [IN] number of entries in result. */
+
+	/* [IN] array of physical addresses to read. */
+	/* these value must allocated by CMDQ_IOCTL_ALLOC_WRITE_ADDRESS ioctl */
+	/*  */
+	/* indeed param dmaAddresses should be UNSIGNED LONG type for 64 bit kernel. */
+	/* Considering our plartform supports max 4GB RAM(upper-32bit don't care for SW) */
+	/* and consistent common code interface, remain uint32_t type. */
+	cmdqU32Ptr_t dmaAddresses;
+
+	cmdqU32Ptr_t values;	/* [OUT] uint32_t values that dmaAddresses point into */
+} cmdqReadAddressStruct;
+
+/*
+ * Secure address metadata:
+ * According to handle type, translate handle and replace (_d)th instruciton to
+ *     1. sec_addr = hadnle_sec_base_addr(baseHandle) + offset(_b)
+ *     2. sec_mva = mva( hadnle_sec_base_addr(baseHandle) + offset(_b) )
+ *     3. secure world normal mva = map(baseHandle)
+ *        . pass normal mva to parameter baseHandle
+ *        . use case: OVL reads from secure and normal buffers at the same time)
+ */
+typedef enum CMDQ_SEC_ADDR_METADATA_TYPE {
+	CMDQ_SAM_H_2_PA = 0,	/* sec handle to sec PA */
+	CMDQ_SAM_H_2_MVA = 1,	/* sec handle to sec MVA */
+	CMDQ_SAM_NMVA_2_MVA = 2,	/* map normal MVA to secure world */
+} CMDQ_SEC_ADDR_METADATA_TYPE;
+
+typedef struct cmdqSecAddrMetadataStruct {
+	/* [IN]_d, index of instruction. Update its argB value to real PA/MVA in secure world */
+	uint32_t instrIndex;
+
+	CMDQ_SEC_ADDR_METADATA_TYPE type;	/* [IN] addr handle type */
+	uint32_t baseHandle;	/* [IN]_h, secure address handle */
+	uint32_t offset;	/* [IN]_b, buffser offset to secure handle */
+	uint32_t size;		/* buffer size */
+	uint32_t port;		/* hw port id (i.e. M4U port id) */
+} cmdqSecAddrMetadataStruct;
+
+typedef struct cmdqSecDataStruct {
+	bool isSecure;		/* [IN]true for secure command */
+
+	/* address metadata, used to translate secure buffer PA related instruction in secure world */
+	uint32_t addrMetadataCount;	/* [IN] count of element in addrList */
+	cmdqU32Ptr_t addrMetadatas;	/* [IN] array of cmdqSecAddrMetadataStruct */
+	uint32_t addrMetadataMaxCount;	/*[Reserved] */
+
+	uint64_t enginesNeedDAPC;
+	uint64_t enginesNeedPortSecurity;
+
+	/* [Reserved] This is for CMDQ driver usage itself. Not for client. */
+	int32_t waitCookie;	/* task index in thread's tasklist. -1 for not in tasklist. */
+	bool resetExecCnt;	/* reset HW thread in SWd */
+} cmdqSecDataStruct;
+
+#ifdef CMDQ_PROFILE_MARKER_SUPPORT
+typedef struct cmdqProfileMarkerStruct {
+	uint32_t count;
+	long long hSlot;	/* i.e. cmdqBackupSlotHandle, physical start address of backup slot */
+	cmdqU32Ptr_t tag[CMDQ_MAX_PROFILE_MARKER_IN_TASK];
+} cmdqProfileMarkerStruct;
+#endif
+
+typedef struct cmdqCommandStruct {
+	/* [IN] deprecated. will remove in the future. */
+	uint32_t scenario;
+	/* [IN] task schedule priority. this is NOT HW thread priority. */
+	uint32_t priority;
+	/* [IN] bit flag of engines used. */
+	uint64_t engineFlag;
+	/* [IN] pointer to instruction buffer. Use 64-bit for compatibility. */
+	/* This must point to an 64-bit aligned uint32_t array */
+	cmdqU32Ptr_t pVABase;
+	/* [IN] size of instruction buffer, in bytes. */
+	uint32_t blockSize;
+	/* [IN] request to read register values at the end of command */
+	cmdqReadRegStruct regRequest;
+	/* [OUT] register values of regRequest */
+	cmdqRegValueStruct regValue;
+	/* [IN/OUT] physical addresses to read value */
+	cmdqReadAddressStruct readAddress;
+	/*[IN] secure execution data */
+	cmdqSecDataStruct secData;
+	/* [IN] set to non-zero to enable register debug dump. */
+	uint32_t debugRegDump;
+	/* [Reserved] This is for CMDQ driver usage itself. Not for client. Do not access this field from User Space */
+	cmdqU32Ptr_t privateData;
+#ifdef CMDQ_PROFILE_MARKER_SUPPORT
+	cmdqProfileMarkerStruct profileMarker;
+#endif
+} cmdqCommandStruct;
+
+typedef enum CMDQ_CAP_BITS {
+	/* bit 0: TRUE if WFE instruction support is ready. FALSE if we need to POLL instead. */
+	CMDQ_CAP_WFE = 0,
+} CMDQ_CAP_BITS;
+
+
+/**
+ * reply struct for cmdq_sec_cancel_error_task
+ */
+
+typedef struct {
+	/* [OUT] */
+	bool throwAEE;
+	bool hasReset;
+	int32_t irqFlag;
+	uint32_t errInstr[2];
+	uint32_t regValue;
+	uint32_t pc;
+} cmdqSecCancelTaskResultStruct;
+
+#endif				/* __CMDQ_DEF_H__ */
diff --git a/kernel-headers/cmdq_driver.h b/kernel-headers/cmdq_driver.h
new file mode 100644
index 0000000..97c7228
--- /dev/null
+++ b/kernel-headers/cmdq_driver.h
@@ -0,0 +1,80 @@
+#ifndef __CMDQ_DRIVER_H__
+#define __CMDQ_DRIVER_H__
+
+#include <linux/kernel.h>
+#include "cmdq_def.h"
+
+typedef struct cmdqUsageInfoStruct {
+	uint32_t count[CMDQ_MAX_ENGINE_COUNT];	/* [OUT] current engine ref count */
+} cmdqUsageInfoStruct;
+
+typedef struct cmdqJobStruct {
+	struct cmdqCommandStruct command;	/* [IN] the job to perform */
+	cmdqJobHandle_t hJob;	/* [OUT] handle to resulting job */
+} cmdqJobStruct;
+
+typedef struct cmdqJobResultStruct {
+	cmdqJobHandle_t hJob;	/* [IN]  Job handle from CMDQ_IOCTL_ASYNC_JOB_EXEC */
+	uint64_t engineFlag;	/* [OUT] engine flag passed down originally */
+
+	/* [IN/OUT] read register values, if any. */
+	/* as input, the "count" field must represent */
+	/* buffer space pointed by "regValues". */
+	/* Upon return, CMDQ driver fills "count" with */
+	/* actual requested register count. */
+	/* However, if the input "count" is too small, */
+	/* -ENOMEM is returned, and "count" is filled */
+	/* with requested register count. */
+	cmdqRegValueStruct regValue;
+
+	cmdqReadAddressStruct readAddress;	/* [IN/OUT] physical address to read */
+} cmdqJobResultStruct;
+
+typedef struct cmdqWriteAddressStruct {
+	/* [IN] count of the writable buffer (unit is # of uint32_t, NOT in byte) */
+	uint32_t count;
+
+	/* [OUT] When Alloc, this is the resulting PA. It is guaranteed to be continuous. */
+	/* [IN]  When Free, please pass returned address down to ioctl. */
+	/*  */
+	/* indeed param startPA should be UNSIGNED LONG type for 64 bit kernel. */
+	/* Considering our plartform supports max 4GB RAM(upper-32bit don't care for SW) */
+	/* and consistent common code interface, remain uint32_t type. */
+	uint32_t startPA;
+} cmdqWriteAddressStruct;
+
+#define CMDQ_IOCTL_MAGIC_NUMBER 'x'
+
+#define CMDQ_IOCTL_LOCK_MUTEX   _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 1, int)
+#define CMDQ_IOCTL_UNLOCK_MUTEX _IOR(CMDQ_IOCTL_MAGIC_NUMBER, 2, int)
+#define CMDQ_IOCTL_EXEC_COMMAND _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 3, cmdqCommandStruct)
+#define CMDQ_IOCTL_QUERY_USAGE  _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 4, cmdqUsageInfoStruct)
+
+/*  */
+/* Async operations */
+/*  */
+#define CMDQ_IOCTL_ASYNC_JOB_EXEC _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 5, cmdqJobStruct)
+#define CMDQ_IOCTL_ASYNC_JOB_WAIT_AND_CLOSE _IOR(CMDQ_IOCTL_MAGIC_NUMBER, 6, cmdqJobResultStruct)
+
+#define CMDQ_IOCTL_ALLOC_WRITE_ADDRESS _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 7, cmdqWriteAddressStruct)
+#define CMDQ_IOCTL_FREE_WRITE_ADDRESS _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 8, cmdqWriteAddressStruct)
+#define CMDQ_IOCTL_READ_ADDRESS_VALUE _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 9, cmdqReadAddressStruct)
+
+/*  */
+/* Chip capability query. output parameter is a bit field. */
+/* Bit definition is CMDQ_CAP_BITS. */
+/*  */
+#define CMDQ_IOCTL_QUERY_CAP_BITS _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 10, int)
+
+/*  */
+/* HW info. from DTS */
+/*  */
+#define CMDQ_IOCTL_QUERY_DTS _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 11, cmdqDTSDataStruct)
+
+/*  */
+/* Notify MDP will use specified engine before really use. */
+/* input int is same as EngineFlag. */
+/*  */
+#define CMDQ_IOCTL_NOTIFY_ENGINE _IOW(CMDQ_IOCTL_MAGIC_NUMBER, 12, uint64_t)
+
+#endif				/* __CMDQ_DRIVER_H__ */
diff --git a/kernel-headers/cmdq_engine_common.h b/kernel-headers/cmdq_engine_common.h
new file mode 100644
index 0000000..bfb211d
--- /dev/null
+++ b/kernel-headers/cmdq_engine_common.h
@@ -0,0 +1,71 @@
+#ifndef __CMDQ_ENGINE_COMMON_H__
+#define __CMDQ_ENGINE_COMMON_H__
+
+typedef enum CMDQ_ENG_ENUM {
+	/* ISP */
+	CMDQ_ENG_ISP_IMGI = 0,
+	CMDQ_ENG_ISP_IMGO,	/* 1 */
+	CMDQ_ENG_ISP_IMG2O,	/* 2 */
+
+	/* MDP */
+	CMDQ_ENG_MDP_CAMIN,	/* 3 */
+	CMDQ_ENG_MDP_RDMA0,	/* 4 */
+	CMDQ_ENG_MDP_RDMA1,	/* 5 */
+	CMDQ_ENG_MDP_RSZ0,	/* 6 */
+	CMDQ_ENG_MDP_RSZ1,	/* 7 */
+	CMDQ_ENG_MDP_RSZ2,	/* 8 */
+	CMDQ_ENG_MDP_TDSHP0,	/* 9 */
+	CMDQ_ENG_MDP_TDSHP1,	/* 10 */
+	CMDQ_ENG_MDP_COLOR0,	/* 11 */
+	CMDQ_ENG_MDP_MOUT0,	/* 12 */
+	CMDQ_ENG_MDP_MOUT1,	/* 13 */
+	CMDQ_ENG_MDP_WROT0,	/* 14 */
+	CMDQ_ENG_MDP_WROT1,	/* 15 */
+	CMDQ_ENG_MDP_WDMA,	/* 16 */
+
+	/* JPEG & VENC */
+	CMDQ_ENG_JPEG_ENC,	/* 17 */
+	CMDQ_ENG_VIDEO_ENC,	/* 18 */
+	CMDQ_ENG_JPEG_DEC,	/* 19 */
+	CMDQ_ENG_JPEG_REMDC,	/* 20 */
+
+	/* DISP */
+	CMDQ_ENG_DISP_UFOE,	/* 21 */
+	CMDQ_ENG_DISP_AAL,	/* 22 */
+	CMDQ_ENG_DISP_COLOR0,	/* 23 */
+	CMDQ_ENG_DISP_COLOR1,	/* 24 */
+	CMDQ_ENG_DISP_RDMA0,	/* 25 */
+	CMDQ_ENG_DISP_RDMA1,	/* 26 */
+	CMDQ_ENG_DISP_RDMA2,	/* 27 */
+	CMDQ_ENG_DISP_WDMA0,	/* 28 */
+	CMDQ_ENG_DISP_WDMA1,	/* 29 */
+	CMDQ_ENG_DISP_OVL0,	/* 30 */
+	CMDQ_ENG_DISP_OVL1,	/* 31 */
+	CMDQ_ENG_DISP_OVL2,	/* 32 */
+	CMDQ_ENG_DISP_2L_OVL0,	/* 33 */
+	CMDQ_ENG_DISP_2L_OVL1,	/* 34 */
+	CMDQ_ENG_DISP_2L_OVL2,	/* 35 */
+	CMDQ_ENG_DISP_GAMMA,	/* 36 */
+	CMDQ_ENG_DISP_MERGE,	/* 37 */
+	CMDQ_ENG_DISP_SPLIT0,	/* 38 */
+	CMDQ_ENG_DISP_SPLIT1,	/* 39 */
+	CMDQ_ENG_DISP_DSI0_VDO,	/* 40 */
+	CMDQ_ENG_DISP_DSI1_VDO,	/* 41 */
+	CMDQ_ENG_DISP_DSI0_CMD,	/* 42 */
+	CMDQ_ENG_DISP_DSI1_CMD,	/* 43 */
+	CMDQ_ENG_DISP_DSI0,	/* 44 */
+	CMDQ_ENG_DISP_DSI1,	/* 45 */
+	CMDQ_ENG_DISP_DPI,	/* 46 */
+
+	/* DPE */
+	CMDQ_ENG_DPE,	/* 47 */
+
+	/* temp: CMDQ internal usage */
+	CMDQ_ENG_CMDQ,
+	CMDQ_ENG_DISP_MUTEX,
+	CMDQ_ENG_MMSYS_CONFIG,
+
+	CMDQ_MAX_ENGINE_COUNT	/* ALWAYS keep at the end */
+} CMDQ_ENG_ENUM;
+
+#endif				/* __CMDQ_ENGINE_COMMON_H__ */
diff --git a/kernel-headers/cmdq_event_common.h b/kernel-headers/cmdq_event_common.h
new file mode 100644
index 0000000..b185888
--- /dev/null
+++ b/kernel-headers/cmdq_event_common.h
@@ -0,0 +1,272 @@
+/* MDP start frame */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA0_SOF, 0, mdp_rdma0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA1_SOF, 1, mdp_rdma1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ0_SOF, 2, mdp_rsz0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ1_SOF, 3, mdp_rsz1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ2_SOF, 4, mdp_rsz2_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP_SOF, 5, mdp_tdshp_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP0_SOF, 6, mdp_tdshp0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP1_SOF, 7, mdp_tdshp1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WDMA_SOF, 8, mdp_wdma_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT_SOF, 9, mdp_wrot_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_SOF, 10, mdp_wrot0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_SOF, 11, mdp_wrot1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_COLOR_SOF, 12, mdp_color_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_MVW_SOF, 13, mdp_mvw_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_CROP_SOF, 14, mdp_crop_sof)
+
+/* Display start frame */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL0_SOF, 15, disp_ovl0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL1_SOF, 16, disp_ovl1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_2L_OVL0_SOF, 17, disp_2l_ovl0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_2L_OVL1_SOF, 18, disp_2l_ovl1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA0_SOF, 19, disp_rdma0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA1_SOF, 20, disp_rdma1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA2_SOF, 21, disp_rdma2_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA0_SOF, 22, disp_wdma0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA1_SOF, 23, disp_wdma1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR_SOF, 24, disp_color_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR0_SOF, 25, disp_color0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR1_SOF, 26, disp_color1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_CCORR_SOF, 27, disp_ccorr_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_AAL_SOF, 28, disp_aal_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_GAMMA_SOF, 29, disp_gamma_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DITHER_SOF, 30, disp_dither_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_UFOE_SOF, 31, disp_ufoe_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_PWM0_SOF, 32, disp_pwm0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_PWM1_SOF, 33, disp_pwm1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OD_SOF, 34, disp_od_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DSC_SOF, 35, disp_dsc_sof)
+
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L0_SOF, 36, ufod_rdma0_l0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L1_SOF, 37, ufod_rdma0_l1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L2_SOF, 38, ufod_rdma0_l2_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L3_SOF, 39, ufod_rdma0_l3_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L0_SOF, 40, ufod_rdma1_l0_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L1_SOF, 41, ufod_rdma1_l1_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L2_SOF, 42, ufod_rdma1_l2_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L3_SOF, 43, ufod_rdma1_l3_sof)
+
+/* MDP frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA0_EOF, 44, mdp_rdma0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA1_EOF, 45, mdp_rdma1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ0_EOF, 46, mdp_rsz0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ1_EOF, 47, mdp_rsz1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ2_EOF, 48, mdp_rsz2_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP_EOF, 49, mdp_tdshp_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP0_EOF, 50, mdp_tdshp0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP1_EOF, 51, mdp_tdshp1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WDMA_EOF, 52, mdp_wdma_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT_WRITE_EOF, 53, mdp_wrot_write_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT_READ_EOF, 54, mdp_wrot_read_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_WRITE_EOF, 55, mdp_wrot0_write_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_READ_EOF, 56, mdp_wrot0_read_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_WRITE_EOF, 57, mdp_wrot1_write_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_READ_EOF, 58, mdp_wrot1_read_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_W_EOF, 59, mdp_wrot0_write_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_R_EOF, 60, mdp_wrot0_read_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_W_EOF, 61, mdp_wrot1_write_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_R_EOF, 62, mdp_wrot1_read_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_COLOR_EOF, 63, mdp_color_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_CROP_EOF, 64, mdp_crop_frame_done)
+
+/* Display frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL0_EOF, 65, disp_ovl0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL1_EOF, 66, disp_ovl1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_2L_OVL0_EOF, 67, disp_2l_ovl0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_2L_OVL1_EOF, 68, disp_2l_ovl1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA0_EOF, 69, disp_rdma0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA1_EOF, 70, disp_rdma1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA2_EOF, 71, disp_rdma2_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA0_EOF, 72, disp_wdma0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA1_EOF, 73, disp_wdma1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR_EOF, 74, disp_color_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR0_EOF, 75, disp_color0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR1_EOF, 76, disp_color1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_CCORR_EOF, 77, disp_ccorr_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_AAL_EOF, 78, disp_aal_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_GAMMA_EOF, 79, disp_gamma_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DITHER_EOF, 80, disp_dither_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_UFOE_EOF, 81, disp_ufoe_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OD_EOF, 82, disp_od_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DSC_EOF, 83, disp_dsc_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DSI0_EOF, 84, disp_dsi0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DSI1_EOF, 85, disp_dsi1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DPI0_EOF, 86, disp_dpi0_frame_done)
+
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L0_EOF, 87, ufod_rdma0_l0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L1_EOF, 88, ufod_rdma0_l1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L2_EOF, 89, ufod_rdma0_l2_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA0_L3_EOF, 90, ufod_rdma0_l3_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L0_EOF, 91, ufod_rdma1_l0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L1_EOF, 92, ufod_rdma1_l1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L2_EOF, 93, ufod_rdma1_l2_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_UFOD_RAMA1_L3_EOF, 94, ufod_rdma1_l3_frame_done)
+
+/* Mutex frame done */
+/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX0_STREAM_EOF, 95, stream_done_0)
+/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX1_STREAM_EOF, 96, stream_done_1)
+/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX2_STREAM_EOF, 97, stream_done_2)
+/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX3_STREAM_EOF, 98, stream_done_3)
+/* DISPSYS, please refer to disp_hal.h */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX4_STREAM_EOF, 99, stream_done_4)
+/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX5_STREAM_EOF, 100, stream_done_5)
+/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX6_STREAM_EOF, 101, stream_done_6)
+/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX7_STREAM_EOF, 102, stream_done_7)
+/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX8_STREAM_EOF, 103, stream_done_8)
+/* DpFramework via CMDQ_IOCTL_LOCK_MUTEX */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX9_STREAM_EOF, 104, stream_done_9)
+
+/* Display underrun */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA0_UNDERRUN, 105, buf_underrun_event_0)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA1_UNDERRUN, 106, buf_underrun_event_1)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA2_UNDERRUN, 107, buf_underrun_event_2)
+
+/* Display TE */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DSI_TE, 108, dsi0_te_event)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DSI0_TE, 109, dsi0_te_event)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DSI1_TE, 110, dsi1_te_event)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_DSI0_TE_SOF, 111, mdp_dsi0_te_sof)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_DSI1_TE_SOF, 112, mdp_dsi1_te_sof)
+
+/* ISP frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS2_2_EOF, 113, isp_frame_done_p2_2)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS2_1_EOF, 114, isp_frame_done_p2_1)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS2_0_EOF, 115, isp_frame_done_p2_0)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS1_1_EOF, 116, isp_frame_done_p1_1)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS1_0_EOF, 117, isp_frame_done_p1_0)
+
+/* ISP (IMGSYS) frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD0_EOF, 118, dip_cq_thread0_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD1_EOF, 119, dip_cq_thread1_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD2_EOF, 120, dip_cq_thread2_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD3_EOF, 121, dip_cq_thread3_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD4_EOF, 122, dip_cq_thread4_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD5_EOF, 123, dip_cq_thread5_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD6_EOF, 124, dip_cq_thread6_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD7_EOF, 125, dip_cq_thread7_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD8_EOF, 126, dip_cq_thread8_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD9_EOF, 127, dip_cq_thread9_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD10_EOF, 128, dip_cq_thread10_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD11_EOF, 129, dip_cq_thread11_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD12_EOF, 130, dip_cq_thread12_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD13_EOF, 131, dip_cq_thread13_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DIP_CQ_THREAD14_EOF, 132, dip_cq_thread14_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DPE_EOF, 133, dpe_frame_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_WMF_EOF, 134, wmf_frame_done)
+
+/* ISP (IMGSYS) engine events */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_SENINF_CAM1_2_3_FULL, 135, seninf_cam1_2_3_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_SENINF_CAM0_FULL, 136, seninf_cam0_fifo_full)
+
+/* VENC frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_VENC_EOF, 137, venc_done)
+
+/* JPEG frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_ENC_EOF, 138, jpgenc_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_ENC_PASS2_EOF, 139, jpgenc_pass2_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_ENC_PASS1_EOF, 140, jpgenc_pass1_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_DEC_EOF, 141, jpgdec_done)
+
+/* VENC engine events */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_VENC_MB_DONE, 142, venc_mb_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_VENC_128BYTE_CNT_DONE, 143, venc_128byte_cnt_done)
+
+/* ISP (CAMSYS) frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_FRAME_DONE_A, 144, isp_frame_done_a)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_FRAME_DONE_B, 145, isp_frame_done_b)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_CAMSV_0_PASS1_DONE, 146, camsv_0_pass1_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_CAMSV_1_PASS1_DONE, 147, camsv_1_pass1_done)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_CAMSV_2_PASS1_DONE, 148, camsv_2_pass1_done)
+
+/* ISP (CAMSYS) engine events */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_0_FIFO_FULL, 149, seninf_0_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_1_FIFO_FULL, 150, seninf_1_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_2_FIFO_FULL, 151, seninf_2_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_3_FIFO_FULL, 152, seninf_3_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_4_FIFO_FULL, 153, seninf_4_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_5_FIFO_FULL, 154, seninf_5_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_6_FIFO_FULL, 155, seninf_6_fifo_full)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_SENINF_7_FIFO_FULL, 156, seninf_7_fifo_full)
+
+/* Keep this at the end of HW events */
+DECLARE_CMDQ_EVENT(CMDQ_MAX_HW_EVENT_COUNT, 400, hw_event_conunt)
+
+/* SW Sync Tokens (Pre-defined) */
+/* Config thread notify trigger thread */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_CONFIG_DIRTY, 401, sw_token)
+/* Trigger thread notify config thread */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_STREAM_EOF, 402, sw_token)
+/* Block Trigger thread until the ESD check finishes. */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_ESD_EOF, 403, sw_token)
+/* check CABC setup finish */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_CABC_EOF, 404, sw_token)
+/* Block Trigger thread until the path freeze finishes */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_FREEZE_EOF, 405, sw_token)
+/* Pass-2 notifies VENC frame is ready to be encoded */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_VENC_INPUT_READY, 406, sw_token)
+/* VENC notifies Pass-2 encode done so next frame may start */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_VENC_EOF, 407, sw_token)
+
+/* Notify normal CMDQ there are some secure task done */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_SECURE_THR_EOF, 408, sw_token)
+/* Lock WSM resource */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_SECURE_WSM_LOCK, 409, sw_token)
+
+/* SW Sync Tokens (User-defined) */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_USER_0, 410, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_USER_1, 411, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_POLL_MONITOR, 412, sw_token)
+
+/* Event for CMDQ to block executing command when append command
+* Plz sync CMDQ_SYNC_TOKEN_APPEND_THR(id) in cmdq_core source file. */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR0, 422, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR1, 423, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR2, 424, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR3, 425, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR4, 426, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR5, 427, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR6, 428, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR7, 429, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR8, 430, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR9, 431, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR10, 432, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR11, 433, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR12, 434, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR13, 435, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR14, 436, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_APPEND_THR15, 437, sw_token)
+
+/* GPR access tokens (for HW register backup) */
+/* There are 15 32-bit GPR, 3 GPR form a set (64-bit for address, 32-bit for value) */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_0, 450, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_1, 451, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_2, 452, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_3, 453, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_4, 454, sw_token)
+
+/* Resource lock event to control resource in GCE thread */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_RESOURCE_WROT0, 460, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_RESOURCE_WROT1, 461, sw_token)
+
+/* Secure video path  notify SW token */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_OVL0_2NONSEC_END, 470, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_OVL1_2NONSEC_END, 471, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_2LOVL0_2NONSEC_END, 472, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_2LOVL1_2NONSEC_END, 473, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_RDMA0_2NONSEC_END, 474, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_RDMA1_2NONSEC_END, 475, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_WDMA0_2NONSEC_END, 476, sw_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_DISP_WDMA1_2NONSEC_END, 477, sw_token)
+
+/* event id is 9 bit */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_MAX, (0x1FF), max_token)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_INVALID, (-1), invalid_token)
diff --git a/kernel-headers/cmdq_subsys_common.h b/kernel-headers/cmdq_subsys_common.h
new file mode 100644
index 0000000..1872b80
--- /dev/null
+++ b/kernel-headers/cmdq_subsys_common.h
@@ -0,0 +1,32 @@
+/* GCE subsys */
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_G3D_CONFIG_BASE, 0, MFG, g3d_config_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_MMSYS_CONFIG, 1, MMSYS, mmsys_config_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_DISP_DITHER, 2, MMSYS, disp_dither_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_NA, 3, MMSYS, mm_na_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_IMGSYS, 4, CAM, imgsys_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_VDEC_GCON, 5, VDEC, vdec_gcon_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_VENC_GCON, 6, VENC, venc_gcon_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_CONN_PERIPHERALS, 7, PERISYS, conn_peri_base)
+
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_TOPCKGEN, 8, TOP_AO_3, topckgen_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_KP, 9, INFRA_AO, kp_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_SCP_SRAM, 10, INFRA_AO, scp_sram_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_INFRA_NA3, 11, NA, infra_na3_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_INFRA_NA4, 12, NA, infra_na4_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_SCP, 13, SCP, scp_base)
+
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_MCUCFG, 14, INFRASYS, mcucfg_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_GCPU, 15, INFRASYS, gcpu_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_USB0, 16, PERISYS, usb0_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_USB_SIF, 17, PERISYS, usb_sif_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_AUDIO, 18, PERISYS, audio_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_MSDC0, 19, PERISYS, msdc0_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_MSDC1, 20, PERISYS, msdc1_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_MSDC2, 21, PERISYS, msdc2_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_MSDC3, 22, PERISYS, msdc3_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_AP_DMA, 23, INFRASYS, ap_dma_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_CAMSYS, 24, CAMSYS, camsys_base)
+
+/* Special subsys */
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_PWM_SW, 25, SPECIAL, pwm_sw_base)
+DECLARE_CMDQ_SUBSYS(CMDQ_SUBSYS_DIP_A0_SW, 26, SPECIAL, dip_a0_sw_base)
diff --git a/kernel-headers/hal_api.h b/kernel-headers/hal_api.h
new file mode 100644
index 0000000..f4b45d5
--- /dev/null
+++ b/kernel-headers/hal_api.h
@@ -0,0 +1,229 @@
+#ifndef _HAL_API_H_
+#define _HAL_API_H_
+#include "val_types_public.h"
+
+#define DumpReg__   /* /< Dump Reg for debug */
+#ifdef DumpReg__
+#include <stdio.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ADD_QUEUE(queue, index, q_type, q_address, q_offset, q_value, q_mask)       \
+	{                                                                                   \
+		queue[index].type     = q_type;                                                   \
+		queue[index].address  = q_address;                                                \
+		queue[index].offset   = q_offset;                                                 \
+		queue[index].value    = q_value;                                                  \
+		queue[index].mask     = q_mask;                                                   \
+		index = index + 1;                                                                \
+	}       /* /< ADD QUEUE command */
+
+
+/**
+ * @par Enumeration
+ *   HAL_CODEC_TYPE_T
+ * @par Description
+ *   This is the item used for codec type
+ */
+typedef enum __HAL_CODEC_TYPE_T {
+	HAL_CODEC_TYPE_VDEC,                /* /< VDEC */
+	HAL_CODEC_TYPE_VENC,                /* /< VENC */
+	HAL_CODEC_TYPE_MAX = 0xFFFFFFFF     /* /< MAX Value */
+}
+HAL_CODEC_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *   HAL_CMD_T
+ * @par Description
+ *   This is the item used for hal command type
+ */
+typedef enum _HAL_CMD_T {
+	HAL_CMD_SET_CMD_QUEUE,              /* /< set command queue */
+	HAL_CMD_SET_POWER,                  /* /< set power */
+	HAL_CMD_SET_ISR,                    /* /< set ISR */
+	HAL_CMD_GET_CACHE_CTRL_ADDR,        /* /< get cahce control address */
+	HAL_CMD_MAX = 0xFFFFFFFF            /* /< MAX value */
+} HAL_CMD_T;
+
+
+/**
+ * @par Enumeration
+ *   REGISTER_GROUP_T
+ * @par Description
+ *   This is the item used for register group
+ */
+ 
+typedef enum _REGISTER_GROUP_T {
+	VDEC_SYS,           /* /< VDEC_SYS */
+	VDEC_MISC,          /* /< VDEC_MISC */
+	VDEC_VLD,           /* /< VDEC_VLD */
+	VDEC_VLD_TOP,       /* /< VDEC_VLD_TOP */
+	VDEC_MC,            /* /< VDEC_MC */
+	VDEC_AVC_VLD,       /* /< VDEC_AVC_VLD */
+	VDEC_AVC_MV,        /* /< VDEC_AVC_MV */
+	VDEC_HEVC_VLD,      /* /< VDEC_HEVC_VLD */
+	VDEC_HEVC_MV,       /* /< VDEC_HEVC_MV */
+	VDEC_PP,            /* /< VDEC_PP */
+	/* VDEC_SQT, */
+	VDEC_VP8_VLD,       /* /< VDEC_VP8_VLD */
+	VDEC_VP6_VLD,       /* /< VDEC_VP6_VLD */
+	VDEC_VP8_VLD2,      /* /< VDEC_VP8_VLD2 */
+	VENC_HW_BASE,       /* /< VENC_HW_BASE */
+	VENC_LT_HW_BASE,    /* /< VENC_HW_LT_BASE */
+	VENC_MP4_HW_BASE,   /* /< VENC_MP4_HW_BASE */
+	VDEC_VP9_VLD,       /*/< VDEC_VP9_VLD*/
+	VCODEC_MAX          /* /< VCODEC_MAX */
+} REGISTER_GROUP_T;
+
+
+/**
+ * @par Enumeration
+ *   REGISTER_GROUP_T
+ * @par Description
+ *   This is the item used for driver command type
+ */
+typedef enum _VCODEC_DRV_CMD_TYPE {
+	ENABLE_HW_CMD,              /* /< ENABLE_HW_CMD */
+	DISABLE_HW_CMD,             /* /< DISABLE_HW_CMD */
+	WRITE_REG_CMD,              /* /< WRITE_REG_CMD */
+	READ_REG_CMD,               /* /< READ_REG_CMD */
+	WRITE_SYSRAM_CMD,           /* /< WRITE_SYSRAM_CMD */
+	READ_SYSRAM_CMD,            /* /< READ_SYSRAM_CMD */
+	MASTER_WRITE_CMD,           /* /< MASTER_WRITE_CMD */
+	WRITE_SYSRAM_RANGE_CMD,     /* /< WRITE_SYSRAM_RANGE_CMD */
+	READ_SYSRAM_RANGE_CMD,      /* /< READ_SYSRAM_RANGE_CMD */
+	SETUP_ISR_CMD,              /* /< SETUP_ISR_CMD */
+	WAIT_ISR_CMD,               /* /< WAIT_ISR_CMD */
+	TIMEOUT_CMD,                /* /< TIMEOUT_CMD */
+	MB_CMD,                     /* /< MB_CMD */
+	POLL_REG_STATUS_CMD,        /* /< POLL_REG_STATUS_CMD */
+	END_CMD                     /* /< END_CMD */
+} VCODEC_DRV_CMD_TYPE;
+
+
+/**
+ * @par Structure
+ *  P_VCODEC_DRV_CMD_T
+ * @par Description
+ *  Pointer of VCODEC_DRV_CMD_T
+ */
+typedef struct __VCODEC_DRV_CMD_T *P_VCODEC_DRV_CMD_T;
+
+
+/**
+ * @par Structure
+ *  VCODEC_DRV_CMD_T
+ * @par Description
+ *  driver command information
+ */
+typedef struct __VCODEC_DRV_CMD_T {
+	VAL_UINT32_T type;          /* /< type */
+	VAL_ULONG_T  address;       /* /< address */
+	VAL_ULONG_T  offset;        /* /< offset */
+	VAL_ULONG_T  value;         /* /< value */
+	VAL_ULONG_T  mask;          /* /< mask */
+} VCODEC_DRV_CMD_T;
+
+
+/**
+ * @par Structure
+ *  HAL_HANDLE_T
+ * @par Description
+ *  hal handle information
+ */
+typedef struct _HAL_HANDLE_T_ {
+	VAL_INT32_T     fd_vdec;            /* /< fd_vdec */
+	VAL_INT32_T     fd_venc;            /* /< fd_venc */
+	VAL_MEMORY_T    rHandleMem;         /* /< rHandleMem */
+	VAL_ULONG_T     mmap[VCODEC_MAX];   /* /< mmap[VCODEC_MAX] */
+	VAL_DRIVER_TYPE_T    driverType;    /* /< driverType */
+	VAL_UINT32_T    u4TimeOut;          /* /< u4TimeOut */
+	VAL_UINT32_T    u4FrameCount;       /* /< u4FrameCount */
+#ifdef DumpReg__
+	FILE *pf_out;
+#endif
+	VAL_BOOL_T      bProfHWTime;        /* /< bProfHWTime */
+	VAL_UINT64_T    u8HWTime[2];        /* /< u8HWTime */
+} HAL_HANDLE_T;
+
+
+/**
+ * @par Function
+ *   eHalInit
+ * @par Description
+ *   The init hal driver function
+ * @param
+ *   a_phHalHandle      [IN/OUT] The hal handle
+ * @param
+ *   a_eHalCodecType    [IN] VDEC or VENC
+ * @par Returns
+ *   VAL_RESULT_T,
+ *   return VAL_RESULT_NO_ERROR if success,
+ *   return VAL_RESULT_INVALID_DRIVER or VAL_RESULT_INVALID_MEMORY if failed
+ */
+VAL_RESULT_T eHalInit(VAL_HANDLE_T *a_phHalHandle, HAL_CODEC_TYPE_T a_eHalCodecType);
+
+
+/**
+ * @par Function
+ *   eHalDeInit
+ * @par Description
+ *   The deinit hal driver function
+ * @param
+ *   a_phHalHandle      [IN/OUT] The hal handle
+ * @par Returns
+ *   VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return else if failed
+ */
+VAL_RESULT_T eHalDeInit(VAL_HANDLE_T *a_phHalHandle);
+
+
+/**
+ * @par Function
+ *   eHalGetMMAP
+ * @par Description
+ *   The get hw register memory map to vitural address function
+ * @param
+ *   a_hHalHandle       [IN/OUT] The hal handle
+ * @param
+ *   RegAddr            [IN] hw register address
+ * @par Returns
+ *   VAL_UINT32_T, vitural address of hw register memory mapping
+ */
+VAL_ULONG_T eHalGetMMAP(VAL_HANDLE_T *a_hHalHandle, VAL_UINT32_T RegAddr);
+
+
+/**
+ * @par Function
+ *   eHalCmdProc
+ * @par Description
+ *   The hal command processing function
+ * @param
+ *   a_hHalHandle       [IN/OUT] The hal handle
+ * @param
+ *   a_eHalCmd          [IN] The hal command structure
+ * @param
+ *   a_pvInParam        [IN] The hal input parameter
+ * @param
+ *   a_pvOutParam       [OUT] The hal output parameter
+ * @par Returns
+ *   VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return else if failed
+ */
+VAL_RESULT_T eHalCmdProc(
+	VAL_HANDLE_T *a_hHalHandle,
+	HAL_CMD_T a_eHalCmd,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _HAL_API_H_ */
diff --git a/kernel-headers/hal_types_private.h b/kernel-headers/hal_types_private.h
new file mode 100644
index 0000000..a713ef6
--- /dev/null
+++ b/kernel-headers/hal_types_private.h
@@ -0,0 +1,15 @@
+#ifndef _HAL_TYPES_PRIVATE_H_
+#define _HAL_TYPES_PRIVATE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_private.h"
+#include "hal_types_public.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _HAL_TYPES_PRIVATE_H_ */
diff --git a/kernel-headers/hal_types_public.h b/kernel-headers/hal_types_public.h
new file mode 100644
index 0000000..e976e7d
--- /dev/null
+++ b/kernel-headers/hal_types_public.h
@@ -0,0 +1,44 @@
+#ifndef _HAL_TYPES_PUBLIC_H_
+#define _HAL_TYPES_PUBLIC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_public.h"
+
+/**
+ * @par Structure
+ *  HAL_POWER_T
+ * @par Description
+ *  This is a parameter for power related function
+ */
+typedef struct _HAL_POWER_T {
+	VAL_VOID_T          *pvHandle;              /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T        u4HandleSize;           /* /< [IN]     The size of video codec driver handle */
+	VAL_DRIVER_TYPE_T   eDriverType;            /* /< [IN]     The driver type */
+	VAL_BOOL_T          fgEnable;               /* /< [IN]     Enable or not */
+	VAL_VOID_T          *pvReserved;            /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T        u4ReservedSize;         /* /< [IN]     The size of reserved parameter structure */
+} HAL_POWER_T;
+
+/**
+ * @par Structure
+ *  HAL_ISR_T
+ * @par Description
+ *  This is a parameter for ISR related function
+ */
+typedef struct _HAL_ISR_T {
+	VAL_VOID_T *pvHandle;                /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T u4HandleSize;           /* /< [IN]     The size of video codec driver handle */
+	VAL_DRIVER_TYPE_T eDriverType;       /* /< [IN]     The driver type */
+	VAL_BOOL_T  fgRegister;              /* /< [IN]     Register or un-register */
+	VAL_VOID_T *pvReserved;              /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T u4ReservedSize;         /* /< [IN]     The size of reserved parameter structure */
+} HAL_ISR_T;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _HAL_TYPES_PUBLIC_H_ */
diff --git a/kernel-headers/hevcd_if.h b/kernel-headers/hevcd_if.h
new file mode 100644
index 0000000..871e45a
--- /dev/null
+++ b/kernel-headers/hevcd_if.h
@@ -0,0 +1,98 @@
+#ifndef _HEVC_DECODE_IF_H_
+#define _HEVC_DECODE_IF_H_
+
+/* #include "hevcd.h" */
+/* #include "hevc_common_if.h" */
+#include "vcodec_if_v2.h"
+#include "vcodec_dec_demuxer_if_v2.h"
+#define MAX_DECODE_BUFFERS 15
+#define _FILE_IO_
+/* extern int frame_num; */
+typedef struct {
+
+	void (*hevc_pfnMalloc)(IN HANDLE                             /* hDrv */,
+			       IN unsigned int                       /* u4Size */,
+			       IN unsigned int                       /*u4AlignSize*/,
+			       IN VCODEC_MEMORY_TYPE_T               /* fgCacheable */,
+			       OUT VCODEC_BUFFER_T *                 /* prBuf */
+			      );  /* buffer address must cache line align */
+
+	void (*pfnFree)(IN HANDLE                             /* hDrv */,
+			IN VCODEC_BUFFER_T *                   /* prBuf */
+		       );  /* same memory type with malloc */
+
+} hevcd_callback_t;
+
+typedef struct {
+	unsigned char *buffer_origin;
+	unsigned char *luma;
+	unsigned char *cb, *cr;
+	int y_stride, uv_stride;
+	int width, height;
+	int ref_count;
+} decode_picture_buffer_info_t;
+
+
+typedef struct {
+	unsigned char *start_address;
+	int           length;
+} HEVC_ACCESS_UNIT_T;
+
+#define MAX_ACCESS_UNIT_NUMBER    32
+
+typedef struct {
+	HEVC_ACCESS_UNIT_T  au_list[MAX_ACCESS_UNIT_NUMBER];
+	int                 au_number;
+
+} HEVC_DECODE_INP_T;
+
+typedef struct {
+	unsigned char *y;
+	unsigned char *u;
+	unsigned char *v;
+
+	int y_stride;
+	int uv_stride;
+
+	int width;
+	int height;
+} HEVC_DECODE_PICTURE_T;
+
+typedef struct {
+	int width;
+	int height;
+} HEVC_PICTURE_INFO_T;
+
+
+VCODEC_DEC_ERROR_T HEVCDecoderGetMemoryRequired(
+	VCODEC_DEC_INPUT_T * prInput,
+	VCODEC_MEMORY_SIZE_T *prMemeorySize,
+	VCODEC_DEC_OUTPUT_BUFFER_PARAM_T *prYUVBufferParameter,
+	VCODEC_MEMORY_TYPE_T * prBitStreamBufferMemType
+);
+VCODEC_DEC_ERROR_T HEVCDecoderGetMemoryRequiredExtend(
+	VCODEC_DEC_INPUT_T * prInput,
+	VCODEC_MEMORY_SIZE_T *prMemeorySize,
+	VCODEC_DEC_OUTPUT_BUFFER_PARAM_T *prYUVBufferParameter,
+	OUT VCODEC_DEC_INPUT_BUFFER_PARAM_T * prBitStreamParam,
+	INOUT void *prExtra
+);
+VCODEC_DEC_ERROR_T HEVCDecoderInitAdapt(IN HANDLE hCodec);
+VCODEC_DEC_ERROR_T HEVCDecoderDeInitAdapt(IN HANDLE hCodec);
+VCODEC_DEC_ERROR_T HEVCDecoderOpenAdapt(
+	IN HANDLE hDrv ,
+	IN VCODEC_DEC_CALLBACK_T * pfnCallback,
+	IN void *prOpenSetting, OUT HANDLE * hCodec
+);
+VCODEC_DEC_ERROR_T HEVCDecoderStartAdapt(IN HANDLE hCodec, IN VCODEC_DEC_INPUT_T * prBufferHeader);
+VCODEC_DEC_ERROR_T HEVCDecoderCloseAdapt(IN HANDLE hCodec);
+VCODEC_DEC_ERROR_T HEVCDecoderGetNextDisplay(IN HANDLE hCodec, OUT VCODEC_DEC_PRIVATE_OUTPUT_T * prPrivateOutput);
+VCODEC_DEC_ERROR_T HEVCDecoderGetParameterAdapt(IN HANDLE hCodec, IN VCODEC_DEC_PARAM_TYPE_T eCmd, INOUT void *pParam);
+VCODEC_DEC_ERROR_T HEVCDecoderSetParameterAdapt(IN HANDLE hCodec, IN VCODEC_DEC_PARAM_TYPE_T eCmd, INOUT void *pParam);
+
+extern VCODEC_DEC_API_T *GetHEVCDecoderAPI(void);
+
+VCODEC_DEC_API_T *GetHEVCDecoderAPI(void);
+
+
+#endif
diff --git a/kernel-headers/kd_camera_feature.h b/kernel-headers/kd_camera_feature.h
new file mode 100644
index 0000000..3286da1
--- /dev/null
+++ b/kernel-headers/kd_camera_feature.h
@@ -0,0 +1,38 @@
+#ifndef _KD_CAMERA_FEATURE_H_
+#define _KD_CAMERA_FEATURE_H_
+
+
+#ifndef FTYPE_ENUM
+#define FTYPE_ENUM(_enums...)  _enums
+#endif              /* FTYPE_ENUM */
+
+#ifndef FID_TO_TYPE_ENUM
+#define FID_TO_TYPE_ENUM(_fid, _enums) \
+	typedef enum { _enums/*, OVER_NUM_OF_##_fid*/ }
+#endif              /* FID_TO_TYPE_ENUM */
+
+#include "kd_camera_feature_id.h"
+#include "kd_camera_feature_enum.h"
+
+
+typedef enum {
+	ORIENTATION_ANGLE_0 = 0,
+	ORIENTATION_ANGLE_90 = 90,
+	ORIENTATION_ANGLE_180 = 180,
+	ORIENTATION_ANGLE_270 = 270
+} ORIENTATION_ANGLE;
+
+
+typedef enum {
+	DUAL_CAMERA_NONE_SENSOR = 0,
+	DUAL_CAMERA_MAIN_SENSOR = 1,
+	DUAL_CAMERA_SUB_SENSOR = 2,
+	DUAL_CAMERA_MAIN_2_SENSOR = 4,
+	/* for backward compatible */
+	DUAL_CAMERA_MAIN_SECOND_SENSOR = 4,
+	/* DUAL_CAMERA_SUB_2_SENSOR   = 16, */
+	DUAL_CAMERA_SENSOR_MAX
+} CAMERA_DUAL_CAMERA_SENSOR_ENUM;
+
+
+#endif              /* _KD_IMGSENSOR_DATA_H */
diff --git a/kernel-headers/kd_camera_feature_enum.h b/kernel-headers/kd_camera_feature_enum.h
new file mode 100644
index 0000000..98d4e3a
--- /dev/null
+++ b/kernel-headers/kd_camera_feature_enum.h
@@ -0,0 +1,594 @@
+#ifndef _KD_CAMERA_FEATURE_ENUM_H_
+#define _KD_CAMERA_FEATURE_ENUM_H_
+
+
+/* Scene Mode */
+FID_TO_TYPE_ENUM(
+	FID_SCENE_MODE,
+	FTYPE_ENUM(
+		SCENE_MODE_BEGIN = 0,
+		SCENE_MODE_OFF = SCENE_MODE_BEGIN,  /* Disable scene mode equal Auto mode */
+		SCENE_MODE_NORMAL,  /* Normal mode */
+		SCENE_MODE_ACTION,  /* Action mode */
+		SCENE_MODE_PORTRAIT,    /* Portrait mode */
+		SCENE_MODE_LANDSCAPE,   /* Landscape */
+		SCENE_MODE_NIGHTSCENE,  /* Night Scene */
+		SCENE_MODE_NIGHTPORTRAIT,   /* Night Portrait */
+		SCENE_MODE_THEATRE, /* Theatre mode */
+		SCENE_MODE_BEACH,   /* Beach mode */
+		SCENE_MODE_SNOW,    /* Snow mode */
+		SCENE_MODE_SUNSET,  /* Sunset mode */
+		SCENE_MODE_STEADYPHOTO, /* Steady photo mode */
+		SCENE_MODE_FIREWORKS,   /* Fireworks mode */
+		SCENE_MODE_SPORTS,  /* Sports mode */
+		SCENE_MODE_PARTY,   /* Party mode */
+		SCENE_MODE_CANDLELIGHT, /* Candle light mode */
+		/* (Unsupported legacy symbol; don't use this symbol if possible) */
+		SCENE_MODE_ISO_ANTI_SHAKE,  /* ISO Anti Shake mode */
+		/* (Unsupported legacy symbol; don't use this symbol if possible) */
+		SCENE_MODE_BRACKET_AE,  /* Bracket AE */
+		SCENE_MODE_HDR,
+		SCENE_MODE_FACE_PRIORITY,
+		SCENE_MODE_BARCODE,
+		SCENE_MODE_NUM
+	)
+)SCENE_MODE_T;
+
+
+/* Effect */
+FID_TO_TYPE_ENUM(
+	FID_COLOR_EFFECT,
+	FTYPE_ENUM(
+		MEFFECT_BEGIN = 0,
+		MEFFECT_OFF = MEFFECT_BEGIN,
+		MEFFECT_MONO,
+		MEFFECT_SEPIA,
+		MEFFECT_NEGATIVE,
+		MEFFECT_SOLARIZE,
+		MEFFECT_POSTERIZE,
+		MEFFECT_AQUA,
+		MEFFECT_BLACKBOARD,
+		MEFFFECT_BLACKBOARD = MEFFECT_BLACKBOARD,   /* legacy symbol (don't use if possible) */
+		MEFFECT_WHITEBOARD,
+		MEFFECT_SEPIAGREEN,
+		MEFFECT_SEPIABLUE,
+		MEFFECT_NASHVILLE,
+		MEFFECT_HEFE,
+		MEFFECT_VALENCIA,
+		MEFFECT_XPROII,
+		MEFFECT_LOFI,
+		MEFFECT_SIERRA,
+		MEFFECT_KELVIN,
+		MEFFECT_WALDEN,
+		MEFFECT_F1977,
+		MEFFECT_NUM
+	)
+)MCOLOR_EFFECT;
+
+
+/* AWB Mode */
+FID_TO_TYPE_ENUM(
+	FID_AWB_MODE,
+	FTYPE_ENUM(
+		AWB_MODE_BEGIN = 0,
+		AWB_MODE_OFF = AWB_MODE_BEGIN,
+		AWB_MODE_AUTO,
+		AWB_MODE_DAYLIGHT,
+		AWB_MODE_CLOUDY_DAYLIGHT,
+		AWB_MODE_SHADE,
+		AWB_MODE_TWILIGHT,
+		AWB_MODE_FLUORESCENT,
+		AWB_MODE_WARM_FLUORESCENT,
+		AWB_MODE_INCANDESCENT,
+		AWB_MODE_TUNGSTEN,
+		/* (Unsupported legacy symbol; don't use this symbol if possible) */
+		AWB_MODE_GRAYWORLD, /* Gray world mode for CCT use */
+		AWB_MODE_NUM
+	)
+)AWB_MODE_T;
+
+
+/* AE Flicker */
+FID_TO_TYPE_ENUM(
+	FID_AE_FLICKER,
+	FTYPE_ENUM(
+		AE_FLICKER_MODE_BEGIN = 0,
+		AE_FLICKER_MODE_60HZ = AE_FLICKER_MODE_BEGIN,
+		AE_FLICKER_MODE_50HZ,
+		AE_FLICKER_MODE_AUTO,
+		AE_FLICKER_MODE_OFF,
+		AE_FLICKER_MODE_TOTAL_NUM
+	)
+)AE_FLICKER_MODE_T;
+
+
+/* AE EV */
+FID_TO_TYPE_ENUM(
+	FID_AE_EV,
+	FTYPE_ENUM(
+		AE_EV_COMP_BEGIN = 0,
+		AE_EV_COMP_00 = AE_EV_COMP_BEGIN,  /* Disable EV compenate */
+		AE_EV_COMP_03,   /* EV compensate 0.3 */
+		AE_EV_COMP_05,   /* EV compensate 0.5 */
+		AE_EV_COMP_07,   /* EV compensate 0.7 */
+		AE_EV_COMP_10,   /* EV compensate 1.0 */
+		AE_EV_COMP_13,   /* EV compensate 1.3 */
+		AE_EV_COMP_15,   /* EV compensate 1.5 */
+		AE_EV_COMP_17,   /* EV compensate 1.7 */
+		AE_EV_COMP_20,   /* EV compensate 2.0 */
+		AE_EV_COMP_23,   /* EV compensate 2.3 */
+		AE_EV_COMP_25,   /* EV compensate 2.5 */
+		AE_EV_COMP_27,   /* EV compensate 2.7 */
+		AE_EV_COMP_30,   /* EV compensate 3.0 */
+		AE_EV_COMP_n03,  /* EV compensate -0.3 */
+		AE_EV_COMP_n05,  /* EV compensate -0.5 */
+		AE_EV_COMP_n07,  /* EV compensate -0.7 */
+		AE_EV_COMP_n10,  /* EV compensate -1.0 */
+		AE_EV_COMP_n13,  /* EV compensate -1.3 */
+		AE_EV_COMP_n15,  /* EV compensate -1.5 */
+		AE_EV_COMP_n17,  /* EV compensate -1.7 */
+		AE_EV_COMP_n20,  /* EV compensate -2.0 */
+		AE_EV_COMP_n23,  /* EV compensate -2.3 */
+		AE_EV_COMP_n25,  /* EV compensate -2.5 */
+		AE_EV_COMP_n27,  /* EV compensate -2.7 */
+		AE_EV_COMP_n30,  /* EV compensate -3.0 */
+		AE_EV_COMP_TOTAL_NUM
+	)
+)AE_EVCOMP_T;
+
+
+/* AE Mode */
+FID_TO_TYPE_ENUM(
+	FID_AE_SCENE_MODE,
+	FTYPE_ENUM(
+		AE_MODE_BEGIN = 0,
+		AE_MODE_OFF = AE_MODE_BEGIN,  /* disable AE */
+		AE_MODE_AUTO,    /* auto mode   full auto ,EV ISO LCE .. is inactive */
+		AE_MODE_PROGRAM, /* AE program mode , allow set EV ISO LCE .... */
+		AE_MODE_TV,  /* AE TV mode */
+		AE_MODE_AV,  /* AE AV mode */
+		AE_MODE_SV,  /* AE SV mode */
+		AE_MODE_VIDEO,   /* Video mode AE */
+		AE_MODE_NIGHT,   /* Night Scene mode */
+		AE_MODE_ACTION,  /* AE Action mode */
+		AE_MODE_BEACH,   /* AE beach mode */
+		AE_MODE_CANDLELIGHT, /* AE Candlelight mode */
+		AE_MODE_FIREWORKS,   /* AE firework mode */
+		AE_MODE_LANDSCAPE,   /* AE landscape mode */
+		AE_MODE_PORTRAIT,    /* AE portrait mode */
+		AE_MODE_NIGHT_PORTRAIT,  /* AE night portrait mode */
+		AE_MODE_PARTY,   /* AE party mode */
+		AE_MODE_SNOW,    /* AE snow mode */
+		AE_MODE_SPORTS,  /* AE sport mode */
+		AE_MODE_STEADYPHOTO, /* AE steadyphoto mode */
+		AE_MODE_SUNSET,  /* AE sunset mode */
+		AE_MODE_THEATRE, /* AE theatre mode */
+		AE_MODE_ISO_ANTI_SHAKE,  /* AE ISO anti shake mode */
+		AE_MODE_BRACKET_AE,
+		AE_MODE_AUTO_PANORAMA,
+		AE_MODE_HDR,
+		AE_MODE_TOTAL_NUM
+	)
+)AE_MODE_T;
+
+
+/* AE Metering */
+FID_TO_TYPE_ENUM(
+	FID_AE_METERING,
+	FTYPE_ENUM(
+		AE_METERING_BEGIN = 0,
+		AE_METERING_MODE_CENTER_WEIGHT = AE_METERING_BEGIN, /* CENTER WEIGHTED MODE */
+		AE_METERING_MODE_SOPT, /* SPOT MODE */
+		AE_METERING_MODE_AVERAGE,  /* AVERAGE MODE */
+		NUM_OF_AE_METER
+	)
+)AE_METERING_T;
+
+
+/* AE ISO */
+FID_TO_TYPE_ENUM(
+	FID_AE_ISO,
+	FTYPE_ENUM(
+		AE_ISO_BEGIN = 0,
+		AE_ISO_AUTO = AE_ISO_BEGIN,
+		AE_ISO_100,
+		AE_ISO_200,
+		AE_ISO_400,
+		AE_ISO_800,
+		AE_ISO_1600,
+		NUM_OF_AE_ISO
+	)
+)AE_ISO_T;
+
+
+/* AE Strobe / Flashlight */
+FID_TO_TYPE_ENUM(
+	FID_AE_STROBE,
+	FTYPE_ENUM(
+		FLASHLIGHT_BEGIN = 0,
+		FLASHLIGHT_AUTO = FLASHLIGHT_BEGIN,
+		FLASHLIGHT_FORCE_ON,
+		FLASHLIGHT_FORCE_OFF,
+		FLASHLIGHT_REDEYE,
+		FLASHLIGHT_TORCH,
+		NUM_OF_FLASHLIGHT
+	)
+)AE_STROBE_T;
+
+/* AF Mode */
+FID_TO_TYPE_ENUM(
+	FID_AF_MODE,
+	FTYPE_ENUM(
+		AF_MODE_BEGIN = 0,
+		AF_MODE_AFS = AF_MODE_BEGIN,    /* (AF-Single Shot Mode) */
+		AF_MODE_AFC,   /* AF-Continuous Mode */
+		AF_MODE_AFC_VIDEO, /* AF-Continuous Mode (Video) */
+		AF_MODE_MACRO, /* AF Macro Mode */
+		AF_MODE_INFINITY,  /* Focus is set at infinity. */
+		AF_MODE_MF,    /* Manual Focus Mode */
+		AF_MODE_FULLSCAN,  /* AF Full Scan Mode */
+		NUM_OF_AF_MODE
+	)
+)AF_MODE_T;
+
+
+/* AF Metering */
+FID_TO_TYPE_ENUM(
+	FID_AF_METERING,
+	FTYPE_ENUM(
+		AF_METERING_BEGIN = 0,
+		AF_METER_SPOT = AF_METERING_BEGIN,  /* Spot Window */
+		AF_METER_MATRIX,   /* Matrix Window */
+		AF_METER_MOVESPOT,
+		NUM_OF_AF_METER
+	)
+)_AF_METERING_T;
+
+/* ISP Edge */
+FID_TO_TYPE_ENUM(
+	FID_ISP_EDGE,
+	FTYPE_ENUM(
+		ISP_EDGE_BEGIN = 0,
+		ISP_EDGE_LOW = ISP_EDGE_BEGIN,
+		ISP_EDGE_MIDDLE,
+		ISP_EDGE_HIGH,
+		NUM_OF_ISP_EDGE
+	)
+)ISP_EDGE_T;
+
+
+/* ISP Hue */
+FID_TO_TYPE_ENUM(
+	FID_ISP_HUE,
+	FTYPE_ENUM(
+		ISP_HUE_BEGIN = 0,
+		ISP_HUE_LOW = ISP_HUE_BEGIN,
+		ISP_HUE_MIDDLE,
+		ISP_HUE_HIGH,
+		NUM_OF_ISP_HUE
+	)
+)ISP_HUE_T;
+
+
+/* ISP Saturation */
+FID_TO_TYPE_ENUM(
+	FID_ISP_SAT,
+	FTYPE_ENUM(
+		ISP_SAT_BEGIN = 0,
+		ISP_SAT_LOW = ISP_SAT_BEGIN,
+		ISP_SAT_MIDDLE,
+		ISP_SAT_HIGH,
+		NUM_OF_ISP_SAT
+	)
+)ISP_SAT_T;
+
+
+/* ISP Brightness */
+FID_TO_TYPE_ENUM(
+	FID_ISP_BRIGHT,
+	FTYPE_ENUM(
+		ISP_BRIGHT_BEGIN = 0,
+		ISP_BRIGHT_LOW = ISP_BRIGHT_BEGIN,
+		ISP_BRIGHT_MIDDLE,
+		ISP_BRIGHT_HIGH,
+		NUM_OF_ISP_BRIGHT
+	)
+)ISP_BRIGHT_T;
+
+
+/* ISP Contrast */
+FID_TO_TYPE_ENUM(
+	FID_ISP_CONTRAST,
+	FTYPE_ENUM(
+		ISP_CONTRAST_BEGIN = 0,
+		ISP_CONTRAST_LOW = ISP_CONTRAST_BEGIN,
+		ISP_CONTRAST_MIDDLE,
+		ISP_CONTRAST_HIGH,
+		NUM_OF_ISP_CONTRAST
+	)
+)ISP_CONTRAST_T;
+
+/* Capture Mode */
+FID_TO_TYPE_ENUM(
+	FID_CAPTURE_MODE,
+	FTYPE_ENUM(
+		CAPTURE_MODE_BEGIN = 0,
+		CAPTURE_MODE_NORMAL = CAPTURE_MODE_BEGIN,
+		CAPTURE_MODE_BURST_SHOT,
+		CAPTURE_MODE_SMILE_SHOT,
+		CAPTURE_MODE_PANORAMA,
+		CAPTURE_MODE_AUTORAMA,
+		CAPTURE_MODE_BEST_SHOT,
+		CAPTURE_MODE_EV_BRACKET,
+		CAPTURE_MODE_MAV,
+		CAPTURE_MODE_HDR,
+		CAPTURE_MODE_ASD,
+		CAPTURE_MODE_ZSD,    /* Zero-shutter-delay Shot */
+		CAPTURE_MODE_PANO_3D,
+		CAPTURE_MODE_SINGLE_3D,
+		CAPTURE_MODE_FACE_BEAUTY,
+		CAPTURE_MODE_CONTINUOUS_SHOT,
+		CAPTURE_MODE_MULTI_MOTION,
+		NUM_OF_CAPTURE_MODE
+	)
+)CAPTURE_MODE_T;
+
+
+/* Capture Size */
+FID_TO_TYPE_ENUM(
+	FID_CAP_SIZE,
+	FTYPE_ENUM(
+		CAPTURE_SIZE_BEGIN = 0,
+		CAPTURE_SIZE_320_240 = CAPTURE_SIZE_BEGIN,
+		CAPTURE_SIZE_640_480,
+		CAPTURE_SIZE_1024_768,
+		CAPTURE_SIZE_1280_960,
+		CAPTURE_SIZE_1600_1200,
+		CAPTURE_SIZE_2048_1536,
+		CAPTURE_SIZE_2560_1920,
+		CAPTURE_SIZE_3264_2448,
+		CAPTURE_SIZE_4000_3000,
+		NUM_OF_CAPTURE_SIZE
+	)
+)CAPTURE_SIZE_T;
+
+
+/* Preview Size */
+FID_TO_TYPE_ENUM(
+	FID_PREVIEW_SIZE,
+	FTYPE_ENUM(
+		PREVIEW_SIZE_BEGIN = 0,
+		PREVIEW_SIZE_160_120 = PREVIEW_SIZE_BEGIN,
+		PREVIEW_SIZE_176_144,
+		PREVIEW_SIZE_320_240,
+		PREVIEW_SIZE_352_288,
+		PREVIEW_SIZE_480_320,
+		PREVIEW_SIZE_480_368,
+		PREVIEW_SIZE_640_480,
+		PREVIEW_SIZE_720_480,
+		PREVIEW_SIZE_800_480,
+		PREVIEW_SIZE_864_480,
+		PREVIEW_SIZE_800_600,
+		PREVIEW_SIZE_1280_720,
+		PREVIEW_SIZE_1920_1080,
+		NUM_OF_PREVIEW_SIZE
+	)
+)PREVIEW_SIZE_T;
+
+/* Video Preview Size */
+FID_TO_TYPE_ENUM(
+	FID_VIDEO_PREVIEW_SIZE,
+	FTYPE_ENUM(
+		VIDEO_PREVIEW_SIZE_BEGIN = 0,
+		VIDEO_PREVIEW_SIZE_640_480 = VIDEO_PREVIEW_SIZE_BEGIN,
+		VIDEO_PREVIEW_SIZE_800_600,
+		NUM_OF_VIDEO_PREVIEW_SIZE
+	)
+)VIDEO_PREVIEW_SIZE_T;
+
+
+/* Frame Rate */
+FID_TO_TYPE_ENUM(
+	FID_FRAME_RATE,
+	FTYPE_ENUM(
+		FRAME_RATE_BEGIN = 0,
+		FRAME_RATE_000FPS = FRAME_RATE_BEGIN, /* 0.0fps */
+		FRAME_RATE_010FPS,
+		FRAME_RATE_020FPS,
+		FRAME_RATE_030FPS,
+		FRAME_RATE_040FPS,
+		FRAME_RATE_050FPS,
+		FRAME_RATE_060FPS,
+		FRAME_RATE_070FPS,
+		FRAME_RATE_075FPS = FRAME_RATE_070FPS, /* legacy definition. */
+		FRAME_RATE_080FPS,
+		FRAME_RATE_090FPS,
+		FRAME_RATE_100FPS,    /* 10  fps */
+		FRAME_RATE_110FPS,
+		FRAME_RATE_120FPS,
+		FRAME_RATE_125FPS = FRAME_RATE_120FPS,    /* legacy definition. */
+		FRAME_RATE_130FPS,
+		FRAME_RATE_140FPS,
+		FRAME_RATE_150FPS,
+		FRAME_RATE_160FPS,
+		FRAME_RATE_170FPS,
+		FRAME_RATE_180FPS,
+		FRAME_RATE_190FPS,
+		FRAME_RATE_200FPS, /* 20  fps */
+		FRAME_RATE_210FPS,
+		FRAME_RATE_220FPS,
+		FRAME_RATE_230FPS,
+		FRAME_RATE_240FPS,
+		FRAME_RATE_250FPS,
+		FRAME_RATE_260FPS,
+		FRAME_RATE_270FPS,
+		FRAME_RATE_280FPS,
+		FRAME_RATE_290FPS,
+		FRAME_RATE_300FPS,   /* 30  fps */
+		NUM_OF_FRAME_RATE
+	)
+)FRAME_RATE_T;
+
+/* Frame Rate Range */
+FID_TO_TYPE_ENUM(
+	FID_FRAME_RATE_RANGE,
+	FTYPE_ENUM(
+		FRAME_RATE_RANGE_BEGIN = 0,
+		FRAME_RATE_RANGE_5_30_FPS = FRAME_RATE_RANGE_BEGIN,   /* 5-30fps */
+		NUM_OF_FRAME_RATE_RANGE
+	)
+)FRAME_RATE_RANGE_T;
+
+
+/* Focus Distance Normal */
+FID_TO_TYPE_ENUM(
+	FID_FOCUS_DIST_NORMAL,
+	FTYPE_ENUM(
+		FOCUS_DIST_N_BEGIN = 0,
+		FOCUS_DIST_N_INFINITE = FOCUS_DIST_N_BEGIN,  /* Infinite */
+		FOCUS_DIST_N_10CM,
+		NUM_OF_FOCUS_DIST_N
+	)
+)FOCUS_DIST_NORMAL_T;
+
+
+/* Focus Distance Macro */
+FID_TO_TYPE_ENUM(
+	FID_FOCUS_DIST_MACRO,
+	FTYPE_ENUM(
+		FOCUS_DIST_M_BEGIN = 0,
+		FOCUS_DIST_M_INFINITE = FOCUS_DIST_M_BEGIN,   /* Infinite */
+		FOCUS_DIST_M_5CM,
+		FOCUS_DIST_M_10CM,
+		NUM_OF_FOCUS_DIST_M
+	)
+)FOCUS_DIST_MACRO_T;
+
+
+/* Face Detection */
+FID_TO_TYPE_ENUM(
+	FID_FD_ON_OFF,
+	FTYPE_ENUM(
+		FD_BEGIN = 0,
+		FD_OFF = FD_BEGIN,
+		FD_ON,
+		NUM_OF_FD
+	)
+)FD_MODE_T;
+
+
+/* EIS */
+FID_TO_TYPE_ENUM(
+	FID_EIS,
+	FTYPE_ENUM(
+		EIS_BEGIN = 0,
+		EIS_OFF = EIS_BEGIN,
+		EIS_ON,
+		NUM_OF_EIS
+	)
+)EIS_T;
+
+/* ZSD */
+FID_TO_TYPE_ENUM(
+	FID_ZSD,
+	FTYPE_ENUM(
+		ZSD_BEGIN = 0,
+		ZSD_OFF = ZSD_BEGIN,
+		ZSD_ON,
+		NUM_OF_ZSD
+	)
+)ZSD_T;
+
+/* AF LAMP */
+FID_TO_TYPE_ENUM(
+	FID_AF_LAMP,
+	FTYPE_ENUM(
+		AF_LAMP_BEGIN = 0,
+		AF_LAMP_OFF = AF_LAMP_BEGIN,
+		AF_LAMP_ON,
+		AF_LAMP_AUTO,
+		AF_LAMP_FLASH,
+		NUM_OF_AF_LAMP
+	)
+)AF_LAMP_T;
+
+/* Stereo 3D Capture Size */
+FID_TO_TYPE_ENUM(
+	FID_STEREO_3D_CAP_SIZE,
+	FTYPE_ENUM(
+		STEREO_3D_CAPTURE_SIZE_BEGIN = 0,
+		STEREO_3D_CAPTURE_SIZE_2560_720 = STEREO_3D_CAPTURE_SIZE_BEGIN,
+		STEREO_3D_CAPTURE_SIZE_3840_1080,
+		NUM_OF_STEREO_3D_CAPTURE_SIZE
+	)
+)STEREO_3D_CAPTURE_SIZE_T;
+
+/* Stereo 3D Preview Size */
+FID_TO_TYPE_ENUM(
+	FID_STEREO_3D_PREVIEW_SIZE,
+	FTYPE_ENUM(
+		STEREO_3D_PREVIEW_SIZE_BEGIN = 0,
+		STEREO_3D_PREVIEW_SIZE_640_360 = STEREO_3D_PREVIEW_SIZE_BEGIN,
+		STEREO_3D_PREVIEW_SIZE_854_480,
+		STEREO_3D_PREVIEW_SIZE_960_540,
+		STEREO_3D_PREVIEW_SIZE_1280_720,
+		NUM_OF_STEREO_3D_PREVIEW_SIZE
+	)
+)STEREO_3D_PREVIEW_SIZE_T;
+
+/* Stereo 3D Type */
+FID_TO_TYPE_ENUM(
+	FID_STEREO_3D_TYPE,
+	FTYPE_ENUM(
+		STEREO_3D_TYPE_BEGIN = 0,
+		STEREO_3D_NOT_SUPPORT = STEREO_3D_TYPE_BEGIN,
+		STEREO_3D_FRAME_SEQ,
+		STEREO_3D_SIDE_BY_SIDE,
+		STEREO_3D_TOP_BOTTOM,
+		NUM_OF_STEREO_3D_TYPE
+	)
+)STEREO_3D_TYPE_T;
+
+/* Stereo 3D Mode */
+FID_TO_TYPE_ENUM(
+	FID_STEREO_3D_MODE,
+	FTYPE_ENUM(
+		STEREO_3D_MODE_BEGIN = 0,
+		STEREO_3D_OFF = STEREO_3D_MODE_BEGIN,
+		STEREO_3D_ON,
+		NUM_OF_STEREO_3D_MODE
+	)
+)STEREO_3D_MODE_T;
+
+/* Stereo 3D Image Format */
+FID_TO_TYPE_ENUM(
+	FID_STEREO_3D_IMAGE_FORMAT,
+	FTYPE_ENUM(
+		STEREO_3D_IMAGE_FORMAT_BEGIN = 0,
+		STEREO_3D_JPS = STEREO_3D_IMAGE_FORMAT_BEGIN,
+		STEREO_3D_MPO,
+		NUM_OF_STEREO_3D_IMAGE_FORMAT
+	)
+)STEREO_3D_IMAGE_FORMAT_T;
+
+/* YUV Auto test */
+FID_TO_TYPE_ENUM(
+	FID_YUV_AUTOTEST,
+	FTYPE_ENUM(
+		YUV_AUTOTEST_BEGIN = 0,
+		YUV_AUTOTEST_SET_SHADDING = YUV_AUTOTEST_BEGIN,
+		YUV_AUTOTEST_SET_GAMMA,
+		YUV_AUTOTEST_SET_AE,
+		YUV_AUTOTEST_SET_SHUTTER,
+		YUV_AUTOTEST_SET_GAIN,
+		YUV_AUTOTEST_GET_SHUTTER_RANGE,
+		YUV_AUTOTEST_GET_SHADDING,
+		YUV_AUTOTEST_GET_GAMMA,
+		YUV_AUTOTEST_GET_AE,
+		YUV_AUTOTEST_GET_SHUTTER,
+		YUV_AUTOTEST_GET_GAIN,
+		NUM_OF_YUV_AUTOTEST
+	)
+)YUV_AUTOTEST_T;
+
+#endif              /* _KD_CAMERA_FEATURE_ENUM_H_ */
diff --git a/kernel-headers/kd_camera_feature_id.h b/kernel-headers/kd_camera_feature_id.h
new file mode 100644
index 0000000..c44c496
--- /dev/null
+++ b/kernel-headers/kd_camera_feature_id.h
@@ -0,0 +1,92 @@
+#ifndef _KD_CAMERA_FEATURE_ID_H_
+#define _KD_CAMERA_FEATURE_ID_H_
+
+
+
+/* ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */
+/* Definition of Feature ID. */
+/* ps: FID = 0 is reserved. */
+/* ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */
+typedef enum {
+    FID_PRE_BEGIN = 0,
+    /* //////////////////////////////////////////////////////////////////////////// */
+    /* Scene-Independent (SI) feature id. */
+    FID_PRE_BEGIN_SI = FID_PRE_BEGIN,
+    /* ---------------------------------------------------------------------------- */
+    /* Misc. feature id. */
+    FID_PRE_BEGIN_MISC_SI = FID_PRE_BEGIN_SI,
+        FID_ZOOM_FACTOR,  /* Legacy symbol (Remove if possible) */
+        FID_AE_STROBE,
+        FID_EIS,
+        FID_ZSD,
+        FID_AWB2PASS,
+        FID_AF_LAMP,
+        FID_FAST_CONTINUOUS_SHOT,
+        FID_OVER_LAST_MISC_SI,
+        FID_PRE_BEGIN_RAW_ONLY_SI = FID_OVER_LAST_MISC_SI - 1,
+        FID_OVER_LAST_RAW_ONLY_SI,
+        FID_PRE_BEGIN_RAW_YUV_SI = FID_OVER_LAST_RAW_ONLY_SI - 1,
+        FID_SCENE_MODE,
+        FID_COLOR_EFFECT,
+        FID_CAPTURE_MODE,
+        FID_CAP_SIZE,
+        FID_PREVIEW_SIZE,
+        FID_VIDEO_PREVIEW_SIZE,
+        FID_FRAME_RATE,
+        FID_FRAME_RATE_RANGE,
+        FID_AE_FLICKER,
+        FID_FOCUS_DIST_NORMAL,
+        FID_FOCUS_DIST_MACRO,
+        FID_STEREO_3D_CAP_SIZE,
+        FID_STEREO_3D_PREVIEW_SIZE,
+        FID_STEREO_3D_TYPE,
+        FID_STEREO_3D_MODE,
+        FID_STEREO_3D_IMAGE_FORMAT,
+        FID_OVER_LAST_RAW_YUV_SI,
+    /* YUV-only feature id. */
+    FID_PRE_BEGIN_YUV_ONLY_SI = FID_OVER_LAST_RAW_YUV_SI - 1,
+    FID_OVER_LAST_YUV_ONLY_SI,
+    
+    /* ---------------------------------------------------------------------------- */
+    FID_OVER_LAST_SI = FID_OVER_LAST_YUV_ONLY_SI,
+    /* //////////////////////////////////////////////////////////////////////////// */
+    /* Scene-Dependent (SD) feature id. */
+    FID_PRE_BEGIN_SD = FID_OVER_LAST_SI - 1,
+    /* ---------------------------------------------------------------------------- */
+    /* Misc. feature id. */
+    FID_PRE_BEGIN_MISC_SD = FID_PRE_BEGIN_SD,
+    FID_FD_ON_OFF,
+    FID_OVER_LAST_MISC_SD,
+    /* RAW-only feature id. */
+    FID_PRE_BEGIN_RAW_ONLY_SD = FID_OVER_LAST_MISC_SD - 1,
+    FID_OVER_LAST_RAW_ONLY_SD,
+    /* RAW-YUV-shared feature id. */
+    FID_PRE_BEGIN_RAW_YUV_SD = FID_OVER_LAST_RAW_ONLY_SD - 1,
+        FID_AE_SCENE_MODE,
+        FID_AE_METERING,
+        FID_AE_ISO,
+        FID_AE_EV,
+        FID_AF_MODE,
+        FID_AF_METERING,
+        FID_AWB_MODE,
+        FID_ISP_EDGE,
+        FID_ISP_HUE,
+        FID_ISP_SAT,
+        FID_ISP_BRIGHT,
+        FID_ISP_CONTRAST,
+        FID_OVER_LAST_RAW_YUV_SD,
+    /* YUV-only feature id. */
+        FID_PRE_BEGIN_YUV_ONLY_SD = FID_OVER_LAST_RAW_YUV_SD - 1,
+        FID_YUV_AUTOTEST,
+        FID_OVER_LAST_YUV_ONLY_SD,
+    
+    /* ---------------------------------------------------------------------------- */
+    FID_OVER_LAST_SD = FID_OVER_LAST_YUV_ONLY_SD,
+    /* //////////////////////////////////////////////////////////////////////////// */
+    FID_OVER_LAST = FID_OVER_LAST_SD
+/* ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ */
+
+} FEATURE_ID;
+
+
+#endif              /* _KD_CAMERA_FEATURE_ID_H_ */
diff --git a/kernel-headers/kd_imgsensor.h b/kernel-headers/kd_imgsensor.h
new file mode 100644
index 0000000..98ace23
--- /dev/null
+++ b/kernel-headers/kd_imgsensor.h
@@ -0,0 +1,462 @@
+#ifndef _KD_IMGSENSOR_H
+#define _KD_IMGSENSOR_H
+
+#include <linux/ioctl.h>
+/* #define CONFIG_COMPAT */
+#ifdef CONFIG_COMPAT
+/* 64 bit */
+#include <linux/fs.h>
+#include <linux/compat.h>
+#endif
+
+#ifndef ASSERT
+#define ASSERT(expr)        BUG_ON(!(expr))
+#endif
+
+#define IMGSENSORMAGIC 'i'
+/* IOCTRL(inode * ,file * ,cmd ,arg ) */
+/* S means "set through a ptr" */
+/* T means "tell by a arg value" */
+/* G means "get by a ptr" */
+/* Q means "get by return a value" */
+/* X means "switch G and S atomically" */
+/* H means "switch T and Q atomically" */
+
+/*******************************************************************************
+*
+********************************************************************************/
+#define YUV_INFO(_id, name, getCalData)\
+	{ \
+		_id, name, \
+NSFeature :  : YUVSensorInfo < _id >  :  : createInstance(name, #name), \
+		(NSFeature :  : SensorInfoBase*(*)()) \
+NSFeature :  : YUVSensorInfo < _id >  :  : getInstance, \
+NSFeature :  : YUVSensorInfo < _id >  :  : getDefaultData, \
+		getCalData, \
+NSFeature :  : YUVSensorInfo < _id >  :  : getNullFlickerPara \
+	}
+#define RAW_INFO(_id, name, getCalData)\
+	{ \
+		_id, name, \
+NSFeature :  : RAWSensorInfo < _id >  :  : createInstance(name, #name), \
+		(NSFeature :  : SensorInfoBase*(*)()) \
+NSFeature :  : RAWSensorInfo < _id >  :  : getInstance, \
+NSFeature :  : RAWSensorInfo < _id >  :  : getDefaultData, \
+		getCalData, \
+NSFeature :  : RAWSensorInfo < _id >  :  : getFlickerPara \
+	}
+/*******************************************************************************
+*
+********************************************************************************/
+
+/* sensorOpen */
+#define KDIMGSENSORIOC_T_OPEN                       _IO(IMGSENSORMAGIC, 0)
+/* sensorGetInfo */
+#define KDIMGSENSORIOC_X_GETINFO                    _IOWR(IMGSENSORMAGIC, 5, ACDK_SENSOR_GETINFO_STRUCT)
+/* sensorGetResolution */
+#define KDIMGSENSORIOC_X_GETRESOLUTION              _IOWR(IMGSENSORMAGIC, 10, ACDK_SENSOR_RESOLUTION_INFO_STRUCT)
+/* For kernel 64-bit */
+#define KDIMGSENSORIOC_X_GETRESOLUTION2             _IOWR(IMGSENSORMAGIC, 10, ACDK_SENSOR_PRESOLUTION_STRUCT)
+/* sensorFeatureControl */
+#define KDIMGSENSORIOC_X_FEATURECONCTROL            _IOWR(IMGSENSORMAGIC, 15, ACDK_SENSOR_FEATURECONTROL_STRUCT)
+/* sensorControl */
+#define KDIMGSENSORIOC_X_CONTROL                    _IOWR(IMGSENSORMAGIC, 20, ACDK_SENSOR_CONTROL_STRUCT)
+/* sensorClose */
+#define KDIMGSENSORIOC_T_CLOSE                      _IO(IMGSENSORMAGIC, 25)
+/* sensorSearch */
+#define KDIMGSENSORIOC_T_CHECK_IS_ALIVE             _IO(IMGSENSORMAGIC, 30)
+/* set sensor driver */
+#define KDIMGSENSORIOC_X_SET_DRIVER                 _IOWR(IMGSENSORMAGIC, 35, SENSOR_DRIVER_INDEX_STRUCT)
+/* get socket postion */
+#define KDIMGSENSORIOC_X_GET_SOCKET_POS             _IOWR(IMGSENSORMAGIC, 40, u32)
+/* set I2C bus */
+#define KDIMGSENSORIOC_X_SET_I2CBUS                 _IOWR(IMGSENSORMAGIC, 45, u32)
+/* set I2C bus */
+#define KDIMGSENSORIOC_X_RELEASE_I2C_TRIGGER_LOCK   _IO(IMGSENSORMAGIC, 50)
+/* Set Shutter Gain Wait Done */
+#define KDIMGSENSORIOC_X_SET_SHUTTER_GAIN_WAIT_DONE _IOWR(IMGSENSORMAGIC, 55, u32)
+/* set mclk */
+#define KDIMGSENSORIOC_X_SET_MCLK_PLL               _IOWR(IMGSENSORMAGIC, 60, ACDK_SENSOR_MCLK_STRUCT)
+#define KDIMGSENSORIOC_X_GETINFO2                   _IOWR(IMGSENSORMAGIC, 65, IMAGESENSOR_GETINFO_STRUCT)
+/* set open/close sensor index */
+#define KDIMGSENSORIOC_X_SET_CURRENT_SENSOR         _IOWR(IMGSENSORMAGIC, 70, u32)
+/* set GPIO */
+#define KDIMGSENSORIOC_X_SET_GPIO                   _IOWR(IMGSENSORMAGIC, 75, IMGSENSOR_GPIO_STRUCT)
+/* Get ISP CLK */
+#define KDIMGSENSORIOC_X_GET_ISP_CLK                _IOWR(IMGSENSORMAGIC, 80, u32)
+
+#ifdef CONFIG_COMPAT
+#define COMPAT_KDIMGSENSORIOC_X_GETINFO            _IOWR(IMGSENSORMAGIC, 5, COMPAT_ACDK_SENSOR_GETINFO_STRUCT)
+#define COMPAT_KDIMGSENSORIOC_X_FEATURECONCTROL    _IOWR(IMGSENSORMAGIC, 15, COMPAT_ACDK_SENSOR_FEATURECONTROL_STRUCT)
+#define COMPAT_KDIMGSENSORIOC_X_CONTROL            _IOWR(IMGSENSORMAGIC, 20, COMPAT_ACDK_SENSOR_CONTROL_STRUCT)
+#define COMPAT_KDIMGSENSORIOC_X_GETINFO2           _IOWR(IMGSENSORMAGIC, 65, COMPAT_IMAGESENSOR_GETINFO_STRUCT)
+#define COMPAT_KDIMGSENSORIOC_X_GETRESOLUTION2     _IOWR(IMGSENSORMAGIC, 10, COMPAT_ACDK_SENSOR_PRESOLUTION_STRUCT)
+#endif
+
+/*******************************************************************************
+*
+********************************************************************************/
+/* SENSOR CHIP VERSION */
+/*IMX*/
+#define IMX220_SENSOR_ID                        0x0220
+#define IMX145_SENSOR_ID                        0x0145
+#define IMX219_SENSOR_ID                        0x0219
+#define IMX215_SENSOR_ID                        0x0215
+#define IMX214_SENSOR_ID                        0x0214
+#define IMX179_SENSOR_ID                        0x0179
+#define IMX175_SENSOR_ID                        0x0175
+#define IMX178_SENSOR_ID                        0x0178
+#define IMX164_SENSOR_ID                        0x0164
+#define IMX135_SENSOR_ID                        0x0135
+#define IMX132MIPI_SENSOR_ID                    0x0132
+#define IMX119_SENSOR_ID                        0x0119
+#define IMX105_SENSOR_ID                        0x0105
+#define IMX091_SENSOR_ID                        0x0091
+#define IMX073_SENSOR_ID                        0x0046
+#define IMX058_SENSOR_ID                        0x0058
+#define IMX166_SENSOR_ID                        0x0152
+/*OV*/
+#define OV23850_SENSOR_ID                       0x023850
+#define OV16825MIPI_SENSOR_ID                   0x016820
+#define OV13850_SENSOR_ID                       0xD850
+#define OV12830_SENSOR_ID                       0xC830
+#define OV9760MIPI_SENSOR_ID                    0x9760
+#define OV9762MIPI_SENSOR_ID                    0x9762
+#define OV9762SUBMIPI_SENSOR_ID                 0x9763
+#define OV9740MIPI_SENSOR_ID                    0x9740
+#define OV9726_SENSOR_ID                        0x9726
+#define OV9726MIPI_SENSOR_ID                    0x9726
+#define OV8865_SENSOR_ID                        0x8865
+#define OV8858_SENSOR_ID                        0x8858
+#define OV8858S_SENSOR_ID                      (0x8858+1)
+#define OV8858TRULY_SENSOR_ID                   0x885a
+#define OV8858SUNNY_SENSOR_ID                   0x8859
+#define OV8830_SENSOR_ID                        0x8830
+#define OV8825_SENSOR_ID                        0x8825
+#define OV7675_SENSOR_ID                        0x7673
+#define OV5693_SENSOR_ID                        0x5690
+#define OV5670MIPI_SENSOR_ID                    0x5670
+#define OV5670SUBMIPI_SENSOR_ID                 0x5672
+#define OV5671MIPI_SENSOR_ID                    0x5671
+#define OV5650_SENSOR_ID                        0x5651
+#define OV5650MIPI_SENSOR_ID                    0x5651
+#define OV5648MIPI_SENSOR_ID                    0x5648
+#define OV5647_SENSOR_ID                        0x5647
+#define OV5647MIPI_SENSOR_ID                    0x5647
+#define OV5645MIPI_SENSOR_ID                    0x5645
+#define OV5642_SENSOR_ID                        0x5642
+#define OV4688MIPI_SENSOR_ID                    0x4688
+#define OV3640_SENSOR_ID                        0x364C
+#define OV2724MIPI_SENSOR_ID                    0x2724
+#define OV2722MIPI_SENSOR_ID                    0x2722
+#define OV2680MIPI_SENSOR_ID                    0x2680
+#define OV2680_SENSOR_ID                        0x2680
+#define OV2659_SENSOR_ID                        0x2656
+#define OV2655_SENSOR_ID                        0x2656
+#define OV2650_SENSOR_ID                        0x2652
+#define OV2650_SENSOR_ID_1                      0x2651
+#define OV2650_SENSOR_ID_2                      0x2652
+#define OV2650_SENSOR_ID_3                      0x2655
+/*S5K*/
+#define S5K2X8_SENSOR_ID                        0x2188
+#define S5K2P8_SENSOR_ID                        0x2108
+#define S5K3M2_SENSOR_ID                        0x30D2
+#define S5K3M2TRULY_SENSOR_ID                   0x30D4
+#define S5K3M2SUNNY_SENSOR_ID                   0x30D3
+#define S5K3AAEA_SENSOR_ID                      0x07AC
+#define S5K3BAFB_SENSOR_ID                      0x7070
+#define S5K3H7Y_SENSOR_ID                       0x3087
+#define S5K3H2YX_SENSOR_ID                      0x382b
+#define S5KA3DFX_SENSOR_ID                      0x00AB
+#define S5K3E2FX_SENSOR_ID                      0x3E2F
+#define S5K4B2FX_SENSOR_ID                      0x5080
+#define S5K4E1GA_SENSOR_ID                      0x4E10
+#define S5K4ECGX_SENSOR_ID                      0x4EC0
+#define S5K53BEX_SENSOR_ID                      0x45A8
+#define S5K53BEB_SENSOR_ID                      0x87A8
+#define S5K5BAFX_SENSOR_ID                      0x05BA
+#define S5K4E2GX_SENSOR_ID                      0x4e20
+#define S5K5E2YA_SENSOR_ID                      0x5e20
+#define S5K5E2YASUB_SENSOR_ID                   0x5e21
+#define S5K4H5YX_2LANE_SENSOR_ID                0x485B
+#define S5K4H5YC_SENSOR_ID                      0x485B
+#define S5K4H5YC_2LANE_SENSOR_ID                0x485b
+#define S5K83AFX_SENSOR_ID                      0x01C4
+#define S5K5CAGX_SENSOR_ID                      0x05ca
+#define S5K8AAYX_MIPI_SENSOR_ID                 0x08aa
+#define S5K8AAYX_SENSOR_ID                      0x08aa
+#define S5K3L2_SENSOR_ID                        0x30c2
+#define S5K3H5XA_SENSOR_ID                      0x3085
+/*HI*/
+#define HI841_SENSOR_ID                         0x0841
+#define HI707_SENSOR_ID                         0x00b8
+#define HI704_SENSOR_ID                         0x0096
+#define HI551_SENSOR_ID                         0x0551
+#define HI545MIPI_SENSOR_ID                     0x0545
+#define HI544MIPI_SENSOR_ID                     0x0544
+#define HI542_SENSOR_ID                         0x00B1
+#define HI542MIPI_SENSOR_ID                     0x00B1
+#define HI253_SENSOR_ID                         0x0092
+#define HI251_SENSOR_ID                         0x0084
+#define HI191MIPI_SENSOR_ID                     0x0191
+#define HIVICF_SENSOR_ID                        0x0081
+/*MT*/
+#define MT9D011_SENSOR_ID                       0x1511
+#define MT9D111_SENSOR_ID                       0x1511
+#define MT9D112_SENSOR_ID                       0x1580
+#define MT9M011_SENSOR_ID                       0x1433
+#define MT9M111_SENSOR_ID                       0x143A
+#define MT9M112_SENSOR_ID                       0x148C
+#define MT9M113_SENSOR_ID                       0x2480
+#define MT9P012_SENSOR_ID                       0x2800
+#define MT9P012_SENSOR_ID_REV7                  0x2801
+#define MT9T012_SENSOR_ID                       0x1600
+#define MT9T013_SENSOR_ID                       0x2600
+#define MT9T113_SENSOR_ID                       0x4680
+#define MT9V112_SENSOR_ID                       0x1229
+#define MT9DX11_SENSOR_ID                       0x1519
+#define MT9D113_SENSOR_ID                       0x2580
+#define MT9D115_SENSOR_ID                       0x2580
+#define MT9D115MIPI_SENSOR_ID                   0x2580
+#define MT9V113_SENSOR_ID                       0x2280
+#define MT9V114_SENSOR_ID                       0x2283
+#define MT9V115_SENSOR_ID                       0x2284
+#define MT9P015_SENSOR_ID                       0x2803
+#define MT9P017_SENSOR_ID                       0x4800
+#define MT9P017MIPI_SENSOR_ID                   0x4800
+#define MT9T113MIPI_SENSOR_ID                   0x4680
+/*GC*/
+#define GC2755_SENSOR_ID                        0x2655
+#define GC2355_SENSOR_ID                        0x2355
+#define GC2365_SENSOR_ID                        0x2365
+#define GC2355SUB_SENSOR_ID                        0x2356
+#define GC2235_SENSOR_ID                        0x2235
+
+#define GC2235MIPI_SENSOR_ID                        0x2235
+
+#define GC2035_SENSOR_ID                        0x2035
+#define GC2145_SENSOR_ID                        0x2145
+#define GC0330_SENSOR_ID                        0xC1
+#define GC0329_SENSOR_ID                        0xC0
+#define GC0310_SENSOR_ID                        0xa310
+#define GC0310MAIN_SENSOR_ID                    0xa311
+#define GC2155MIPI_SENSOR_ID                    0x2155
+#define GC0313MIPI_YUV_SENSOR_ID                0xD0
+#define GC0409_SENSOR_ID                        0x0409
+#define GC5004MIPI_SENSOR_ID                    0x5004
+#define GC5005MIPI_SENSOR_ID                    0x5005
+#define GC5005SUBMIPI_SENSOR_ID                 0x5006
+#define GC5024MIPI_SENSOR_ID                    0x5024
+#define GC8024MIPI_SENSOR_ID                    0x8024
+#define GC8003MIPI_SENSOR_ID                    0x8003
+/*SP*/
+#define SP0A19_YUV_SENSOR_ID                    0xA6
+#define SP0A20_SENSOR_ID                        0x2b
+#define SP2508_SENSOR_ID                        0x2508
+#define SP2509MIPI_SENSOR_ID                    0x2509
+#define SP2518_YUV_SENSOR_ID                    0x53
+#define SP5409MIPI_SENSOR_ID                    0x5409
+#define SP5409SUBMIPI_SENSOR_ID                    0x540a
+#define SP8408MIPI_SENSOR_ID                    0x1490
+/*A*/
+#define A5141MIPI_SENSOR_ID                     0x4800
+#define A5142MIPI_SENSOR_ID                     0x4800
+/*HM*/
+#define HM3451_SENSOR_ID                        0x345
+#define HM5040_SENSOR_ID                        0x3bb
+/*AR*/
+#define AR0833_SENSOR_ID                        0x4B03
+/*SIV*/
+#define SID020A_SENSOR_ID                       0x12B4
+#define SIV100B_SENSOR_ID                       0x0C11
+#define SIV100A_SENSOR_ID                       0x0C10
+#define SIV120A_SENSOR_ID                       0x1210
+#define SIV120B_SENSOR_ID                       0x0012
+#define SIV121D_SENSOR_ID                       0xDE
+#define SIM101B_SENSOR_ID                       0x09A0
+#define SIM120C_SENSOR_ID                       0x0012
+#define SID130B_SENSOR_ID                       0x001b
+#define SIC110A_SENSOR_ID                       0x000D
+#define SIV120B_SENSOR_ID                       0x0012
+/*PAS (PixArt Image)*/
+#define PAS105_SENSOR_ID                        0x0065
+#define PAS302_SENSOR_ID                        0x0064
+#define PAS5101_SENSOR_ID                       0x0067
+#define PAS6180_SENSOR_ID                       0x6179
+/*Panasoic*/
+#define MN34152_SENSOR_ID                       0x01
+/*Toshiba*/
+#define T4KA7_SENSOR_ID                         0x2c30
+/*Others*/
+#define SHARP3D_SENSOR_ID                       0x003d
+#define T8EV5_SENSOR_ID                         0x1011
+
+/* CAMERA DRIVER NAME */
+#define CAMERA_HW_DEVNAME                       "kd_camera_hw"
+/* SENSOR DEVICE DRIVER NAME */
+/*IMX*/
+#define SENSOR_DRVNAME_IMX220_MIPI_RAW          "imx220mipiraw"
+#define SENSOR_DRVNAME_IMX145_MIPI_RAW          "imx145mipiraw"
+#define SENSOR_DRVNAME_IMX219_MIPI_RAW          "imx219mipiraw"
+#define SENSOR_DRVNAME_IMX215_MIPI_RAW          "imx215mipiraw"
+#define SENSOR_DRVNAME_IMX214_MIPI_RAW          "imx214mipiraw"
+#define SENSOR_DRVNAME_IMX179_MIPI_RAW          "imx179mipiraw"
+#define SENSOR_DRVNAME_IMX179_MIPI_RAW_4LANE     "imx179mipiraw4lane"
+#define SENSOR_DRVNAME_IMX175_MIPI_RAW          "imx175mipiraw"
+#define SENSOR_DRVNAME_IMX178_MIPI_RAW          "imx178mipiraw"
+#define SENSOR_DRVNAME_IMX164_MIPI_RAW          "imx164mipiraw"
+#define SENSOR_DRVNAME_IMX135_MIPI_RAW          "imx135mipiraw"
+#define SENSOR_DRVNAME_IMX132_MIPI_RAW          "imx132mipiraw"
+#define SENSOR_DRVNAME_IMX119_MIPI_RAW          "imx119mipiraw"
+#define SENSOR_DRVNAME_IMX105_MIPI_RAW          "imx105mipiraw"
+#define SENSOR_DRVNAME_IMX091_MIPI_RAW          "imx091mipiraw"
+#define SENSOR_DRVNAME_IMX073_MIPI_RAW          "imx073mipiraw"
+#define SENSOR_DRVNAME_IMX166_MIPI_RAW          "imx166mipiraw"
+/*OV*/
+#define SENSOR_DRVNAME_OV16825_MIPI_RAW         "ov16825mipiraw"
+#define SENSOR_DRVNAME_OV13850_MIPI_RAW         "ov13850mipiraw"
+#define SENSOR_DRVNAME_OV12830_MIPI_RAW         "ov12830mipiraw"
+#define SENSOR_DRVNAME_OV9760_MIPI_RAW          "ov9760mipiraw"
+#define SENSOR_DRVNAME_OV9762_MIPI_RAW          "ov9762mipiraw"
+#define SENSOR_DRVNAME_OV9762SUB_MIPI_RAW       "ov9762submipiraw"
+#define SENSOR_DRVNAME_OV9740_MIPI_YUV          "ov9740mipiyuv"
+#define SENSOR_DRVNAME_0V9726_RAW               "ov9726raw"
+#define SENSOR_DRVNAME_OV9726_MIPI_RAW          "ov9726mipiraw"
+#define SENSOR_DRVNAME_OV8865_MIPI_RAW          "ov8865mipiraw"
+#define SENSOR_DRVNAME_OV8858_MIPI_RAW          "ov8858mipiraw"
+#define SENSOR_DRVNAME_OV8858S_MIPI_RAW         "ov8858smipiraw"
+#define SENSOR_DRVNAME_OV8858TRULY_MIPI_RAW     "ov8858trulymipiraw"
+#define SENSOR_DRVNAME_OV8858SUNNY_MIPI_RAW     "ov8858sunnymipiraw"
+#define SENSOR_DRVNAME_OV8830_RAW               "ov8830"
+#define SENSOR_DRVNAME_OV8825_MIPI_RAW          "ov8825mipiraw"
+#define SENSOR_DRVNAME_OV7675_YUV               "ov7675yuv"
+#define SENSOR_DRVNAME_OV5693_MIPI_RAW          "ov5693mipi"
+#define SENSOR_DRVNAME_OV5670_MIPI_RAW          "ov5670mipiraw"
+#define SENSOR_DRVNAME_OV5670SUB_MIPI_RAW       "ov5670submipiraw"
+#define SENSOR_DRVNAME_OV5671_MIPI_RAW          "ov5671mipiraw"
+#define SENSOR_DRVNAME_OV5647MIPI_RAW           "ov5647mipiraw"
+#define SENSOR_DRVNAME_OV5645_MIPI_YUV          "ov5645_mipi_yuv"
+#define SENSOR_DRVNAME_OV5650MIPI_RAW           "ov5650mipiraw"
+#define SENSOR_DRVNAME_OV5650_RAW               "ov5650raw"
+#define SENSOR_DRVNAME_OV5648_MIPI_RAW          "ov5648mipi"
+#define SENSOR_DRVNAME_OV5647_RAW               "ov5647"
+#define SENSOR_DRVNAME_OV5642_RAW               "ov5642raw"
+#define SENSOR_DRVNAME_OV5642_MIPI_YUV          "ov5642mipiyuv"
+#define SENSOR_DRVNAME_OV5642_MIPI_RGB          "ov5642mipirgb"
+#define SENSOR_DRVNAME_OV5642_MIPI_JPG          "ov5642mipijpg"
+#define SENSOR_DRVNAME_OV5642_YUV               "ov5642yuv"
+#define SENSOR_DRVNAME_OV5642_YUV_SWI2C         "ov5642yuvswi2c"
+#define SENSOR_DRVNAME_OV4688_MIPI_RAW          "ov4688mipiraw"
+#define SENSOR_DRVNAME_OV3640_RAW               "ov3640"
+#define SENSOR_DRVNAME_OV3640_YUV               "ov3640yuv"
+#define SENSOR_DRVNAME_OV2722_MIPI_RAW          "ov2722mipiraw"
+#define SENSOR_DRVNAME_OV2680_MIPI_RAW          "ov2680mipiraw"
+#define SENSOR_DRVNAME_OV2659_YUV               "ov2659yuv"
+#define SENSOR_DRVNAME_OV2655_YUV               "ov2655yuv"
+#define SENSOR_DRVNAME_OV2650_RAW               "ov265x"
+/*S5K*/
+#define SENSOR_DRVNAME_S5K2P8_MIPI_RAW          "s5k2p8mipiraw"
+#define SENSOR_DRVNAME_S5K3M2_MIPI_RAW          "s5k3m2mipiraw"
+#define SENSOR_DRVNAME_S5K3M2TRULY_MIPI_RAW          "s5k3m2trulymipiraw"
+#define SENSOR_DRVNAME_S5K3M2SUNNY_MIPI_RAW          "s5k3m2sunnymipiraw"
+#define SENSOR_DRVNAME_S5K3H2YX_MIPI_RAW        "s5k3h2yxmipiraw"
+#define SENSOR_DRVNAME_S5K3H7Y_MIPI_RAW         "s5k3h7ymipiraw"
+#define SENSOR_DRVNAME_S5K4H5YC_MIPI_RAW        "s5k4h5ycmipiraw"
+#define SENSOR_DRVNAME_S5K4E1GA_MIPI_RAW        "s5k4e1gamipiraw"
+#define SENSOR_DRVNAME_S5K4ECGX_MIPI_YUV        "s5k4ecgxmipiyuv"
+#define SENSOR_DRVNAME_S5K5CAGX_YUV             "s5k5cagxyuv"
+#define SENSOR_DRVNAME_S5K4H5YX_2LANE_MIPI_RAW  "s5k4h5yx2lanemipiraw"
+#define SENSOR_DRVNAME_S5K4E2GX_MIPI_RAW   "s5k4e2gxmipiraw"
+#define SENSOR_DRVNAME_S5K5E2YA_MIPI_RAW        "s5k5e2yamipiraw"
+#define SENSOR_DRVNAME_S5K5E2YASUB_MIPI_RAW     "s5k5e2yasubmipiraw"
+#define SENSOR_DRVNAME_S5K8AAYX_MIPI_YUV        "s5k8aayxmipiyuv"
+#define SENSOR_DRVNAME_S5K8AAYX_YUV             "s5k8aayxyuv"
+#define SENSOR_DRVNAME_S5K3L2_MIPI_RAW          "s5k3l2mipiraw"
+#define SENSOR_DRVNAME_S5K3H5XA_MIPI_RAW        "s5k3h5xamipiraw"
+#define SENSOR_DRVNAME_S5K4H5YC_MIPI_RAW_2LANE "s5k4h5ycmipiraw2lane"
+/*HI*/
+#define SENSOR_DRVNAME_HI841_MIPI_RAW           "hi841mipiraw"
+#define SENSOR_DRVNAME_HI707_YUV                "hi707yuv"
+#define SENSOR_DRVNAME_HI704_YUV                "hi704yuv"
+#define SENSOR_DRVNAME_HI551_MIPI_RAW           "hi551mipiraw"
+#define SENSOR_DRVNAME_HI545_MIPI_RAW           "hi545mipiraw"
+#define SENSOR_DRVNAME_HI542_RAW                "hi542raw"
+#define SENSOR_DRVNAME_HI542MIPI_RAW            "hi542mipiraw"
+#define SENSOR_DRVNAME_HI544_MIPI_RAW           "hi544mipiraw"
+#define SENSOR_DRVNAME_HI253_YUV                "hi253yuv"
+#define SENSOR_DRVNAME_HI191_MIPI_RAW           "hi191mipiraw"
+/*MT*/
+#define SENSOR_DRVNAME_MT9P012_RAW              "mt9p012"
+#define SENSOR_DRVNAME_MT9P015_RAW              "mt9p015"
+#define SENSOR_DRVNAME_MT9P017_RAW              "mt9p017"
+#define SENSOR_DRVNAME_MT9P017_MIPI_RAW         "mt9p017mipi"
+#define SENSOR_DRVNAME_MT9D115_MIPI_RAW         "mt9d115mipiraw"
+#define SENSOR_DRVNAME_MT9V114_YUV              "mt9v114"
+#define SENSOR_DRVNAME_MT9V115_YUV              "mt9v115yuv"
+#define SENSOR_DRVNAME_MT9T113_YUV              "mt9t113yuv"
+#define SENSOR_DRVNAME_MT9V113_YUV              "mt9v113yuv"
+#define SENSOR_DRVNAME_MT9T113_MIPI_YUV         "mt9t113mipiyuv"
+/*GC*/
+#define SENSOR_DRVNAME_GC2035_YUV               "gc2035_yuv"
+#define SENSOR_DRVNAME_GC2235_RAW               "gc2235_raw"
+#define SENSOR_DRVNAME_GC2235_MIPI_RAW   	"gc2235mipiraw"
+#define SENSOR_DRVNAME_GC2755_MIPI_RAW          "gc2755mipiraw"
+#define SENSOR_DRVNAME_GC2355_MIPI_RAW          "gc2355mipiraw"
+#define SENSOR_DRVNAME_GC2365_MIPI_RAW          "gc2365mipiraw"
+#define SENSOR_DRVNAME_GC2355SUB_MIPI_RAW          "gc2356submipiraw"
+#define SENSOR_DRVNAME_GC0330_YUV               "gc0330_yuv"
+#define SENSOR_DRVNAME_GC0329_YUV               "gc0329yuv"
+#define SENSOR_DRVNAME_GC2145_MIPI_YUV          "gc2145mipiyuv"
+#define SENSOR_DRVNAME_GC0310_MIPI_YUV          "gc0310mipiyuv"
+#define SENSOR_DRVNAME_GC0310MAIN_MIPI_YUV      "gc0310mainmipiyuv"
+#define SENSOR_DRVNAME_GC0310_YUV               "gc0310yuv"
+#define SENSOR_DRVNAME_GC2155_MIPI_YUV          "gc2155mipiyuv"
+#define SENSOR_DRVNAME_GC0313MIPI_YUV           "gc0313mipiyuv"
+#define SENSOR_DRVNAME_GC0409MIPI_RAW           "gc0409mipiraw"
+#define SENSOR_DRVNAME_GC5004_MIPI_RAW          "gc5004mipiraw"
+#define SENSOR_DRVNAME_GC5005_MIPI_RAW          "gc5005mipiraw"
+#define SENSOR_DRVNAME_GC5005SUB_MIPI_RAW       "gc5005submipiraw"
+#define SENSOR_DRVNAME_GC5024_MIPI_RAW          "gc5024mipiraw"
+#define SENSOR_DRVNAME_GC8024_MIPI_RAW          "gc8024mipiraw"
+#define SENSOR_DRVNAME_GC8003_MIPI_RAW          "gc8003mipiraw"
+/*SP*/
+#define SENSOR_DRVNAME_SP0A19_YUV               "sp0a19yuv"
+#define SENSOR_DRVNAME_SP0A20_YUV               "sp0a20yuv"
+#define SENSOR_DRVNAME_SP2508_MIPI_RAW          "sp2508mipiraw"
+#define SENSOR_DRVNAME_SP2509_MIPI_RAW          "sp2509mipiraw"
+#define SENSOR_DRVNAME_SP2518_YUV               "sp2518yuv"
+#define SENSOR_DRVNAME_SP5409_MIPI_RAW          "sp5409_mipi_raw"
+#define SENSOR_DRVNAME_SP5409SUB_MIPI_RAW          "sp5409sub_mipi_raw"
+#define SENSOR_DRVNAME_SP8408_MIPI_RAW          "sp8408_mipi_raw"
+/*A*/
+#define SENSOR_DRVNAME_A5141_MIPI_RAW           "a5141mipiraw"
+#define SENSOR_DRVNAME_A5142_MIPI_RAW           "a5142mipiraw"
+/*HM*/
+#define SENSOR_DRVNAME_HM3451_RAW               "hm3451raw"
+#define SENSOR_DRVNAME_HM5040_MIPI_RAW          "hm5040mipiraw"
+/*AR*/
+#define SENSOR_DRVNAME_AR0833_MIPI_RAW          "ar0833mipiraw"
+/*SIV*/
+#define SENSOR_DRVNAME_SIV121D_YUV              "siv121dyuv"
+#define SENSOR_DRVNAME_SIV120B_YUV              "siv120byuv"
+/*PAS (PixArt Image)*/
+#define SENSOR_DRVNAME_PAS6180_SERIAL_YUV       "pas6180serialyuv"
+/*Panasoic*/
+#define SENSOR_DRVNAME_MN34152_MIPI_RAW         "mn34152mipiraw"
+/*Toshiba*/
+#define SENSOR_DRVNAME_T4KA7_MIPI_RAW           "t4ka7mipiraw"
+/*Others*/
+#define SENSOR_DRVNAME_SHARP3D_MIPI_YUV         "sharp3dmipiyuv"
+#define SENSOR_DRVNAME_T8EV5_YUV                "t8ev5_yuv"
+/*Test*/
+#define SENSOR_DRVNAME_IMX135_MIPI_RAW_5MP      "imx135mipiraw5mp"
+
+/*******************************************************************************
+*
+********************************************************************************/
+void KD_IMGSENSOR_PROFILE_INIT(void);
+void KD_IMGSENSOR_PROFILE(char *tag);
+
+#define mDELAY(ms)     mdelay(ms)
+#define uDELAY(us)       udelay(us)
+#endif              /* _KD_IMGSENSOR_H */
diff --git a/kernel-headers/kd_imgsensor_define.h b/kernel-headers/kd_imgsensor_define.h
new file mode 100644
index 0000000..8eab108
--- /dev/null
+++ b/kernel-headers/kd_imgsensor_define.h
@@ -0,0 +1,1108 @@
+#ifndef _KD_IMGSENSOR_DATA_H
+#define _KD_IMGSENSOR_DATA_H
+
+/* #include "../camera/kd_camera_hw.h" */
+#include "kd_camera_feature.h"
+
+#define SENSOR_CLOCK_POLARITY_HIGH     0
+#define SENSOR_CLOCK_POLARITY_LOW      1
+/* #define CONFIG_COMPAT */
+#ifdef CONFIG_COMPAT
+/* 64 bit */
+#include <linux/fs.h>
+#include <linux/compat.h>
+#endif
+
+
+
+/*************************************************
+*
+**************************************************/
+/* In KERNEL mode,SHOULD be sync with mediatype.h */
+/* CHECK before remove or modify */
+/* #undef BOOL */
+/* #define BOOL signed int */
+#ifndef _MEDIA_TYPES_H
+typedef unsigned char MUINT8;
+typedef unsigned short MUINT16;
+typedef unsigned int MUINT32;
+typedef signed char MINT8;
+typedef signed short MINT16;
+typedef signed int MINT32;
+#endif
+
+/*******************************************************************************
+*
+********************************************************************************/
+/*  */
+/* msdk_isp_exp.h */
+/*  */
+#define BASEGAIN 0x40
+#define BASEGAIN_SHIFT 6
+
+typedef enum {
+	ISP_DRIVING_2MA = 0,
+	ISP_DRIVING_4MA,
+	ISP_DRIVING_6MA,
+	ISP_DRIVING_8MA
+} ISP_DRIVING_CURRENT_ENUM;
+
+
+
+enum {
+	IMAGE_NORMAL = 0,
+	IMAGE_H_MIRROR,
+	IMAGE_V_MIRROR,
+	IMAGE_HV_MIRROR
+};
+
+
+typedef enum {
+	MSDK_SCENARIO_ID_CAMERA_PREVIEW = 0,
+	MSDK_SCENARIO_ID_CAMERA_CAPTURE_JPEG,
+	MSDK_SCENARIO_ID_VIDEO_PREVIEW,
+	MSDK_SCENARIO_ID_HIGH_SPEED_VIDEO,
+	MSDK_SCENARIO_ID_CAMERA_ZSD,
+	MSDK_SCENARIO_ID_CAMERA_3D_PREVIEW,
+	MSDK_SCENARIO_ID_CAMERA_3D_CAPTURE,
+	MSDK_SCENARIO_ID_CAMERA_3D_VIDEO,
+	MSDK_SCENARIO_ID_TV_OUT,
+	MSDK_SCENARIO_ID_SLIM_VIDEO,
+	MSDK_SCENARIO_ID_CUSTOM1,
+	MSDK_SCENARIO_ID_CUSTOM2,
+	MSDK_SCENARIO_ID_CUSTOM3,
+	MSDK_SCENARIO_ID_CUSTOM4,
+	MSDK_SCENARIO_ID_CUSTOM5,
+	MSDK_SCENARIO_ID_MAX,
+}   MSDK_SCENARIO_ID_ENUM;
+
+
+typedef enum {
+	MSDK_CAMERA_OPERATION_NORMAL_MODE = 0,
+	MSDK_CAMERA_OPERATION_META_MODE
+} ACDK_CAMERA_OPERATION_MODE_ENUM;
+
+
+/*******************************************************************************
+*
+********************************************************************************/
+
+/*  */
+#define MAX_NUM_OF_SUPPORT_SENSOR 16
+/*  */
+#define SENSOR_CLOCK_POLARITY_HIGH    0
+#define SENSOR_CLOCK_POLARITY_LOW 1
+/*  */
+#define LENS_DRIVER_ID_DO_NOT_CARE    0xFFFFFFFF
+#define SENSOR_DOES_NOT_EXIST     0x00FFFFFF
+#define SENSOR_DOES_NOT_KNOW      0xFFFFFFFF
+
+#define SENSOR_FEATURE_START                     3000
+typedef enum {
+	SENSOR_FEATURE_BEGIN = SENSOR_FEATURE_START,
+	SENSOR_FEATURE_GET_RESOLUTION,
+	SENSOR_FEATURE_GET_PERIOD,
+	SENSOR_FEATURE_GET_PIXEL_CLOCK_FREQ,
+	SENSOR_FEATURE_SET_ESHUTTER,
+	SENSOR_FEATURE_SET_NIGHTMODE,
+	SENSOR_FEATURE_SET_GAIN,
+	SENSOR_FEATURE_SET_GAIN_AND_ESHUTTER,
+	SENSOR_FEATURE_SET_FLASHLIGHT,
+	SENSOR_FEATURE_SET_ISP_MASTER_CLOCK_FREQ,
+	SENSOR_FEATURE_SET_REGISTER,
+	SENSOR_FEATURE_GET_REGISTER,
+	SENSOR_FEATURE_SET_CCT_REGISTER,
+	SENSOR_FEATURE_GET_CCT_REGISTER,
+	SENSOR_FEATURE_SET_ENG_REGISTER,
+	SENSOR_FEATURE_GET_ENG_REGISTER,
+	SENSOR_FEATURE_GET_REGISTER_DEFAULT,
+	SENSOR_FEATURE_GET_CONFIG_PARA,
+	SENSOR_FEATURE_CAMERA_PARA_TO_SENSOR,
+	SENSOR_FEATURE_SENSOR_TO_CAMERA_PARA,
+	SENSOR_FEATURE_GET_GROUP_COUNT,
+	SENSOR_FEATURE_GET_GROUP_INFO,
+	SENSOR_FEATURE_GET_ITEM_INFO,
+	SENSOR_FEATURE_SET_ITEM_INFO,
+	SENSOR_FEATURE_GET_ENG_INFO,
+	SENSOR_FEATURE_GET_LENS_DRIVER_ID,
+	SENSOR_FEATURE_SET_YUV_CMD,
+	SENSOR_FEATURE_SET_VIDEO_MODE,
+	SENSOR_FEATURE_SET_TARGET_FRAME_RATE,
+	SENSOR_FEATURE_SET_CALIBRATION_DATA,
+	SENSOR_FEATURE_SET_SENSOR_SYNC,
+	SENSOR_FEATURE_INITIALIZE_AF,
+	SENSOR_FEATURE_CONSTANT_AF,
+	SENSOR_FEATURE_INFINITY_AF,
+	SENSOR_FEATURE_MOVE_FOCUS_LENS,
+	SENSOR_FEATURE_GET_AF_STATUS,
+	SENSOR_FEATURE_GET_AE_STATUS,
+	SENSOR_FEATURE_GET_AWB_STATUS,
+	SENSOR_FEATURE_GET_AF_INF,
+	SENSOR_FEATURE_GET_AF_MACRO,
+	SENSOR_FEATURE_CHECK_SENSOR_ID,
+	SENSOR_FEATURE_SET_AUTO_FLICKER_MODE,
+	SENSOR_FEATURE_SET_TEST_PATTERN,
+	SENSOR_FEATURE_SET_SOFTWARE_PWDN,
+	SENSOR_FEATURE_SINGLE_FOCUS_MODE,
+	SENSOR_FEATURE_CANCEL_AF,
+	SENSOR_FEATURE_SET_AF_WINDOW,
+	SENSOR_FEATURE_GET_EV_AWB_REF,
+	SENSOR_FEATURE_GET_SHUTTER_GAIN_AWB_GAIN,
+	SENSOR_FEATURE_GET_AF_MAX_NUM_FOCUS_AREAS,
+	SENSOR_FEATURE_GET_AE_MAX_NUM_METERING_AREAS,
+	SENSOR_FEATURE_SET_AE_WINDOW,
+	SENSOR_FEATURE_GET_EXIF_INFO,
+	SENSOR_FEATURE_GET_DELAY_INFO,
+	SENSOR_FEATURE_SET_SLAVE_I2C_ID,
+	SENSOR_FEATURE_SUSPEND,
+	SENSOR_FEATURE_RESUME,
+	SENSOR_FEATURE_SET_MAX_FRAME_RATE_BY_SCENARIO,
+	SENSOR_FEATURE_GET_DEFAULT_FRAME_RATE_BY_SCENARIO,
+	SENSOR_FEATURE_GET_AE_AWB_LOCK_INFO,
+	SENSOR_FEATURE_AUTOTEST_CMD,
+	SENSOR_FEATURE_GET_TEST_PATTERN_CHECKSUM_VALUE,
+	SENSOR_FEATURE_GET_TEMPERATURE_VALUE,
+	SENSOR_FEATURE_GET_SENSOR_CURRENT_TEMPERATURE,
+	SENSOR_FEATURE_GET_AE_FLASHLIGHT_INFO,
+	SENSOR_FEATURE_GET_TRIGGER_FLASHLIGHT_INFO, /* Trigger flashlight or not */
+	SENSOR_FEATURE_SET_YUV_3A_CMD,
+	SENSOR_FEATURE_SET_N3D_I2C_STREAM_REGDATA,
+	SENSOR_FEATURE_SET_N3D_STOP_STREAMING,
+	SENSOR_FEATURE_SET_N3D_START_STREAMING,
+	SENSOR_FEATURE_GET_SENSOR_N3D_STREAM_TO_VSYNC_TIME,
+	SENSOR_FEATURE_SET_ESHUTTER_GAIN,
+	SENSOR_FEATURE_SET_OB_LOCK,
+	SENSOR_FEATURE_SET_SENSOR_OTP_AWB_CMD,
+	SENSOR_FEATURE_SET_SENSOR_OTP_LSC_CMD,
+	SENSOR_FEATURE_GET_YUV_CAPTURE_OUTPUT_JPEG,
+	SENSOR_FEATURE_SET_YUV_JPEG_PARA,
+	SENSOR_FEATURE_GET_YUV_JPEG_INFO,
+	SENSOR_FEATURE_SET_FRAMERATE,
+	SENSOR_FEATURE_SET_HDR,
+	SENSOR_FEATURE_GET_CROP_INFO,
+	SENSOR_FEATURE_GET_VC_INFO,
+	SENSOR_FEATURE_SET_IHDR_SHUTTER_GAIN,
+	SENSOR_FEATURE_SET_AWB_GAIN,
+	SENSOR_FEATURE_SET_MIN_MAX_FPS,
+	SENSOR_FEATURE_GET_PDAF_INFO,
+	SENSOR_FEATURE_GET_PDAF_DATA,
+	SENSOR_FEATURE_GET_SENSOR_PDAF_CAPACITY,
+	SENSOR_FEATURE_DEBUG_IMGSENSOR,
+	SENSOR_FEATURE_SET_HDR_SHUTTER,
+    SENSOR_FEATURE_SET_ISO,
+    SENSOR_FEATURE_SET_PDAF,
+	SENSOR_FEATURE_MAX
+} ACDK_SENSOR_FEATURE_ENUM;
+
+typedef enum {
+	SENSOR_AF_IDLE = 0,
+	SENSOR_AF_FOCUSING,
+	SENSOR_AF_FOCUSED,
+	SENSOR_AF_ERROR,
+	SENSOR_AF_SCENE_DETECTING,
+	SENSOR_AF_STATUS_MAX
+} ACDK_SENSOR_AF_STATUS_ENUM;
+
+typedef enum {
+	SENSOR_AE_IDLE = 0,
+	SENSOR_AE_EXPOSING,
+	SENSOR_AE_EXPOSED,
+	SENSOR_AE_ERROR,
+	SENSOR_AE_LOCKED
+} ACDK_SENSOR_AE_STATUS_ENUM;
+
+typedef enum {
+	SENSOR_AWB_IDLE = 0,
+	SENSOR_AWB_BALANCING,
+	SENSOR_AWB_BALANCED,
+	SENSOR_AWB_ERROR,
+	SENSOR_AWB_LOCKED
+} ACDK_SENSOR_AWB_STATUS_ENUM;
+
+
+
+typedef enum {
+	SENSOR_INTERFACE_TYPE_PARALLEL = 0,
+	SENSOR_INTERFACE_TYPE_MIPI,
+	SENSOR_INTERFACE_TYPE_SERIAL,   /* add for 72 ATV using serial interface */
+	SENSOR_INTERFACE_TYPE_MAX
+} ACDK_SENSOR_INTERFACE_TYPE_ENUM;
+
+typedef enum {
+	SENSOR_OUTPUT_FORMAT_RAW_B = 0,
+	SENSOR_OUTPUT_FORMAT_RAW_Gb,
+	SENSOR_OUTPUT_FORMAT_RAW_Gr,
+	SENSOR_OUTPUT_FORMAT_RAW_R,
+	SENSOR_OUTPUT_FORMAT_UYVY,
+	SENSOR_OUTPUT_FORMAT_VYUY,
+	SENSOR_OUTPUT_FORMAT_YUYV,
+	SENSOR_OUTPUT_FORMAT_YVYU,
+	SENSOR_OUTPUT_FORMAT_CbYCrY,
+	SENSOR_OUTPUT_FORMAT_CrYCbY,
+	SENSOR_OUTPUT_FORMAT_YCbYCr,
+	SENSOR_OUTPUT_FORMAT_YCrYCb,
+	SENSOR_OUTPUT_FORMAT_RAW8_B,
+	SENSOR_OUTPUT_FORMAT_RAW8_Gb,
+	SENSOR_OUTPUT_FORMAT_RAW8_Gr,
+	SENSOR_OUTPUT_FORMAT_RAW8_R,
+	SENSOR_OUTPUT_FORMAT_RAW_RWB_B,
+	SENSOR_OUTPUT_FORMAT_RAW_RWB_Wb,
+	SENSOR_OUTPUT_FORMAT_RAW_RWB_Wr,
+	SENSOR_OUTPUT_FORMAT_RAW_RWB_R,
+	SENSOR_OUTPUT_FORMAT_RAW_MONO
+} ACDK_SENSOR_OUTPUT_DATA_FORMAT_ENUM;
+
+typedef enum {
+	SENSOR_MIPI_1_LANE = 0,
+	SENSOR_MIPI_2_LANE,
+	SENSOR_MIPI_3_LANE,
+	SENSOR_MIPI_4_LANE
+} ACDK_SENSOR_MIPI_LANE_NUMBER_ENUM;
+
+typedef enum {
+	SCAM_1_DATA_CHANNEL = 0,
+	SCAM_2_DATA_CHANNEL,
+	SCAM_3_DATA_CHANNEL,
+	SCAM_4_DATA_CHANNEL,
+} SENSOR_SCAM_DATA_CHANNEL_ENUM;
+
+typedef enum {
+	MIPI_OPHY_NCSI2 = 0,
+	MIPI_OPHY_CSI2 = 1,
+} SENSOR_MIPI_TYPE_ENUM;
+
+typedef enum {
+	MIPI_SETTLEDELAY_AUTO = 0,
+	MIPI_SETTLEDELAY_MANUAL = 1,
+} SENSOR_SETTLEDELAY_MODE_ENUM;
+
+typedef enum {
+	COMP8_NONE  = 0,
+	COMP8_DI_30 = 0x30,
+	COMP8_DI_31 = 0x31,
+	COMP8_DI_32 = 0x32,
+	COMP8_DI_33 = 0x33,
+	COMP8_DI_34 = 0x34,
+	COMP8_DI_35 = 0x35,
+	COMP8_DI_36 = 0x36,
+	COMP8_DI_37 = 0x37,
+	COMP8_DI_2A = 0x2A,
+} SENSOR_DPCM_TYPE_ENUM;
+
+typedef struct {
+	MUINT16 SensorPreviewWidth;
+	MUINT16 SensorPreviewHeight;
+	MUINT16 SensorFullWidth;
+	MUINT16 SensorFullHeight;
+	MUINT16 SensorVideoWidth;
+	MUINT16 SensorVideoHeight;
+	MUINT16 SensorHighSpeedVideoWidth;
+	MUINT16 SensorHighSpeedVideoHeight;
+	MUINT16 SensorSlimVideoWidth;
+	MUINT16 SensorSlimVideoHeight;
+	MUINT16 SensorCustom1Width;
+	MUINT16 SensorCustom1Height;
+	MUINT16 SensorCustom2Width;
+	MUINT16 SensorCustom2Height;
+	MUINT16 SensorCustom3Width;
+	MUINT16 SensorCustom3Height;
+	MUINT16 SensorCustom4Width;
+	MUINT16 SensorCustom4Height;
+	MUINT16 SensorCustom5Width;
+	MUINT16 SensorCustom5Height;
+	MUINT16 Sensor3DPreviewWidth;
+	MUINT16 Sensor3DPreviewHeight;
+	MUINT16 Sensor3DFullWidth;
+	MUINT16 Sensor3DFullHeight;
+	MUINT16 Sensor3DVideoWidth;
+	MUINT16 Sensor3DVideoHeight;
+	MUINT16 SensorEffectivePreviewWidth;
+	MUINT16 SensorEffectivePreviewHeight;
+	MUINT16 SensorEffectiveFullWidth;
+	MUINT16 SensorEffectiveFullHeight;
+	MUINT16 SensorEffectiveVideoWidth;
+	MUINT16 SensorEffectiveVideoHeight;
+	MUINT16 SensorEffectiveHighSpeedVideoWidth;
+	MUINT16 SensorEffectiveHighSpeedVideoHeight;
+	MUINT16 SensorEffective3DPreviewWidth;
+	MUINT16 SensorEffective3DPreviewHeight;
+	MUINT16 SensorEffective3DFullWidth;
+	MUINT16 SensorEffective3DFullHeight;
+	MUINT16 SensorEffective3DVideoWidth;
+	MUINT16 SensorEffective3DVideoHeight;
+	MUINT16 SensorPreviewWidthOffset;   /* from effective width to output width */
+	MUINT16 SensorPreviewHeightOffset;  /* from effective height to output height */
+	MUINT16 SensorFullWidthOffset;  /* from effective width to output width */
+	MUINT16 SensorFullHeightOffset; /* from effective height to output height */
+	MUINT16 SensorVideoWidthOffset; /* from effective width to output width */
+	MUINT16 SensorVideoHeightOffset;    /* from effective height to output height */
+	MUINT16 SensorHighSpeedVideoWidthOffset;    /* from effective width to output width */
+	MUINT16 SensorHighSpeedVideoHeightOffset;   /* from effective height to output height */
+	MUINT16 Sensor3DPreviewWidthOffset; /* from effective width to output width */
+	MUINT16 Sensor3DPreviewHeightOffset;    /* from effective height to output height */
+	MUINT16 Sensor3DFullWidthOffset;    /* from effective width to output width */
+	MUINT16 Sensor3DFullHeightOffset;   /* from effective height to output height */
+	MUINT16 Sensor3DVideoWidthOffset;   /* from effective width to output width */
+	MUINT16 Sensor3DVideoHeightOffset;  /* from effective height to output height */
+} ACDK_SENSOR_RESOLUTION_INFO_STRUCT, *PACDK_SENSOR_RESOLUTION_INFO_STRUCT;
+
+
+typedef struct {
+	MUINT16 SensorPreviewResolutionX;
+	MUINT16 SensorPreviewResolutionY;
+	MUINT16 SensorFullResolutionX;
+	MUINT16 SensorFullResolutionY;
+	MUINT8 SensorClockFreq; /* MHz */
+	MUINT8 SensorCameraPreviewFrameRate;
+	MUINT8 SensorVideoFrameRate;
+	MUINT8 SensorStillCaptureFrameRate;
+	MUINT8 SensorWebCamCaptureFrameRate;
+	MUINT8 SensorClockPolarity; /* SENSOR_CLOCK_POLARITY_HIGH/SENSOR_CLOCK_POLARITY_Low */
+	MUINT8 SensorClockFallingPolarity;
+	MUINT8 SensorClockRisingCount;  /* 0..15 */
+	MUINT8 SensorClockFallingCount; /* 0..15 */
+	MUINT8 SensorClockDividCount;   /* 0..15 */
+	MUINT8 SensorPixelClockCount;   /* 0..15 */
+	MUINT8 SensorDataLatchCount;    /* 0..15 */
+	MUINT8 SensorHsyncPolarity;
+	MUINT8 SensorVsyncPolarity;
+	MUINT8 SensorInterruptDelayLines;
+	MINT32 SensorResetActiveHigh;
+	MUINT32 SensorResetDelayCount;
+	ACDK_SENSOR_INTERFACE_TYPE_ENUM SensroInterfaceType;
+	ACDK_SENSOR_OUTPUT_DATA_FORMAT_ENUM SensorOutputDataFormat;
+	ACDK_SENSOR_MIPI_LANE_NUMBER_ENUM SensorMIPILaneNumber;
+	MUINT32 CaptureDelayFrame;
+	MUINT32 PreviewDelayFrame;
+	MUINT32 VideoDelayFrame;
+	MUINT32 HighSpeedVideoDelayFrame;
+	MUINT32 SlimVideoDelayFrame;
+	MUINT32 YUVAwbDelayFrame;
+	MUINT32 YUVEffectDelayFrame;
+	MUINT32 Custom1DelayFrame;
+	MUINT32 Custom2DelayFrame;
+	MUINT32 Custom3DelayFrame;
+	MUINT32 Custom4DelayFrame;
+	MUINT32 Custom5DelayFrame;
+	MUINT16 SensorGrabStartX;
+	MUINT16 SensorGrabStartY;
+	MUINT16 SensorDrivingCurrent;
+	MUINT8 SensorMasterClockSwitch;
+	MUINT8 AEShutDelayFrame;    /* The frame of setting shutter default 0 for TG int */
+	MUINT8 AESensorGainDelayFrame;  /* The frame of setting sensor gain */
+	MUINT8 AEISPGainDelayFrame;
+	MUINT8 MIPIDataLowPwr2HighSpeedTermDelayCount;
+	MUINT8 MIPIDataLowPwr2HighSpeedSettleDelayCount;
+	MUINT8 MIPICLKLowPwr2HighSpeedTermDelayCount;
+	MUINT8 SensorWidthSampling;
+	MUINT8 SensorHightSampling;
+	MUINT8 SensorPacketECCOrder;
+	SENSOR_MIPI_TYPE_ENUM MIPIsensorType;
+	MUINT8 SensorCaptureOutputJPEG; /* JPEG file or not? */
+	MUINT8 SensorModeNum;
+	MUINT8 IHDR_Support;
+	MUINT16 IHDR_LE_FirstLine;
+	SENSOR_SETTLEDELAY_MODE_ENUM SettleDelayMode;
+	MUINT8 PDAF_Support;
+	MUINT8 DPCM_INFO;
+	MUINT8 PerFrameCTL_Support;
+	SENSOR_SCAM_DATA_CHANNEL_ENUM SCAM_DataNumber;
+	MUINT8 SCAM_DDR_En;
+	MUINT8 SCAM_CLK_INV;
+	MUINT8 SCAM_DEFAULT_DELAY;
+	MUINT8 SCAM_CRC_En;
+	MUINT8 SCAM_SOF_src;
+	MUINT32 SCAM_Timout_Cali;
+} ACDK_SENSOR_INFO_STRUCT, *PACDK_SENSOR_INFO_STRUCT;
+
+typedef struct {
+	MUINT16 SensorPreviewResolutionX;
+	MUINT16 SensorPreviewResolutionY;
+	MUINT16 SensorFullResolutionX;
+	MUINT16 SensorFullResolutionY;
+	MUINT8 SensorClockFreq; /* MHz */
+	MUINT8 SensorCameraPreviewFrameRate;
+	MUINT8 SensorVideoFrameRate;
+	MUINT8 SensorStillCaptureFrameRate;
+	MUINT8 SensorWebCamCaptureFrameRate;
+	MUINT8 SensorClockPolarity; /* SENSOR_CLOCK_POLARITY_HIGH/SENSOR_CLOCK_POLARITY_Low */
+	MUINT8 SensorClockFallingPolarity;
+	MUINT8 SensorClockRisingCount;  /* 0..15 */
+	MUINT8 SensorClockFallingCount; /* 0..15 */
+	MUINT8 SensorClockDividCount;   /* 0..15 */
+	MUINT8 SensorPixelClockCount;   /* 0..15 */
+	MUINT8 SensorDataLatchCount;    /* 0..15 */
+	MUINT8 SensorHsyncPolarity;
+	MUINT8 SensorVsyncPolarity;
+	MUINT8 SensorInterruptDelayLines;
+	MINT32 SensorResetActiveHigh;
+	MUINT32 SensorResetDelayCount;
+	ACDK_SENSOR_INTERFACE_TYPE_ENUM SensroInterfaceType;
+	ACDK_SENSOR_OUTPUT_DATA_FORMAT_ENUM SensorOutputDataFormat;
+	ACDK_SENSOR_MIPI_LANE_NUMBER_ENUM SensorMIPILaneNumber;
+	MUINT32 CaptureDelayFrame;
+	MUINT32 PreviewDelayFrame;
+	MUINT32 VideoDelayFrame;
+	MUINT32 HighSpeedVideoDelayFrame;
+	MUINT32 SlimVideoDelayFrame;
+	MUINT32 YUVAwbDelayFrame;
+	MUINT32 YUVEffectDelayFrame;
+	MUINT32 Custom1DelayFrame;
+	MUINT32 Custom2DelayFrame;
+	MUINT32 Custom3DelayFrame;
+	MUINT32 Custom4DelayFrame;
+	MUINT32 Custom5DelayFrame;
+	MUINT16 SensorGrabStartX_PRV;
+	MUINT16 SensorGrabStartY_PRV;
+	MUINT16 SensorGrabStartX_CAP;
+	MUINT16 SensorGrabStartY_CAP;
+	MUINT16 SensorGrabStartX_VD;
+	MUINT16 SensorGrabStartY_VD;
+	MUINT16 SensorGrabStartX_VD1;
+	MUINT16 SensorGrabStartY_VD1;
+	MUINT16 SensorGrabStartX_VD2;
+	MUINT16 SensorGrabStartY_VD2;
+	MUINT16 SensorGrabStartX_CST1;
+	MUINT16 SensorGrabStartY_CST1;
+	MUINT16 SensorGrabStartX_CST2;
+	MUINT16 SensorGrabStartY_CST2;
+	MUINT16 SensorGrabStartX_CST3;
+	MUINT16 SensorGrabStartY_CST3;
+	MUINT16 SensorGrabStartX_CST4;
+	MUINT16 SensorGrabStartY_CST4;
+	MUINT16 SensorGrabStartX_CST5;
+	MUINT16 SensorGrabStartY_CST5;
+	MUINT16 SensorDrivingCurrent;
+	MUINT8 SensorMasterClockSwitch;
+	MUINT8 AEShutDelayFrame;    /* The frame of setting shutter default 0 for TG int */
+	MUINT8 AESensorGainDelayFrame;  /* The frame of setting sensor gain */
+	MUINT8 AEISPGainDelayFrame;
+	MUINT8 MIPIDataLowPwr2HighSpeedTermDelayCount;
+	MUINT8 MIPIDataLowPwr2HighSpeedSettleDelayCount;
+	MUINT8 MIPIDataLowPwr2HSSettleDelayM0;
+	MUINT8 MIPIDataLowPwr2HSSettleDelayM1;
+	MUINT8 MIPIDataLowPwr2HSSettleDelayM2;
+	MUINT8 MIPIDataLowPwr2HSSettleDelayM3;
+	MUINT8 MIPIDataLowPwr2HSSettleDelayM4;
+	MUINT8 MIPICLKLowPwr2HighSpeedTermDelayCount;
+	MUINT8 SensorWidthSampling;
+	MUINT8 SensorHightSampling;
+	MUINT8 SensorPacketECCOrder;
+	SENSOR_MIPI_TYPE_ENUM MIPIsensorType;
+	MUINT8 SensorCaptureOutputJPEG; /* JPEG file or not? */
+	MUINT8 SensorModeNum;
+	MUINT8 IHDR_Support;
+	MUINT16 IHDR_LE_FirstLine;
+	SENSOR_SETTLEDELAY_MODE_ENUM SettleDelayMode;
+	MUINT8 PDAF_Support;
+	MUINT8 DPCM_INFO;
+	MUINT8 IMGSENSOR_DPCM_TYPE_PRE;
+	MUINT8 IMGSENSOR_DPCM_TYPE_CAP;
+	MUINT8 IMGSENSOR_DPCM_TYPE_VD;
+	MUINT8 IMGSENSOR_DPCM_TYPE_VD1;
+	MUINT8 IMGSENSOR_DPCM_TYPE_VD2;
+	MUINT8 PerFrameCTL_Support;
+	SENSOR_SCAM_DATA_CHANNEL_ENUM SCAM_DataNumber;
+	MUINT8 SCAM_DDR_En;
+	MUINT8 SCAM_CLK_INV;
+	MUINT8 SCAM_DEFAULT_DELAY;
+	MUINT8 SCAM_CRC_En;
+	MUINT8 SCAM_SOF_src;
+	MUINT32 SCAM_Timout_Cali;
+} ACDK_SENSOR_INFO2_STRUCT, *PACDK_SENSOR_INFO2_STRUCT;
+
+
+typedef enum {
+	ACDK_CCT_REG_ISP = 0,
+	ACDK_CCT_REG_CMOS,
+	ACDK_CCT_REG_CCD
+} ACDK_CCT_REG_TYPE_ENUM;
+
+
+/* R/W ISP/Sensor Register */
+typedef struct {
+	ACDK_CCT_REG_TYPE_ENUM Type;
+	MUINT32 RegAddr;
+	MUINT32 RegData;
+} ACDK_CCT_REG_RW_STRUCT, *PACDK_CCT_REG_RW_STRUCT;
+
+typedef struct {
+	ACDK_CCT_REG_TYPE_ENUM Type;    /* ISP, CMOS_SENSOR, CCD_SENSOR */
+	MUINT32 DeviceId;
+	ACDK_SENSOR_OUTPUT_DATA_FORMAT_ENUM StartPixelBayerPtn;
+	MUINT16 GrabXOffset;
+	MUINT16 GrabYOffset;
+} ACDK_CCT_SENSOR_INFO_STRUCT, *PACDK_CCT_SENSOR_INFO_STRUCT;
+
+
+
+typedef enum {
+	CMOS_SENSOR = 0,
+	CCD_SENSOR
+} SENSOR_TYPE_ENUM;
+
+typedef struct {
+	MUINT16 SensorId;
+	SENSOR_TYPE_ENUM SensorType;
+	ACDK_SENSOR_OUTPUT_DATA_FORMAT_ENUM SensorOutputDataFormat;
+} ACDK_SENSOR_ENG_INFO_STRUCT;
+
+typedef struct {
+	MUINT32 RegAddr;
+	MUINT32 RegData;
+} ACDK_SENSOR_REG_INFO_STRUCT;
+
+typedef struct {
+	MUINT8  debugStruct[32];
+	MUINT8  debugSubstruct[32];
+	MUINT32 isGet;              /* 1 means get, 0 means set */
+	MUINT32 value;
+} ACDK_SENSOR_DBG_IMGSENSOR_STRUCT;
+
+typedef struct {
+	MUINT32 GroupIdx;
+	MUINT32 ItemCount;
+	MUINT8 *GroupNamePtr;
+} ACDK_SENSOR_GROUP_INFO_STRUCT;
+
+typedef struct {
+	MUINT32 GroupIdx;
+	MUINT32 ItemIdx;
+	MUINT8 ItemNamePtr[50]; /* item name */
+	MUINT32 ItemValue;  /* item value */
+	MINT32 IsTrueFalse; /* is this item for enable/disable functions */
+	MINT32 IsReadOnly;  /* is this item read only */
+	MINT32 IsNeedRestart;   /* after set this item need restart */
+	MUINT32 Min;        /* min value of item value */
+	MUINT32 Max;        /* max value of item value */
+} ACDK_SENSOR_ITEM_INFO_STRUCT;
+
+typedef enum {
+	ACDK_SENSOR_IMAGE_NORMAL = 0,
+	ACDK_SENSOR_IMAGE_H_MIRROR,
+	ACDK_SENSOR_IMAGE_V_MIRROR,
+	ACDK_SENSOR_IMAGE_HV_MIRROR
+} ACDK_SENSOR_IMAGE_MIRROR_ENUM;
+
+typedef enum {
+	ACDK_SENSOR_OPERATION_MODE_CAMERA_PREVIEW = 0,
+	ACDK_SENSOR_OPERATION_MODE_VIDEO,
+	ACDK_SENSOR_OPERATION_MODE_STILL_CAPTURE,
+	ACDK_SENSOR_OPERATION_MODE_HIGHSP_VIDEO1,
+	ACDK_SENSOR_OPERATION_MODE_HIGHSP_VIDEO2,
+	ACDK_SENSOR_OPERATION_MODE_WEB_CAPTURE,
+	ACDK_SENSOR_OPERATION_MODE_CUSTOM1,
+	ACDK_SENSOR_OPERATION_MODE_CUSTOM2,
+	ACDK_SENSOR_OPERATION_MODE_CUSTOM3,
+	ACDK_SENSOR_OPERATION_MODE_CUSTOM4,
+	ACDK_SENSOR_OPERATION_MODE_CUSTOM5,
+	ACDK_SENSOR_OPERATION_MODE_MAX
+} ACDK_SENSOR_OPERATION_MODE_ENUM;
+
+typedef struct {
+	MUINT16 GrabStartX; /* The first grabed column data of the image sensor in pixel clock count */
+	MUINT16 GrabStartY; /* The first grabed row data of the image sensor in pixel clock count */
+	MUINT16 ExposureWindowWidth;    /* Exposure window width of image sensor */
+	MUINT16 ExposureWindowHeight;   /* Exposure window height of image sensor */
+	MUINT16 ImageTargetWidth;   /* image captured width */
+	MUINT16 ImageTargetHeight;  /* image captuerd height */
+	MUINT16 ExposurePixel;  /* exposure window width of image sensor + dummy pixel */
+	MUINT16 CurrentExposurePixel;   /* exposure window width of image sensor + dummy pixel */
+	MUINT16 ExposureLine;   /* exposure window width of image sensor + dummy line */
+	MUINT16 ZoomFactor; /* digital zoom factor */
+} ACDK_SENSOR_EXPOSURE_WINDOW_STRUCT;
+
+typedef struct {
+	ACDK_SENSOR_IMAGE_MIRROR_ENUM SensorImageMirror;
+	MINT32 EnableShutterTansfer;    /* capture only */
+	MINT32 EnableFlashlightTansfer; /* flash light capture only */
+	ACDK_SENSOR_OPERATION_MODE_ENUM SensorOperationMode;
+	MUINT16 ImageTargetWidth;   /* image captured width */
+	MUINT16 ImageTargetHeight;  /* image captuerd height */
+	MUINT16 CaptureShutter; /* capture only */
+	MUINT16 FlashlightDuty; /* flash light capture only */
+	MUINT16 FlashlightOffset;   /* flash light capture only */
+	MUINT16 FlashlightShutFactor;   /* flash light capture only */
+	MUINT16 FlashlightMinShutter;
+	ACDK_CAMERA_OPERATION_MODE_ENUM MetaMode;   /* capture only */
+	MUINT32 DefaultPclk;    /* Sensor pixel clock(Ex:24000000) */
+	MUINT32 Pixels;     /* Sensor active pixel number */
+	MUINT32 Lines;      /* Sensor active line number */
+	MUINT32 Shutter;    /* Sensor current shutter */
+	MUINT32 FrameLines; /* valid+dummy lines for minimum shutter */
+} ACDK_SENSOR_CONFIG_STRUCT;
+
+typedef enum {
+	MCLK_48MHZ_GROUP = 0x1,
+	MCLK_52MHZ_GROUP = 0x2,
+} ACKD_SENSOR_MCLK_ENUM;
+
+typedef struct {
+	MUINT8 on;
+	ACKD_SENSOR_MCLK_ENUM freq;
+} ACDK_SENSOR_MCLK_STRUCT;
+
+typedef struct {
+	MUINT16 full_w;
+	MUINT16 full_h;
+	MUINT16 x0_offset;
+	MUINT16 y0_offset;
+	MUINT16 w0_size;
+	MUINT16 h0_size;
+	MUINT16 scale_w;
+	MUINT16 scale_h;
+	MUINT16 x1_offset;
+	MUINT16 y1_offset;
+	MUINT16 w1_size;
+	MUINT16 h1_size;
+	MUINT16 x2_tg_offset;
+	MUINT16 y2_tg_offset;
+	MUINT16 w2_tg_size;
+	MUINT16 h2_tg_size;
+} SENSOR_WINSIZE_INFO_STRUCT;
+
+typedef struct {
+	MUINT32 SensorId;
+	SENSOR_WINSIZE_INFO_STRUCT   SensorWinSize;
+} SENSOR_WINSIZE_STRUCT, *pSENSOR_WINSIZE_STRUCT;
+
+typedef struct {
+	MUINT16 VC_Num;
+	MUINT16 VC_PixelNum;
+	MUINT16 ModeSelect;   /* 0: auto mode, 1:direct mode  */
+	MUINT16 EXPO_Ratio;   /* 1/1, 1/2, 1/4, 1/8 */
+	MUINT16 ODValue;      /* OD Vaule */
+	MUINT16 RG_STATSMODE; /* STATS divistion mdoe 0: 16x16, 1:8x8, 2:4x4, 3:1x1*/
+	MUINT16 VC0_ID;
+	MUINT16 VC0_DataType;
+	MUINT16 VC0_SIZEH;
+	MUINT16 VC0_SIZEV;
+	MUINT16 VC1_ID;
+	MUINT16 VC1_DataType;
+	MUINT16 VC1_SIZEH;
+	MUINT16 VC1_SIZEV;
+	MUINT16 VC2_ID;
+	MUINT16 VC2_DataType;
+	MUINT16 VC2_SIZEH;
+	MUINT16 VC2_SIZEV;
+	MUINT16 VC3_ID;
+	MUINT16 VC3_DataType;
+	MUINT16 VC3_SIZEH;
+	MUINT16 VC3_SIZEV;
+} SENSOR_VC_INFO_STRUCT, *pSENSOR_VC_INFO_STRUCT;
+typedef struct {
+	MUINT32 ABS_GAIN_GR;
+	MUINT32 ABS_GAIN_R;
+	MUINT32 ABS_GAIN_B;
+	MUINT32 ABS_GAIN_GB;
+} SET_SENSOR_AWB_GAIN, *PSET_SENSOR_AWB_GAIN;
+
+typedef struct {
+    MUINT32 SENSOR_MODE;
+    MUINT32 ISO;
+
+} SET_SENSOR_ISO, *PSET_SENSOR_ISO;
+
+typedef struct {
+	MUINT32 i4OffsetX;      /* start offset of first PD block */
+	MUINT32 i4OffsetY;
+	MUINT32 i4PitchX;       /* PD block pitch */
+	MUINT32 i4PitchY;
+	MUINT32 i4PairNum;      /* PD pair num in one block */
+	MUINT32 i4SubBlkW;      /* sub block width (one PD pair in one sub block) */
+	MUINT32 i4SubBlkH;      /* sub block height */
+	MUINT32 i4PosL[16][2];  /* left pd pixel position in one block*/
+	MUINT32 i4PosR[16][2];  /* right pd pixel position in one block*/
+} SET_PD_BLOCK_INFO_T, *PSET_PD_BLOCK_INFO_T;
+
+
+typedef enum {
+	SENSORIF_PARALLEL = 0,
+	SENSORIF_SERIAL,
+	SENSORIF_MIPI_DHY0,
+	SENSORIF_MIPI_DHY1,
+	SENSORIF_MIPI_DHY2
+} SENSOR_PHY_TYPE_ENUM;
+
+typedef enum {
+	DATA_8BIT_FMT        = 0x0,
+	DATA_10BIT_FMT       = 0x1,
+	DATA_12BIT_FMT       = 0x2,
+	DATA_YUV422_FMT      = 0x3,
+} INDATA_FORMAT_ENUM;
+
+typedef struct {
+	MINT32 mSensorDev;
+	MUINT8 GpioEnable;
+	SENSOR_PHY_TYPE_ENUM SensroInterfaceType;
+	INDATA_FORMAT_ENUM SensorIndataformat;
+} IMGSENSOR_GPIO_STRUCT;
+/*******************************************************************************
+*
+********************************************************************************/
+
+#define MAXIMUM_NVRAM_CAMERA_SENSOR_FILE_SIZE_KERNEL       4096
+
+#define NVRAM_CAMERA_SENSOR_FILE_VERSION        1
+
+
+
+/* Sensor table */
+#define MAXIMUM_SENSOR_CCT_REG_NUMBER   100
+#define MAXIMUM_SENSOR_ENG_REG_NUMBER   100
+
+typedef struct {
+	MUINT32 Addr;
+	MUINT32 Para;
+} SENSOR_REG_STRUCT;
+
+typedef struct {
+	MUINT32 Version;
+	MUINT32 SensorId;   /* ID of sensor module */
+	SENSOR_REG_STRUCT SensorEngReg[MAXIMUM_SENSOR_ENG_REG_NUMBER];
+	SENSOR_REG_STRUCT SensorCCTReg[MAXIMUM_SENSOR_CCT_REG_NUMBER];
+	MUINT8 CameraData[MAXIMUM_NVRAM_CAMERA_SENSOR_FILE_SIZE_KERNEL / 2 - 8 - sizeof(SENSOR_REG_STRUCT) * (MAXIMUM_SENSOR_ENG_REG_NUMBER + MAXIMUM_SENSOR_CCT_REG_NUMBER)];
+} NVRAM_SENSOR_DATA_STRUCT, *PNVRAM_SENSOR_DATA_STRUCT;
+
+#define MAX_SENSOR_CAL_SIZE_KERNEL     (1024)   /* Byte */
+#define MAX_SHADING_DATA_TBL ((MAX_SENSOR_CAL_SIZE_KERNEL-8)/4)
+typedef struct {
+	MUINT32 DataFormat;
+	MUINT32 DataSize;
+	MUINT32 ShadingData[MAX_SHADING_DATA_TBL];
+} SET_SENSOR_CALIBRATION_DATA_STRUCT, *PSET_SENSOR_CALIBRATION_DATA_STRUCT;
+
+
+
+typedef struct {
+	MSDK_SCENARIO_ID_ENUM ScenarioId[2];
+	ACDK_SENSOR_INFO_STRUCT * pInfo[2];
+	ACDK_SENSOR_CONFIG_STRUCT * pConfig[2];
+} ACDK_SENSOR_GETINFO_STRUCT, *PACDK_SENSOR_GETINFO_STRUCT;
+
+typedef struct {
+	MUINT32 SensorId;
+	ACDK_SENSOR_INFO2_STRUCT *pInfo;
+	ACDK_SENSOR_RESOLUTION_INFO_STRUCT *pSensorResolution;
+} IMAGESENSOR_GETINFO_STRUCT, *PIMAGESENSOR_GETINFO_STRUCT;
+
+typedef struct {
+	CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera;
+	ACDK_SENSOR_FEATURE_ENUM FeatureId;
+	MUINT8 *pFeaturePara;
+	MUINT32 *pFeatureParaLen;
+} ACDK_SENSOR_FEATURECONTROL_STRUCT, *PACDK_SENSOR_FEATURECONTROL_STRUCT;
+
+typedef struct {
+	CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera;
+	MSDK_SCENARIO_ID_ENUM ScenarioId;
+	ACDK_SENSOR_EXPOSURE_WINDOW_STRUCT *pImageWindow;
+	ACDK_SENSOR_CONFIG_STRUCT *pSensorConfigData;
+} ACDK_SENSOR_CONTROL_STRUCT;
+
+typedef struct {
+	ACDK_SENSOR_RESOLUTION_INFO_STRUCT *pResolution[2];
+} ACDK_SENSOR_PRESOLUTION_STRUCT;
+
+
+
+typedef struct regval_list {
+	MUINT32 reg_addr;
+	MUINT32 value;
+	MUINT32 bytes;
+} REGVAL_LIST_STRUCT;
+
+#define KDIMGSENSOR_REGVAL_LIST_MAX_NUM 256
+
+typedef struct format_struct {
+	MUINT8 *desc;
+	MUINT32 pixelformat;
+	/* REGVAL_LIST_STRUCT regs[KDIMGSENSOR_REGVAL_LIST_MAX_NUM]; */
+	int (*pfInitCfg)(void);
+} IMGSENSOR_FORMAT_STRUCT;
+
+typedef struct {
+	IMGSENSOR_FORMAT_STRUCT format;
+	MUINT32 u4InClk;    /* Common part                                     //hard coded */
+	MUINT32 u4OutClk;   /* Common part                                    // */
+	MUINT32 u4TotalPixelPerLine;    /* By modes */
+	MUINT32 u4TotalLinesPerFrame;   /* By modes and frame rate setting */
+	MUINT32 u4ActualWidth;  /* By modes */
+	MUINT32 u4ActualHeight; /* By modes */
+	MUINT32 u4Width;    /* By modes */
+	MUINT32 u4Height;   /* By modes */
+	MUINT32 u4FrameTimeInus;    /* By modes and frame rate setting */
+	MUINT32 u4MinFrameTimeInus; /* By modes */
+	MUINT32 u4LineTimeInus; /* By modes */
+	MUINT32 u4FinePixCntPerus;  /* Common part */
+	MUINT32 u4MinFineTimeInus;  /* By modes */
+	MUINT32 u4MaxFineTimeInus;  /* By modes */
+	MUINT32 u4XStart;
+	MUINT32 u4XEnd;
+	MUINT32 u4YStart;
+	MUINT32 u4YEnd;
+} stImgSensorFormat;
+
+#ifdef CONFIG_COMPAT
+/* Redifne structures for compat_ioctl */
+typedef struct {
+	MSDK_SCENARIO_ID_ENUM ScenarioId[2];
+	compat_uptr_t pInfo[2];
+	compat_uptr_t pConfig[2];
+} COMPAT_ACDK_SENSOR_GETINFO_STRUCT;
+
+typedef struct {
+	MUINT32 SensorId;
+	compat_uptr_t pInfo;
+	compat_uptr_t pSensorResolution;
+} COMPAT_IMAGESENSOR_GETINFO_STRUCT;
+
+typedef struct {
+	CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera;
+	ACDK_SENSOR_FEATURE_ENUM FeatureId;
+	compat_uptr_t pFeaturePara;
+	compat_uptr_t pFeatureParaLen;
+} COMPAT_ACDK_SENSOR_FEATURECONTROL_STRUCT;
+
+typedef struct {
+	CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera;
+	MSDK_SCENARIO_ID_ENUM ScenarioId;
+	compat_uptr_t pImageWindow;
+	compat_uptr_t pSensorConfigData;
+} COMPAT_ACDK_SENSOR_CONTROL_STRUCT;
+
+typedef struct {
+	compat_uptr_t pResolution[2];
+} COMPAT_ACDK_SENSOR_PRESOLUTION_STRUCT;
+
+#endif
+
+
+/*******************************************************************************
+*
+********************************************************************************/
+/*  */
+/* adoption to winmo driver files */
+/*  */
+
+/* typedef */
+/* #define kal_uint8 u8 */
+
+/* #define MSDK_SCENARIO_ID_ENUM               ACDK_SCENARIO_ID_ENUM */
+#define MSDK_SENSOR_EXPOSURE_WINDOW_STRUCT      ACDK_SENSOR_EXPOSURE_WINDOW_STRUCT
+#define MSDK_SENSOR_CONFIG_STRUCT               ACDK_SENSOR_CONFIG_STRUCT
+
+#define MSDK_SENSOR_FEATURE_ENUM                ACDK_SENSOR_FEATURE_ENUM
+#define MSDK_SENSOR_REG_INFO_STRUCT             ACDK_SENSOR_REG_INFO_STRUCT
+#define MSDK_SENSOR_GROUP_INFO_STRUCT           ACDK_SENSOR_GROUP_INFO_STRUCT
+#define MSDK_SENSOR_ITEM_INFO_STRUCT            ACDK_SENSOR_ITEM_INFO_STRUCT
+#define MSDK_SENSOR_ENG_INFO_STRUCT             ACDK_SENSOR_ENG_INFO_STRUCT
+#define MSDK_SENSOR_INFO_STRUCT                 ACDK_SENSOR_INFO_STRUCT
+#define MSDK_SENSOR_RESOLUTION_INFO_STRUCT      ACDK_SENSOR_RESOLUTION_INFO_STRUCT
+#define MSDK_SENSOR_DBG_IMGSENSOR_INFO_STRUCT   ACDK_SENSOR_DBG_IMGSENSOR_STRUCT
+
+/* MSDK_SCENARIO_ID_ENUM => ACDK_SCENARIO_ID_ENUM */
+/* #define MSDK_SCENARIO_ID_CAMERA_PREVIEW         ACDK_SCENARIO_ID_CAMERA_PREVIEW */
+/* #define MSDK_SCENARIO_ID_VIDEO_PREVIEW          ACDK_SCENARIO_ID_VIDEO_PREVIEW */
+/* #define MSDK_SCENARIO_ID_CAMERA_CAPTURE_JPEG    ACDK_SCENARIO_ID_CAMERA_CAPTURE_JPEG */
+#define MSDK_SENSOR_OPERATION_MODE_VIDEO        ACDK_SENSOR_OPERATION_MODE_VIDEO
+/* #define MSDK_SCENARIO_ID_CAMERA_ZSD                           ACDK_SCENARIO_ID_CAMERA_ZSD */
+/* #define MSDK_SCENARIO_ID_CAMERA_3D_PREVIEW            ACDK_SCENARIO_ID_CAMERA_3D_PREVIEW */
+/* #define MSDK_SCENARIO_ID_CAMERA_3D_CAPTURE            ACDK_SCENARIO_ID_CAMERA_3D_CAPTURE */
+/* #define MSDK_SCENARIO_ID_CAMERA_3D_VIDEO              ACDK_SCENARIO_ID_CAMERA_3D_VIDEO */
+/*******************************************************************************
+*
+********************************************************************************/
+
+/*******************************************************************************
+*
+********************************************************************************/
+/* for new simplifed sensor driver */
+typedef struct {
+	MUINT32(*SensorOpen)(void);
+	MUINT32(*SensorGetInfo)(MUINT32 *pScenarioId[2], MSDK_SENSOR_INFO_STRUCT * pSensorInfo[2], MSDK_SENSOR_CONFIG_STRUCT * pSensorConfigData[2]);
+	MUINT32(*SensorGetResolution)(MSDK_SENSOR_RESOLUTION_INFO_STRUCT * pSensorResolution[2]);
+	MUINT32(*SensorFeatureControl)(CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera, MSDK_SENSOR_FEATURE_ENUM FeatureId, MUINT8 *pFeaturePara, MUINT32 *pFeatureParaLen);
+	MUINT32(*SensorControl)(MSDK_SCENARIO_ID_ENUM ScenarioId, MSDK_SENSOR_EXPOSURE_WINDOW_STRUCT *pImageWindow, MSDK_SENSOR_CONFIG_STRUCT *pSensorConfigData);
+	MUINT32(*SensorClose)(void);
+} MULTI_SENSOR_FUNCTION_STRUCT, *PMULTI_SENSOR_FUNCTION_STRUCT;
+
+typedef struct {
+	MUINT32(*SensorOpen)(void);
+	MUINT32(*SensorGetInfo)(MUINT32 *pScenarioId[2], MSDK_SENSOR_INFO_STRUCT * pSensorInfo[2], MSDK_SENSOR_CONFIG_STRUCT *pSensorConfigData[2]);
+	MUINT32(*SensorGetResolution)(MSDK_SENSOR_RESOLUTION_INFO_STRUCT * pSensorResolution[2]);
+	MUINT32(*SensorFeatureControl)(CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera, MSDK_SENSOR_FEATURE_ENUM FeatureId, MUINT8 *pFeaturePara, MUINT32 *pFeatureParaLen);
+	MUINT32(*SensorControl)(CAMERA_DUAL_CAMERA_SENSOR_ENUM InvokeCamera, MSDK_SCENARIO_ID_ENUM ScenarioId, MSDK_SENSOR_EXPOSURE_WINDOW_STRUCT *pImageWindow, MSDK_SENSOR_CONFIG_STRUCT *pSensorConfigData);
+	MUINT32(*SensorClose)(void);
+} MULTI_SENSOR_FUNCTION_STRUCT2, *PMULTI_SENSOR_FUNCTION_STRUCT2;
+
+
+typedef struct {
+	MUINT32(*SensorOpen)(void);
+	MUINT32(*SensorGetInfo)(MSDK_SCENARIO_ID_ENUM ScenarioId, MSDK_SENSOR_INFO_STRUCT *pSensorInfo,
+				MSDK_SENSOR_CONFIG_STRUCT *pSensorConfigData);
+	MUINT32(*SensorGetResolution)(MSDK_SENSOR_RESOLUTION_INFO_STRUCT *pSensorResolution);
+	MUINT32(*SensorFeatureControl)(MSDK_SENSOR_FEATURE_ENUM FeatureId, MUINT8 *pFeaturePara, MUINT32 *pFeatureParaLen);
+	MUINT32(*SensorControl)(MSDK_SCENARIO_ID_ENUM ScenarioId, MSDK_SENSOR_EXPOSURE_WINDOW_STRUCT *pImageWindow, MSDK_SENSOR_CONFIG_STRUCT *pSensorConfigData);
+	MUINT32(*SensorClose)(void);
+#if 1 /* isp suspend resume patch */
+	MSDK_SCENARIO_ID_ENUM ScenarioId;
+	MSDK_SENSOR_EXPOSURE_WINDOW_STRUCT imageWindow;
+	MSDK_SENSOR_CONFIG_STRUCT sensorConfigData;
+#endif
+} SENSOR_FUNCTION_STRUCT, *PSENSOR_FUNCTION_STRUCT;
+
+typedef struct {
+	MUINT32 SensorId;
+	MUINT8 drvname[32];
+	MUINT32(*SensorInit)(PSENSOR_FUNCTION_STRUCT *pfFunc);
+} ACDK_KD_SENSOR_INIT_FUNCTION_STRUCT, *PACDK_KD_SENSOR_INIT_FUNCTION_STRUCT;
+
+#define KDIMGSENSOR_DUAL_SHIFT 16
+#define KDIMGSENSOR_DUAL_MASK_MSB 0xFFFF0000
+#define KDIMGSENSOR_DUAL_MASK_LSB 0x0000FFFF
+
+#define KDIMGSENSOR_NOSENSOR    "non_sensor"
+
+#define KDIMGSENSOR_MAX_INVOKE_DRIVERS  (2)
+#define KDIMGSENSOR_INVOKE_DRIVER_0     (0)
+#define KDIMGSENSOR_INVOKE_DRIVER_1     (1)
+
+/* For sensor synchronize the exposure time / sensor gain and isp gain. */
+typedef struct {
+	MUINT16 u2ISPNewRGain;
+	MUINT16 u2ISPNewGrGain;
+	MUINT16 u2ISPNewGbGain;
+	MUINT16 u2ISPNewBGain;
+	MUINT16 u2SensorNewExpTime;
+	MUINT16 u2SensorNewGain;
+	MUINT8 uSensorExpDelayFrame;
+	MUINT8 uSensorGainDelayFrame;
+	MUINT8 uISPGainDelayFrame;
+	MUINT8 uDummy;
+} ACDK_KD_SENSOR_SYNC_STRUCT, *PACDK_KD_SENSOR_SYNC_STRUCT;
+
+
+typedef struct {
+	MUINT16 AeRefLV05Shutter;   /* Sensor AE Shutter under Lv05 */
+	MUINT16 AeRefLV13Shutter;   /* Sensor AE Shutter under Lv13 */
+	MUINT16 AeRefLV05Gain;  /* Sensor AE Gain under Lv05 */
+	MUINT16 AeRefLV13Gain;  /* Sensor AE Gain under Lv13 */
+} SENSOR_AE_REF_STRUCT, *PSENSOR_AE_REF_STRUCT;
+
+
+typedef struct {
+	MUINT16 AwbRefD65Rgain; /* Sensor AWB R Gain under D65 */
+	MUINT16 AwbRefD65Bgain; /* Sensor AWB B Gain under D65 */
+	MUINT16 AwbRefCWFRgain; /* Sensor AWB R Gain under CWF */
+	MUINT16 AwbRefCWFBgain; /* Sensor AWB B Gain under CWF */
+} SENSOR_AWB_GAIN_REF_STRUCT, *PSENSOR_AWB_GAIN_REF_STRUCT;
+
+
+typedef struct {
+	SENSOR_AE_REF_STRUCT SensorAERef;   /* AE Ref information for ASD usage */
+	SENSOR_AWB_GAIN_REF_STRUCT SensorAwbGainRef;    /* AWB Gain Ref information for ASD usage */
+	MUINT32 SensorLV05LV13EVRef;    /* EV calculate  for ASD usage */
+} SENSOR_AE_AWB_REF_STRUCT, *PSENSOR_AE_AWB_REF_STRUCT;
+
+
+
+typedef struct {
+	MUINT16 AeCurShutter;   /* Current Sensor AE Shutter */
+	MUINT16 AeCurGain;  /* Current Sensor AE Gain */
+} SENSOR_AE_CUR_STRUCT, *PSENSOR_AE_CUR_STRUCT;
+
+
+typedef struct {
+	MUINT16 AwbCurRgain;    /* Current Sensor AWB R Gain */
+	MUINT16 AwbCurBgain;    /* Current Sensor AWB R Gain */
+} SENSOR_AWB_GAIN_CUR_STRUCT, *PSENSOR_AWB_GAIN_CUR_STRUCT;
+
+
+typedef struct {
+	SENSOR_AE_CUR_STRUCT SensorAECur;   /* AE Current information for ASD usage */
+	SENSOR_AWB_GAIN_CUR_STRUCT SensorAwbGainCur;    /* AWB Gain Current information for ASD usage */
+} SENSOR_AE_AWB_CUR_STRUCT, *PSENSOR_AE_AWB_CUR_STRUCT;
+
+
+typedef struct {
+	MUINT32 FNumber;
+	MUINT32 AEISOSpeed;
+	MUINT32 AWBMode;
+	MUINT32 CapExposureTime;
+	MUINT32 FlashLightTimeus;
+	MUINT32 RealISOValue;
+} SENSOR_EXIF_INFO_STRUCT, *PSENSOR_EXIF_INFO_STRUCT;
+
+typedef struct {
+	MUINT32 InitDelay;
+	MUINT32 EffectDelay;
+	MUINT32 AwbDelay;
+	MUINT32 AFSwitchDelayFrame;
+	MUINT32 EvDelay;
+	MUINT32 SatDelay;
+	MUINT32 BrightDelay;
+	MUINT32 ContrastDelay;
+} SENSOR_DELAY_INFO_STRUCT, *PSENSOR_DELAY_INFO_STRUCT;
+
+typedef struct {
+	MUINT32 u4Fno;
+	MUINT32 Exposuretime;
+	MUINT32 Gain;
+	MUINT32 GAIN_BASE;
+} SENSOR_FLASHLIGHT_AE_INFO_STRUCT, *PSENSOR_FLASHLIGHT_AE_INFO_STRUCT;
+
+/* multisensor driver */
+
+typedef struct {
+	MUINT32 drvIndex[KDIMGSENSOR_MAX_INVOKE_DRIVERS];   /* max 2 driver sumultaneously */
+} SENSOR_DRIVER_INDEX_STRUCT, *PSENSOR_DRIVER_INDEX_STRUCT;
+
+/* hardcode by GPIO module, should be sync with.(cust_gpio_usage.h) */
+#define GPIO_CAMERA_INVALID 0xFF
+/*  */
+typedef enum {
+	IMGSENSOR_SOCKET_POS_NONE = 0xFFFFFFFF,
+	IMGSENSOR_SOCKET_POS_RIGHT = 0x1,
+	IMGSENSOR_SOCKET_POS_LEFT = 0x2,
+} IMGSENSOR_SOCKET_POSITION_ENUM;
+/*  */
+typedef enum {
+	IMGSENSOR_SET_I2C_ID_STATE = 0x00,
+	IMGSENSOR_SET_I2C_ID_FORCE
+} IMGSENSOR_SET_I2C_ID_ENUM;
+
+
+
+typedef enum {
+	SENSOR_3A_AE_LOCK = 0,
+	SENSOR_3A_AE_UNLOCK,
+	SENSOR_3A_AWB_LOCK,
+	SENSOR_3A_AWB_UNLOCK,
+	SENSOR_3A_AE_ON,
+	SENSOR_3A_AE_OFF,
+	SENSOR_3A_AWB_ON,
+	SENSOR_3A_AWB_OFF,
+	SENSOR_3A_AF_INFINITY,
+	/* SENSOR_3A_AF_LOCK, */
+	/* SENSOR_3A_AF_UNLOCK, */
+} ACDK_SENSOR_3A_LOCK_ENUM;
+
+
+typedef struct {
+	MUINT32 tgtWidth;
+	MUINT32 tgtHeight;
+	MUINT32 quality;
+
+} ACDK_SENSOR_JPEG_OUTPUT_PARA;
+
+
+/* for JPEG Sensor Info */
+typedef struct {
+	MUINT32 u4FileSize; /* For input sensor width */
+	MUINT32 u4SrcW;     /* For input sensor width */
+	MUINT32 u4SrcH;     /* For input sensor height */
+} ACDK_SENSOR_JPEG_INFO;
+
+
+#endif              /* _KD_IMGSENSOR_DATA_H */
diff --git a/kernel-headers/kd_imgsensor_errcode.h b/kernel-headers/kd_imgsensor_errcode.h
new file mode 100644
index 0000000..0f97b10
--- /dev/null
+++ b/kernel-headers/kd_imgsensor_errcode.h
@@ -0,0 +1,41 @@
+#ifndef _KD_IMGSENSOR_ERRCODE_H_
+#define _KD_IMGSENSOR_ERRCODE_H_
+
+/* @ the same as camera_custom_errocode.h */
+typedef enum {
+	ERROR_NONE = 0,
+	ERROR_MSDK_IS_ACTIVED,
+	ERROR_INVALID_DRIVER_MOD_ID,
+	ERROR_INVALID_FEATURE_ID,
+	ERROR_INVALID_SCENARIO_ID,
+	ERROR_INVALID_CTRL_CODE,
+	ERROR_VIDEO_ENCODER_BUSY,
+	ERROR_INVALID_PARA,
+	ERROR_OUT_OF_BUFFER_NUMBER,
+	ERROR_INVALID_ISP_STATE,
+	ERROR_INVALID_MSDK_STATE,
+	ERROR_PHY_VIR_MEM_MAP_FAIL,
+	ERROR_ENQUEUE_BUFFER_NOT_FOUND,
+	ERROR_MSDK_BUFFER_ALREADY_INIT,
+	ERROR_MSDK_BUFFER_OUT_OF_MEMORY,
+	ERROR_SENSOR_POWER_ON_FAIL,
+	ERROR_SENSOR_CONNECT_FAIL,
+	ERROR_SENSOR_FEATURE_NOT_IMPLEMENT,
+	ERROR_MSDK_IO_CONTROL_CODE,
+	ERROR_MSDK_IO_CONTROL_MSG_QUEUE_OPEN_FAIL,
+	ERROR_DRIVER_INIT_FAIL,
+	ERROR_WRONG_NVRAM_CAMERA_VERSION,
+	ERROR_NVRAM_CAMERA_FILE_FAIL,
+	ERROR_IMAGE_DECODE_FAIL,
+	ERROR_IMAGE_ENCODE_FAIL,
+	ERROR_LED_FLASH_POWER_ON_FAIL,
+	ERROR_MSDK_NOT_ALLOW_BY_MM_APP_MGR,
+	ERROR_LENS_NOT_SUPPORT,
+	ERROR_FLASH_LIGHT_NOT_SUPPORT,
+	ERROR_FACE_DETECTION_NOT_SUPPORT,
+	ERROR_PANORAMA_NOT_SUPPORT,
+	ERROR_MAX
+} CUSTOM_CAMERA_ERROR_CODE_ENUM;
+
+
+#endif
diff --git a/kernel-headers/libmtk_cipher_export.h b/kernel-headers/libmtk_cipher_export.h
new file mode 100644
index 0000000..575671f
--- /dev/null
+++ b/kernel-headers/libmtk_cipher_export.h
@@ -0,0 +1,83 @@
+#ifndef _LIBMTK_CIPHER_EXPORT_H
+#define _LIBMTK_CIPHER_EXPORT_H
+
+#define HEVC_BLK_LEN                            (20480)     /* bytes */
+#define HEVC_MOD                                "HEVC_MOD"
+#define HEVC_NANO                               1000000000ULL
+#define HEVC_CIPHER_LEN                         (102400)    /* bytes */
+
+
+typedef struct {
+	unsigned char buf[HEVC_BLK_LEN];
+	unsigned int len;
+} HEVC_BLK;
+
+typedef enum {
+	VIDEO_ENCRYPT_CODEC_NONE      = 0x0,
+	VIDEO_ENCRYPT_CODEC_HEVC_ENC  = 0x1,
+	VIDEO_ENCRYPT_CODEC_HEVC_DEC  = 0x2,
+	VIDEO_ENCRYPT_CODEC_MAX       = 0xffffffff
+} VIDEO_ENCRYPT_CODEC_T;
+
+
+typedef int (*hevc_api_funp)(HEVC_BLK *p_hevc_blk);
+typedef int (*hevc_api_initk_funp)(unsigned char *key, unsigned int klen);
+
+
+#define SEC_OK                                  0x0
+#define SEC_FAIL                                0x1
+
+/* HEVC shared lib*/
+#define ERR_HEVC_NOT_CORRECT_MODE               0x10000
+#define ERR_HEVC_DATA_NOT_ALIGNED               0x10001
+#define ERR_HEVC_ENC_IOCTL_FAIL                 0x10002
+#define ERR_HEVC_DEC_IOCTL_FAIL                 0x10002
+#define ERR_HEVC_CIPHER_UT_FAIL                 0x10003
+#define ERR_HEVC_DATA_IS_NULL                   0x10004
+#define ERR_HEVC_DATA_LENGTH_NOT_VALID          0x10005
+#define ERR_HEVC_SW_ENC_ERROR                   0x10006
+#define ERR_HEVC_SW_DEC_ERROR                   0x10007
+#define ERR_HEVC_INIT_SW_KEY_ERROR              0x10008
+
+
+/* HEVC sample*/
+#define ERR_HEVC_CIPHER_LIB_NOT_FOUND           0x20001
+#define ERR_HEVC_SW_DEC_BLOCK_SYM_NOT_FOUND     0x20002
+#define ERR_HEVC_HW_ENC_BLOCK_SYM_NOT_FOUND     0x20003
+#define ERR_HEVC_INIT_SW_KEY_SYM_NOT_FOUND      0x20004
+#define ERR_HEVC_INPUT_FILE_NOT_FOUND           0x20005
+#define ERR_HEVC_OUTPUT_FILE_NOT_FOUND          0x20006
+#define ERR_HEVC_SW_DEC_FILE_SYM_NOT_FOUND      0x20007
+#define ERR_HEVC_SW_DEC_FILE_FAILED             0x20008
+#define ERR_HEVC_UNKNOWN                        0x2FFFF
+
+
+/* Define LOG LEVEL*/
+#define SEC_LOG_TRACE 0 /* For source code trace */
+#define SEC_LOG_DEBUG 0 /* For debug purpose */
+#define SEC_LOG_ERROR 1 /* For critical error dump */
+#define SEC_LOG_INFO  1 /* For information to know when processing in normal */
+
+/* DEBUG MACRO */
+#define SMSG_TRACE(...) \
+	do { if (SEC_LOG_TRACE)  printf(__VA_ARGS__); } while (0)
+
+#define SMSG_DEBUG(...) \
+	do { if (SEC_LOG_DEBUG) printf(__VA_ARGS__); } while (0)
+
+#define SMSG_ERROR(...) \
+	do { if (SEC_LOG_ERROR) printf(__VA_ARGS__); } while (0)
+
+#define SMSG_INFO(...) \
+	do { if (SEC_LOG_INFO) printf(__VA_ARGS__); } while (0)
+
+
+#define HEVC_ENCRYTP_FILE_PATH            "/data/mediaserver"
+#define HEVC_ENC_SW_ENCRYPT_FILE_PATH     "/system/lib/libhevce_sb.ca7.android.so"
+#define HEVC_ENC_HW_ENCRYPT_FILE_PATH     "/data/mediaserver/sb.ca7.android_hwenc.so"
+#define HEVC_ENC_HW_DECRYPT_FILE_PATH     "/data/mediaserver/sb.ca7.android_hwdec.so"
+#define HEVC_DEC_SW_ENCRYTP_FILE_PATH     "/system/lib/libHEVCdec_sa.ca7.android.so"
+#define HEVC_DEC_HW_ENCRYPT_FILE_PATH     "/data/mediaserver/dec_sa.ca7.android_hwenc.so"
+#define HEVC_DEC_HW_DECRYPT_FILE_PATH     "/data/mediaserver/dec_sa.ca7.android_hwdec.so"
+
+#endif   /*_LIBMTK_CIPHER_EXPORT_H*/
diff --git a/kernel-headers/linux/almk_drv.h b/kernel-headers/linux/almk_drv.h
new file mode 100644
index 0000000..1c1cc6c
--- /dev/null
+++ b/kernel-headers/linux/almk_drv.h
@@ -0,0 +1,31 @@
+#include <linux/ioctl.h>
+
+#ifndef __ALMK_DRV_H__
+#define __ALMK_DRV_H__
+
+
+typedef struct
+{
+    unsigned int pid;
+    unsigned int *maxSafeSize;  
+    //unsigned int *result;
+    
+} ALMK_DRV_DATA;
+
+
+
+
+#define ALMK_IOCTL_MAGIC        'x'
+
+//#define JPEG_DEC_IOCTL_INIT     _IO  (ALMK_IOCTL_MAGIC, 1)
+//#define JPEG_DEC_IOCTL_CONFIG   _IOW (ALMK_IOCTL_MAGIC, 2, JPEG_DEC_DRV_IN)
+//#define JPEG_DEC_IOCTL_START    _IO  (ALMK_IOCTL_MAGIC, 3)
+//#define JPEG_DEC_IOCTL_WAIT     _IOWR(ALMK_IOCTL_MAGIC, 6, JPEG_DEC_DRV_OUT) 
+//#define JPEG_DEC_IOCTL_DEINIT   _IO  (ALMK_IOCTL_MAGIC, 8)
+
+#define ALMK_IOCTL_CMD_INIT     _IO  (ALMK_IOCTL_MAGIC, 11)
+#define ALMK_IOCTL_CMD_GET_MAX_SIZE     _IOWR(ALMK_IOCTL_MAGIC, 12, ALMK_DRV_DATA)
+#define ALMK_IOCTL_CMD_DEINIT   _IO  (ALMK_IOCTL_MAGIC, 13)
+
+#endif
+
diff --git a/kernel-headers/linux/cache.h b/kernel-headers/linux/cache.h
new file mode 100644
index 0000000..dca5a3c
--- /dev/null
+++ b/kernel-headers/linux/cache.h
@@ -0,0 +1,58 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ ***   This header was automatically generated from a Linux kernel header
+ ***   of the same name, to make information necessary for userspace to
+ ***   call into the kernel available to libc.  It contains only constants,
+ ***   structures, and macros generated from the original header, and thus,
+ ***   contains no copyrightable information.
+ ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef __LINUX_CACHE_H
+#define __LINUX_CACHE_H
+#include <linux/kernel.h>
+#include <asm/cache.h>
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#ifndef L1_CACHE_ALIGN
+#define L1_CACHE_ALIGN(x) ALIGN(x, L1_CACHE_BYTES)
+#endif
+#ifndef SMP_CACHE_BYTES
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define SMP_CACHE_BYTES L1_CACHE_BYTES
+#endif
+#ifndef __read_mostly
+#define __read_mostly
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
+#ifndef ____cacheline_aligned
+#define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
+#endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#ifndef ____cacheline_aligned_in_smp
+#define ____cacheline_aligned_in_smp
+#endif
+#ifndef __cacheline_aligned
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define __cacheline_aligned   __attribute__((__aligned__(SMP_CACHE_BYTES),   __section__(".data.cacheline_aligned")))
+#endif
+#ifndef __cacheline_aligned_in_smp
+#define __cacheline_aligned_in_smp
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
+#ifndef INTERNODE_CACHE_SHIFT
+#define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT
+#endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#ifndef ____cacheline_internodealigned_in_smp
+#define ____cacheline_internodealigned_in_smp
+#endif
+#endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
diff --git a/kernel-headers/linux/ccci_ipc_task_ID.h b/kernel-headers/linux/ccci_ipc_task_ID.h
new file mode 100644
index 0000000..3f9909e
--- /dev/null
+++ b/kernel-headers/linux/ccci_ipc_task_ID.h
@@ -0,0 +1,40 @@
+#ifndef __CCCI_IPC_TASK_ID_H__
+#define __CCCI_IPC_TASK_ID_H__
+// Priority   -->   Local module ID -->     External ID     --> Max sent message
+//		X_IPC_MODULE_CONF(1,M_SSDBG1,0,1)     //TASK_ID_1
+//		X_IPC_MODULE_CONF(1,AP_SSDBG2,1,1)     //TASK_ID_2
+#ifdef __IPC_ID_TABLE
+#define X_IPC_MODULE_CONF(a,b,c,d) {c,b},
+#else 
+#define X_IPC_MODULE_CONF(a,b,c,d)
+#endif
+
+
+#define AP_UNIFY_ID_FLAG (1<<31)
+#define MD_UNIFY_ID_FLAG (0<<31)
+
+//----------------------------------------------------------
+#define AGPS_MD_MOD_L4C 0
+#define AGPS_MD_MOD_L4C_2 1
+#define AGPS_MD_MOD_L4C_3 2
+#define AGPS_MD_MOD_L4C_4 3
+//agps MD begin task_id
+//Wait to add
+
+#define AGPS_AP_MOD_MMI 0   
+//agps AP begin task_id
+//Wait to add    
+#define GPS_AP_MOD 2
+//--------------------------------------------------------------------------
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C, MD_UNIFY_ID_FLAG|0, 1)
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C_2, MD_UNIFY_ID_FLAG|1, 1)
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C_3, MD_UNIFY_ID_FLAG|2, 1)
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C_4, MD_UNIFY_ID_FLAG|3, 1)
+//Wait to add 
+//--------------------------------------------------------------------------
+X_IPC_MODULE_CONF(1, AGPS_AP_MOD_MMI, AP_UNIFY_ID_FLAG|0, 1)
+X_IPC_MODULE_CONF(1, GPS_AP_MOD, AP_UNIFY_ID_FLAG|2, 1)
+//Wait to add 
+//-------------------------------------------------------------------------
+
+#endif
diff --git a/kernel-headers/linux/cmdq/cmdq_event.h b/kernel-headers/linux/cmdq/cmdq_event.h
new file mode 100644
index 0000000..4b71514
--- /dev/null
+++ b/kernel-headers/linux/cmdq/cmdq_event.h
@@ -0,0 +1,125 @@
+
+/* MDP start frame */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA0_SOF, 0)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA1_SOF, 1)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_DSI0_TE_SOF, 2)	/* DISPSYS TE event */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_DSI1_TE_SOF, 3)	/* DISPSYS TE event */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_MVW_SOF, 4)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP0_SOF, 5)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP1_SOF, 6)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WDMA_SOF, 7)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_SOF, 8)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_SOF, 9)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_CROP_SOF, 10)
+/* Display start frame */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL0_SOF, 11)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL1_SOF, 12)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA0_SOF, 13)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA1_SOF, 14)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA2_SOF, 15)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA0_SOF, 16)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA1_SOF, 17)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR0_SOF, 18)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR1_SOF, 19)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_AAL_SOF, 20)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_GAMMA_SOF, 21)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_UFOE_SOF, 22)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_PWM0_SOF, 23)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_PWM1_SOF, 24)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OD_SOF, 25)
+/* MDP frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA0_EOF, 26)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RDMA1_EOF, 27)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ0_EOF, 28)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ1_EOF, 29)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_RSZ2_EOF, 30)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP0_EOF, 31)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_TDSHP1_EOF, 32)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WDMA_EOF, 33)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_W_EOF, 34)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT0_R_EOF, 35)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_W_EOF, 36)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_WROT1_R_EOF, 37)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MDP_CROP_EOF, 38)
+/* Display frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL0_EOF, 39)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_OVL1_EOF, 40)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA0_EOF, 41)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA1_EOF, 42)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA2_EOF, 43)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA0_EOF, 44)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_WDMA1_EOF, 45)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR0_EOF, 46)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_COLOR1_EOF, 47)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_AAL_EOF, 48)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_GAMMA_EOF, 49)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_UFOE_EOF, 50)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_DPI0_EOF, 51)
+/* Mutex frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX0_STREAM_EOF, 53)	/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX1_STREAM_EOF, 54)	/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX2_STREAM_EOF, 55)	/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX3_STREAM_EOF, 56)	/* DISPSYS */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX4_STREAM_EOF, 57)	/* DISPSYS, please refer to disp_hal.h */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX5_STREAM_EOF, 58)	/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX6_STREAM_EOF, 59)	/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX7_STREAM_EOF, 60)	/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX8_STREAM_EOF, 61)	/* DpFramework */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_MUTEX9_STREAM_EOF, 62)
+/* DpFramework via CMDQ_IOCTL_LOCK_MUTEX */
+/* Display underrun */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA0_UNDERRUN, 63)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA1_UNDERRUN, 64)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_DISP_RDMA2_UNDERRUN, 65)
+/* ISP frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS2_2_EOF, 129)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS2_1_EOF, 130)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS2_0_EOF, 131)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS1_1_EOF, 132)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_PASS1_0_EOF, 133)
+/* Engine events */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_CAMSV_2_PASS1_DONE, 134)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_CAMSV_1_PASS1_DONE, 135)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_SENINF_CAM1_2_3_FULL, 136)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_ISP_SENINF_CAM0_FULL, 137)
+/* JPEG frame done */
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_ENC_PASS2_EOF, 257)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_ENC_PASS1_EOF, 258)
+DECLARE_CMDQ_EVENT(CMDQ_EVENT_JPEG_DEC_EOF, 259)
+
+DECLARE_CMDQ_EVENT(CMDQ_MAX_HW_EVENT_COUNT, 260)
+
+
+
+/* Keep this at the end of HW events */
+/* SW Sync Tokens (Pre-defined) */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_CONFIG_DIRTY, 261)
+/* Config thread notify trigger thread */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_STREAM_EOF, 262)
+/* Trigger thread notify config thread */
+/* ESD check state. Trigger thread will be blocked until the check finishes. */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_ESD_EOF, 263)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_CABC_EOF, 264)
+/* check CABC setup finish */
+/* Block Trigger thread until the path freeze finishes */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_FREEZE_EOF, 265)
+/* Pass-2 notifies VENC frame is ready to be encoded */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_VENC_INPUT_READY, 270)
+/* VENC notifies Pass-2 encoding completion so next frame may start */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_VENC_EOF, 271)
+/* Notify normal CMDQ there are some secure task done */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_SECURE_THR_EOF, 299)
+/* SW Sync Tokens (User-defined) */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_USER_0, 300)
+/* SW-defined sync token */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_USER_1, 301)
+/* GPR access tokens (for HW register backup) */
+/* There are 15 32-bit GPR, 3 GPR form a set (64-bit for address, 32-bit for value) */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_0, 400)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_1, 401)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_2, 402)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_3, 403)
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_GPR_SET_4, 404)
+
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_MAX, (0x1FF))	/* event id is 9 bit */
+DECLARE_CMDQ_EVENT(CMDQ_SYNC_TOKEN_INVALID, (-1))
diff --git a/kernel-headers/linux/cmdq/cmdq_subsys.h b/kernel-headers/linux/cmdq/cmdq_subsys.h
new file mode 100644
index 0000000..1bef2d8
--- /dev/null
+++ b/kernel-headers/linux/cmdq/cmdq_subsys.h
@@ -0,0 +1,25 @@
+
+/* msb	 id   group        reg-base-name */
+DECLARE_CMDQ_SUBSYS(0x1300, 0, MFG, HAN_BASE)
+DECLARE_CMDQ_SUBSYS(0x1400, 1, MMSYS, MMSYS_CONFIG_BASE)
+DECLARE_CMDQ_SUBSYS(0x1401, 2, DISP, DISP_RDMA2_BASE)
+DECLARE_CMDQ_SUBSYS(0x1402, 3, DISP, MM_MUTEX_BASE)
+DECLARE_CMDQ_SUBSYS(0x1500, 4, CAM, IMGSYS_BASE)
+DECLARE_CMDQ_SUBSYS(0x1600, 5, VDEC, VDEC_GCON_BASE)
+DECLARE_CMDQ_SUBSYS(0x1700, 6, MJC, MJC_CONFIG_BASE)
+DECLARE_CMDQ_SUBSYS(0x1800, 7, VENC, VENC_GCON_BASE)
+DECLARE_CMDQ_SUBSYS(0x1000, 8, INFRA_AO, CKSYS_BASE)
+DECLARE_CMDQ_SUBSYS(0x1001, 9, INFRA_AO, KP_BASE)
+DECLARE_CMDQ_SUBSYS(0x1002, 10, MD32, MD32_BASE)
+DECLARE_CMDQ_SUBSYS(0x1003, 11, MD32, MD32_BASE)
+DECLARE_CMDQ_SUBSYS(0x1004, 12, MD32, MD32_BASE)
+DECLARE_CMDQ_SUBSYS(0x1005, 13, MD32, MD32_BASE)
+DECLARE_CMDQ_SUBSYS(0x1020, 14, INFRASYS, MCUCFG_BASE)
+DECLARE_CMDQ_SUBSYS(0x1021, 15, INFRASYS, GCPU_BASE)
+DECLARE_CMDQ_SUBSYS(0x1120, 16, PERISYS, USB0_BASE)
+DECLARE_CMDQ_SUBSYS(0x1121, 17, PERISYS, USB_SIF_BASE)
+DECLARE_CMDQ_SUBSYS(0x1122, 18, PERISYS, AUDIO_BASE)
+DECLARE_CMDQ_SUBSYS(0x1123, 19, PERISYS, MSDC0_BASE)
+DECLARE_CMDQ_SUBSYS(0x1124, 20, PERISYS, MSDC1_BASE)
+DECLARE_CMDQ_SUBSYS(0x1125, 21, PERISYS, MSDC2_BASE)
+DECLARE_CMDQ_SUBSYS(0x1126, 22, PERISYS, MSDC3_BASE)
diff --git a/kernel-headers/linux/ddp_od.h b/kernel-headers/linux/ddp_od.h
new file mode 100644
index 0000000..8c7ebbe
--- /dev/null
+++ b/kernel-headers/linux/ddp_od.h
@@ -0,0 +1,39 @@
+#ifndef __DDP_OD_H__
+#define __DDP_OD_H__
+
+#include <linux/ioctl.h>
+
+/* OD */
+typedef struct {
+    unsigned int size;
+    unsigned int type;
+    unsigned int ret;
+    unsigned int param0;
+    unsigned int param1;
+    unsigned int param2;
+    unsigned int param3;
+} DISP_OD_CMD;
+
+typedef enum{
+	OD_CTL_READ_REG,
+	OD_CTL_WRITE_REG,
+	OD_CTL_ENABLE_DEMO_MODE,
+	OD_CTL_RUN_TEST,
+	OD_CTL_WRITE_TABLE,
+	OD_CTL_CMD_NUM,
+	OD_CTL_ENABLE
+} DISP_OD_CMD_TYPE;
+
+typedef enum{
+	OD_CTL_ENABLE_OFF,
+	OD_CTL_ENABLE_ON
+} DISP_OD_ENABLE_STAGE;
+
+#define OD_CTL_ENABLE_DELAY 3
+
+/* OD */
+#define DISP_IOCTL_MAGIC        'x'
+#define DISP_IOCTL_OD_CTL           _IOWR    (DISP_IOCTL_MAGIC, 80 , DISP_OD_CMD)
+#define DISP_IOCTL_OD_SET_ENABLED   _IOWR    (DISP_IOCTL_MAGIC, 81 , int)
+
+#endif
diff --git a/kernel-headers/linux/disp_session.h b/kernel-headers/linux/disp_session.h
new file mode 100644
index 0000000..5044708
--- /dev/null
+++ b/kernel-headers/linux/disp_session.h
@@ -0,0 +1,400 @@
+#ifndef __DISP_SESSION_H
+#define __DISP_SESSION_H
+
+#define DISP_SESSION_DEVICE	"mtk_disp_mgr"
+
+
+#define DISP_NO_ION_FD                 ((int)(~0U>>1))
+#define DISP_NO_USE_LAEYR_ID           ((int)(~0U>>1))
+
+/* sync with define in ddp_ovl.h */
+#define OVL_CASCADE_SUPPORT
+#ifdef OVL_CASCADE_SUPPORT
+#define MAX_INPUT_CONFIG		8
+#else
+#define MAX_INPUT_CONFIG		4
+#endif
+
+#define MAKE_DISP_FORMAT_ID(id, bpp)  (((id) << 8) | (bpp))
+#define DISP_SESSION_MODE(id) (((id)>>24)&0xff)
+#define DISP_SESSION_TYPE(id) (((id)>>16)&0xff)
+#define DISP_SESSION_DEV(id) ((id)&0xff)
+#define MAKE_DISP_SESSION(type, dev) (unsigned int)((type)<<16 | (dev))
+
+
+
+/* /============================================================================= */
+/* structure declarations */
+/* /=========================== */
+
+typedef enum {
+	DISP_IF_TYPE_DBI = 0,
+	DISP_IF_TYPE_DPI,
+	DISP_IF_TYPE_DSI0,
+	DISP_IF_TYPE_DSI1,
+	DISP_IF_TYPE_DSIDUAL,
+	DISP_IF_HDMI = 7,
+	DISP_IF_HDMI_SMARTBOOK,
+	DISP_IF_MHL,
+	DISP_IF_EPD
+} DISP_IF_TYPE;
+
+typedef enum {
+	DISP_IF_FORMAT_RGB565 = 0,
+	DISP_IF_FORMAT_RGB666,
+	DISP_IF_FORMAT_RGB888
+} DISP_IF_FORMAT;
+
+typedef enum {
+	DISP_IF_MODE_VIDEO = 0,
+	DISP_IF_MODE_COMMAND
+} DISP_IF_MODE;
+
+
+typedef enum {
+	DISP_ORIENTATION_0 = 0,
+	DISP_ORIENTATION_90 = 1,
+	DISP_ORIENTATION_180 = 2,
+	DISP_ORIENTATION_270 = 3,
+} DISP_ORIENTATION;
+
+typedef enum {
+	DISP_FORMAT_UNKNOWN = 0,
+
+	DISP_FORMAT_RGB565 = MAKE_DISP_FORMAT_ID(1, 2),
+	DISP_FORMAT_RGB888 = MAKE_DISP_FORMAT_ID(2, 3),
+	DISP_FORMAT_BGR888 = MAKE_DISP_FORMAT_ID(3, 3),
+	DISP_FORMAT_ARGB8888 = MAKE_DISP_FORMAT_ID(4, 4),
+	DISP_FORMAT_ABGR8888 = MAKE_DISP_FORMAT_ID(5, 4),
+	DISP_FORMAT_RGBA8888 = MAKE_DISP_FORMAT_ID(6, 4),
+	DISP_FORMAT_BGRA8888 = MAKE_DISP_FORMAT_ID(7, 4),
+	DISP_FORMAT_YUV422 = MAKE_DISP_FORMAT_ID(8, 2),
+	DISP_FORMAT_XRGB8888 = MAKE_DISP_FORMAT_ID(9, 4),
+	DISP_FORMAT_XBGR8888 = MAKE_DISP_FORMAT_ID(10, 4),
+	DISP_FORMAT_RGBX8888 = MAKE_DISP_FORMAT_ID(11, 4),
+	DISP_FORMAT_BGRX8888 = MAKE_DISP_FORMAT_ID(12, 4),
+	DISP_FORMAT_UYVY = MAKE_DISP_FORMAT_ID(13, 2),
+	DISP_FORMAT_YUV420_P = MAKE_DISP_FORMAT_ID(14, 2),
+	DISP_FORMAT_YV12 = MAKE_DISP_FORMAT_ID(16, 1),	/* BPP = 1.5 */
+	DISP_FORMAT_BPP_MASK = 0xFF,
+} DISP_FORMAT;
+
+typedef enum {
+	DISP_LAYER_2D = 0,
+	DISP_LAYER_3D_SBS_0 = 0x1,
+	DISP_LAYER_3D_SBS_90 = 0x2,
+	DISP_LAYER_3D_SBS_180 = 0x3,
+	DISP_LAYER_3D_SBS_270 = 0x4,
+	DISP_LAYER_3D_TAB_0 = 0x10,
+	DISP_LAYER_3D_TAB_90 = 0x20,
+	DISP_LAYER_3D_TAB_180 = 0x30,
+	DISP_LAYER_3D_TAB_270 = 0x40,
+} DISP_LAYER_TYPE;
+
+typedef enum {
+	/* normal memory */
+	DISP_NORMAL_BUFFER = 0,
+	/* normal memory but should not be dumpped within screenshot */
+	DISP_PROTECT_BUFFER = 1,
+	/* secure memory */
+	DISP_SECURE_BUFFER = 2,
+	DISP_SECURE_BUFFER_SHIFT = 0x10002
+} DISP_BUFFER_TYPE;
+
+typedef enum {
+	/* ion buffer */
+	DISP_BUFFER_ION = 0,
+	/* dim layer, const alpha */
+	DISP_BUFFER_ALPHA = 1,
+	/* mva buffer */
+	DISP_BUFFER_MVA = 2,
+} DISP_BUFFER_SOURCE;
+
+typedef enum {
+	DISP_ALPHA_ONE = 0,
+	DISP_ALPHA_SRC = 1,
+	DISP_ALPHA_SRC_INVERT = 2,
+	DISP_ALPHA_INVALID = 3,
+} DISP_ALPHA_TYPE;
+
+typedef enum {
+	DISP_SESSION_PRIMARY = 1,
+	DISP_SESSION_EXTERNAL = 2,
+	DISP_SESSION_MEMORY = 3
+} DISP_SESSION_TYPE;
+
+typedef enum {
+	DISP_YUV_BT601_FULL = 0,
+	DISP_YUV_BT601 = 1,
+	DISP_YUV_BT709 = 2
+} DISP_YUV_RANGE_ENUM;
+
+typedef enum {
+	DISP_INVALID_SESSION_MODE = 0,
+	/* single output */
+	DISP_SESSION_DIRECT_LINK_MODE = 1,
+	DISP_SESSION_DECOUPLE_MODE = 2,
+
+	/* two ouputs */
+	DISP_SESSION_DIRECT_LINK_MIRROR_MODE = 3,
+	DISP_SESSION_DECOUPLE_MIRROR_MODE = 4,
+
+	DISP_SESSION_RDMA_MODE,
+	DISP_SESSION_MODE_NUM,
+
+} DISP_MODE;
+
+typedef enum {
+	SESSION_USER_INVALID = -1,
+	SESSION_USER_HWC = 0,
+	SESSION_USER_GUIEXT = 1,
+	SESSION_USER_AEE = 2,
+	SESSION_USER_PANDISP = 3,
+	SESSION_USER_CNT,
+} DISP_SESSION_USER;
+
+typedef enum {
+	DISP_OUTPUT_UNKNOWN = 0,
+	DISP_OUTPUT_MEMORY = 1,
+	DISP_OUTPUT_DECOUPLE = 2,
+} DISP_DC_TYPE;
+
+typedef enum {
+	TRIGGER_NORMAL,
+	TRIGGER_SUSPEND,
+	TRIGGER_RESUME,
+
+	TRIGGER_MODE_MAX_NUM
+} EXTD_TRIGGER_MODE;
+
+typedef struct disp_session_config_t {
+	DISP_SESSION_TYPE type;
+	unsigned int device_id;
+	DISP_MODE mode;
+	unsigned int session_id;
+	DISP_SESSION_USER user;
+	unsigned int present_fence_idx;
+	DISP_DC_TYPE dc_type;
+	int need_merge;
+	EXTD_TRIGGER_MODE tigger_mode;
+} disp_session_config;
+
+typedef struct {
+	unsigned int session_id;
+	unsigned int vsync_cnt;
+	unsigned long long vsync_ts;
+	int lcm_fps;
+} disp_session_vsync_config;
+
+typedef struct disp_input_config_t {
+	unsigned int layer_id;
+	unsigned int layer_enable;
+	DISP_BUFFER_SOURCE buffer_source;
+	void *src_base_addr;
+	void *src_phy_addr;
+	unsigned int src_direct_link;
+	DISP_FORMAT src_fmt;
+	unsigned int src_use_color_key;
+	unsigned int src_color_key;
+	unsigned int src_pitch;
+	unsigned int src_offset_x, src_offset_y;
+	unsigned int src_width, src_height;
+
+	unsigned int tgt_offset_x, tgt_offset_y;
+	unsigned int tgt_width, tgt_height;
+	DISP_ORIENTATION layer_rotation;
+	DISP_LAYER_TYPE layer_type;
+	DISP_ORIENTATION video_rotation;
+
+	unsigned int isTdshp;	/* set to 1, will go through tdshp first, then layer blending, then to color */
+
+	unsigned int next_buff_idx;
+	int identity;
+	int connected_type;
+	DISP_BUFFER_TYPE security;
+	unsigned int alpha_enable;
+	unsigned int alpha;
+	unsigned int sur_aen;
+	DISP_ALPHA_TYPE src_alpha;
+	DISP_ALPHA_TYPE dst_alpha;
+	unsigned int frm_sequence;
+	DISP_YUV_RANGE_ENUM yuv_range;
+} disp_input_config;
+
+typedef struct disp_output_config_t {
+	void *va;
+	void *pa;
+	DISP_FORMAT fmt;
+	unsigned int x;
+	unsigned int y;
+	unsigned int width;
+	unsigned int height;
+	unsigned int pitch;
+	unsigned int pitchUV;
+	DISP_BUFFER_TYPE security;
+	unsigned int buff_idx;
+	unsigned int interface_idx;
+	unsigned int frm_sequence;
+} disp_output_config;
+
+typedef struct disp_session_input_config_t {
+	DISP_SESSION_USER setter;
+	unsigned int session_id;
+	unsigned int config_layer_num;
+	disp_input_config config[8];
+} disp_session_input_config;
+
+typedef struct disp_session_output_config_t {
+	unsigned int session_id;
+	disp_output_config config;
+} disp_session_output_config;
+
+typedef struct disp_session_layer_num_config_t {
+	unsigned int session_id;
+	unsigned int max_layer_num;
+} disp_session_layer_num_config;
+
+struct disp_frame_cfg_t {
+	DISP_SESSION_USER setter;
+	unsigned int session_id;
+
+	/* input config */
+	unsigned int input_layer_num;
+	disp_input_config input_cfg[8];
+	unsigned int overlap_layer_num;
+
+	/* constant layer */
+	unsigned int const_layer_num;
+	disp_input_config const_layer[1];
+
+	/* output config */
+	int output_en;
+	disp_output_config output_cfg;
+
+	/* trigger config */
+	DISP_MODE mode;
+	unsigned int present_fence_idx;
+	EXTD_TRIGGER_MODE tigger_mode;
+	DISP_SESSION_USER user;
+};
+
+typedef struct disp_session_info_t {
+	unsigned int session_id;
+	unsigned int maxLayerNum;
+	unsigned int isHwVsyncAvailable;
+	DISP_IF_TYPE displayType;
+	unsigned int displayWidth;
+	unsigned int displayHeight;
+	unsigned int displayFormat;
+	DISP_IF_MODE displayMode;
+	unsigned int vsyncFPS;
+	unsigned int physicalWidth;
+	unsigned int physicalHeight;
+	unsigned int isConnected;
+	unsigned int isHDCPSupported;
+	unsigned int isOVLDisabled;
+	unsigned int is3DSupport;
+	unsigned int const_layer_num;
+	/* updateFPS: fps of HWC trigger display */
+	/* notes: for better Accuracy, updateFPS = real_fps*100 */
+	unsigned int updateFPS;
+	unsigned int is_updateFPS_stable;
+} disp_session_info;
+
+typedef struct disp_buffer_info_t {
+	/* Session */
+	unsigned int session_id;
+	/* Input */
+	unsigned int layer_id;
+	unsigned int layer_en;
+	int ion_fd;
+	unsigned int cache_sync;
+	/* Output */
+	unsigned int index;
+	int fence_fd;
+	unsigned int interface_index;
+	int interface_fence_fd;
+} disp_buffer_info;
+
+typedef struct disp_present_fence_info_t {
+	/* input */
+	unsigned int session_id;
+	/* output */
+	unsigned int present_fence_fd;
+	unsigned int present_fence_index;
+} disp_present_fence;
+
+typedef struct disp_present_fence_t {
+	/* Session */
+	unsigned int session_id;
+
+	/* Output */
+	unsigned int index;
+	int fence_fd;
+} disp_present_fence_info;
+
+typedef enum {
+	DISP_OUTPUT_CAP_DIRECT_LINK = 0,
+	DISP_OUTPUT_CAP_DECOUPLE,
+	DISP_OUTPUT_CAP_SWITCHABLE,
+} DISP_CAP_OUTPUT_MODE;
+
+typedef enum {
+	DISP_OUTPUT_CAP_SINGLE_PASS = 0,
+	DISP_OUTPUT_CAP_MULTI_PASS,
+} DISP_CAP_OUTPUT_PASS;
+
+typedef enum {
+	DISP_FEATURE_TIME_SHARING = 0x00000001,
+} DISP_FEATURE;
+
+typedef struct disp_caps_t {
+	DISP_CAP_OUTPUT_MODE output_mode;
+	DISP_CAP_OUTPUT_PASS output_pass;
+	unsigned int max_layer_num;
+#ifdef CONFIG_FOR_SOURCE_PQ
+	unsigned int max_pq_num;
+#endif
+	unsigned int disp_feature;
+	int is_support_frame_cfg_ioctl;
+	int is_output_rotated;
+} disp_caps_info;
+
+typedef struct disp_session_buf_t {
+	unsigned int session_id;
+	unsigned int buf_hnd[3];
+} disp_session_buf_info;
+
+/* IOCTL commands. */
+#define DISP_IOW(num, dtype)     _IOW('O', num, dtype)
+#define DISP_IOR(num, dtype)     _IOR('O', num, dtype)
+#define DISP_IOWR(num, dtype)    _IOWR('O', num, dtype)
+#define DISP_IO(num)             _IO('O', num)
+
+
+#define	DISP_IOCTL_CREATE_SESSION				DISP_IOW(201, disp_session_config)
+#define	DISP_IOCTL_DESTROY_SESSION				DISP_IOW(202, disp_session_config)
+#define	DISP_IOCTL_TRIGGER_SESSION				DISP_IOW(203, disp_session_config)
+#define	DISP_IOCTL_PREPARE_INPUT_BUFFER			DISP_IOW(204, disp_buffer_info)
+#define	DISP_IOCTL_PREPARE_OUTPUT_BUFFER		DISP_IOW(205, disp_buffer_info)
+#define	DISP_IOCTL_SET_INPUT_BUFFER				DISP_IOW(206, disp_session_input_config)
+#define	DISP_IOCTL_SET_OUTPUT_BUFFER			DISP_IOW(207, disp_session_output_config)
+#define	DISP_IOCTL_GET_SESSION_INFO				DISP_IOW(208, disp_session_info)
+
+
+#define	DISP_IOCTL_SET_SESSION_MODE				DISP_IOW(209, disp_session_config)
+#define	DISP_IOCTL_GET_SESSION_MODE				DISP_IOW(210, disp_session_config)
+#define	DISP_IOCTL_SET_SESSION_TYPE				DISP_IOW(211, disp_session_config)
+#define	DISP_IOCTL_GET_SESSION_TYPE				DISP_IOW(212, disp_session_config)
+#define	DISP_IOCTL_WAIT_FOR_VSYNC				DISP_IOW(213, disp_session_vsync_config)
+#define	DISP_IOCTL_SET_MAX_LAYER_NUM			DISP_IOW(214, disp_session_layer_num_config)
+#define	DISP_IOCTL_SET_VSYNC_FPS				DISP_IOW(215, unsigned int)
+
+#define		DISP_IOCTL_GET_PRESENT_FENCE			DISP_IOW(216, disp_present_fence)
+
+#define DISP_IOCTL_GET_IS_DRIVER_SUSPEND		DISP_IOW(217, unsigned int)
+#define DISP_IOCTL_GET_DISPLAY_CAPS			DISP_IOW(218, disp_caps_info)
+#define DISP_IOCTL_INSERT_SESSION_BUFFERS			DISP_IOW(219, disp_session_buf_info)
+#define	DISP_IOCTL_FRAME_CONFIG			DISP_IOW(220, disp_session_output_config)
+
+#endif				/* __DISP_SESSION_H */
diff --git a/kernel-headers/linux/disp_svp.h b/kernel-headers/linux/disp_svp.h
new file mode 100644
index 0000000..3b8310f
--- /dev/null
+++ b/kernel-headers/linux/disp_svp.h
@@ -0,0 +1,266 @@
+/**
+ * NOTICE:
+ * MUST BE consistent with bionic/libc/kernel/common/linux/disp_svp.h
+ */
+#ifndef __DISP_SVP_H
+#define __DISP_SVP_H
+
+#define DISP_NO_ION_FD                 ((int)(~0U>>1))
+#define DISP_NO_USE_LAEYR_ID           ((int)(~0U>>1))
+
+#define MAX_INPUT_CONFIG 		4
+#define MAKE_DISP_FORMAT_ID(id, bpp)  (((id) << 8) | (bpp))
+
+///=============================================================================
+// structure declarations
+///===========================
+
+typedef enum
+{
+    DISP_IF_TYPE_DBI = 0,
+    DISP_IF_TYPE_DPI,
+    DISP_IF_TYPE_DSI0,
+    DISP_IF_TYPE_DSI1,
+    DISP_IF_TYPE_DSIDUAL,
+    DISP_IF_HDMI,
+    DISP_IF_HDMI_SMARTBOOK
+} DISP_IF_TYPE;
+
+typedef enum
+{
+    DISP_IF_FORMAT_RGB565 = 0,
+    DISP_IF_FORMAT_RGB666,
+    DISP_IF_FORMAT_RGB888 
+} DISP_IF_FORMAT;
+
+typedef enum
+{
+    DISP_IF_MODE_VIDEO = 0,
+    DISP_IF_MODE_COMMAND
+} DISP_IF_MODE;
+
+
+typedef enum
+{
+    DISP_ORIENTATION_0   = 0,
+    DISP_ORIENTATION_90  = 1,
+    DISP_ORIENTATION_180 = 2,
+    DISP_ORIENTATION_270 = 3,
+} DISP_ORIENTATION;
+
+typedef enum
+{
+    DISP_FORMAT_UNKNOWN = 0,
+
+    DISP_FORMAT_RGB565   = MAKE_DISP_FORMAT_ID(1, 2),
+    DISP_FORMAT_RGB888   = MAKE_DISP_FORMAT_ID(2, 3),
+    DISP_FORMAT_BGR888   = MAKE_DISP_FORMAT_ID(3, 3),
+    DISP_FORMAT_ARGB8888 = MAKE_DISP_FORMAT_ID(4, 4),
+    DISP_FORMAT_ABGR8888 = MAKE_DISP_FORMAT_ID(5, 4),
+    DISP_FORMAT_RGBA8888 = MAKE_DISP_FORMAT_ID(6, 4),
+    DISP_FORMAT_BGRA8888 = MAKE_DISP_FORMAT_ID(7, 4),
+    DISP_FORMAT_XRGB8888 = MAKE_DISP_FORMAT_ID(8, 4),
+    DISP_FORMAT_XBGR8888 = MAKE_DISP_FORMAT_ID(9, 4),
+    //Packed YUV Formats
+    DISP_FORMAT_YUV444	 = MAKE_DISP_FORMAT_ID(10, 3),
+    DISP_FORMAT_YVYU	 = MAKE_DISP_FORMAT_ID(11, 2),	//Same as UYVY, but replace Y/U/V
+    DISP_FORMAT_VYUY	 = MAKE_DISP_FORMAT_ID(12, 2),
+    DISP_FORMAT_UYVY     = MAKE_DISP_FORMAT_ID(13, 2),
+    DISP_FORMAT_Y422     = MAKE_DISP_FORMAT_ID(13, 2),
+    DISP_FORMAT_YUYV 	 = MAKE_DISP_FORMAT_ID(14, 2),	//Same as UYVY but replace U/V
+    DISP_FORMAT_YUY2 	 = MAKE_DISP_FORMAT_ID(14, 2),
+    DISP_FORMAT_YUV422 	 = MAKE_DISP_FORMAT_ID(14, 2),  //Will be removed
+    DISP_FORMAT_GREY 	 = MAKE_DISP_FORMAT_ID(15, 1),	//Single Y plane
+    DISP_FORMAT_Y800 	 = MAKE_DISP_FORMAT_ID(15, 1),
+    DISP_FORMAT_Y8	 	 = MAKE_DISP_FORMAT_ID(15, 1),
+    //Planar YUV Formats
+    DISP_FORMAT_YV12     = MAKE_DISP_FORMAT_ID(16, 1),	//BPP = 1.5
+    DISP_FORMAT_I420	 = MAKE_DISP_FORMAT_ID(17, 1),	//Same as YV12 but replace U/V
+    DISP_FORMAT_IYUV	 = MAKE_DISP_FORMAT_ID(17, 1),
+    DISP_FORMAT_NV12 	 = MAKE_DISP_FORMAT_ID(18, 1),	//BPP = 1.5
+    DISP_FORMAT_NV21 	 = MAKE_DISP_FORMAT_ID(19, 1),	//Same as NV12 but replace U/V
+
+    DISP_FORMAT_BPP_MASK = 0xFFFF,
+} DISP_FORMAT;
+
+typedef enum
+{
+	DISP_LAYER_2D 			= 0,
+	DISP_LAYER_3D_SBS_0 	= 0x1,
+	DISP_LAYER_3D_SBS_90 	= 0x2,
+	DISP_LAYER_3D_SBS_180 	= 0x3,
+	DISP_LAYER_3D_SBS_270 	= 0x4,
+	DISP_LAYER_3D_TAB_0 	= 0x10,
+	DISP_LAYER_3D_TAB_90 	= 0x20,
+	DISP_LAYER_3D_TAB_180 	= 0x30,
+	DISP_LAYER_3D_TAB_270 	= 0x40,
+} DISP_LAYER_TYPE;
+
+typedef enum
+{
+        // normal memory
+	DISP_NORMAL_BUFFER = 0,
+        // secure memory
+	DISP_SECURE_BUFFER = 1,
+        // normal memory but should not be dumpped within screenshot
+	DISP_PROTECT_BUFFER = 2,
+	DISP_SECURE_BUFFER_SHIFT		= 0x10001
+} DISP_BUFFER_TYPE;
+
+typedef enum
+{
+	DISP_SESSION_PRIMARY 	= 1,
+	DISP_SESSION_EXTERNAL	= 2,
+	DISP_SESSION_MEMORY		= 3
+}DISP_SESSION_TYPE;
+
+typedef enum
+{
+  	// single output
+	DISP_SESSION_DIRECT_LINK_MODE   		= 1,
+	DISP_SESSION_DECOUPLE_MODE				= 2,
+
+	// two ouputs
+	DISP_SESSION_DIRECT_LINK_MIRROR_MODE	= 3,
+	DISP_SESSION_DECOUPLE_MIRROR_MODE		= 4,
+}DISP_MODE;
+
+typedef struct disp_session_config_t
+{
+	DISP_SESSION_TYPE	type;
+	unsigned int		device_id;
+	DISP_MODE			mode;
+	unsigned int 		session_id;
+}disp_session_config;
+
+typedef struct
+{
+	unsigned int 		session_id;
+	unsigned int 		vsync_cnt;
+	long int			vsync_ts;
+}disp_session_vsync_config;
+
+typedef struct disp_input_config_t
+{
+    unsigned int 		layer_id;
+    unsigned int 		layer_enable;
+
+    void* 				src_base_addr;
+    void* 				src_phy_addr;
+    unsigned int  		src_direct_link;
+    DISP_FORMAT 		src_fmt;
+    unsigned int  		src_use_color_key;
+    unsigned int  		src_color_key;
+    unsigned int  		src_pitch;
+    unsigned int  		src_offset_x, src_offset_y;
+    unsigned int  		src_width, src_height;
+
+    unsigned int  		tgt_offset_x, tgt_offset_y;
+    unsigned int  		tgt_width, tgt_height;
+    DISP_ORIENTATION 	layer_rotation;
+    DISP_LAYER_TYPE		layer_type;
+    DISP_ORIENTATION 	video_rotation;
+
+    unsigned int 		isTdshp;  // set to 1, will go through tdshp first, then layer blending, then to color
+
+    unsigned int 		next_buff_idx;
+    int 				identity;
+    int 				connected_type;
+    DISP_BUFFER_TYPE 	security;
+    unsigned int		alpha_enable;
+    unsigned int		alpha;
+	unsigned int 		frm_sequence;
+}disp_input_config;
+
+
+typedef struct disp_output_config_t
+{
+	unsigned int 		va;
+	unsigned int		pa;
+	DISP_FORMAT 		fmt;
+	unsigned int		x;
+	unsigned int		y;
+	unsigned int		width;
+	unsigned int		height;
+	unsigned int		pitch;
+	unsigned int		pitchUV;
+	DISP_BUFFER_TYPE	security;
+	unsigned int		buff_idx;
+	unsigned int 		frm_sequence;
+}disp_output_config;
+
+#define MAX_INPUT_CONFIG 4
+
+typedef struct disp_session_input_config_t
+{
+	unsigned int		session_id;
+	unsigned int		config_layer_num;
+	disp_input_config	config[MAX_INPUT_CONFIG];
+}disp_session_input_config;
+
+typedef struct disp_session_output_config_t
+{
+	unsigned int		session_id;
+	disp_output_config	config;
+}disp_session_output_config;
+
+typedef struct disp_session_layer_num_config_t
+{
+	unsigned int		session_id;
+	unsigned int		max_layer_num;
+}disp_session_layer_num_config;
+
+typedef struct disp_session_info_t
+{
+	unsigned int	session_id;
+	unsigned int	maxLayerNum;
+	unsigned int 	isHwVsyncAvailable;
+	DISP_IF_TYPE 	displayType;
+	unsigned int 	displayWidth;
+	unsigned int 	displayHeight;
+	unsigned int 	displayFormat;
+	DISP_IF_MODE 	displayMode;
+	unsigned int 	vsyncFPS;
+	unsigned int 	physicalWidth;
+	unsigned int 	physicalHeight;
+	unsigned int 	isConnected;	
+} disp_session_info;
+
+typedef struct disp_buffer_info_t
+{
+	// Session
+	unsigned int	session_id;
+	// Input
+	unsigned int 	layer_id;
+	unsigned int 	layer_en;
+	int 			ion_fd;
+	unsigned int 	cache_sync;
+	// Output
+	unsigned int 	index;
+	int 			fence_fd;
+}disp_buffer_info;
+/* IOCTL commands. */
+#define DISP_IOW(num, dtype)     _IOW('O', num, dtype)
+#define DISP_IOR(num, dtype)     _IOR('O', num, dtype)
+#define DISP_IOWR(num, dtype)    _IOWR('O', num, dtype)
+#define DISP_IO(num)             _IO('O', num)
+
+
+#define	DISP_IOCTL_CREATE_SESSION				DISP_IOW(201, disp_session_config)
+#define	DISP_IOCTL_DESTROY_SESSION				DISP_IOW(202, disp_session_config)
+#define	DISP_IOCTL_TRIGGER_SESSION				DISP_IOW(203, disp_session_config)
+#define DISP_IOCTL_PREPARE_INPUT_BUFFER   		DISP_IOW(204, disp_buffer_info)
+#define DISP_IOCTL_PREPARE_OUTPUT_BUFFER   		DISP_IOW(205, disp_buffer_info)
+#define DISP_IOCTL_SET_INPUT_BUFFER   			DISP_IOW(206, disp_session_input_config)
+#define DISP_IOCTL_SET_OUTPUT_BUFFER			DISP_IOW(207, disp_session_output_config)
+#define	DISP_IOCTL_GET_SESSION_INFO				DISP_IOW(208, disp_session_info)
+
+#define	DISP_IOCTL_SET_SESSION_MODE			    DISP_IOW(209, disp_session_config)
+#define	DISP_IOCTL_GET_SESSION_MODE			    DISP_IOW(210, disp_session_config)
+#define	DISP_IOCTL_SET_SESSION_TYPE				DISP_IOW(211, disp_session_config)
+#define	DISP_IOCTL_GET_SESSION_TYPE				DISP_IOW(212, disp_session_config)
+#define	DISP_IOCTL_WAIT_FOR_VSYNC				DISP_IOW(213, disp_session_vsync_config)
+#define	DISP_IOCTL_SET_MAX_LAYER_NUM			DISP_IOW(214, disp_session_layer_num_config)
+
+
+#endif //__DISP_SVP_H
diff --git a/kernel-headers/linux/fm.h b/kernel-headers/linux/fm.h
new file mode 100644
index 0000000..91ed0bf
--- /dev/null
+++ b/kernel-headers/linux/fm.h
@@ -0,0 +1,631 @@
+#ifndef __FM_H__
+#define __FM_H__
+
+//#define FMDEBUG
+
+#include <linux/ioctl.h>
+#include <linux/time.h>
+//fm type define
+typedef signed char fm_s8;
+typedef signed short fm_s16;
+typedef signed int fm_s32;
+typedef signed long long fm_s64;
+typedef unsigned char fm_u8;
+typedef unsigned short fm_u16;
+typedef unsigned int fm_u32;
+typedef unsigned long long fm_u64;
+typedef enum fm_bool {
+    fm_false = 0,
+    fm_true  = 1
+} fm_bool;
+
+// scan sort algorithm
+enum {
+    FM_SCAN_SORT_NON = 0,
+    FM_SCAN_SORT_UP,
+    FM_SCAN_SORT_DOWN,
+    FM_SCAN_SORT_MAX
+};
+
+// scan methods
+enum {
+    FM_SCAN_SEL_HW = 0, // select hardware scan, advantage: fast
+    FM_SCAN_SEL_SW, // select software scan, advantage: more accurate
+    FM_SCAN_SEL_MAX
+};
+
+ //*****************************************************************************************
+//***********************************FM config for customer ***********************************
+//*****************************************************************************************
+//RX
+#define FMR_RSSI_TH_LONG    0x0301      //FM radio long antenna RSSI threshold(11.375dBuV)
+#define FMR_RSSI_TH_SHORT   0x02E0      //FM radio short antenna RSSI threshold(-1dBuV)
+#define FMR_CQI_TH          0x00E9      //FM radio Channel quality indicator threshold(0x0000~0x00FF)
+#define FMR_SEEK_SPACE      1           //FM radio seek space,1:100KHZ; 2:200KHZ
+#define FMR_SCAN_CH_SIZE    80          //FM radio scan max channel size
+#define FMR_BAND            1           //FM radio band, 1:87.5MHz~108.0MHz; 2:76.0MHz~90.0MHz; 3:76.0MHz~108.0MHz; 4:special
+#define FMR_BAND_FREQ_L     875         //FM radio special band low freq(Default 87.5MHz)
+#define FMR_BAND_FREQ_H     1080        //FM radio special band high freq(Default 108.0MHz)
+#define FM_SCAN_SORT_SELECT FM_SCAN_SORT_NON
+#define FM_SCAN_SELECT      FM_SCAN_SEL_HW
+#define FM_SCAN_SOFT_MUTE_GAIN_TH  3    //soft-mute threshold when software scan, rang: 0~3, 0 means better audio quality but less channel
+#define FM_CHIP_DESE_RSSI_TH (-102)      // rang: -102 ~ -72
+
+//TX
+#define FMTX_PWR_LEVEL_MAX  120         //FM transmitter power level, rang: 85db~120db, default 120db
+
+//*****************************************************************************************
+//***********************************FM config for engineer ***********************************
+//*****************************************************************************************
+//RX
+#define FMR_MR_TH           0x01BD      //FM radio MR threshold
+#define ADDR_SCAN_TH        0xE0        //scan thrshold register
+#define ADDR_CQI_TH         0xE1        //scan CQI register
+
+//TX
+#define FMTX_SCAN_HOLE_LOW  923         //92.3MHz~95.4MHz should not show to user
+#define FMTX_SCAN_HOLE_HIGH 954         //92.3MHz~95.4MHz should not show to user
+//*****************************************************************************************
+
+#define FM_NAME             "fm"
+#define FM_DEVICE_NAME      "/dev/fm"
+
+// errno
+#define FM_SUCCESS      0
+#define FM_FAILED       1
+#define FM_EPARM        2
+#define FM_BADSTATUS    3
+#define FM_TUNE_FAILED  4
+#define FM_SEEK_FAILED  5
+#define FM_BUSY         6
+#define FM_SCAN_FAILED  7
+
+// band
+#define FM_BAND_UNKNOWN 0
+#define FM_BAND_UE      1 // US/Europe band  87.5MHz ~ 108MHz (DEFAULT)
+#define FM_BAND_JAPAN   2 // Japan band      76MHz   ~ 90MHz
+#define FM_BAND_JAPANW  3 // Japan wideband  76MHZ   ~ 108MHz
+#define FM_BAND_SPECIAL 4 // special   band  between 76MHZ   and  108MHz
+#define FM_BAND_DEFAULT FM_BAND_UE
+
+#define FM_UE_FREQ_MIN  875
+#define FM_UE_FREQ_MAX  1080
+#define FM_JP_FREQ_MIN  760
+#define FM_JP_FREQ_MAX  1080
+#define FM_FREQ_MIN  FMR_BAND_FREQ_L
+#define FM_FREQ_MAX  FMR_BAND_FREQ_H
+#define FM_RAIDO_BAND FM_BAND_UE
+
+// space
+#define FM_SPACE_UNKNOWN    0
+#define FM_SPACE_100K       1
+#define FM_SPACE_200K       2
+#define FM_SPACE_50K        5
+
+#define FM_SEEK_SPACE FMR_SEEK_SPACE
+
+// max scan channel num
+#define FM_MAX_CHL_SIZE FMR_SCAN_CH_SIZE
+// auto HiLo
+#define FM_AUTO_HILO_OFF    0
+#define FM_AUTO_HILO_ON     1
+
+// seek direction
+#define FM_SEEK_UP          0
+#define FM_SEEK_DOWN        1
+
+#define FM_CHIP_AR1000 0x1000
+#define FM_CHIP_MT5192 0x91
+#define FM_CHIP_MT5193 0x92
+#define FM_CHIP_MT6616 0x6616
+#define FM_CHIP_MT6620 0x6620
+#define FM_CHIP_MT6626 0x6626
+#define FM_CHIP_MT6628 0x6628
+#define FM_CHIP_MT6627 0x6627
+#define FM_CHIP_MT6580 0x6580
+#define FM_CHIP_MT6630 0x6630
+
+#define FM_CHIP_UNSUPPORTED -1
+
+// seek threshold
+#define FM_SEEKTH_LEVEL_DEFAULT 4
+
+struct fm_tune_parm {
+    uint8_t err;
+    uint8_t band;
+    uint8_t space;
+    uint8_t hilo;
+    uint16_t freq; // IN/OUT parameter
+};
+
+struct fm_seek_parm {
+    uint8_t err;
+    uint8_t band;
+    uint8_t space;
+    uint8_t hilo;
+    uint8_t seekdir;
+    uint8_t seekth;
+    uint16_t freq; // IN/OUT parameter
+};
+
+struct fm_scan_parm {
+    uint8_t  err;
+    uint8_t  band;
+    uint8_t  space;
+    uint8_t  hilo;
+    uint16_t freq; // OUT parameter
+    uint16_t ScanTBL[26]; //need no less than the chip
+    uint16_t ScanTBLSize; //IN/OUT parameter
+};
+
+struct fm_ch_rssi {
+    uint16_t freq;
+    int rssi;
+};
+
+enum fm_scan_cmd_t {
+    FM_SCAN_CMD_INIT = 0,
+    FM_SCAN_CMD_START,
+    FM_SCAN_CMD_GET_NUM,
+    FM_SCAN_CMD_GET_CH,
+    FM_SCAN_CMD_GET_RSSI,
+    FM_SCAN_CMD_GET_CH_RSSI,
+    FM_SCAN_CMD_MAX
+};
+
+struct fm_scan_t {
+    enum fm_scan_cmd_t cmd;
+    int ret;    // 0, success; else error code
+    uint16_t lower;             // lower band, Eg, 7600 -> 76.0Mhz
+    uint16_t upper;             // upper band, Eg, 10800 -> 108.0Mhz
+    int space;                  // 5: 50KHz, 10: 100Khz, 20: 200Khz
+    int num;                    // valid channel number
+    void *priv;
+    int sr_size;                // scan result buffer size in bytes
+    union {
+        uint16_t *ch_buf;       // channel buffer
+        int *rssi_buf;          // rssi buffer
+        struct fm_ch_rssi *ch_rssi_buf;  //channel and RSSI buffer
+    } sr;
+};
+
+struct fm_seek_t {
+    int ret;                    // 0, success; else error code
+    uint16_t freq;
+    uint16_t lower;             // lower band, Eg, 7600 -> 76.0Mhz
+    uint16_t upper;             // upper band, Eg, 10800 -> 108.0Mhz
+    int space;                  // 5: 50KHz, 10: 100Khz, 20: 200Khz
+    int dir;                    // 0: up; 1: down
+    int th;                     // seek threshold in dbm(Eg, -95dbm)
+    void *priv;
+};
+
+struct fm_tune_t {
+    int ret;                    // 0, success; else error code
+    uint16_t freq;
+    uint16_t lower;             // lower band, Eg, 7600 -> 76.0Mhz
+    uint16_t upper;             // upper band, Eg, 10800 -> 108.0Mhz
+    int space;                  // 5: 50KHz, 10: 100Khz, 20: 200Khz
+    void *priv;
+};
+
+struct fm_softmute_tune_t {
+    fm_s32 rssi;            // RSSI of current channel
+    fm_u16 freq;            // current frequency
+    fm_bool valid;          // current channel is valid(true) or not(false)
+};
+
+struct fm_rssi_req {
+    uint16_t num;
+    uint16_t read_cnt;
+    struct fm_ch_rssi cr[26*16];
+};
+
+struct fm_hw_info {
+    int chip_id; //chip ID, eg. 6620
+    int eco_ver; //chip ECO version, eg. E3
+    int rom_ver; //FM DSP rom code version, eg. V2
+    int patch_ver; //FM DSP patch version, eg. 1.11
+    int reserve;
+};
+
+struct fm_search_threshold_t {
+	fm_s32 th_type;// 0, RSSI. 1,desense RSSI. 2,SMG.
+	fm_s32 th_val; //threshold value
+	fm_s32 reserve;
+};
+
+#if 1
+#define NEED_DEF_RDS 1
+#else
+#define NEED_DEF_RDS 0
+#endif
+
+#if NEED_DEF_RDS
+//For RDS feature
+typedef struct {
+   uint8_t TP;
+   uint8_t TA;
+   uint8_t Music;
+   uint8_t Stereo;
+   uint8_t Artificial_Head;
+   uint8_t Compressed;
+   uint8_t Dynamic_PTY;
+   uint8_t Text_AB;
+   uint32_t flag_status;
+} RDSFlag_Struct;
+
+typedef struct {
+   uint16_t Month;
+   uint16_t Day;
+   uint16_t Year;
+   uint16_t Hour;
+   uint16_t Minute;
+   uint8_t Local_Time_offset_signbit;
+   uint8_t Local_Time_offset_half_hour;
+} CT_Struct;
+
+typedef struct {
+   int16_t AF_Num;
+   int16_t AF[2][25];  //100KHz
+   uint8_t Addr_Cnt;
+   uint8_t isMethod_A;
+   uint8_t isAFNum_Get;
+} AF_Info;
+
+typedef struct {
+   uint8_t PS[4][8];
+   uint8_t Addr_Cnt;
+} PS_Info;
+
+typedef struct {
+   uint8_t TextData[4][64];
+   uint8_t GetLength;
+   uint8_t isRTDisplay;
+   uint8_t TextLength;
+   uint8_t isTypeA;
+   uint8_t BufCnt;
+   uint16_t Addr_Cnt;
+} RT_Info;
+
+struct rds_raw_data {
+    int dirty; //indicate if the data changed or not
+    int len; //the data len form chip
+    uint8_t data[146];
+};
+
+struct rds_group_cnt {
+    unsigned int total;
+    unsigned int groupA[16]; // RDS groupA counter
+    unsigned int groupB[16]; // RDS groupB counter
+};
+
+enum rds_group_cnt_opcode {
+    RDS_GROUP_CNT_READ = 0,
+    RDS_GROUP_CNT_WRITE,
+    RDS_GROUP_CNT_RESET,
+    RDS_GROUP_CNT_MAX
+};
+
+struct rds_group_cnt_req {
+    int err;
+    enum rds_group_cnt_opcode op;
+    struct rds_group_cnt gc;
+};
+
+typedef struct {
+   CT_Struct CT;
+   RDSFlag_Struct RDSFlag;
+   uint16_t PI;
+   uint8_t Switch_TP;
+   uint8_t PTY;
+   AF_Info AF_Data;
+   AF_Info AFON_Data;
+   uint8_t Radio_Page_Code;
+   uint16_t Program_Item_Number_Code;
+   uint8_t Extend_Country_Code;
+   uint16_t Language_Code;
+   PS_Info PS_Data;
+   uint8_t PS_ON[8];
+   RT_Info RT_Data;
+   uint16_t event_status; //will use RDSFlag_Struct RDSFlag->flag_status to check which event, is that ok?
+   struct rds_group_cnt gc;
+} RDSData_Struct;
+
+
+//Need care the following definition.
+//valid Rds Flag for notify
+typedef enum {
+   RDS_FLAG_IS_TP              = 0x0001, // Program is a traffic program
+   RDS_FLAG_IS_TA              = 0x0002, // Program currently broadcasts a traffic ann.
+   RDS_FLAG_IS_MUSIC           = 0x0004, // Program currently broadcasts music
+   RDS_FLAG_IS_STEREO          = 0x0008, // Program is transmitted in stereo
+   RDS_FLAG_IS_ARTIFICIAL_HEAD = 0x0010, // Program is an artificial head recording
+   RDS_FLAG_IS_COMPRESSED      = 0x0020, // Program content is compressed
+   RDS_FLAG_IS_DYNAMIC_PTY     = 0x0040, // Program type can change
+   RDS_FLAG_TEXT_AB            = 0x0080  // If this flag changes state, a new radio text 					 string begins
+} RdsFlag;
+
+typedef enum {
+   RDS_EVENT_FLAGS          = 0x0001, // One of the RDS flags has changed state
+   RDS_EVENT_PI_CODE        = 0x0002, // The program identification code has changed
+   RDS_EVENT_PTY_CODE       = 0x0004, // The program type code has changed
+   RDS_EVENT_PROGRAMNAME    = 0x0008, // The program name has changed
+   RDS_EVENT_UTCDATETIME    = 0x0010, // A new UTC date/time is available
+   RDS_EVENT_LOCDATETIME    = 0x0020, // A new local date/time is available
+   RDS_EVENT_LAST_RADIOTEXT = 0x0040, // A radio text string was completed
+   RDS_EVENT_AF             = 0x0080, // Current Channel RF signal strength too weak, need do AF switch
+   RDS_EVENT_AF_LIST        = 0x0100, // An alternative frequency list is ready
+   RDS_EVENT_AFON_LIST      = 0x0200, // An alternative frequency list is ready
+   RDS_EVENT_TAON           = 0x0400,  // Other Network traffic announcement start
+   RDS_EVENT_TAON_OFF       = 0x0800, // Other Network traffic announcement finished.
+   RDS_EVENT_RDS            = 0x2000, // RDS Interrupt had arrived durint timer period
+   RDS_EVENT_NO_RDS         = 0x4000, // RDS Interrupt not arrived durint timer period
+   RDS_EVENT_RDS_TIMER      = 0x8000 // Timer for RDS Bler Check. ---- BLER  block error rate
+} RdsEvent;
+#endif
+
+struct fm_rds_tx_parm {
+    uint8_t err;
+    uint16_t pi;
+    uint16_t ps[12]; // 4 ps
+    uint16_t other_rds[87];  // 0~29 other groups
+    uint8_t other_rds_cnt; // # of other group
+};
+
+typedef struct fm_rds_tx_req {
+    unsigned char pty;         // 0~31 integer
+    unsigned char rds_rbds;    // 0:RDS, 1:RBDS
+    unsigned char dyn_pty;     // 0:static, 1:dynamic
+    unsigned short pi_code;    // 2-byte hex
+    unsigned char ps_buf[8];     // hex buf of PS
+    unsigned char ps_len;      // length of PS, must be 0 / 8"
+    unsigned char af;          // 0~204, 0:not used, 1~204:(87.5+0.1*af)MHz
+    unsigned char ah;          // Artificial head, 0:no, 1:yes
+    unsigned char stereo;      // 0:mono, 1:stereo
+    unsigned char compress;    // Audio compress, 0:no, 1:yes
+    unsigned char tp;          // traffic program, 0:no, 1:yes
+    unsigned char ta;          // traffic announcement, 0:no, 1:yes
+    unsigned char speech;      // 0:music, 1:speech
+} fm_rds_tx_req;
+
+#define TX_SCAN_MAX 10
+#define TX_SCAN_MIN 1
+struct fm_tx_scan_parm {
+    uint8_t  err;
+    uint8_t  band;	//87.6~108MHz
+    uint8_t  space;
+    uint8_t  hilo;
+    uint16_t freq; 	// start freq, if less than band min freq, then will use band min freq
+    uint8_t	 scandir;
+    uint16_t ScanTBL[TX_SCAN_MAX]; 	//need no less than the chip
+    uint16_t ScanTBLSize; //IN: desired size, OUT: scan result size
+};
+
+struct fm_gps_rtc_info {
+    int             err;            //error number, 0: success, other: err code
+    int             retryCnt;       //GPS mnl can decide retry times
+    int             ageThd;         //GPS 3D fix time diff threshold
+    int             driftThd;       //GPS RTC drift threshold
+    struct timeval  tvThd;          //time value diff threshold
+    int             age;            //GPS 3D fix time diff
+    int             drift;          //GPS RTC drift
+    union{
+        unsigned long stamp;        //time stamp in jiffies
+        struct timeval  tv;         //time stamp value in RTC
+    };
+    int             flag;           //rw flag
+};
+
+typedef enum {
+	FM_I2S_ON = 0,
+	FM_I2S_OFF,
+    FM_I2S_STATE_ERR
+} fm_i2s_state_e;
+
+typedef enum {
+	FM_I2S_MASTER = 0,
+	FM_I2S_SLAVE,
+    FM_I2S_MODE_ERR
+} fm_i2s_mode_e;
+
+typedef enum {
+	FM_I2S_32K = 0,
+	FM_I2S_44K,
+	FM_I2S_48K,
+    FM_I2S_SR_ERR
+} fm_i2s_sample_e;
+
+struct fm_i2s_setting {
+    int onoff;
+    int mode;
+    int sample;
+};
+
+typedef enum {
+    FM_RX = 0,
+    FM_TX = 1
+} FM_PWR_T;
+
+typedef struct fm_i2s_info {
+    int status; /*0:FM_I2S_ON, 1:FM_I2S_OFF,2:error*/
+    int mode;   /*0:FM_I2S_MASTER, 1:FM_I2S_SLAVE,2:error*/
+    int rate;   /*0:FM_I2S_32K:32000,1:FM_I2S_44K:44100,2:FM_I2S_48K:48000,3:error*/
+} fm_i2s_info_t;
+
+typedef enum {
+    FM_AUD_ANALOG = 0,
+    FM_AUD_I2S = 1,
+    FM_AUD_MRGIF = 2,
+    FM_AUD_ERR
+} fm_audio_path_e;
+
+typedef enum {
+    FM_I2S_PAD_CONN = 0, //sco fm chip: e.g.6627
+    FM_I2S_PAD_IO = 1,   //combo fm chip: e.g.6628
+    FM_I2S_PAD_ERR
+} fm_i2s_pad_sel_e;
+
+typedef struct fm_audio_info {
+    fm_audio_path_e aud_path;
+    fm_i2s_info_t i2s_info;
+    fm_i2s_pad_sel_e i2s_pad;
+} fm_audio_info_t;
+
+struct fm_cqi {
+    int ch;
+    int rssi;
+    int reserve;
+};
+
+struct fm_cqi_req {
+    uint16_t ch_num;
+    int buf_size;
+    char *cqi_buf;
+};
+
+typedef struct {
+	int freq;
+	int rssi;
+} fm_desense_check_t;
+
+typedef struct {
+    uint16_t lower;             // lower band, Eg, 7600 -> 76.0Mhz
+    uint16_t upper;             // upper band, Eg, 10800 -> 108.0Mhz
+    int space;                  // 0x1: 50KHz, 0x2: 100Khz, 0x4: 200Khz
+    int cycle;                  // repeat times
+} fm_full_cqi_log_t;
+
+typedef struct {
+	int which;
+	bool stat;
+} fm_status_t;
+
+// ********** ***********FM IOCTL define start *******************************
+
+#define FM_IOC_MAGIC        0xf5 // FIXME: any conflict?
+#define FM_IOCTL_POWERUP       _IOWR(FM_IOC_MAGIC, 0, struct fm_tune_parm*)
+#define FM_IOCTL_POWERDOWN     _IOWR(FM_IOC_MAGIC, 1, int32_t*)
+#define FM_IOCTL_TUNE          _IOWR(FM_IOC_MAGIC, 2, struct fm_tune_parm*)
+#define FM_IOCTL_SEEK          _IOWR(FM_IOC_MAGIC, 3, struct fm_seek_parm*)
+#define FM_IOCTL_SETVOL        _IOWR(FM_IOC_MAGIC, 4, uint32_t*)
+#define FM_IOCTL_GETVOL        _IOWR(FM_IOC_MAGIC, 5, uint32_t*)
+#define FM_IOCTL_MUTE          _IOWR(FM_IOC_MAGIC, 6, uint32_t*)
+#define FM_IOCTL_GETRSSI       _IOWR(FM_IOC_MAGIC, 7, int32_t*)
+#define FM_IOCTL_SCAN          _IOWR(FM_IOC_MAGIC, 8, struct fm_scan_parm*)
+#define FM_IOCTL_STOP_SCAN     _IO(FM_IOC_MAGIC,   9)
+
+//IOCTL and struct for test
+#define FM_IOCTL_GETCHIPID     _IOWR(FM_IOC_MAGIC, 10, uint16_t*)
+#define FM_IOCTL_EM_TEST       _IOWR(FM_IOC_MAGIC, 11, struct fm_em_parm*)
+#define FM_IOCTL_RW_REG        _IOWR(FM_IOC_MAGIC, 12, struct fm_ctl_parm*)
+#define FM_IOCTL_GETMONOSTERO  _IOWR(FM_IOC_MAGIC, 13, uint16_t*)
+#define FM_IOCTL_GETCURPAMD    _IOWR(FM_IOC_MAGIC, 14, uint16_t*)
+#define FM_IOCTL_GETGOODBCNT   _IOWR(FM_IOC_MAGIC, 15, uint16_t*)
+#define FM_IOCTL_GETBADBNT     _IOWR(FM_IOC_MAGIC, 16, uint16_t*)
+#define FM_IOCTL_GETBLERRATIO  _IOWR(FM_IOC_MAGIC, 17, uint16_t*)
+
+//IOCTL for RDS
+#define FM_IOCTL_RDS_ONOFF     _IOWR(FM_IOC_MAGIC, 18, uint16_t*)
+#define FM_IOCTL_RDS_SUPPORT   _IOWR(FM_IOC_MAGIC, 19, int32_t*)
+
+#define FM_IOCTL_POWERUP_TX    _IOWR(FM_IOC_MAGIC, 20, struct fm_tune_parm*)
+#define FM_IOCTL_TUNE_TX       _IOWR(FM_IOC_MAGIC, 21, struct fm_tune_parm*)
+#define FM_IOCTL_RDS_TX        _IOWR(FM_IOC_MAGIC, 22, struct fm_rds_tx_parm*)
+
+#define FM_IOCTL_RDS_SIM_DATA  _IOWR(FM_IOC_MAGIC, 23, uint32_t*)
+#define FM_IOCTL_IS_FM_POWERED_UP  _IOWR(FM_IOC_MAGIC, 24, uint32_t*)
+
+//IOCTL for FM Tx
+#define FM_IOCTL_TX_SUPPORT    _IOWR(FM_IOC_MAGIC, 25, int32_t*)
+#define FM_IOCTL_RDSTX_SUPPORT _IOWR(FM_IOC_MAGIC, 26, int32_t*)
+#define FM_IOCTL_RDSTX_ENABLE  _IOWR(FM_IOC_MAGIC, 27, int32_t*)
+#define FM_IOCTL_TX_SCAN       _IOWR(FM_IOC_MAGIC, 28, struct fm_tx_scan_parm*)
+
+//IOCTL for FM over BT
+#define FM_IOCTL_OVER_BT_ENABLE  _IOWR(FM_IOC_MAGIC, 29, int32_t*)
+
+//IOCTL for FM ANTENNA SWITCH
+#define FM_IOCTL_ANA_SWITCH     _IOWR(FM_IOC_MAGIC, 30, int32_t*)
+#define FM_IOCTL_GETCAPARRAY      _IOWR(FM_IOC_MAGIC, 31, int32_t*)
+
+//IOCTL for FM compensation by GPS RTC
+#define FM_IOCTL_GPS_RTC_DRIFT  _IOWR(FM_IOC_MAGIC, 32, struct fm_gps_rtc_info*)
+
+//IOCTL for FM I2S Setting
+#define FM_IOCTL_I2S_SETTING  _IOWR(FM_IOC_MAGIC, 33, struct fm_i2s_setting*)
+
+#define FM_IOCTL_RDS_GROUPCNT   _IOWR(FM_IOC_MAGIC, 34, struct rds_group_cnt_req*)
+#define FM_IOCTL_RDS_GET_LOG    _IOWR(FM_IOC_MAGIC, 35, struct rds_raw_data*)
+
+#define FM_IOCTL_SCAN_GETRSSI   _IOWR(FM_IOC_MAGIC, 36, struct fm_rssi_req*)
+#define FM_IOCTL_SETMONOSTERO   _IOWR(FM_IOC_MAGIC, 37, int32_t)
+#define FM_IOCTL_RDS_BC_RST     _IOWR(FM_IOC_MAGIC, 38, int32_t*)
+#define FM_IOCTL_CQI_GET     _IOWR(FM_IOC_MAGIC, 39, struct fm_cqi_req*)
+#define FM_IOCTL_GET_HW_INFO    _IOWR(FM_IOC_MAGIC, 40, struct fm_hw_info*)
+#define FM_IOCTL_GET_I2S_INFO   _IOWR(FM_IOC_MAGIC, 41, fm_i2s_info_t*)
+#define FM_IOCTL_IS_DESE_CHAN   _IOWR(FM_IOC_MAGIC, 42, int32_t*)
+#define FM_IOCTL_TOP_RDWR _IOWR(FM_IOC_MAGIC, 43, struct fm_top_rw_parm*)
+#define FM_IOCTL_HOST_RDWR  _IOWR(FM_IOC_MAGIC, 44, struct fm_host_rw_parm*)
+
+#define FM_IOCTL_PRE_SEARCH _IOWR(FM_IOC_MAGIC, 45,int32_t)
+#define FM_IOCTL_RESTORE_SEARCH _IOWR(FM_IOC_MAGIC, 46,int32_t)
+
+#define FM_IOCTL_SET_SEARCH_THRESHOLD   _IOWR(FM_IOC_MAGIC, 47, fm_search_threshold_t*)
+
+#define FM_IOCTL_GET_AUDIO_INFO _IOWR(FM_IOC_MAGIC, 48, fm_audio_info_t*)
+#define FM_IOCTL_FM_SET_STATUS _IOWR(FM_IOC_MAGIC, 49, fm_status_t)
+#define FM_IOCTL_FM_GET_STATUS _IOWR(FM_IOC_MAGIC, 50, fm_status_t)
+
+#define FM_IOCTL_SCAN_NEW       _IOWR(FM_IOC_MAGIC, 60, struct fm_scan_t*)
+#define FM_IOCTL_SEEK_NEW       _IOWR(FM_IOC_MAGIC, 61, struct fm_seek_t*)
+#define FM_IOCTL_TUNE_NEW       _IOWR(FM_IOC_MAGIC, 62, struct fm_tune_t*)
+
+#define FM_IOCTL_SOFT_MUTE_TUNE _IOWR(FM_IOC_MAGIC, 63, struct fm_softmute_tune_t*)/*for soft mute tune*/
+#define FM_IOCTL_DESENSE_CHECK   _IOWR(FM_IOC_MAGIC, 64, fm_desense_check_t*)
+
+//IOCTL for EM
+#define FM_IOCTL_FULL_CQI_LOG _IOWR(FM_IOC_MAGIC, 70, fm_full_cqi_log_t *)
+
+#define FM_IOCTL_DUMP_REG   _IO(FM_IOC_MAGIC, 0xFF)
+
+// ********** ***********FM IOCTL define end *******************************
+
+
+enum group_idx {
+    mono = 0,
+    stereo,
+    RSSI_threshold,
+    HCC_Enable,
+    PAMD_threshold,
+    Softmute_Enable,
+    De_emphasis,
+    HL_Side,
+    Demod_BW,
+    Dynamic_Limiter,
+    Softmute_Rate,
+    AFC_Enable,
+    Softmute_Level,
+    Analog_Volume,
+    GROUP_TOTAL_NUMS
+};
+
+enum item_idx {
+    Sblend_OFF = 0,
+    Sblend_ON,
+    ITEM_TOTAL_NUMS
+};
+
+struct fm_ctl_parm {
+    uint8_t err;
+    uint8_t addr;
+    uint16_t val;
+    uint16_t rw_flag;//0:write, 1:read
+};
+
+struct fm_em_parm {
+	uint16_t group_idx;
+	uint16_t item_idx;
+	uint32_t item_value;
+};
+#endif // __FM_H__
diff --git a/kernel-headers/linux/hdmitx.h b/kernel-headers/linux/hdmitx.h
new file mode 100644
index 0000000..58103b5
--- /dev/null
+++ b/kernel-headers/linux/hdmitx.h
@@ -0,0 +1,361 @@
+// ---------------------------------------------------------------------------
+
+#ifndef     HDMITX_H
+#define     HDMITX_H
+
+
+#define HDMI_DEV_DRV "/dev/hdmitx"
+
+
+typedef enum
+{
+    HDMI_STATUS_OK = 0,
+    HDMI_STATUS_NOT_IMPLEMENTED,
+    HDMI_STATUS_ALREADY_SET,
+    HDMI_STATUS_ERROR,
+} HDMI_STATUS;
+
+typedef enum
+{
+    SMART_BOOK_DISCONNECTED = 0,
+    SMART_BOOK_CONNECTED,
+} SMART_BOOK_STATE;
+
+typedef enum
+{
+    HDMI_POWER_STATE_OFF = 0,
+    HDMI_POWER_STATE_ON,
+    HDMI_POWER_STATE_STANDBY,
+} HDMI_POWER_STATE;
+
+typedef enum
+{
+	HDMI_MAX_CHANNEL_2 = 0x2,
+	HDMI_MAX_CHANNEL_3 = 0x3,
+	HDMI_MAX_CHANNEL_4 = 0x4,
+	HDMI_MAX_CHANNEL_5 = 0x5,
+	HDMI_MAX_CHANNEL_6 = 0x6,
+	HDMI_MAX_CHANNEL_7 = 0x7,
+	HDMI_MAX_CHANNEL_8 = 0x8,
+}AUDIO_MAX_CHANNEL;
+
+typedef enum
+{
+	HDMI_MAX_SAMPLERATE_32  = 0x1,
+	HDMI_MAX_SAMPLERATE_44  = 0x2,
+	HDMI_MAX_SAMPLERATE_48  = 0x3,
+	HDMI_MAX_SAMPLERATE_96  = 0x4,
+	HDMI_MAX_SAMPLERATE_192 = 0x5,
+}AUDIO_MAX_SAMPLERATE;
+
+typedef enum
+{
+	HDMI_MAX_BITWIDTH_16  = 0x1,
+	HDMI_MAX_BITWIDTH_24  = 0x2,
+}AUDIO_MAX_BITWIDTH;
+
+typedef enum
+{
+    HDMI_SCALE_ADJUSTMENT_SUPPORT = 0x01,
+    HDMI_ONE_RDMA_LIMITATION = 0x02,
+	HDMI_PHONE_GPIO_REUSAGE       = 0x04,
+} HDMI_CAPABILITY;
+
+typedef enum
+{
+    HDMI_TO_TV = 0x0,
+    HDMI_TO_SMB,
+} hdmi_device_type;
+
+typedef enum
+{
+    HDMI_IS_DISCONNECTED = 0,
+    HDMI_IS_CONNECTED = 1,
+    HDMI_IS_RES_CHG = 0x11,
+} hdmi_connect_status;
+
+#define MAKE_MTK_HDMI_FORMAT_ID(id, bpp)  (((id) << 8) | (bpp))
+typedef enum
+{
+    MTK_HDMI_FORMAT_UNKNOWN = 0,
+
+    MTK_HDMI_FORMAT_RGB565   = MAKE_MTK_HDMI_FORMAT_ID(1, 2),
+    MTK_HDMI_FORMAT_RGB888   = MAKE_MTK_HDMI_FORMAT_ID(2, 3),
+    MTK_HDMI_FORMAT_BGR888   = MAKE_MTK_HDMI_FORMAT_ID(3, 3),
+    MTK_HDMI_FORMAT_ARGB8888 = MAKE_MTK_HDMI_FORMAT_ID(4, 4),
+    MTK_HDMI_FORMAT_ABGR8888 = MAKE_MTK_HDMI_FORMAT_ID(5, 4),
+    MTK_HDMI_FORMAT_YUV422   = MAKE_MTK_HDMI_FORMAT_ID(6, 2),
+    MTK_HDMI_FORMAT_XRGB8888 = MAKE_MTK_HDMI_FORMAT_ID(7, 4),
+    MTK_HDMI_FORMAT_XBGR8888 = MAKE_MTK_HDMI_FORMAT_ID(8, 4),
+    MTK_HDMI_FORMAT_BPP_MASK = 0xFF,
+} MTK_HDMI_FORMAT;
+
+typedef struct
+{
+    bool is_audio_enabled;
+    bool is_video_enabled;
+} hdmi_device_status;
+
+typedef struct
+{
+    void *src_base_addr;
+    void *src_phy_addr;
+    int src_fmt;
+    unsigned int  src_pitch;
+    unsigned int  src_offset_x, src_offset_y;
+    unsigned int  src_width, src_height;
+
+    int next_buff_idx;
+    int identity;
+    int connected_type;
+    unsigned int security;
+
+} hdmi_video_buffer_info;
+
+
+typedef struct
+{
+    //  Input
+    int ion_fd;
+    // Output
+    unsigned int index; //fence count
+    int fence_fd;   //fence fd
+} hdmi_buffer_info;
+
+#define MTK_HDMI_NO_FENCE_FD        ((int)(-1)) //((int)(~0U>>1))
+#define MTK_HDMI_NO_ION_FD        ((int)(-1))   //((int)(~0U>>1))
+
+typedef struct
+{
+    unsigned int u4Addr;
+    unsigned int u4Data;
+} hdmi_device_write;
+
+typedef struct
+{
+    unsigned int u4Data1;
+    unsigned int u4Data2;
+} hdmi_para_setting;
+
+typedef struct
+{
+    unsigned char u1Hdcpkey[287];
+} hdmi_hdcp_key;
+
+typedef struct
+{
+    unsigned char u1Hdcpkey[384];
+} hdmi_hdcp_drmkey;
+
+typedef struct
+{
+    unsigned char u1sendsltdata[15];
+} send_slt_data;
+
+typedef   struct  _HDMI_EDID_T
+{
+    unsigned int ui4_ntsc_resolution;//use EDID_VIDEO_RES_T, there are many resolution
+    unsigned int ui4_pal_resolution;// use EDID_VIDEO_RES_T
+    unsigned int ui4_sink_native_ntsc_resolution;//use EDID_VIDEO_RES_T, only one NTSC resolution, Zero means none native NTSC resolution is avaiable
+    unsigned int ui4_sink_native_pal_resolution; //use EDID_VIDEO_RES_T, only one resolution, Zero means none native PAL resolution is avaiable
+    unsigned int ui4_sink_cea_ntsc_resolution;//use EDID_VIDEO_RES_T
+    unsigned int ui4_sink_cea_pal_resolution;//use EDID_VIDEO_RES_T
+    unsigned int ui4_sink_dtd_ntsc_resolution;//use EDID_VIDEO_RES_T
+    unsigned int ui4_sink_dtd_pal_resolution;//use EDID_VIDEO_RES_T
+    unsigned int ui4_sink_1st_dtd_ntsc_resolution;//use EDID_VIDEO_RES_T
+    unsigned int ui4_sink_1st_dtd_pal_resolution;//use EDID_VIDEO_RES_T
+    unsigned short ui2_sink_colorimetry;//use EDID_VIDEO_COLORIMETRY_T
+    unsigned char ui1_sink_rgb_color_bit;//color bit for RGB
+    unsigned char ui1_sink_ycbcr_color_bit; // color bit for YCbCr
+    unsigned short ui2_sink_aud_dec;// use EDID_AUDIO_DECODER_T
+    unsigned char ui1_sink_is_plug_in;//1: Plug in 0:Plug Out
+    unsigned int ui4_hdmi_pcm_ch_type;//use EDID_A_FMT_CH_TYPE
+    unsigned int ui4_hdmi_pcm_ch3ch4ch5ch7_type;//use EDID_A_FMT_CH_TYPE1
+    unsigned int ui4_dac_pcm_ch_type;//use EDID_A_FMT_CH_TYPE
+    unsigned char ui1_sink_i_latency_present;
+    unsigned char ui1_sink_p_audio_latency;
+    unsigned char ui1_sink_p_video_latency;
+    unsigned char ui1_sink_i_audio_latency;
+    unsigned char ui1_sink_i_video_latency;
+    unsigned char ui1ExtEdid_Revision;
+    unsigned char ui1Edid_Version;
+    unsigned char ui1Edid_Revision;
+    unsigned char ui1_Display_Horizontal_Size;
+    unsigned char ui1_Display_Vertical_Size;
+    unsigned int ui4_ID_Serial_Number;
+    unsigned int ui4_sink_cea_3D_resolution;
+    unsigned char ui1_sink_support_ai;//0: not support AI, 1:support AI
+    unsigned short ui2_sink_cec_address;
+    unsigned short ui1_sink_max_tmds_clock;
+    unsigned short ui2_sink_3D_structure;
+    unsigned int ui4_sink_cea_FP_SUP_3D_resolution;
+    unsigned int ui4_sink_cea_TOB_SUP_3D_resolution;
+    unsigned int ui4_sink_cea_SBS_SUP_3D_resolution;
+    unsigned short ui2_sink_ID_manufacturer_name;//(08H~09H)
+    unsigned short ui2_sink_ID_product_code;           //(0aH~0bH)
+    unsigned int ui4_sink_ID_serial_number;         //(0cH~0fH)
+    unsigned char  ui1_sink_week_of_manufacture;   //(10H)
+    unsigned char  ui1_sink_year_of_manufacture;   //(11H)  base on year 1990
+}   HDMI_EDID_T;
+
+typedef   struct
+{
+    unsigned int ui4_sink_FP_SUP_3D_resolution;
+    unsigned int ui4_sink_TOB_SUP_3D_resolution;
+    unsigned int ui4_sink_SBS_SUP_3D_resolution;
+}   MHL_3D_SUPP_T;
+
+typedef struct
+{
+    unsigned char       ui1_la_num;
+    unsigned char     e_la[3];
+    unsigned short     ui2_pa;
+    unsigned short    h_cecm_svc;
+} CEC_DRV_ADDR_CFG;
+
+typedef struct
+{
+    unsigned char destination : 4;
+    unsigned char initiator   : 4;
+} CEC_HEADER_BLOCK_IO;
+
+typedef struct
+{
+    CEC_HEADER_BLOCK_IO header;
+    unsigned char opcode;
+    unsigned char operand[15];
+} CEC_FRAME_BLOCK_IO;
+
+typedef struct
+{
+    unsigned char size;
+    unsigned char sendidx;
+    unsigned char reTXcnt;
+    void *txtag;
+    CEC_FRAME_BLOCK_IO blocks;
+} CEC_FRAME_DESCRIPTION_IO;
+
+typedef struct _CEC_FRAME_INFO
+{
+    unsigned char       ui1_init_addr;
+    unsigned char       ui1_dest_addr;
+    unsigned short      ui2_opcode;
+    unsigned char       aui1_operand[14];
+    unsigned int      z_operand_size;
+}   CEC_FRAME_INFO;
+
+typedef struct _CEC_SEND_MSG
+{
+    CEC_FRAME_INFO      t_frame_info;
+    unsigned char       b_enqueue_ok;
+} CEC_SEND_MSG;
+
+typedef struct
+{
+    unsigned char       ui1_la;
+    unsigned short     ui2_pa;
+}   CEC_ADDRESS_IO;
+
+typedef struct
+{
+    unsigned char   u1Size;
+    unsigned char   au1Data[14];
+}   CEC_GETSLT_DATA;
+
+typedef struct
+{
+    unsigned int    u1adress;
+    unsigned int    pu1Data;
+}   READ_REG_VALUE;
+
+typedef struct
+{
+    unsigned char   e_hdmi_aud_in;
+    unsigned char   e_iec_frame;
+    unsigned char   e_hdmi_fs;
+    unsigned char   e_aud_code;
+    unsigned char   u1Aud_Input_Chan_Cnt;
+    unsigned char   e_I2sFmt;
+    unsigned char   u1HdmiI2sMclk;
+    unsigned char   bhdmi_LCh_status[5];
+    unsigned char   bhdmi_RCh_status[5];
+}   HDMITX_AUDIO_PARA;
+
+
+#define HDMI_IOW(num, dtype)     _IOW('H', num, dtype)
+#define HDMI_IOR(num, dtype)     _IOR('H', num, dtype)
+#define HDMI_IOWR(num, dtype)    _IOWR('H', num, dtype)
+#define HDMI_IO(num)             _IO('H', num)
+
+#define MTK_HDMI_AUDIO_VIDEO_ENABLE             HDMI_IO(1)
+#define MTK_HDMI_AUDIO_ENABLE                   HDMI_IO(2)
+#define MTK_HDMI_VIDEO_ENABLE                   HDMI_IO(3)
+#define MTK_HDMI_GET_CAPABILITY                 HDMI_IOWR(4, HDMI_CAPABILITY)
+#define MTK_HDMI_GET_DEVICE_STATUS              HDMI_IOWR(5, hdmi_device_status)
+#define MTK_HDMI_VIDEO_CONFIG                   HDMI_IOWR(6, int)
+#define MTK_HDMI_AUDIO_CONFIG                   HDMI_IOWR(7, int)
+#define MTK_HDMI_FORCE_FULLSCREEN_ON            HDMI_IOWR(8, int)
+#define MTK_HDMI_FORCE_FULLSCREEN_OFF           HDMI_IOWR(9, int)
+#define MTK_HDMI_IPO_POWEROFF                   HDMI_IOWR(10, int)
+#define MTK_HDMI_IPO_POWERON                    HDMI_IOWR(11, int)
+#define MTK_HDMI_POWER_ENABLE                   HDMI_IOW(12, int)
+#define MTK_HDMI_PORTRAIT_ENABLE                HDMI_IOW(13, int)
+#define MTK_HDMI_FORCE_OPEN                     HDMI_IOWR(14, int)
+#define MTK_HDMI_FORCE_CLOSE                    HDMI_IOWR(15, int)
+#define MTK_HDMI_IS_FORCE_AWAKE                 HDMI_IOWR(16, int)
+
+#define MTK_HDMI_POST_VIDEO_BUFFER              HDMI_IOW(20,  hdmi_video_buffer_info)
+#define MTK_HDMI_AUDIO_SETTING                  HDMI_IOWR(21, HDMITX_AUDIO_PARA)
+
+
+#define MTK_HDMI_FACTORY_MODE_ENABLE            HDMI_IOW(30, int)
+#define MTK_HDMI_FACTORY_GET_STATUS             HDMI_IOWR(31, int)
+#define MTK_HDMI_FACTORY_DPI_TEST               HDMI_IOWR(32, int)
+
+#define MTK_HDMI_USBOTG_STATUS                  HDMI_IOWR(33, int)
+#define MTK_HDMI_GET_DRM_ENABLE                 HDMI_IOWR(34, int)
+
+#define MTK_HDMI_GET_DEV_INFO                   HDMI_IOWR(35, mtk_dispif_info_t)
+#define MTK_HDMI_PREPARE_BUFFER                 HDMI_IOW(36, hdmi_buffer_info)
+#define MTK_HDMI_SCREEN_CAPTURE                 HDMI_IOW(37, unsigned long)
+
+#define MTK_HDMI_WRITE_DEV                      HDMI_IOWR(52, hdmi_device_write)
+#define MTK_HDMI_READ_DEV                       HDMI_IOWR(53, unsigned int)
+#define MTK_HDMI_ENABLE_LOG                     HDMI_IOWR(54, unsigned int)
+#define MTK_HDMI_CHECK_EDID                     HDMI_IOWR(55, unsigned int)
+#define MTK_HDMI_INFOFRAME_SETTING              HDMI_IOWR(56, hdmi_para_setting)
+#define MTK_HDMI_COLOR_DEEP                     HDMI_IOWR(57, hdmi_para_setting)
+#define MTK_HDMI_ENABLE_HDCP                    HDMI_IOWR(58, unsigned int)
+#define MTK_HDMI_STATUS                         HDMI_IOWR(59, unsigned int)
+#define MTK_HDMI_HDCP_KEY                       HDMI_IOWR(60, hdmi_hdcp_key)
+#define MTK_HDMI_GET_EDID                       HDMI_IOWR(61, HDMI_EDID_T)
+#define MTK_HDMI_SETLA                          HDMI_IOWR(62, CEC_DRV_ADDR_CFG)
+#define MTK_HDMI_GET_CECCMD                     HDMI_IOWR(63, CEC_FRAME_DESCRIPTION_IO)
+#define MTK_HDMI_SET_CECCMD                     HDMI_IOWR(64, CEC_SEND_MSG)
+#define MTK_HDMI_CEC_ENABLE                     HDMI_IOWR(65, unsigned int)
+#define MTK_HDMI_GET_CECADDR                    HDMI_IOWR(66, CEC_ADDRESS_IO)
+#define MTK_HDMI_CECRX_MODE                     HDMI_IOWR(67, unsigned int)
+#define MTK_HDMI_SENDSLTDATA                    HDMI_IOWR(68, send_slt_data)
+#define MTK_HDMI_GET_SLTDATA                    HDMI_IOWR(69, CEC_GETSLT_DATA)
+#define MTK_HDMI_VIDEO_MUTE                     HDMI_IOWR(70, int)
+
+#define MTK_HDMI_READ                           HDMI_IOWR(81, unsigned int)
+#define MTK_HDMI_WRITE                          HDMI_IOWR(82, unsigned int)
+#define MTK_HDMI_CMD                            HDMI_IOWR(83, unsigned int)
+#define MTK_HDMI_DUMP                           HDMI_IOWR(84, unsigned int)
+#define MTK_HDMI_DUMP6397                       HDMI_IOWR(85, unsigned int)
+#define MTK_HDMI_DUMP6397_W                     HDMI_IOWR(86, unsigned int)
+#define MTK_HDMI_CBUS_STATUS                    HDMI_IOWR(87, unsigned int)
+#define MTK_HDMI_CONNECT_STATUS                 HDMI_IOWR(88, unsigned int)
+#define MTK_HDMI_DUMP6397_R                     HDMI_IOWR(89, unsigned int)
+#define MTK_MHL_GET_DCAP                        HDMI_IOWR(90, unsigned int)
+#define MTK_MHL_GET_3DINFO                      HDMI_IOWR(91, unsigned int)
+#define MTK_HDMI_HDCP                           HDMI_IOWR(92, unsigned int)
+#define MTK_HDMI_AUDIO_FORMAT                   HDMI_IOWR(93, unsigned int)
+
+#define MTK_HDMI_FACTORY_CHIP_INIT              HDMI_IOWR(94, int)
+#define MTK_HDMI_FACTORY_JUDGE_CALLBACK         HDMI_IOWR(95, int)
+#define MTK_HDMI_FACTORY_START_DPI_AND_CONFIG   HDMI_IOWR(96, int)
+#define MTK_HDMI_FACTORY_DPI_STOP_AND_POWER_OFF HDMI_IOWR(97, int)
+
+#endif
diff --git a/kernel-headers/linux/hwmsensor.h b/kernel-headers/linux/hwmsensor.h
new file mode 100644
index 0000000..c14611d
--- /dev/null
+++ b/kernel-headers/linux/hwmsensor.h
@@ -0,0 +1,308 @@
+/* alps
+ *
+ * (C) Copyright 2009
+ * MediaTek <www.MediaTek.com>
+ *
+ * MT6516 Sensor IOCTL & data structure
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __HWMSENSOR_H__
+#define __HWMSENSOR_H__
+
+#include <linux/ioctl.h>
+
+#define SENSOR_TYPE_ACCELEROMETER       1
+#define SENSOR_TYPE_MAGNETIC_FIELD      2
+#define SENSOR_TYPE_ORIENTATION         3
+#define SENSOR_TYPE_GYROSCOPE           4
+#define SENSOR_TYPE_LIGHT               5
+#define SENSOR_TYPE_PRESSURE            6
+#define SENSOR_TYPE_TEMPERATURE         7
+#define SENSOR_TYPE_PROXIMITY           8
+#define SENSOR_TYPE_GRAVITY             9
+#define SENSOR_TYPE_LINEAR_ACCELERATION 10
+#define SENSOR_TYPE_ROTATION_VECTOR     11
+#define SENSOR_TYPE_HUMIDITY            12
+#define SENSOR_TYPE_GAME_ROTATION_VECTOR 15
+#define SENSOR_TYPE_SIGNIFICANT_MOTION  17
+#define SENSOR_TYPE_STEP_DETECTOR       18
+#define SENSOR_TYPE_STEP_COUNTER        19
+
+#define SENSOR_TYPE_GEOMAGNETIC_ROTATION_VECTOR     20
+
+#define SENSOR_TYPE_HEART_RATE          21
+#define SENSOR_TYPE_TILT_DETECTOR       22
+#define SENSOR_TYPE_WAKE_GESTURE        23
+#define SENSOR_TYPE_GLANCE_GESTURE      24
+#define SENSOR_TYPE_PICK_UP_GESTURE     25
+
+#define SENSOR_TYPE_PEDOMETER           (26)
+#define SENSOR_STRING_TYPE_PEDOMETER                 "android.sensor.pedometer"
+#define SENSOR_TYPE_IN_POCKET           (27)
+#define SENSOR_STRING_TYPE_IN_POCKET                 "android.sensor.in_pocket"
+#define SENSOR_TYPE_ACTIVITY            (28)
+#define SENSOR_STRING_TYPE_ACTIVITY                  "android.sensor.activity"
+#define SENSOR_TYPE_FACE_DOWN           (29)
+#define SENSOR_STRING_TYPE_FACE_DOWN                 "android.sensor.face_down"
+#define SENSOR_TYPE_SHAKE               (30)
+#define SENSOR_STRING_TYPE_SHAKE                     "android.sensor.shake"
+#define SENSOR_TYPE_BRINGTOSEE          (31)
+#define SENSOR_STRING_TYPE_BRINGTOSEE               "android.sensor.bring_to_see"
+
+/*---------------------------------------------------------------------------*/
+#define ID_BASE							0
+#define ID_ORIENTATION					(ID_BASE+SENSOR_TYPE_ORIENTATION-1)
+#define ID_MAGNETIC						(ID_BASE+SENSOR_TYPE_MAGNETIC_FIELD-1)
+#define ID_ACCELEROMETER				(ID_BASE+SENSOR_TYPE_ACCELEROMETER-1)
+#define ID_LINEAR_ACCELERATION			(ID_BASE+SENSOR_TYPE_LINEAR_ACCELERATION-1)
+#define ID_ROTATION_VECTOR				(ID_BASE+SENSOR_TYPE_ROTATION_VECTOR-1)
+#define ID_GAME_ROTATION_VECTOR   (ID_BASE+SENSOR_TYPE_GAME_ROTATION_VECTOR-1)
+#define ID_GRAVITY						(ID_BASE+SENSOR_TYPE_GRAVITY-1)
+#define ID_GYROSCOPE					(ID_BASE+SENSOR_TYPE_GYROSCOPE-1)
+#define ID_PROXIMITY					(ID_BASE+SENSOR_TYPE_PROXIMITY-1)
+#define ID_LIGHT						(ID_BASE+SENSOR_TYPE_LIGHT-1)
+#define ID_PRESSURE						(ID_BASE+SENSOR_TYPE_PRESSURE-1)
+#define ID_TEMPRERATURE					(ID_BASE+SENSOR_TYPE_TEMPERATURE-1)
+#define ID_HUMIDITY                     (ID_BASE+SENSOR_TYPE_HUMIDITY-1)
+#define ID_SIGNIFICANT_MOTION			(ID_BASE+SENSOR_TYPE_SIGNIFICANT_MOTION-1)  
+#define ID_STEP_DETECTOR				(ID_BASE+SENSOR_TYPE_STEP_DETECTOR-1)  
+#define ID_STEP_COUNTER					(ID_BASE+SENSOR_TYPE_STEP_COUNTER-1) 
+#define ID_GEOMAGNETIC_ROTATION_VECTOR                  (ID_BASE+SENSOR_TYPE_GEOMAGNETIC_ROTATION_VECTOR-1)
+#define ID_HEART_RATE           (ID_BASE+SENSOR_TYPE_HEART_RATE-1)
+#define ID_TILT_DETECTOR        (ID_BASE+SENSOR_TYPE_TILT_DETECTOR-1)
+#define ID_WAKE_GESTURE         (ID_BASE+SENSOR_TYPE_WAKE_GESTURE-1)
+#define ID_GLANCE_GESTURE       (ID_BASE+SENSOR_TYPE_GLANCE_GESTURE-1)
+#define ID_PICK_UP_GESTURE      (ID_BASE+SENSOR_TYPE_PICK_UP_GESTURE-1)
+#define ID_PEDOMETER                                    (ID_BASE+SENSOR_TYPE_PEDOMETER-1)
+#define ID_ACTIVITY                                     (ID_BASE+SENSOR_TYPE_ACTIVITY-1)
+#define ID_IN_POCKET                                     (ID_BASE+SENSOR_TYPE_IN_POCKET-1)
+#define ID_FACE_DOWN                                    (ID_BASE+SENSOR_TYPE_FACE_DOWN-1)
+#define ID_SHAKE                                        (ID_BASE+SENSOR_TYPE_SHAKE-1)
+#define ID_BRINGTOSEE                                   (ID_BASE+SENSOR_TYPE_BRINGTOSEE-1)
+#define ID_SENSOR_MAX_HANDLE	  (ID_BASE+SENSOR_TYPE_BRINGTOSEE)
+#define ID_NONE							    (ID_SENSOR_MAX_HANDLE+1)
+
+#define ID_OFFSET                           (1)
+
+#define MAX_ANDROID_SENSOR_NUM	(ID_SENSOR_MAX_HANDLE +1)
+#define MAX_SENSOR_DATA_UPDATE_ONCE         (20)
+
+/*---------------------------------------------------------------------------*/
+#define SENSOR_ORIENTATION				(1 << ID_ORIENTATION)
+#define SENSOR_MAGNETIC					(1 << ID_MAGNETIC)
+#define SENSOR_ACCELEROMETER			(1 << ID_ACCELEROMETER)
+#define SENSOR_GYROSCOPE				(1 << ID_GYROSCOPE)
+#define SENSOR_PROXIMITY				(1 << ID_PROXIMITY)
+#define SENSOR_LIGHT					(1 << ID_LIGHT)
+#define SENSOR_PRESSURE					(1 << ID_PRESSURE)
+#define SENSOR_TEMPRERATURE				(1 << ID_TEMPRERATURE)
+#define SENSOR_GRAVITY					(1 << ID_GRAVITY)
+#define SENSOR_LINEAR_ACCELERATION		(1 << ID_LINEAR_ACCELERATION)
+#define SENSOR_ROTATION_VECTOR			(1 << ID_ROTATION_VECTOR)
+
+#define SENSOR_SIGNIFICANT_MOTION           (1 << ID_SIGNIFICANT_MOTION)
+#define SENSOR_STEP_DETECTOR                (1 << ID_STEP_DETECTOR)
+#define SENSOR_STEP_COUNTER                 (1 << ID_STEP_COUNTER)
+#define SENSOR_GEOMAGNETIC_ROTATION_VECTOR  (1 << ID_GEOMAGNETIC_ROTATION_VECTOR)
+
+#define SENSOR_HEART_RATE           (1 << ID_HEART_RATE)
+#define SENSOR_TILT_DETECTOR        (1 << ID_TILT_DETECTOR)
+#define SENSOR_WAKE_GESTURE         (1 << ID_WAKE_GESTURE)
+#define SENSOR_GLANCE_GESTURE       (1 << ID_GLANCE_GESTURE)
+#define SENSOR_PICK_UP_GESTURE      (1 << ID_PICK_UP_GESTURE)
+
+#define SENSOR_PEDOMETER                    (1 << ID_PEDOMETER) 
+#define SENSOR_IN_POCKET                    (1 << ID_IN_POCKET) 
+#define SENSOR_ACTIVITY                     (1 << ID_ACTIVITY) 
+#define SENSOR_FACE_DOWN                    (1 << ID_FACE_DOWN) 
+#define SENSOR_SHAKE                        (1 << ID_SHAKE) 
+#define SENSOR_BRINGTOSEE                   (1 << ID_BRINGTOSEE) 
+
+/*----------------------------------------------------------------------------*/
+#define HWM_INPUTDEV_NAME               "hwmdata"
+#define HWM_SENSOR_DEV_NAME             "hwmsensor"
+#define HWM_SENSOR_DEV                  "/dev/hwmsensor"
+#define C_MAX_HWMSEN_EVENT_NUM          4
+/*----------------------------------------------------------------------------*/
+#define ACC_PL_DEV_NAME                 "m_acc_pl"
+#define ACC_INPUTDEV_NAME               "m_acc_input"
+#define ACC_MISC_DEV_NAME               "m_acc_misc"
+#define MAG_PL_DEV_NAME                 "m_mag_pl"
+#define MAG_INPUTDEV_NAME               "m_mag_input"
+#define MAG_MISC_DEV_NAME               "m_mag_misc"
+#define GYRO_PL_DEV_NAME                "m_gyro_pl"
+#define GYRO_INPUTDEV_NAME              "m_gyro_input"
+#define GYRO_MISC_DEV_NAME              "m_gyro_misc"
+#define ALSPS_PL_DEV_NAME                	"m_alsps_pl"
+#define ALSPS_INPUTDEV_NAME              "m_alsps_input"
+#define ALSPS_MISC_DEV_NAME              "m_alsps_misc"
+#define BARO_PL_DEV_NAME                	"m_baro_pl"
+#define BARO_INPUTDEV_NAME              "m_baro_input"
+#define BARO_MISC_DEV_NAME              "m_baro_misc"
+
+#define STEP_C_PL_DEV_NAME                "m_step_c_pl"
+#define STEP_C_INPUTDEV_NAME              "m_step_c_input"
+#define STEP_C_MISC_DEV_NAME              "m_step_c_misc"
+
+#define INPK_PL_DEV_NAME                "m_inpk_pl"
+#define INPK_INPUTDEV_NAME              "m_inpk_input"
+#define INPK_MISC_DEV_NAME              "m_inpk_misc"
+
+#define SHK_PL_DEV_NAME                "m_shk_pl"
+#define SHK_INPUTDEV_NAME              "m_shk_input"
+#define SHK_MISC_DEV_NAME              "m_shk_misc"
+
+#define FDN_PL_DEV_NAME                "m_fdn_pl"
+#define FDN_INPUTDEV_NAME              "m_fdn_input"
+#define FDN_MISC_DEV_NAME              "m_fdn_misc"
+
+#define PKUP_PL_DEV_NAME                "m_pkup_pl"
+#define PKUP_INPUTDEV_NAME              "m_pkup_input"
+#define PKUP_MISC_DEV_NAME              "m_pkup_misc"
+
+#define ACT_PL_DEV_NAME                "m_act_pl"
+#define ACT_INPUTDEV_NAME              "m_act_input"
+#define ACT_MISC_DEV_NAME              "m_act_misc"
+
+#define PDR_PL_DEV_NAME                "m_pdr_pl"
+#define PDR_INPUTDEV_NAME              "m_pdr_input"
+#define PDR_MISC_DEV_NAME              "m_pdr_misc"
+
+#define HRM_PL_DEV_NAME                "m_hrm_pl"
+#define HRM_INPUTDEV_NAME              "m_hrm_input"
+#define HRM_MISC_DEV_NAME              "m_hrm_misc"
+
+#define TILT_PL_DEV_NAME               "m_tilt_pl"
+#define TILT_INPUTDEV_NAME             "m_tilt_input"
+#define TILT_MISC_DEV_NAME             "m_tilt_misc"
+
+#define WAG_PL_DEV_NAME                "m_wag_pl"
+#define WAG_INPUTDEV_NAME              "m_wag_input"
+#define WAG_MISC_DEV_NAME              "m_wag_misc"
+
+#define GLG_PL_DEV_NAME                "m_glg_pl"
+#define GLG_INPUTDEV_NAME              "m_glg_input"
+#define GLG_MISC_DEV_NAME              "m_glg_misc"
+
+#define TEMP_PL_DEV_NAME                	"m_temp_pl"
+#define TEMP_INPUTDEV_NAME              	"m_temp_input"
+#define TEMP_MISC_DEV_NAME              	"m_temp_misc"
+
+#define BATCH_PL_DEV_NAME               "m_batch_pl"
+#define BATCH_INPUTDEV_NAME             "m_batch_input"
+#define BATCH_MISC_DEV_NAME             "m_batch_misc"
+
+#define BTS_PL_DEV_NAME               	"m_bts_pl"
+#define BTS_INPUTDEV_NAME             	"m_bts_input"
+#define BTS_MISC_DEV_NAME             	"m_bts_misc"
+
+#define GRV_PL_DEV_NAME               	"m_grv_pl"
+#define GRV_INPUTDEV_NAME             	"m_grv_input"
+#define GRV_MISC_DEV_NAME             	"m_grv_misc"
+
+#define GMRV_PL_DEV_NAME               	"m_gmrv_pl"
+#define GMRV_INPUTDEV_NAME             	"m_gmrv_input"
+#define GMRV_MISC_DEV_NAME             	"m_gmrv_misc"
+
+#define GRAV_PL_DEV_NAME               	"m_grav_pl"
+#define GRAV_INPUTDEV_NAME             	"m_grav_input"
+#define GRAV_MISC_DEV_NAME             	"m_grav_misc"
+
+#define LA_PL_DEV_NAME               	"m_la_pl"
+#define LA_INPUTDEV_NAME             	"m_la_input"
+#define LA_MISC_DEV_NAME             	"m_la_misc"
+
+#define RV_PL_DEV_NAME               	"m_rv_pl"
+#define RV_INPUTDEV_NAME             	"m_rv_input"
+#define RV_MISC_DEV_NAME             	"m_rv_misc"
+
+#define EVENT_TYPE_SENSOR				0x01
+#define EVENT_TYPE_SENSOR_EXT			0x02
+#define EVENT_SENSOR_ACCELERATION		SENSOR_ACCELEROMETER
+#define EVENT_SENSOR_MAGNETIC			SENSOR_MAGNETIC
+#define EVENT_SENSOR_ORIENTATION		SENSOR_ORIENTATION
+#define EVENT_SENSOR_GYROSCOPE			SENSOR_GYROSCOPE
+#define EVENT_SENSOR_LIGHT				SENSOR_LIGHT
+#define EVENT_SENSOR_PRESSURE			SENSOR_PRESSURE
+#define EVENT_SENSOR_TEMPERATURE		SENSOR_TEMPRERATURE
+#define EVENT_SENSOR_PROXIMITY			SENSOR_PROXIMITY
+#define EVENT_SENSOR_GRAVITY			SENSOR_PRESSURE
+#define EVENT_SENSOR_LINEAR_ACCELERATION		SENSOR_TEMPRERATURE
+#define EVENT_SENSOR_ROTATION_VECTOR	SENSOR_PROXIMITY
+/*-----------------------------------------------------------------------------*/
+
+enum {
+    HWM_MODE_DISABLE = 0,
+    HWM_MODE_ENABLE  = 1,
+};
+
+/*------------sensors data----------------------------------------------------*/
+typedef struct {
+	/* sensor identifier */
+	int 	sensor;
+	/* sensor values */
+	int	values[6];
+	/* sensor values divide */
+	uint32_t value_divide;
+	/* sensor accuracy*/
+	int8_t status;
+	/* whether updata? */
+	int	update;
+	/* time is in nanosecond */
+	int64_t	time;
+
+	uint32_t	reserved;
+}hwm_sensor_data;
+
+typedef struct {
+	hwm_sensor_data data[MAX_SENSOR_DATA_UPDATE_ONCE];
+	uint64_t data_type;
+}hwm_trans_data;
+
+#define MAX_BATCH_DATA_PER_QUREY    18
+typedef struct {
+	int numOfDataReturn;
+	int numOfDataLeft;
+	hwm_sensor_data data[MAX_BATCH_DATA_PER_QUREY];
+}batch_trans_data;
+
+/*----------------------------------------------------------------------------*/
+#define HWM_IOC_MAGIC           0x91
+
+/* set delay */
+#define HWM_IO_SET_DELAY		_IOW(HWM_IOC_MAGIC, 0x01, uint32_t)
+
+/* wake up */
+#define HWM_IO_SET_WAKE			_IO(HWM_IOC_MAGIC, 0x02)
+
+/* Enable/Disable  sensor */
+#define HWM_IO_ENABLE_SENSOR	_IOW(HWM_IOC_MAGIC, 0x03, uint32_t)
+#define HWM_IO_DISABLE_SENSOR	_IOW(HWM_IOC_MAGIC, 0x04, uint32_t)
+
+/* Enable/Disable sensor */
+#define HWM_IO_ENABLE_SENSOR_NODATA		_IOW(HWM_IOC_MAGIC, 0x05, uint32_t)
+#define HWM_IO_DISABLE_SENSOR_NODATA	_IOW(HWM_IOC_MAGIC, 0x06, uint32_t)
+/* Get sensors data */
+#define HWM_IO_GET_SENSORS_DATA			_IOWR(HWM_IOC_MAGIC, 0x07, hwm_trans_data)
+
+/*----------------------------------------------------------------------------*/
+#define BATCH_IOC_MAGIC           0x92
+
+/* Get sensor data */
+#define BATCH_IO_GET_SENSORS_DATA			_IOWR(BATCH_IOC_MAGIC, 0x01, batch_trans_data)
+
+#endif // __HWMSENSOR_H__
diff --git a/kernel-headers/linux/ion_debugger.h b/kernel-headers/linux/ion_debugger.h
new file mode 100644
index 0000000..e396839
--- /dev/null
+++ b/kernel-headers/linux/ion_debugger.h
@@ -0,0 +1,193 @@
+#ifndef ION_DEBUGGER_DEF
+#define ION_DEBUGGER_DEF
+#define BACKTRACE_SIZE 10
+//#include <linux/mutex.h>
+typedef enum
+{
+   ION_FUNCTION_OPEN,
+   ION_FUNCTION_CLOSE,
+   ION_FUNCTION_CREATE_CLIENT,
+   ION_FUNCTION_DESTROY_CLIENT,
+   ION_FUNCTION_ALLOC,
+   ION_FUNCTION_ALLOC_MM,
+   ION_FUNCTION_ALLOC_CONT,
+   ION_FUNCTION_FREE,
+   ION_FUNCTION_IMPORT,
+   ION_FUNCTION_MMAP,
+   ION_FUNCTION_MUNMAP,
+   ION_FUNCTION_SHARE,
+   ION_FUNCTION_SHARE_CLOSE
+}ION_FUNCTION_TYPE;
+
+typedef enum
+{
+   BUFFER_ALLOCATION_LIST,
+   BUFFER_FREE_LIST,
+   ADDRESS_ALLOCATION_LIST,
+   ADDRESS_FREE_LIST,
+   FD_ALLOCATION_LIST,
+   FD_FREE_LIST
+}ION_DEBUGGER_LIST_TYPE;
+typedef enum
+{
+   ADDRESS_USER_VIRTUAL,
+   ADDRESS_KERNEL_VIRTUAL,
+   ADDRESS_KERNEL_PHYSICAL,
+   ADDRESS_MAX
+}ION_MAPPING_ADDRESS_TYPE;
+typedef enum
+{
+   RECORD_ID,
+   RECORD_CLIENT,
+   RECORD_HANDLE,
+   RECORD_ALLOCATE_BACKTRACE_NUM,
+   RECORD_FREED_BACKTRACE_NUM,
+   RECORD_ALLOCATE_MAPPING_NUM,
+   RECORD_FREED_MAPPING_NUM,
+   RECORD_FD,
+   RECORD_ADDRESS,
+   RECORD_SIZE,
+   RECORD_NEXT
+}ION_DEBUGGDER_RECORD_DATA;
+typedef enum
+{
+   SEARCH_PID,
+   SEARCH_PID_CLIENT,
+   SEARCH_PROCESS_PID,
+   SEARCH_BUFFER,
+   SEARCH_MAX
+}ION_SEARCH_METHOD;
+typedef enum
+{
+   LIST_BUFFER,
+   LIST_PROCESS,
+   NODE_BUFFER,
+   NODE_FD,
+   NODE_CLIENT,
+   NODE_MMAP,
+   NODE_MAX
+}ION_RECORD_TYPE;
+typedef enum
+{ 
+   HASH_NODE_CLIENT,
+   HASH_NODE_HANDLE,
+   HASH_NODE_BUFFER,
+   HASH_NODE_USER_BACKTRACE,
+   HASH_NODE_KERNEL_BACKTRACE,
+   HASH_NODE_USER_MAPPING,
+   HASH_NODE_KERNEL_SYMBOL,
+   HASH_NODE_MAX 
+}ION_HASH_NODE_TYPE;
+typedef enum
+{
+   ALLOCATE_BACKTRACE_INFO,
+   RELEASE_BACKTRACE_INFO,
+   KERNEL_BACKTRACE,
+   USER_BACKTRACE,
+   BACKTRACE_MAX
+}BACKTRACE_INFO;
+struct mapping
+{
+    char *name;
+    unsigned int address;
+    unsigned int size;
+};
+typedef struct ion_sys_record_param
+{
+    pid_t group_id;
+    pid_t pid;
+    unsigned int action;
+    unsigned int address_type;
+    unsigned int address;
+    unsigned int length;
+    unsigned int backtrace[BACKTRACE_SIZE];
+    unsigned int kernel_symbol[BACKTRACE_SIZE];
+    struct mapping mapping_record[BACKTRACE_SIZE];
+    unsigned int backtrace_num;
+    struct ion_handle *handle;
+    struct ion_client *client;
+    struct ion_buffer *buffer;
+    int fd;
+}ion_sys_record_t;
+
+typedef struct ion_record_ID
+{
+        pid_t pid;
+        pid_t group_pid;
+        unsigned int client_address;
+        struct ion_client *client;
+ union{
+        struct ion_buffer_record *buffer;
+	struct ion_process_record *process_record;
+};
+}ion_record_ID_t;
+typedef struct ion_record_basic_info
+{
+        struct ion_record_ID recordID;
+	unsigned int record_type;
+	unsigned int from_kernel;
+	unsigned int allocate_backtrace_type;
+        unsigned int *allocate_backtrace;
+        unsigned int *allocate_map;
+	unsigned int release_backtrace_type;
+        unsigned int *release_backtrace;
+       	unsigned int *release_map;
+}ion_record_basic_info_t;
+typedef struct ion_buffer_usage_record
+{
+	struct ion_buffer_usage_record *next;
+        struct ion_record_basic_info tracking_info;
+        struct ion_handle *handle;
+	unsigned int function_type;
+}ion_buffer_usage_record_t;
+typedef struct ion_address_usage_record
+{
+	struct ion_address_usage_record *next;
+        struct ion_record_basic_info tracking_info;
+        unsigned int address_type;
+        unsigned int mapping_address;
+        unsigned int size;
+        int    fd;
+	struct ion_buffer *buffer;
+}ion_address_usage_record_t;
+typedef struct ion_fd_usage_record
+{
+	struct ion_fd_usage_reocrd *next;
+        struct ion_record_basic_info tracking_info;
+        int    fd;
+	struct ion_handle *handle;
+	struct ion_buffer *buffer;
+}ion_fd_usage_record_t;
+
+typedef struct ion_client_usage_record
+{
+	struct ion_client_usage_recrod *next;
+	struct ion_record_basic_info tracking_info;
+	int fd;	 
+}ion_client_usage_record_t;
+#if 0
+struct ion_buffer_record
+{
+        struct ion_buffer_record *next;
+        struct ion_buffer *buffer;
+        unsigned int heap_type;
+        union{
+                void *priv_virt;
+                unsigned long priv_phys;
+        };
+        struct ion_buffer_usage_record *buffer_using_list;
+        struct ion_buffer_usage_record *buffer_freed_list;
+        struct mutex ion_buffer_usage_mutex;
+        struct ion_address_usage_record *address_using_list;
+        struct ion_address_usage_record *address_freed_list;
+        struct mutex ion_address_usage_mutex;
+        struct ion_fd_usage_record *fd_using_list;
+        struct ion_fd_usage_record *fd_freed_list;
+        struct mutex ion_fd_usage_mutex;
+};
+extern void *ion_get_list(struct ion_buffer_record *buffer, unsigned int list_type);
+extern struct ion_buffer_usage_record *ion_get_inuse_buffer_record();
+extern struct ion_buffer_usage_record *ion_get_freed_buffer_record();
+extern unsigned int ion_get_data_from_record(void *record,unsigned int data_type);
+#endif
+#endif
diff --git a/kernel-headers/linux/ion_drv.h b/kernel-headers/linux/ion_drv.h
new file mode 100644
index 0000000..970d0ff
--- /dev/null
+++ b/kernel-headers/linux/ion_drv.h
@@ -0,0 +1,169 @@
+#ifndef __ION_DRV_H__
+#define __ION_DRV_H__
+#include <linux/ion.h>
+
+#define BACKTRACE_SIZE 10
+
+/* Structure definitions */
+
+typedef enum {
+	ION_CMD_SYSTEM,
+	ION_CMD_MULTIMEDIA,
+} ION_CMDS;
+
+typedef enum {
+	ION_MM_CONFIG_BUFFER,
+	ION_MM_SET_DEBUG_INFO,
+	ION_MM_GET_DEBUG_INFO,
+	ION_MM_SET_SF_BUF_INFO,
+	ION_MM_GET_SF_BUF_INFO
+} ION_MM_CMDS;
+
+typedef enum {
+	ION_SYS_CACHE_SYNC,
+	ION_SYS_GET_PHYS,
+	ION_SYS_GET_CLIENT,
+	ION_SYS_SET_HANDLE_BACKTRACE,
+	ION_SYS_SET_CLIENT_NAME,
+	ION_SYS_DMA_OP,
+} ION_SYS_CMDS;
+
+typedef enum {
+	ION_CACHE_CLEAN_BY_RANGE,
+	ION_CACHE_INVALID_BY_RANGE,
+	ION_CACHE_FLUSH_BY_RANGE,
+	ION_CACHE_CLEAN_BY_RANGE_USE_VA,
+	ION_CACHE_INVALID_BY_RANGE_USE_VA,
+	ION_CACHE_FLUSH_BY_RANGE_USE_VA,
+	ION_CACHE_CLEAN_ALL,
+	ION_CACHE_INVALID_ALL,
+	ION_CACHE_FLUSH_ALL
+} ION_CACHE_SYNC_TYPE;
+
+typedef enum {
+	ION_ERROR_CONFIG_LOCKED = 0x10000
+} ION_ERROR_E;
+
+typedef struct ion_sys_cache_sync_param {
+	union {
+		ion_user_handle_t handle;
+		void *kernel_handle;
+	};
+	void *va;
+	unsigned int size;
+	ION_CACHE_SYNC_TYPE sync_type;
+} ion_sys_cache_sync_param_t;
+
+typedef enum {
+	ION_DMA_MAP_AREA,
+	ION_DMA_UNMAP_AREA,
+	ION_DMA_MAP_AREA_VA,
+	ION_DMA_UNMAP_AREA_VA,
+	ION_DMA_CACHE_FLUSH_ALL
+} ION_DMA_TYPE;
+
+typedef enum {
+	ION_DMA_FROM_DEVICE,
+	ION_DMA_TO_DEVICE,
+	ION_DMA_BIDIRECTIONAL,
+} ION_DMA_DIR;
+
+typedef struct ion_dma_param {
+	union {
+		ion_user_handle_t handle;
+		void *kernel_handle;
+	};
+	void *va;
+	unsigned int size;
+	ION_DMA_TYPE dma_type;
+	ION_DMA_DIR dma_dir;
+} ion_sys_dma_param_t;
+
+typedef struct ion_sys_get_phys_param {
+	union {
+		ion_user_handle_t handle;
+		void *kernel_handle;
+	};
+	unsigned int phy_addr;
+	unsigned long len;
+} ion_sys_get_phys_param_t;
+
+#define ION_MM_DBG_NAME_LEN 16
+#define ION_MM_SF_BUF_INFO_LEN 16
+
+typedef struct __ion_sys_client_name {
+	char name[ION_MM_DBG_NAME_LEN];
+} ion_sys_client_name_t;
+
+typedef struct ion_sys_get_client_param {
+	unsigned int client;
+} ion_sys_get_client_param_t;
+
+typedef struct ion_sys_record_param {
+	pid_t group_id;
+	pid_t pid;
+	unsigned int action;
+	unsigned int address_type;
+	unsigned int address;
+	unsigned int length;
+	unsigned int backtrace[BACKTRACE_SIZE];
+	unsigned int backtrace_num;
+	struct ion_handle *handle;
+	struct ion_client *client;
+	struct ion_buffer *buffer;
+	struct file *file;
+	int fd;
+} ion_sys_record_t;
+
+typedef struct ion_sys_data {
+	ION_SYS_CMDS sys_cmd;
+	union {
+		ion_sys_cache_sync_param_t cache_sync_param;
+		ion_sys_get_phys_param_t get_phys_param;
+		ion_sys_get_client_param_t get_client_param;
+		ion_sys_client_name_t client_name_param;
+		ion_sys_record_t record_param;
+		ion_sys_dma_param_t dma_param;
+	};
+} ion_sys_data_t;
+
+typedef struct ion_mm_config_buffer_param {
+	union {
+		ion_user_handle_t handle;
+		void *kernel_handle;
+	};
+	int eModuleID;
+	unsigned int security;
+	unsigned int coherent;
+} ion_mm_config_buffer_param_t;
+
+typedef struct __ion_mm_buf_debug_info {
+	union {
+		ion_user_handle_t handle;
+		void *kernel_handle;
+	};
+	char dbg_name[ION_MM_DBG_NAME_LEN];
+	unsigned int value1;
+	unsigned int value2;
+	unsigned int value3;
+	unsigned int value4;
+} ion_mm_buf_debug_info_t;
+
+typedef struct __ion_mm_sf_buf_info {
+	union {
+		ion_user_handle_t handle;
+		void *kernel_handle;
+	};
+	unsigned int info[ION_MM_SF_BUF_INFO_LEN];
+} ion_mm_sf_buf_info_t;
+
+typedef struct ion_mm_data {
+	ION_MM_CMDS mm_cmd;
+	union {
+		ion_mm_config_buffer_param_t config_buffer_param;
+		ion_mm_buf_debug_info_t buf_debug_info_param;
+		ion_mm_sf_buf_info_t sf_buf_info_param;
+	};
+} ion_mm_data_t;
+
+#endif
diff --git a/kernel-headers/linux/kpd.h b/kernel-headers/linux/kpd.h
new file mode 100644
index 0000000..7eb1728
--- /dev/null
+++ b/kernel-headers/linux/kpd.h
@@ -0,0 +1,46 @@
+#ifndef KPD_IO_H
+#define KPD_IO_H
+		  
+#include <linux/ioctl.h>
+
+struct kpd_ledctl {
+	int onoff;
+	int div;		/* 0 ~ 15 */
+	int duty;	/* 0 ~ 31 */
+};
+
+#if 0
+#define PRESS_OK_KEY		_IO('k', 1)
+#define RELEASE_OK_KEY		_IO('k', 2)
+#define PRESS_MENU_KEY		_IO('k', 3)
+#define RELEASE_MENU_KEY	_IO('k', 4)
+#define PRESS_UP_KEY		_IO('k', 5)
+#define RELEASE_UP_KEY		_IO('k', 6)
+#define PRESS_DOWN_KEY		_IO('k', 7)
+#define RELEASE_DOWN_KEY	_IO('k', 8)
+#define PRESS_LEFT_KEY		_IO('k', 9)
+#define RELEASE_LEFT_KEY	_IO('k', 10)
+#define PRESS_RIGHT_KEY		_IO('k', 11)
+#define RELEASE_RIGHT_KEY	_IO('k', 12)
+#define PRESS_HOME_KEY		_IO('k', 13)
+#define RELEASE_HOME_KEY	_IO('k', 14)
+#define PRESS_BACK_KEY		_IO('k', 15)
+#define RELEASE_BACK_KEY	_IO('k', 16)
+#define PRESS_CALL_KEY		_IO('k', 17)
+#define RELEASE_CALL_KEY	_IO('k', 18)
+#define PRESS_ENDCALL_KEY	_IO('k', 19)
+#define RELEASE_ENDCALL_KEY	_IO('k', 20)
+#define PRESS_VLUP_KEY		_IO('k', 21)
+#define RELEASE_VLUP_KEY	_IO('k', 22)
+#define PRESS_VLDOWN_KEY	_IO('k', 23)
+#define RELEASE_VLDOWN_KEY	_IO('k', 24)
+#define PRESS_FOCUS_KEY		_IO('k', 25)
+#define RELEASE_FOCUS_KEY	_IO('k', 26)
+#define PRESS_CAMERA_KEY	_IO('k', 27)
+#define RELEASE_CAMERA_KEY	_IO('k', 28)
+#endif
+#define SET_KPD_BACKLIGHT	_IOW('k', 29, struct kpd_ledctl)
+#define SET_KPD_KCOL				_IO('k', 29)
+
+
+#endif
diff --git a/kernel-headers/linux/libmtk_cipher_export.h b/kernel-headers/linux/libmtk_cipher_export.h
new file mode 100644
index 0000000..34a85d3
--- /dev/null
+++ b/kernel-headers/linux/libmtk_cipher_export.h
@@ -0,0 +1,86 @@
+#ifndef _LIBMTK_CIPHER_EXPORT_H
+#define _LIBMTK_CIPHER_EXPORT_H
+
+#define HEVC_BLK_LEN                            (20480)     // bytes
+#define HEVC_MOD                                "HEVC_MOD"
+#define HEVC_NANO                               1000000000ULL
+#define HEVC_CIPHER_LEN                         (102400)    // bytes
+
+
+typedef struct
+{
+    unsigned char buf[HEVC_BLK_LEN];
+    unsigned int len;
+} HEVC_BLK;
+
+typedef enum
+{
+    VIDEO_ENCRYPT_CODEC_NONE      = 0x0,
+    VIDEO_ENCRYPT_CODEC_HEVC_ENC  = 0x1,
+    VIDEO_ENCRYPT_CODEC_HEVC_DEC  = 0x2,
+    VIDEO_ENCRYPT_CODEC_MAX       = 0xffffffff
+} VIDEO_ENCRYPT_CODEC_T;
+
+
+typedef int (*hevc_api_funp)(HEVC_BLK *p_hevc_blk);
+typedef int (*hevc_api_initk_funp)(unsigned char *key, unsigned int klen);
+
+
+#define SEC_OK                                  0x0
+#define SEC_FAIL                                0x1
+
+/* HEVC shared lib*/
+#define ERR_HEVC_NOT_CORRECT_MODE               0x10000
+#define ERR_HEVC_DATA_NOT_ALIGNED               0x10001
+#define ERR_HEVC_ENC_IOCTL_FAIL                 0x10002
+#define ERR_HEVC_DEC_IOCTL_FAIL                 0x10002
+#define ERR_HEVC_CIPHER_UT_FAIL                 0x10003
+#define ERR_HEVC_DATA_IS_NULL                   0x10004
+#define ERR_HEVC_DATA_LENGTH_NOT_VALID          0x10005
+#define ERR_HEVC_SW_ENC_ERROR                   0x10006
+#define ERR_HEVC_SW_DEC_ERROR                   0x10007
+#define ERR_HEVC_INIT_SW_KEY_ERROR              0x10008
+
+
+/* HEVC sample*/
+#define ERR_HEVC_CIPHER_LIB_NOT_FOUND           0x20001
+#define ERR_HEVC_SW_DEC_BLOCK_SYM_NOT_FOUND     0x20002
+#define ERR_HEVC_HW_ENC_BLOCK_SYM_NOT_FOUND     0x20003
+#define ERR_HEVC_INIT_SW_KEY_SYM_NOT_FOUND      0x20004
+#define ERR_HEVC_INPUT_FILE_NOT_FOUND           0x20005
+#define ERR_HEVC_OUTPUT_FILE_NOT_FOUND          0x20006
+#define ERR_HEVC_SW_DEC_FILE_SYM_NOT_FOUND      0x20007
+#define ERR_HEVC_SW_DEC_FILE_FAILED             0x20008
+#define ERR_HEVC_UNKNOWN                        0x2FFFF
+
+
+/* Define LOG LEVEL*/
+#define SEC_LOG_TRACE 0 //For source code trace
+#define SEC_LOG_DEBUG 0 //For debug purpose
+#define SEC_LOG_ERROR 1 //For critical error dump
+#define SEC_LOG_INFO  1 //For information to know when processing in normal 
+
+/* DEBUG MACRO */
+#define SMSG_TRACE(...) \
+    do { if (SEC_LOG_TRACE)  printf(__VA_ARGS__); } while (0)
+
+#define SMSG_DEBUG(...) \
+    do { if (SEC_LOG_DEBUG) printf(__VA_ARGS__); } while (0)
+
+#define SMSG_ERROR(...) \
+    do { if (SEC_LOG_ERROR) printf(__VA_ARGS__); } while (0)
+
+#define SMSG_INFO(...) \
+    do { if (SEC_LOG_INFO) printf(__VA_ARGS__); } while (0)
+
+
+#define HEVC_ENCRYTP_FILE_PATH            "/data/mediaserver"
+#define HEVC_ENC_SW_ENCRYPT_FILE_PATH     "/system/lib/libhevce_sb.ca7.android.so"
+#define HEVC_ENC_HW_ENCRYPT_FILE_PATH     "/data/mediaserver/sb.ca7.android_hwenc.so"
+#define HEVC_ENC_HW_DECRYPT_FILE_PATH     "/data/mediaserver/sb.ca7.android_hwdec.so"
+#define HEVC_DEC_SW_ENCRYTP_FILE_PATH     "/system/lib/libHEVCdec_sa.ca7.android.so"
+#define HEVC_DEC_HW_ENCRYPT_FILE_PATH     "/data/mediaserver/dec_sa.ca7.android_hwenc.so"
+#define HEVC_DEC_HW_DECRYPT_FILE_PATH     "/data/mediaserver/dec_sa.ca7.android_hwdec.so"
+
+#endif   /*_LIBMTK_CIPHER_EXPORT_H*/
+
diff --git a/kernel-headers/linux/matv.h b/kernel-headers/linux/matv.h
new file mode 100644
index 0000000..dcae5a7
--- /dev/null
+++ b/kernel-headers/linux/matv.h
@@ -0,0 +1,58 @@
+#ifndef __MATV_H__
+#define __MATV_H__
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/device.h>
+#include <linux/kdev_t.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/mm_types.h>
+#include <linux/mm.h>
+#include <linux/jiffies.h>
+#include <linux/sched.h>
+#include <asm/uaccess.h>
+#include <linux/vmalloc.h>
+#include <linux/interrupt.h>
+#include <mach/irqs.h>
+#include <linux/wait.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/semaphore.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/xlog.h>
+
+#include "cust_matv.h"
+
+
+
+#define MATV_DEVNAME "MATV"
+#define MATV_IOC_MAGIC    'a'
+
+//below is control message
+#define TEST_MATV_PRINT         _IO(MATV_IOC_MAGIC,  0x00)
+#define MATV_READ               _IOW(MATV_IOC_MAGIC, 0x01, unsigned int)
+#define MATV_WRITE              _IOW(MATV_IOC_MAGIC, 0x02, unsigned int)
+#define MATV_SET_PWR            _IOW(MATV_IOC_MAGIC, 0x03, unsigned int)
+#define MATV_SET_RST            _IOW(MATV_IOC_MAGIC, 0x04, unsigned int)
+#define MATV_SET_STRAP          _IOW(MATV_IOC_MAGIC, 0x05, unsigned int)
+#define MATV_SLEEP              _IOW(MATV_IOC_MAGIC, 0x06, unsigned int)
+#define MATV_SET_TP_MODE        _IOW(MATV_IOC_MAGIC, 0x07, unsigned int)
+
+typedef struct matv_i2s_info
+{
+    int status;
+    int mode;
+    int rate;
+} matv_i2s_info_t;
+
+#define MATV_QUERY_I2S_INFO     _IOW(MATV_IOC_MAGIC, 0x08,  struct matv_i2s_info*)
+
+
+#endif //__MATV_H__
diff --git a/kernel-headers/linux/mman-proprietary.h b/kernel-headers/linux/mman-proprietary.h
new file mode 100644
index 0000000..c989967
--- /dev/null
+++ b/kernel-headers/linux/mman-proprietary.h
@@ -0,0 +1,21 @@
+/*
+* Copyright (C) 2011-2014 MediaTek Inc.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*      http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*/
+
+#ifndef __MM_PROPRIETARY_H__
+
+#define PROT_NOCACHE 0x10
+
+#endif
diff --git a/kernel-headers/linux/mmc/sd_misc.h b/kernel-headers/linux/mmc/sd_misc.h
new file mode 100644
index 0000000..0668273
--- /dev/null
+++ b/kernel-headers/linux/mmc/sd_misc.h
@@ -0,0 +1,201 @@
+#ifndef SD_MISC_H
+#define SD_MISC_H
+
+#ifdef __KERNEL__
+#include <linux/bitops.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/core.h>
+#include <linux/mmc/mmc.h>
+#include <linux/mmc/sd.h>
+#endif
+
+
+
+struct msdc_ioctl {
+    int opcode;
+    int host_num;
+    int iswrite;
+    int trans_type;
+    unsigned int total_size;
+    unsigned int address;
+    unsigned int *buffer;
+    int cmd_pu_driving;
+    int cmd_pd_driving;
+    int dat_pu_driving;
+    int dat_pd_driving;
+    int clk_pu_driving;
+    int clk_pd_driving;
+    int ds_pu_driving;
+    int ds_pd_driving;
+    int rst_pu_driving;
+    int rst_pd_driving;
+    int clock_freq;
+    int partition;
+    int hopping_bit;
+    int hopping_time;
+    int result;
+    int sd30_mode;
+    int sd30_max_current;
+    int sd30_drive;
+    int sd30_power_control;
+};
+
+/**************for msdc_ssc***********************/
+#define AUDPLL_CTL_REG12                   (0xF0007070)
+#define AUDPLL_CTL_REG01                   (0xF00071E0)
+#define AUDPLL_CTL_REG02                   (0xF100000C)
+
+#define AUDPLL_TSEL_MASK                   (1792)   /* MASK = 00000111 00000000 */
+#define AUDPLL_TSEL_RESULT1                (0)  /* REG = 00000000 00000000   30.5us */
+#define AUDPLL_TSEL_RESULT2                (256)    /* REG = 00000001 00000000   61.0us */
+#define AUDPLL_TSEL_RESULT3                (512)    /* REG = 00000010 00000000   122.1us */
+#define AUDPLL_TSEL_RESULT4                (768)    /* REG = 00000011 00000000   244.1us */
+#define AUDPLL_TSEL_RESULT5                (1024)   /* REG = 00000100 00000000   448.3us */
+
+#define AUDPLL_BSEL_MASK                   (7)  /* MASK = 00000000 00000111 */
+#define AUDPLL_BSEL_RESULT0                (0)  /* REG = 00000000 00000000   REG init val */
+#define AUDPLL_BSEL_RESULT1                (1)  /* REG = 00000000 00000001   2.26MHz */
+#define AUDPLL_BSEL_RESULT2                (2)  /* REG = 00000000 00000010   4.52MHz */
+#define AUDPLL_BSEL_RESULT3                (4)  /* REG = 00000000 00000100   9.04MHz */
+
+#define SET_HOP_BIT_NONE                   (0)
+#define SET_HOP_BIT1                       (1)
+#define SET_HOP_BIT2                       (2)
+#define SET_HOP_BIT3                       (3)
+
+#define SET_HOP_TIME0                      (0)
+#define SET_HOP_TIME1                      (1)
+#define SET_HOP_TIME2                      (2)
+#define SET_HOP_TIME3                      (3)
+#define SET_HOP_TIME4                      (4)
+
+
+/**************for msdc_ssc***********************/
+
+#define MSDC_DRIVING_SETTING                (0)
+#define MSDC_CLOCK_FREQUENCY                (1)
+#define MSDC_SINGLE_READ_WRITE              (2)
+#define MSDC_MULTIPLE_READ_WRITE            (3)
+#define MSDC_GET_CID                        (4)
+#define MSDC_GET_CSD                        (5)
+#define MSDC_GET_EXCSD                      (6)
+#define MSDC_ERASE_PARTITION                (7)
+#define MSDC_HOPPING_SETTING                (8)
+
+#define MSDC_REINIT_SDCARD            _IOW('r', 9, int)
+
+#define MSDC_SD30_MODE_SWITCH               (10)
+#define MSDC_GET_BOOTPART                   (11)
+#define MSDC_SET_BOOTPART                   (12)
+#define MSDC_GET_PARTSIZE                   (13)
+#define MSDC_ERASE_SELECTED_AREA            (0x20)
+#define MSDC_CARD_DUNM_FUNC                 (0xff)
+
+typedef enum {
+    USER_PARTITION = 0,
+    BOOT_PARTITION_1,
+    BOOT_PARTITION_2,
+    RPMB_PARTITION,
+    GP_PARTITION_1,
+    GP_PARTITION_2,
+    GP_PARTITION_3,
+    GP_PARTITION_4,
+} PARTITON_ACCESS_T;
+
+typedef enum {
+    SDHC_HIGHSPEED = 0, /* 0 Host supports HS mode */
+    UHS_SDR12,      /* 1 Host supports UHS SDR12 mode */
+    UHS_SDR25,      /* 2 Host supports UHS SDR25 mode */
+    UHS_SDR50,      /* 3 Host supports UHS SDR50 mode */
+    UHS_SDR104,     /* 4 Host supports UHS SDR104 mode */
+    UHS_DDR50,      /* 5 Host supports UHS DDR50 mode */
+} SD3_MODE;
+
+typedef enum {
+    DRIVER_TYPE_A = 0,  /* 0 Host supports Driver Type A */
+    DRIVER_TYPE_B,      /* 1 Host supports Driver Type B */
+    DRIVER_TYPE_C,      /* 2 Host supports Driver Type C */
+    DRIVER_TYPE_D,      /* 3 Host supports Driver Type D */
+} SD3_DRIVE;
+
+typedef enum {
+    MAX_CURRENT_200 = 0,    /* 0 Host max current limit is 200mA */
+    MAX_CURRENT_400,    /* 1 Host max current limit is 400mA */
+    MAX_CURRENT_600,    /* 2 Host max current limit is 600mA */
+    MAX_CURRENT_800,    /* 3 Host max current limit is 800mA */
+} SD3_MAX_CURRENT;
+
+typedef enum {
+    SDXC_NO_POWER_CONTROL = 0,  /* 0  Host not supports >150mA current at 3.3V /3.0V/1.8V */
+    SDXC_POWER_CONTROL, /* 1 Host supports >150mA current at 3.3V /3.0V/1.8V */
+} SD3_POWER_CONTROL;
+
+typedef enum {
+    DUMP_INTO_BOOT_CARD_IPANIC = 0,
+    DUMP_INTO_BOOT_CARD_KDUMP = 1,
+    DUMP_INTO_EXTERN_CARD = 2,
+} DUMP_STORAGE_TYPE;
+
+typedef enum {
+    EMMC_CARD_BOOT = 0,
+    SD_CARD_BOOT,
+    EMMC_CARD,
+    SD_CARD,
+} STORAGE_TPYE;
+
+#define EXT_CSD_BOOT_SIZE_MULT           (226) /* R */
+#define EXT_CSD_HC_ERASE_GRP_SIZE        (224) /* RO */
+#define EXT_CSD_HC_WP_GPR_SIZE           (221) /* RO */
+#define EXT_CSD_RPMB_SIZE_MULT           (168) /* R */
+#define EXT_CSD_GP1_SIZE_MULT            (143) /* R/W 3 bytes */
+#define EXT_CSD_GP2_SIZE_MULT            (146) /* R/W 3 bytes */
+#define EXT_CSD_GP3_SIZE_MULT            (149) /* R/W 3 bytes */
+#define EXT_CSD_GP4_SIZE_MULT            (152) /* R/W 3 bytes */
+#define EXT_CSD_PART_CFG                 (179) /* R/W/E & R/W/E_P */
+#define EXT_CSD_CACHE_FLUSH              (32)
+#define EXT_CSD_CACHE_CTRL               (33)
+#define CAPACITY_2G                      (2 * 1024 * 1024 * 1024ULL)
+
+typedef enum {
+    EMMC_BOOT_NO_EN = 0,
+    EMMC_BOOT1_EN,
+    EMMC_BOOT2_EN,
+    EMMC_BOOT_USER = 7,
+    EMMC_BOOT_END
+} BOOT_PARTITION_EN;
+
+#ifdef CONFIG_MTK_GPT_SCHEME_SUPPORT
+typedef enum {
+    EMMC_PART_UNKNOWN=0
+    ,EMMC_PART_BOOT1
+    ,EMMC_PART_BOOT2
+    ,EMMC_PART_RPMB
+    ,EMMC_PART_GP1
+    ,EMMC_PART_GP2
+    ,EMMC_PART_GP3
+    ,EMMC_PART_GP4
+    ,EMMC_PART_USER
+    ,EMMC_PART_END
+} Region;
+#endif
+
+typedef enum {
+    CARD_INFO = 0,
+    DISK_INFO,
+    EMMC_USER_CAPACITY,
+    EMMC_CAPACITY,
+    EMMC_RESERVE,
+} GET_STORAGE_INFO;
+
+struct storage_info {
+    struct mmc_card *card;
+    struct gendisk *disk;
+    unsigned long long emmc_user_capacity;
+    unsigned long long emmc_capacity;
+    int emmc_reserve;
+};
+
+int msdc_get_info(STORAGE_TPYE storage_type, GET_STORAGE_INFO info_type, struct storage_info *info);
+
+#endif              /* end of SD_MISC_H */
diff --git a/kernel-headers/linux/mmprofile.h b/kernel-headers/linux/mmprofile.h
new file mode 100644
index 0000000..866022c
--- /dev/null
+++ b/kernel-headers/linux/mmprofile.h
@@ -0,0 +1,102 @@
+#ifndef __MMPROFILE_H__
+#define __MMPROFILE_H__
+#include "mmprofile_static_event.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MMProfileEventNameMaxLen 31
+
+typedef unsigned int MMP_Event;
+
+typedef enum {
+    MMProfileFlagStart = 1,
+    MMProfileFlagEnd = 2,
+    MMProfileFlagPulse = 4,
+    MMProfileFlagEventSeparator = 8,
+    MMProfileFlagSystrace = 0x80000000,
+    MMProfileFlagMax = 0xFFFFFFFF
+} MMP_LogType;
+
+typedef enum {
+    MMProfileMetaStringMBS = 1,
+    MMProfileMetaStringWCS,
+    MMProfileMetaStructure,
+    MMProfileMetaBitmap,
+    MMProfileMetaRaw,
+    MMProfileMetaUser = 0x10000000,
+    MMProfileMetaUserM4UReg,
+    MMProfileMetaMax = 0xFFFFFFFF
+} MMP_MetaDataType;
+
+typedef enum {
+    MMProfileBitmapRGB565 = 1,
+    MMProfileBitmapRGB888,
+    MMProfileBitmapRGBA8888,
+    MMProfileBitmapBGR888,
+    MMProfileBitmapBGRA8888,
+    MMProfileBitmapMax = 0xFFFFFFFF
+} MMP_PixelFormat;
+
+typedef struct {
+    unsigned int data1;         // data1 (user defined)
+    unsigned int data2;         // data2 (user defined)
+    MMP_MetaDataType data_type;  // meta data type
+    unsigned int size;          // meta data size
+    void *pData;                 // meta data pointer
+} MMP_MetaData_t;
+
+typedef struct {
+    unsigned int data1;         // data1 (user defined)
+    unsigned int data2;         // data2 (user defined)
+    unsigned int struct_size;   // structure size (bytes)
+    void *pData;                 // structure pointer
+    char struct_name[32];        // structure name
+} MMP_MetaDataStructure_t;
+
+typedef struct {
+    unsigned int data1;         // data1 (user defined)
+    unsigned int data2;         // data2 (user defined)
+    unsigned int width;         // image width
+    unsigned int height;        // image height
+    MMP_PixelFormat format;      // image pixel format
+    unsigned int start_pos;     // start offset of image data (base on pData)
+    unsigned int bpp;           // bits per pixel
+    int pitch;         // image pitch (bytes per line)
+    unsigned int data_size;     // image data size (bytes)
+    unsigned int down_sample_x; // horizontal down sample rate (>=1)
+    unsigned int down_sample_y; // vertical down sample rate (>=1)
+    void *pData;                 // image buffer address
+} MMP_MetaDataBitmap_t;
+
+MMP_Event MMProfileRegisterEvent(MMP_Event parent, const char *name);
+MMP_Event MMProfileFindEvent(MMP_Event parent, const char *name);
+void MMProfileEnableEvent(MMP_Event event, long enable);
+void MMProfileEnableFTraceEvent(MMP_Event event, long enable, long ftrace);
+void MMProfileEnableEventRecursive(MMP_Event event, long enable);
+void MMProfileEnableFTraceEventRecursive(MMP_Event event, long enable, long ftrace);
+long MMProfileQueryEnable(MMP_Event event);
+void MMProfileLog(MMP_Event event, MMP_LogType type);
+void MMProfileLogEx(MMP_Event event, MMP_LogType type, unsigned long data1, unsigned long data2);
+long MMProfileLogMeta(MMP_Event event, MMP_LogType type, MMP_MetaData_t *pMetaData);
+long MMProfileLogMetaString(MMP_Event event, MMP_LogType type, const char *str);
+long MMProfileLogMetaStringEx(MMP_Event event, MMP_LogType type, unsigned long data1, unsigned long data2, const char *str);
+long MMProfileLogMetaStructure(MMP_Event event, MMP_LogType type, MMP_MetaDataStructure_t *pMetaData);
+long MMProfileLogMetaBitmap(MMP_Event event, MMP_LogType type, MMP_MetaDataBitmap_t *pMetaData);
+
+#define MMProfileLogStructure(event, type, pStruct, struct_type) \
+{ \
+    MMP_MetaDataStructure_t MetaData; \
+    MetaData.data1 = 0; \
+    MetaData.data2 = 0; \
+    strcpy(MetaData.struct_name, #struct_type); \
+    MetaData.struct_size = sizeof(struct_type); \
+    MetaData.pData = (void *)(pStruct); \
+    MMProfileLogMetaStructure(event, type, &MetaData); \
+}
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/kernel-headers/linux/mmprofile_internal.h b/kernel-headers/linux/mmprofile_internal.h
new file mode 100644
index 0000000..9cc6f0f
--- /dev/null
+++ b/kernel-headers/linux/mmprofile_internal.h
@@ -0,0 +1,100 @@
+#ifndef __MMPROFILE_INTERNAL_H__
+#define __MMPROFILE_INTERNAL_H__
+
+#include <linux/mmprofile.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MMProfileMaxEventCount 1000
+
+#define MMP_EVENT_STATE_ENABLED (1 << 0)
+#define MMP_EVENT_STATE_FTRACE  (1 << 1)
+
+typedef struct {
+    unsigned int parentId;
+    char name[MMProfileEventNameMaxLen + 1];
+} MMProfile_EventInfo_t;
+
+typedef struct {
+    unsigned int lock;
+    unsigned int id;
+    unsigned int timeLow;
+    unsigned int timeHigh;
+    unsigned int flag;
+#if 0 //#ifdef MMPROFILE_KERNEL_64
+    unsigned long long data1;
+    unsigned long long data2;
+    unsigned long long meta_data_cookie;
+#else
+    unsigned int data1;
+    unsigned int data2;
+    unsigned int meta_data_cookie;
+#endif
+} MMProfile_Event_t;
+
+typedef struct {
+    unsigned int enable;
+    unsigned int start;
+    unsigned int write_pointer;
+    unsigned int reg_event_index;
+    unsigned int buffer_size_record;
+    unsigned int buffer_size_bytes;
+    unsigned int record_size;
+    unsigned int meta_buffer_size;
+    unsigned int new_buffer_size_record;
+    unsigned int new_meta_buffer_size;
+    unsigned int selected_buffer;
+    unsigned int max_event_count;
+    unsigned int event_state[MMProfileMaxEventCount];
+} MMProfile_Global_t;
+
+typedef struct {
+    unsigned int cookie;
+    MMP_MetaDataType data_type;
+    unsigned int data_size;
+    unsigned int data_offset;
+} MMProfile_MetaData_t;
+
+typedef struct {
+    unsigned int id;
+    MMP_LogType type;
+    MMP_MetaData_t meta_data;
+} MMProfile_MetaLog_t;
+
+
+#define MMProfileGlobalsSize     ((sizeof(MMProfile_Global_t)+(PAGE_SIZE-1))&(~(PAGE_SIZE-1)))
+
+#define CONFIG_MMPROFILE_PATH   "/data/MMProfileConfig.dat"
+
+#define MMProfilePrimaryBuffer  1
+#define MMProfileGlobalsBuffer  2
+#define MMProfileMetaDataBuffer 3
+
+#define MMP_IOC_MAGIC 'M'
+
+#define MMP_IOC_ENABLE          _IOW(MMP_IOC_MAGIC, 1, int)
+#define MMP_IOC_START           _IOW(MMP_IOC_MAGIC, 2, int)
+#define MMP_IOC_TIME            _IOW(MMP_IOC_MAGIC, 3, int)
+#define MMP_IOC_REGEVENT        _IOWR(MMP_IOC_MAGIC, 4, int)
+#define MMP_IOC_FINDEVENT       _IOWR(MMP_IOC_MAGIC, 5, int)
+#define MMP_IOC_ENABLEEVENT     _IOW(MMP_IOC_MAGIC, 6, int)
+#define MMP_IOC_LOG             _IOW(MMP_IOC_MAGIC, 7, int)
+#define MMP_IOC_DUMPEVENTINFO   _IOR(MMP_IOC_MAGIC, 8, int)
+#define MMP_IOC_METADATALOG     _IOW(MMP_IOC_MAGIC, 9, int)
+#define MMP_IOC_DUMPMETADATA    _IOR(MMP_IOC_MAGIC, 10, int)
+#define MMP_IOC_SELECTBUFFER    _IOW(MMP_IOC_MAGIC, 11, int)
+#define MMP_IOC_TRYLOG          _IOWR(MMP_IOC_MAGIC, 12, int)
+#define MMP_IOC_ISENABLE        _IOR(MMP_IOC_MAGIC, 13, int)
+#define MMP_IOC_REMOTESTART     _IOR(MMP_IOC_MAGIC, 14, int)
+#define MMP_IOC_TEST            _IOWR(MMP_IOC_MAGIC, 100, int)
+
+// fix build warning: unused
+//static void MMProfileInitBuffer(void);
+//static void MMProfileResetBuffer(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/kernel-headers/linux/mmprofile_static_event.h b/kernel-headers/linux/mmprofile_static_event.h
new file mode 100644
index 0000000..6744bfa
--- /dev/null
+++ b/kernel-headers/linux/mmprofile_static_event.h
@@ -0,0 +1,31 @@
+#ifndef __MMPROFILE_STATIC_EVENT_H__
+#define __MMPROFILE_STATIC_EVENT_H__
+
+
+typedef enum
+{
+    MMP_InvalidEvent = 0,
+    MMP_RootEvent = 1,
+    // User defined static events begin
+    MMP_TouchPanelEvent,
+    // User defined static events end.
+    MMP_MaxStaticEvent
+} MMP_StaticEvents;
+
+#ifdef MMPROFILE_INTERNAL
+typedef struct
+{
+    MMP_StaticEvents event;
+    char*            name;
+    MMP_StaticEvents parent;
+} MMP_StaticEvent_t;
+
+static MMP_StaticEvent_t MMProfileStaticEvents[] = 
+{
+    {MMP_RootEvent,         "Root_Event",           MMP_InvalidEvent},
+    {MMP_TouchPanelEvent,   "TouchPanel_Event",     MMP_RootEvent},
+};
+
+#endif
+
+#endif
diff --git a/kernel-headers/linux/mt_sched.h b/kernel-headers/linux/mt_sched.h
new file mode 100644
index 0000000..11bf8c2
--- /dev/null
+++ b/kernel-headers/linux/mt_sched.h
@@ -0,0 +1,21 @@
+#ifndef _MTK_SCHED_H
+#define _MTK_SCHED_H
+
+#define __USE_GNU
+#include <linux/ioctl.h>
+#include <sched.h>
+#include <linux/mt_sched_ioctl.h>
+
+#ifdef __cplusplus                
+extern "C"{
+#endif
+
+int mt_sched_setaffinity(pid_t pid, size_t cpusetsize, cpu_set_t *mask);
+int mt_sched_getaffinity(pid_t pid, size_t cpusetsize, cpu_set_t *mask, cpu_set_t *mt_mask);
+int mt_sched_exitaffinity(pid_t pid);
+
+#ifdef __cplusplus
+}               
+#endif
+
+#endif
diff --git a/kernel-headers/linux/mt_sched_ioctl.h b/kernel-headers/linux/mt_sched_ioctl.h
new file mode 100644
index 0000000..580caac
--- /dev/null
+++ b/kernel-headers/linux/mt_sched_ioctl.h
@@ -0,0 +1,17 @@
+#ifndef _MT_SCHED_IOCTL_H
+#define _MT_SCHED_IOCTL_H
+
+struct ioctl_arg {
+        pid_t pid;
+        unsigned int len;
+        unsigned long *mask;
+        unsigned long *mt_mask;
+};
+
+#define IOC_MAGIC '\x66'
+
+#define IOCTL_SETAFFINITY	_IOW(IOC_MAGIC, 0, struct ioctl_arg)
+#define IOCTL_EXITAFFINITY  	_IOW(IOC_MAGIC, 1, pid_t)
+#define IOCTL_GETAFFINITY      	_IOR(IOC_MAGIC, 2, struct ioctl_arg)
+
+#endif
\ No newline at end of file
diff --git a/kernel-headers/linux/mtcombo.h b/kernel-headers/linux/mtcombo.h
new file mode 100644
index 0000000..67dd58e
--- /dev/null
+++ b/kernel-headers/linux/mtcombo.h
@@ -0,0 +1,18 @@
+#ifndef __MTCOMBO_H__
+#define __MTCOMBO_H__
+
+#include <linux/ioctl.h>
+
+typedef enum _ENUM_WMTHWVER_TYPE_T{
+    WMTHWVER_MT6620_E1 = 0x0,
+    WMTHWVER_MT6620_E2 = 0x1,
+    WMTHWVER_MT6620_E3 = 0x2,
+    WMTHWVER_MT6620_E4 = 0x3,
+    WMTHWVER_MT6620_MAX,
+    WMTHWVER_INVALID = 0xff
+} ENUM_WMTHWVER_TYPE_T, *P_ENUM_WMTHWVER_TYPE_T;
+
+#define COMBO_IOC_MAGIC 0x90
+#define COMBO_IOC_GPS_HWVER           6
+
+#endif // __MTCOMBO_H__
diff --git a/kernel-headers/linux/mtgpio.h b/kernel-headers/linux/mtgpio.h
new file mode 100644
index 0000000..050a792
--- /dev/null
+++ b/kernel-headers/linux/mtgpio.h
@@ -0,0 +1,54 @@
+/* alps/ALPS_SW/TRUNK/MAIN/alps/kernel/arch/arm/mach-mt6516/include/mach/fm.h
+ *
+ * (C) Copyright 2009 
+ * MediaTek <www.MediaTek.com>
+ * William Chung <William.Chung@MediaTek.com>
+ *
+ * MT6516 AR10x0 FM Radio Driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __MTGPIO_H__
+#define __MTGPIO_H__
+
+#include <linux/ioctl.h>
+
+#define GPIO_IOC_MAGIC 0x90
+
+#define GPIO_IOCQMODE           _IOR(GPIO_IOC_MAGIC, 0x01, uint32_t)
+#define GPIO_IOCTMODE0          _IOW(GPIO_IOC_MAGIC, 0x02, uint32_t)
+#define GPIO_IOCTMODE1          _IOW(GPIO_IOC_MAGIC, 0x03, uint32_t)
+#define GPIO_IOCTMODE2          _IOW(GPIO_IOC_MAGIC, 0x04, uint32_t)
+#define GPIO_IOCTMODE3          _IOW(GPIO_IOC_MAGIC, 0x05, uint32_t)
+#define GPIO_IOCQDIR            _IOR(GPIO_IOC_MAGIC, 0x06, uint32_t)
+#define GPIO_IOCSDIRIN          _IOW(GPIO_IOC_MAGIC, 0x07, uint32_t)
+#define GPIO_IOCSDIROUT         _IOW(GPIO_IOC_MAGIC, 0x08, uint32_t)
+#define GPIO_IOCQPULLEN         _IOR(GPIO_IOC_MAGIC, 0x09, uint32_t)
+#define GPIO_IOCSPULLENABLE     _IOW(GPIO_IOC_MAGIC, 0x0A, uint32_t)
+#define GPIO_IOCSPULLDISABLE    _IOW(GPIO_IOC_MAGIC, 0x0B, uint32_t)
+#define GPIO_IOCQPULL           _IOR(GPIO_IOC_MAGIC, 0x0C, uint32_t)
+#define GPIO_IOCSPULLDOWN       _IOW(GPIO_IOC_MAGIC, 0x0D, uint32_t)
+#define GPIO_IOCSPULLUP         _IOW(GPIO_IOC_MAGIC, 0x0E, uint32_t)
+#define GPIO_IOCQINV            _IOR(GPIO_IOC_MAGIC, 0x0F, uint32_t)
+#define GPIO_IOCSINVENABLE      _IOW(GPIO_IOC_MAGIC, 0x10, uint32_t)
+#define GPIO_IOCSINVDISABLE     _IOW(GPIO_IOC_MAGIC, 0x11, uint32_t)
+#define GPIO_IOCQDATAIN         _IOR(GPIO_IOC_MAGIC, 0x12, uint32_t)
+#define GPIO_IOCQDATAOUT        _IOR(GPIO_IOC_MAGIC, 0x13, uint32_t)
+#define GPIO_IOCSDATALOW        _IOW(GPIO_IOC_MAGIC, 0x14, uint32_t)
+#define GPIO_IOCSDATAHIGH       _IOW(GPIO_IOC_MAGIC, 0x15, uint32_t)
+
+
+#endif // __MTGPIO_H__
diff --git a/kernel-headers/linux/mtk_agps_common.h b/kernel-headers/linux/mtk_agps_common.h
new file mode 100644
index 0000000..325295a
--- /dev/null
+++ b/kernel-headers/linux/mtk_agps_common.h
@@ -0,0 +1,157 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ *   mtk_agps_common.h
+ *
+ * Project:
+ * --------
+ *   DUMA
+ *
+ * Description:
+ * ------------
+ *   Data types used by MTK AGPS
+ *
+ * Author:
+ * -------
+ *  Chunhui Li(MTK80143)
+ *
+ *============================================================================
+ *             HISTORY
+ * Below this line, this part is controlled by CC/CQ. DO NOT MODIFY!!
+ *------------------------------------------------------------------------------
+ * $Revision:$
+ * $Modtime:$
+ * $Log:$
+ *
+ * 12 05 2012 archilis.wang
+ * [ALPS00393352] Please help analzye the root cause of  failed item of ASSET
+ * Review: http://mtksap20:8080/go?page=NewReview&reviewid=49629
+ *
+ * 04 24 2011 nina.hsu
+ * [ALPS00043332] [MT6573][AGPS]  Add GPS_MNL_PROCESS_STATUS definition
+ * [MT6573][AGPS]
+ *      Add GPS_MNL_PROCESS_STATUS definition for reporting GPS status
+ *    .
+ *
+ * 08 20 2010 qiuhuan.zhao
+ * [ALPS00123522] [GPS] Android 2.2 porting
+ * Android 2.2 Gps driver porting.
+ *
+ *------------------------------------------------------------------------------
+ * Upper this line, this part is controlled by CC/CQ. DO NOT MODIFY!!
+ *============================================================================
+ ****************************************************************************/
+
+#ifndef MTK_AGPS_COMMON_H
+#define MTK_AGPS_COMMON_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if ( defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 200000 ))
+#else
+#pragma pack(1)
+#endif
+
+//AGPS socket port
+#define MTK_MNL2SUPL      "/data/agps_supl/mnl2supl"
+#define MTK_PROFILE2MNL   "/data/agps_supl/profile2mnl"
+
+//System_property for SUPL_Enable, SUPL_SI_Enable
+#define GPS_MNL_SUPL_NAME "gps.supl.status"
+#define GPS_MNL_PROCESS_STATUS "gps.mnl_process.status"
+
+// AGPS Module Enum
+typedef enum
+{
+  MTK_MOD_GPS = 0,
+  MTK_MOD_SUPL,
+  MTK_MOD_WIFI,
+  MTK_MOD_CELLID,
+  MTK_MOD_CNT,
+} MTK_AGPS_MOD_E;
+
+// AGPS Msg type
+typedef enum
+{
+  MTK_AGPS_SUPL_ASSIST_REQ= 0,
+  MTK_AGPS_SUPL_NI_REQ,
+  MTK_AGPS_SUPL_PMTK_DATA,
+  MTK_AGPS_SUPL_END,
+  MTK_AGPS_SUPL_MNL_STATUS,
+  MTK_AGPS_SUPL_GPEVT,
+  MTK_AGPS_SUPL_CNT,
+  MTK_AGPS_AIDING_CELLINFO,
+  MTK_AGPS_AIDING_WIFIIFNO,
+  MTK_AGPS_SUPL_RAW_DBG,
+} MTK_AGPS_SUPL_MSG_T;
+
+// GPEVT msg data enum
+typedef enum
+{
+  GPEVT_TYPE_UNKNOWN = 0,                      //  0
+  GPEVT_SUPL_SLP_CONNECT_BEGIN,                //  1
+  GPEVT_SUPL_SLP_CONNECTED,                    //  2
+  GPEVT_SUPL_SSL_CONNECT_BEGIN,                //  3
+  GPEVT_SUPL_SSL_CONNECTED,                    //  4
+  GPEVT_SUPL_ASSIST_DATA_RECEIVED,             //  5
+  GPEVT_SUPL_ASSIST_DATA_VALID,                //  6
+  GPEVT_SUPL_FIRST_POS_FIX,                    //  7
+  GPEVT_SUPL_MEAS_TIME_OUT,                    //  8
+  GPEVT_SUPL_MEAS_RESPONSE_SENT,               //  9
+  GPEVT_SUPL_SSL_CLOSED,                       // 10
+  GPEVT_SUPL_SLP_DISCONNECTED,                 // 11
+
+  GPEVT_CP_MOLR_SENT,                          // 12
+  GPEVT_CP_MTLR_RECEIVED,                      // 13
+  GPEVT_CP_ASSIST_DATA_RECEIVED,               // 14
+  GPEVT_CP_ASSIST_DATA_VALID,                  // 15
+  GPEVT_CP_FIRST_POS_FIX,                      // 16
+  GPEVT_CP_MEAS_TIME_OUT,                      // 17
+  GPEVT_CP_MEAS_RESPONSE_SENT,                 // 18
+
+  GPEVT_GNSS_HW_START,                         // 19
+  GPEVT_GNSS_HW_STOP,                          // 20
+  GPEVT_GNSS_RESET_STORED_SATELLITE_DATA,      // 21
+
+  GPEVT_EPO_SERVER_CONNECT_BEGIN,              // 22
+  GPEVT_EPO_SERVER_CONNECTED,                  // 23
+  GPEVT_EPO_DATA_RECEIVED,                     // 24
+  GPEVT_EPO_SERVER_DISCONNECTED,               // 25
+  GPEVT_EPO_DATA_VALID,                        // 26
+
+  GPEVT_HOT_STILL_DATA_VALID,                  // 27
+
+  GPEVT_TYPE_MAX                               // 28
+}gpevt_type;
+
+// AGPS data struct
+typedef struct
+{
+    unsigned char srcMod;
+    unsigned char dstMod;
+    unsigned short type;
+    unsigned short length;
+    char data[1];
+} mtk_agps_msg, *pmtk_agps_msg,  MTK_AGPS_MSG_T, *PMTK_AGPS_MSG_T;
+
+#define MAX_AGPS_MAX_MESSAGES             72
+#define MTK_AGPS_PMTK_MAX_SIZE            (256+sizeof(mtk_agps_msg))
+#define MTK_AGPS_PMTK_MAX_LEN             (256+sizeof(mtk_agps_msg))
+#define MTK_AGPS_PMTK_HDR_LEN            sizeof(MTK_AGPS_MSG_T)
+#define MTK_AGPS_MSG_MAX_LEN             (MTK_AGPS_PMTK_MAX_LEN + MTK_AGPS_PMTK_HDR_LEN)
+
+#define MTK_AGPS_SUPLMSG_TIMEOUT          6000
+
+#if ( defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 200000 ))
+#else
+#pragma pack()
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* MTK_AGPS_COMMON_H */
diff --git a/kernel-headers/linux/mtk_ion.h b/kernel-headers/linux/mtk_ion.h
new file mode 100644
index 0000000..514701e
--- /dev/null
+++ b/kernel-headers/linux/mtk_ion.h
@@ -0,0 +1,28 @@
+/*
+* Copyright (C) 2011-2014 MediaTek Inc.
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*      http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*/
+
+#ifndef _MTK_LINUX_ION_H
+#define _MTK_LINUX_ION_H
+enum mtk_ion_heap_type {
+	ION_HEAP_TYPE_MULTIMEDIA = 10,
+ 	ION_HEAP_TYPE_FB = 11,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
+#define ION_HEAP_MULTIMEDIA_MASK (1 << ION_HEAP_TYPE_MULTIMEDIA)
+#define ION_HEAP_FB_MASK (1 << ION_HEAP_TYPE_FB)
+#define ION_NUM_HEAP_IDS sizeof(unsigned int) * 8
+#endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
diff --git a/kernel-headers/linux/mtkfb.h b/kernel-headers/linux/mtkfb.h
new file mode 100644
index 0000000..bbd85ed
--- /dev/null
+++ b/kernel-headers/linux/mtkfb.h
@@ -0,0 +1,389 @@
+#ifndef __MTKFB_H
+#define __MTKFB_H
+
+#include "mtkfb_info.h"
+
+
+/**NOTICE:
+ * Must be consistent with bionic/libc/kernel/linux/common/mtkfb.h
+ */
+#define MTK_FB_NO_ION_FD                 ((int)(~0U>>1))
+#define MTK_FB_NO_USE_LAEYR_ID			 ((int)(~0U>>1))
+#define FBCAPS_GENERIC_MASK              (0x00000fff)
+#define FBCAPS_LCDC_MASK                 (0x00fff000)
+#define FBCAPS_PANEL_MASK                (0xff000000)
+#define FBCAPS_MANUAL_UPDATE             (0x00001000)
+#define FBCAPS_SET_BACKLIGHT             (0x01000000)
+#define MTKFB_ERROR_IS_EARLY_SUSPEND     (0x12000000)
+//---------------------------------------------------------------------------
+/* IOCTL commands. */
+#define MTK_IOW(num, dtype)     _IOW('O', num, dtype)
+#define MTK_IOR(num, dtype)     _IOR('O', num, dtype)
+#define MTK_IOWR(num, dtype)    _IOWR('O', num, dtype)
+#define MTK_IO(num)             _IO('O', num)
+
+#define MTKFB_QUEUE_OVERLAY_CONFIG			   MTK_IOW(137, struct fb_overlay_config)
+// --------------------------------------------------------------------------
+#define MTKFB_SET_OVERLAY_LAYER                MTK_IOW(0, struct fb_overlay_layer)
+#define MTKFB_TRIG_OVERLAY_OUT                 MTK_IO(1)
+#define MTKFB_SET_VIDEO_LAYERS                 MTK_IOW(2, struct fb_overlay_layer)
+#define MTKFB_CAPTURE_FRAMEBUFFER              MTK_IOW(3, unsigned long)
+#define MTKFB_CONFIG_IMMEDIATE_UPDATE          MTK_IOW(4, unsigned long)
+#define MTKFB_SET_MULTIPLE_LAYERS              MTK_IOW(5, struct fb_overlay_layer)
+#define MTKFB_REGISTER_OVERLAYBUFFER           MTK_IOW(6, struct fb_overlay_buffer_info)
+#define MTKFB_UNREGISTER_OVERLAYBUFFER         MTK_IOW(7, unsigned int)
+#define MTKFB_SET_ORIENTATION                  MTK_IOW(8, unsigned long)
+#define MTKFB_FBLAYER_ENABLE                   MTK_IOW(9,unsigned int)
+#define MTKFB_LOCK_FRONT_BUFFER                MTK_IO(10)
+#define MTKFB_UNLOCK_FRONT_BUFFER              MTK_IO(11)
+#define MTKFB_POWERON				           MTK_IO(12)
+#define MTKFB_POWEROFF				           MTK_IO(13)
+
+// Fence/Ion, OVL decoupling
+#define MTKFB_PREPARE_OVERLAY_BUFFER           MTK_IOW(14, struct fb_overlay_buffer)
+
+// S3D control
+#define MTKFB_SET_COMPOSING3D                  MTK_IOW(15, unsigned long)
+#define MTKFB_SET_S3D_FTM		               MTK_IOW(16, unsigned long)
+
+//FM De-sense for EM and Normal mode
+#define MTKFB_GET_DEFAULT_UPDATESPEED          MTK_IOR(17, unsigned long)
+#define MTKFB_GET_CURR_UPDATESPEED             MTK_IOR(18, unsigned long)
+#define MTKFB_CHANGE_UPDATESPEED               MTK_IOW(19, unsigned long)   //for EM, not called change writecycle because DPI change pll ckl
+#define MTKFB_GET_INTERFACE_TYPE               MTK_IOR(20, unsigned long)  ///0 DBI, 1 DPI, 2 MIPI
+#define MTKFB_GET_POWERSTATE		           MTK_IOR(21, unsigned long)  ///0: power off  1: power on
+#define MTKFB_GET_DISPLAY_IF_INFORMATION       MTK_IOR(22, mtk_dispif_info_t)
+#define MTKFB_AEE_LAYER_EXIST                  MTK_IOR(23, unsigned long)	//called before SET_OVERLAY each time, if true, hwc will not use FB_LAYER again
+#define MTKFB_GET_OVERLAY_LAYER_INFO           MTK_IOR(24, struct fb_overlay_layer_info)
+#define MTKFB_FACTORY_AUTO_TEST                MTK_IOR(25, unsigned long)
+#define MTKFB_GET_FRAMEBUFFER_MVA              MTK_IOR(26, unsigned int)
+#define MTKFB_SLT_AUTO_CAPTURE                 MTK_IOWR(27, struct fb_slt_catpure)
+
+/* Wearable */
+#define MTKFB_LCM_ALWAYS_ON_ENABLE             MTK_IOW(80, unsigned int)
+#define MTKFB_SET_DISPLAY_POWER_MODE           MTK_IOW(81, unsigned int)
+
+//error handling
+#define MTKFB_META_RESTORE_SCREEN              MTK_IOW(101, unsigned long)
+#define MTKFB_ERROR_INDEX_UPDATE_TIMEOUT       MTK_IO(103)
+#define MTKFB_ERROR_INDEX_UPDATE_TIMEOUT_AEE   MTK_IO(104)
+
+/*restore bootlogo and charater in meta mode*/
+#define MTKFB_META_SHOW_BOOTLOGO               MTK_IO(105)
+
+//Extension FB active option
+#define FB_ACTIVATE_NO_UPDATE  512       /* Skip frame update */
+
+//----------------------------------------------------------------------
+
+// --------------------------------------------------------------------------
+/**
+ * Just for mt6589 Platform
+ * @{
+ */
+#define MTKFB_GETVFRAMEPHYSICAL                MTK_IOW(41, unsigned long)
+#define MTKFB_WAIT_OVERLAY_READY               MTK_IO(42)
+#define MTKFB_GET_OVERLAY_LAYER_COUNT          MTK_IOR(43, unsigned long)
+#define MTKFB_GET_VIDEOLAYER_SIZE              MTK_IOR(44, struct fb_overlay_layer)
+#define MTKFB_CAPTURE_VIDEOBUFFER              MTK_IOW(45, unsigned long)
+
+// --------------------------------------------------------------------------
+// Video Playback Mode
+#define MTKFB_TV_POST_VIDEO_BUFFER             MTK_IOW(46, unsigned long)
+#define MTKFB_TV_LEAVE_VIDEO_PLAYBACK_MODE     MTK_IOW(47, unsigned long)
+// For Factory Mode
+#define MTKFB_IS_TV_CABLE_PLUG_IN              MTK_IOW(48, unsigned long)
+
+// --------------------------------------------------------------------------
+#define MTKFB_BOOTANIMATION			           MTK_IO(49)
+#define MTKFB_GETFPS			               MTK_IOW(50, unsigned long)
+#define MTKFB_VSYNC                            MTK_IO(51)
+
+//----------------------------------------------------------------------FM De-sense for EM and Normal mode
+#define MTKFB_FM_NOTIFY_FREQ                   MTK_IOW(52, unsigned long)  //for Normal mode
+#define MTKFB_RESET_UPDATESPEED                MTK_IO(53)
+#define MTKFB_SET_UI_LAYER_ALPHA               MTK_IOW(54, unsigned long)
+#define MTKFB_SET_UI_LAYER_SRCKEY              MTK_IOW(55, unsigned long)
+
+#define MTKFB_GET_MAX_DISPLAY_COUNT		       MTK_IOR(56, unsigned int)
+#define MTKFB_SET_FB_LAYER_SECURE              MTK_IOW(57, int)
+/**
+ * @}
+ */
+//----------------------------------------------------------------------
+
+// --------------------------------------------------------------------------
+
+typedef enum
+{
+    MTK_FB_ORIENTATION_0   = 0,
+    MTK_FB_ORIENTATION_90  = 1,
+    MTK_FB_ORIENTATION_180 = 2,
+    MTK_FB_ORIENTATION_270 = 3,
+} MTK_FB_ORIENTATION;
+
+
+typedef enum
+{
+    MTK_FB_TV_SYSTEM_NTSC = 0,
+    MTK_FB_TV_SYSTEM_PAL  = 1,
+} MTK_FB_TV_SYSTEM;
+
+
+typedef enum
+{
+    MTK_FB_TV_FMT_RGB565     = 0,
+    MTK_FB_TV_FMT_YUV420_SEQ = 1,
+    MTK_FB_TV_FMT_UYUV422 =    2,
+    MTK_FB_TV_FMT_YUV420_BLK = 3,
+} MTK_FB_TV_SRC_FORMAT;
+
+typedef enum
+{
+    LAYER_NORMAL_BUFFER    = 0,
+    LAYER_SECURE_BUFFER    = 1,
+    LAYER_PROTECTED_BUFFER = 2,
+    LAYER_SECURE_BUFFER_WITH_ALIGN = 0x10001, // the higher 16 bits =1 for adding 64 bytes alignment
+} MTK_FB_OVL_LAYER_SECURE_MODE;
+
+typedef struct _disp_dfo_item
+{
+	char name[32];
+	int  value;
+} disp_dfo_item_t;
+
+// --------------------------------------------------------------------------
+struct fb_slt_catpure
+{
+    MTK_FB_FORMAT format;
+	volatile char* outputBuffer;
+	unsigned int wdma_width;
+	unsigned int wdma_height;
+};
+
+struct fb_scale
+{
+    unsigned int xscale, yscale;
+};
+
+struct fb_frame_offset
+{
+    unsigned int idx;
+    unsigned long offset;
+};
+
+struct fb_update_window
+{
+    unsigned int x, y;
+    unsigned int width, height;
+};
+
+typedef enum
+{
+	LAYER_2D 			= 0,
+	LAYER_3D_SBS_0 		= 0x1,
+	LAYER_3D_SBS_90 	= 0x2,
+	LAYER_3D_SBS_180 	= 0x3,
+	LAYER_3D_SBS_270 	= 0x4,
+	LAYER_3D_TAB_0 		= 0x10,
+	LAYER_3D_TAB_90 	= 0x20,
+	LAYER_3D_TAB_180 	= 0x30,
+	LAYER_3D_TAB_270 	= 0x40,
+} MTK_FB_LAYER_TYPE;
+
+typedef enum
+{
+	DISP_DIRECT_LINK_MODE,
+	DISP_DECOUPLE_MODE
+} MTK_DISP_MODE;
+
+struct fb_overlay_mode
+{
+	MTK_DISP_MODE mode;
+};
+
+typedef enum                // map sessions to scenairos in kernel driver
+{
+	DISP_SESSION_LCM        = 1<<0,   // DSI0
+	DISP_SESSION_MEM        = 1<<1,		// OVL0->WDMA0
+  DISP_SESSION_WFD          = 1<<2,   // Extention mode, Dst buf is provided by user, for Wifi Display or other purpose
+	DISP_SESSION_MHL        = 1<<3,   // DPI
+	DISP_SESSION_LCM1       = 1<<4,   // DSI1
+  DISP_SESSION_MEM1         = 1<<5,   // OVL1->WDMA1
+	//TODO:can be extended with other Session Id
+	SESSION_MASK	        = 0xff&~(1<<6)
+} MTK_DISP_SESSION;
+
+struct fb_overlay_session
+{
+	unsigned int  session; // one or more @MTK_DISP_SESSION combined
+};
+
+struct fb_overlay_decouple
+{
+	MTK_DISP_MODE mode;
+	unsigned int session;
+};
+
+struct fb_overlay_buffer
+{
+	//	Input
+	int layer_id;
+	unsigned int layer_en;
+	int ion_fd;
+	unsigned int cache_sync;
+    // Output
+	unsigned int index;
+    int fence_fd;
+};
+
+struct fb_overlay_layer
+{
+    unsigned int layer_id;
+    unsigned int layer_enable;
+
+    void* src_base_addr;
+    void* src_phy_addr;
+    unsigned int  src_direct_link;
+    MTK_FB_FORMAT src_fmt;
+    unsigned int  src_use_color_key;
+    unsigned int  src_color_key;
+    unsigned int  src_pitch;
+    unsigned int  src_offset_x, src_offset_y;
+    unsigned int  src_width, src_height;
+
+    unsigned int  tgt_offset_x, tgt_offset_y;
+    unsigned int  tgt_width, tgt_height;
+    MTK_FB_ORIENTATION layer_rotation;
+    MTK_FB_LAYER_TYPE	layer_type;
+    MTK_FB_ORIENTATION video_rotation;
+
+    unsigned int isTdshp;  // set to 1, will go through tdshp first, then layer blending, then to color
+
+    int next_buff_idx;
+    int identity;
+    int connected_type;
+	unsigned int security;
+	unsigned int alpha_enable;
+	unsigned int alpha;
+	int fence_fd;
+    int ion_fd; //CL 2340210
+};
+
+struct fb_overlay_config
+{
+	int fence;
+	int time;
+	struct fb_overlay_layer layers[4];
+};
+
+struct fb_overlay_buffer_info
+{
+    unsigned int src_vir_addr;
+    unsigned int size;
+};
+
+struct fb_overlay_layer_info
+{
+    unsigned int layer_id;
+    unsigned int layer_enabled;  // TO BE DEL
+    unsigned int curr_en;
+    unsigned int next_en;
+    unsigned int hw_en;
+    int curr_idx;
+    int next_idx;
+    int hw_idx;
+    int curr_identity;
+    int next_identity;
+    int hw_identity;
+    int curr_conn_type;
+    int next_conn_type;
+    int hw_conn_type;
+	MTK_FB_ORIENTATION layer_rotation;
+};
+// --------------------------------------------------------------------------
+
+struct fb_post_video_buffer
+{
+    void*                phy_addr;
+    void*                vir_addr;
+    MTK_FB_TV_SRC_FORMAT format;
+    unsigned int         width, height;
+};
+
+#ifdef __KERNEL__
+
+#include <linux/completion.h>
+#include <linux/interrupt.h>
+#include <linux/workqueue.h>
+
+#include <linux/version.h>
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))
+#include <linux/sw_sync.h>
+#else
+#include <../drivers/staging/android/sw_sync.h>
+#endif
+
+
+#define MTKFB_DRIVER "mtkfb"
+
+enum mtkfb_state
+{
+	MTKFB_DISABLED  = 0,
+	MTKFB_SUSPENDED = 99,
+	MTKFB_ACTIVE    = 100
+};
+
+typedef enum
+{
+	MTKFB_LAYER_ENABLE_DIRTY = (1 << 0),
+	MTKFB_LAYER_FORMAT_DIRTY = (1 << 1),
+	MTKFB_LAYER_SET_DIRTY    = (1 << 2),
+} MTKFB_LAYER_CONFIG_DIRTY;
+
+typedef struct
+{
+	struct work_struct work;
+	struct list_head list;
+	struct fb_overlay_config config;
+	struct sync_fence *fences[4];
+	struct ion_handle *ion_handles[4];
+	void *dev;
+} update_ovls_work_t;
+
+struct mtkfb_device
+{
+    int             state;
+    void           *fb_va_base;             /* MPU virtual address */
+    dma_addr_t      fb_pa_base;             /* Bus physical address */
+    unsigned long   fb_size_in_byte;
+    void           *ovl_va_base;             /* MPU virtual address */
+    dma_addr_t      ovl_pa_base;             /* Bus physical address */
+    unsigned long   ovl_size_in_byte;
+
+    unsigned long   layer_enable;
+    MTK_FB_FORMAT   *layer_format;
+    unsigned int    layer_config_dirty;
+
+    int             xscale, yscale, mirror; /* transformations.
+                                               rotate is stored in fb_info->var */
+    u32             pseudo_palette[17];
+
+	struct fb_info *fb_info;	/* Linux fbdev framework data */
+	struct device *dev;
+
+	/* Android native fence support */
+	struct workqueue_struct *update_ovls_wq;
+	struct mutex timeline_lock;
+	struct sw_sync_timeline *timeline;
+	int timeline_max;
+	struct list_head pending_configs; //CL2340210
+	struct ion_client *ion_client;
+};
+
+#endif /* __KERNEL__ */
+
+extern long hdmi_handle_cmd(unsigned int cmd, unsigned long arg);
+
+
+#endif				/* __MTKFB_H */
diff --git a/kernel-headers/linux/mtkfb_info.h b/kernel-headers/linux/mtkfb_info.h
new file mode 100644
index 0000000..574c6fc
--- /dev/null
+++ b/kernel-headers/linux/mtkfb_info.h
@@ -0,0 +1,90 @@
+#ifndef __MTKFB_INFO_H__
+#define __MTKFB_INFO_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+typedef enum
+{
+    DISPIF_TYPE_DBI = 0,
+    DISPIF_TYPE_DPI,
+    DISPIF_TYPE_DSI,
+    DISPIF_TYPE_DPI0,
+    DISPIF_TYPE_DPI1,
+    DISPIF_TYPE_DSI0,
+    DISPIF_TYPE_DSI1,
+    HDMI = 7,
+    HDMI_SMARTBOOK, 
+    MHL,
+    DISPIF_TYPE_EPD
+} MTKFB_DISPIF_TYPE;
+
+typedef enum
+{
+    MTKFB_DISPIF_PRIMARY_LCD = 0,
+    MTKFB_DISPIF_HDMI,
+    MTKFB_DISPIF_EPD,
+    MTKFB_MAX_DISPLAY_COUNT
+} MTKFB_DISPIF_DEVICE_TYPE;
+
+typedef enum
+{
+    DISPIF_FORMAT_RGB565 = 0,
+    DISPIF_FORMAT_RGB666,
+    DISPIF_FORMAT_RGB888 
+} MTKFB_DISPIF_FORMAT;
+
+
+typedef enum
+{
+    DISPIF_MODE_VIDEO = 0,
+    DISPIF_MODE_COMMAND
+} MTKFB_DISPIF_MODE;
+
+typedef struct mtk_dispif_info {
+	unsigned int display_id;
+	unsigned int isHwVsyncAvailable;
+	MTKFB_DISPIF_TYPE displayType;
+	unsigned int displayWidth;
+	unsigned int displayHeight;
+	unsigned int displayFormat;
+	MTKFB_DISPIF_MODE displayMode;
+	unsigned int vsyncFPS;
+	unsigned int physicalWidth;
+	unsigned int physicalHeight;
+	unsigned int isConnected;
+	unsigned int lcmOriginalWidth;	// this value is for DFO Multi-Resolution feature, which stores the original LCM Wdith
+	unsigned int lcmOriginalHeight;	// this value is for DFO Multi-Resolution feature, which stores the original LCM Height
+} mtk_dispif_info_t;
+
+#define MAKE_MTK_FB_FORMAT_ID(id, bpp)  (((id) << 8) | (bpp))
+
+typedef enum
+{
+    MTK_FB_FORMAT_UNKNOWN = 0,
+        
+    MTK_FB_FORMAT_RGB565   = MAKE_MTK_FB_FORMAT_ID(1, 2),
+    MTK_FB_FORMAT_RGB888   = MAKE_MTK_FB_FORMAT_ID(2, 3),
+    MTK_FB_FORMAT_BGR888   = MAKE_MTK_FB_FORMAT_ID(3, 3),
+    MTK_FB_FORMAT_ARGB8888 = MAKE_MTK_FB_FORMAT_ID(4, 4),
+    MTK_FB_FORMAT_ABGR8888 = MAKE_MTK_FB_FORMAT_ID(5, 4),
+    MTK_FB_FORMAT_YUV422   = MAKE_MTK_FB_FORMAT_ID(6, 2),
+    MTK_FB_FORMAT_XRGB8888 = MAKE_MTK_FB_FORMAT_ID(7, 4),
+    MTK_FB_FORMAT_XBGR8888 = MAKE_MTK_FB_FORMAT_ID(8, 4),
+    MTK_FB_FORMAT_UYVY     = MAKE_MTK_FB_FORMAT_ID(9, 2),
+    MTK_FB_FORMAT_YUV420_P = MAKE_MTK_FB_FORMAT_ID(10, 2),
+    MTK_FB_FORMAT_YUY2	= MAKE_MTK_FB_FORMAT_ID(11, 2),
+    MTK_FB_FORMAT_BPP_MASK = 0xFF,
+} MTK_FB_FORMAT;
+
+#define GET_MTK_FB_FORMAT_BPP(f)    ((f) & MTK_FB_FORMAT_BPP_MASK)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __DISP_DRV_H__
+
diff --git a/kernel-headers/linux/mtkfb_vsync.h b/kernel-headers/linux/mtkfb_vsync.h
new file mode 100644
index 0000000..f0802da
--- /dev/null
+++ b/kernel-headers/linux/mtkfb_vsync.h
@@ -0,0 +1,17 @@
+#ifndef __MTKFB_VSYNC_H__
+#define __MTKFB_VSYNC_H__
+
+
+#define MTKFB_VSYNC_DEVNAME "mtkfb_vsync"
+
+#define MTKFB_VSYNC_IOCTL_MAGIC      'V'
+
+typedef enum
+{
+    MTKFB_VSYNC_SOURCE_LCM = 0,
+    MTKFB_VSYNC_SOURCE_HDMI = 1,
+} vsync_src;
+
+#define MTKFB_VSYNC_IOCTL     _IOW(MTKFB_VSYNC_IOCTL_MAGIC, 1, vsync_src)
+
+#endif //MTKFB_VSYNC_H
diff --git a/kernel-headers/linux/rrc_drv.h b/kernel-headers/linux/rrc_drv.h
new file mode 100644
index 0000000..3b7ff83
--- /dev/null
+++ b/kernel-headers/linux/rrc_drv.h
@@ -0,0 +1,74 @@
+#include <linux/ioctl.h>
+
+#ifndef __RRC_DRV_H__
+#define __RRC_DRV_H__
+
+
+
+typedef struct {
+
+	unsigned int scenario;
+	unsigned int enable;
+	/* unsigned int pid;           */
+	/* unsigned int *maxSafeSize;  */
+	/* unsigned int *result;       */
+
+} RRC_DRV_DATA;
+
+
+typedef enum {
+
+	RRC_DRV_TYPE_NONE                      = 0,
+	RRC_DRV_TYPE_CAMERA_PREVIEW            ,
+	RRC_DRV_TYPE_CAMERA_ZSD                ,
+	RRC_DRV_TYPE_CAMERA_CAPTURE            ,
+	RRC_DRV_TYPE_CAMERA_ICFP               ,
+	RRC_DRV_TYPE_VIDEO_NORMAL              ,
+	RRC_DRV_TYPE_VIDEO_SWDEC_PLAYBACK      ,
+	RRC_DRV_TYPE_VIDEO_PLAYBACK            ,
+	RRC_DRV_TYPE_VIDEO_TELEPHONY           ,
+	RRC_DRV_TYPE_VIDEO_RECORD              ,
+	RRC_DRV_TYPE_VIDEO_RECORD_CAMERA       ,
+	RRC_DRV_TYPE_VIDEO_RECORD_SLOWMOTION   ,
+	RRC_DRV_TYPE_VIDEO_SNAPSHOT            ,
+	RRC_DRV_TYPE_VIDEO_LIVE_PHOTO          ,
+	RRC_DRV_TYPE_VIDEO_WIFI_DISPLAY        ,
+
+	/* touch event */
+	RRC_DRV_TYPE_TOUCH_EVENT               ,
+
+	RRC_DRV_TYPE_MAX_SIZE
+
+
+} RRC_DRV_SCENARIO_TYPE;
+
+
+typedef enum {
+	RRC_DRV_NONE = 0,
+	RRC_DRV_60Hz ,
+	RRC_DRV_120Hz
+
+
+} RRC_DRV_REFRESH_RATE;
+
+
+
+
+#define RRC_IOCTL_MAGIC        'x'
+
+/* #define JPEG_DEC_IOCTL_INIT     _IO  (ALMK_IOCTL_MAGIC, 1)                    */
+/* #define JPEG_DEC_IOCTL_CONFIG   _IOW (ALMK_IOCTL_MAGIC, 2, JPEG_DEC_DRV_IN)   */
+/* #define JPEG_DEC_IOCTL_START    _IO  (ALMK_IOCTL_MAGIC, 3)                    */
+/* #define JPEG_DEC_IOCTL_WAIT     _IOWR(ALMK_IOCTL_MAGIC, 6, JPEG_DEC_DRV_OUT)  */
+/* #define JPEG_DEC_IOCTL_DEINIT   _IO  (ALMK_IOCTL_MAGIC, 8)                    */
+
+#define RRC_IOCTL_CMD_INIT          _IO(RRC_IOCTL_MAGIC, 11)
+#define RRC_IOCTL_CMD_SET_SCENARIO_TYPE  _IOWR(RRC_IOCTL_MAGIC, 12, RRC_DRV_DATA)
+#define RRC_IOCTL_CMD_DEINIT        _IO(RRC_IOCTL_MAGIC, 13)
+
+
+
+
+
+#endif
+
diff --git a/kernel-headers/linux/rtpm_prio.h b/kernel-headers/linux/rtpm_prio.h
new file mode 100644
index 0000000..70aa10e
--- /dev/null
+++ b/kernel-headers/linux/rtpm_prio.h
@@ -0,0 +1,83 @@
+#ifndef __KERNEL_RTPM_PRIO__
+#define __KERNEL_RTPM_PRIO__
+
+#define CONFIG_MT_RT_MONITOR
+#ifdef CONFIG_MT_RT_MONITOR
+#define MT_ALLOW_RT_PRIO_BIT 0x10000000
+#else
+#define MT_ALLOW_RT_PRIO_BIT 0x0
+#endif
+
+#define REG_RT_PRIO(x) ((x) | MT_ALLOW_RT_PRIO_BIT)
+
+/***********************************************************************
+ * Processes scheduled under one of the real-time policies (SCHED_FIFO, SCHED_RR)
+ * have a sched_priority value in the range:
+ * 1 (low) to 99 (high).
+************************************************************************/
+////////////////////////////////////////////////////////////////////////
+//DEFINE MM GROUP PRIORITY
+#define RTPM_PRIO_MM_GROUP_BASE			(10)
+#define RTPM_PRIO_MM_GROUP_A			(RTPM_PRIO_MM_GROUP_BASE+0)
+#define RTPM_PRIO_MM_GROUP_B			(RTPM_PRIO_MM_GROUP_BASE+10)
+#define RTPM_PRIO_MM_GROUP_C			(RTPM_PRIO_MM_GROUP_BASE+20)
+#define RTPM_PRIO_MM_GROUP_D			(RTPM_PRIO_MM_GROUP_BASE+30)
+#define RTPM_PRIO_MM_GROUP_E			(RTPM_PRIO_MM_GROUP_BASE+40)
+#define RTPM_PRIO_MM_GROUP_F			(RTPM_PRIO_MM_GROUP_BASE+50)
+#define RTPM_PRIO_MM_GROUP_G			(RTPM_PRIO_MM_GROUP_BASE+60)
+#define RTPM_PRIO_MM_GROUP_H			(RTPM_PRIO_MM_GROUP_BASE+70)
+#define RTPM_PRIO_MM_GROUP_I			(RTPM_PRIO_MM_GROUP_BASE+80)
+
+////////////////////////////////////////////////////////////////////////
+// DEFIN MTK RT PRIORITY 
+
+#define RTPM_PRIO_CPU_CALLBACK              REG_RT_PRIO(98)
+#define RTPM_PRIO_SWLOCKUP                  REG_RT_PRIO(98)
+#define RTPM_PRIO_AED                       REG_RT_PRIO(28)
+#define RTPM_PRIO_WDT                       REG_RT_PRIO(99)
+
+#define RTPM_PRIO_TPD                       REG_RT_PRIO(4)
+#define RTPM_PRIO_KSDIOIRQ                  REG_RT_PRIO(1)
+
+#define RTPM_PRIO_AUDIO_PLAYBACK            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+5)
+#define RTPM_PRIO_VIDEO_PLAYBACK_THREAD     REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+5) //TimeEventQueue
+#define RTPM_PRIO_SCRN_UPDATE               REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+4)
+#define RTPM_PRIO_AUDIO_COMMAND             REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+2)
+#define RTPM_PRIO_AUDIO_CCCI_THREAD         REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+2)
+
+#define RTPM_PRIO_CAMERA_TOPBASE            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+1)
+#define RTPM_PRIO_CAMERA_PREVIEW            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+1)
+#define RTPM_PRIO_CAMERA_COMPRESS           REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+0)
+
+#define RTPM_PRIO_MATV_AUDIOPLAYER          REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+0)
+#define RTPM_PRIO_FM_AUDIOPLAYER            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+0)
+#define RTPM_PRIO_AUDIO_I2S                 REG_RT_PRIO(RTPM_PRIO_MM_GROUP_I+0)
+
+#define RTPM_PRIO_CAMERA_DISPLAY            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_H+9)
+#define RTPM_PRIO_CAMERA_SHUTTER            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_H+9)
+#define RTPM_PRIO_CAMERA_RECORD             REG_RT_PRIO(RTPM_PRIO_MM_GROUP_H+9)
+#define RTPM_PRIO_FB_THREAD                 REG_RT_PRIO(RTPM_PRIO_MM_GROUP_H+7)
+#define RTPM_PRIO_VSYNC_THREAD              REG_RT_PRIO(RTPM_PRIO_MM_GROUP_H+5)
+#define RTPM_PRIO_SURFACEFLINGER            REG_RT_PRIO(RTPM_PRIO_MM_GROUP_H+4)
+
+#define RTPM_PRIO_VIDEO_YUV_BUFFER          REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+8)
+#define RTPM_PRIO_AUDIO_RECORD              REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+7)
+#define RTPM_PRIO_OMX_AUDIO                 REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+6)
+#define RTPM_PRIO_OMX_CMD_AUDIO             REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+6)
+#define RTPM_PRIO_OMX_VIDEO_ENCODE          REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+5)
+#define RTPM_PRIO_OMX_VIDEO                 REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+5)
+#define RTPM_PRIO_OMX_VIDEO_DECODE          REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+4)
+
+#define RTPM_PRIO_VIDEO_BS_BUFFER           REG_RT_PRIO(RTPM_PRIO_MM_GROUP_G+3)
+#define RTPM_PRIO_MIDI_FILE                 REG_RT_PRIO(RTPM_PRIO_MM_GROUP_C+0)
+
+#define RTPM_PRIO_AUDIOTRACK_THREAD         REG_RT_PRIO(1)
+#define RTPM_PRIO_GPS_DRIVER				REG_RT_PRIO(1)
+// Total 
+#define RTPM_PRIO_NUM	30
+////////////////////////////////////////////////////////////////////////////////
+//Removed
+//#define RTPM_PRIO_FB_THREAD                 REG_RT_PRIO(87)
+//#define RTPM_PRIO_SURFACE_OUT               REG_RT_PRIO(80)
+
+#endif
diff --git a/kernel-headers/linux/sensors_io.h b/kernel-headers/linux/sensors_io.h
new file mode 100644
index 0000000..a84e5ff
--- /dev/null
+++ b/kernel-headers/linux/sensors_io.h
@@ -0,0 +1,166 @@
+/*
+*
+* (C) Copyright 2008 
+* MediaTek <www.mediatek.com>
+*
+* Sensors IO command file for MT6516
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+*/
+#ifndef SENSORS_IO_H
+#define SENSORS_IO_H
+		  
+#include <linux/ioctl.h>	  
+
+typedef struct {
+	unsigned short	x;		/**< X axis */
+	unsigned short	y;		/**< Y axis */
+	unsigned short	z;		/**< Z axis */
+} GSENSOR_VECTOR3D;
+
+typedef struct{
+	int x;
+	int y;
+	int z;
+}SENSOR_DATA;
+
+
+#define GSENSOR						   	0x85
+#define GSENSOR_IOCTL_INIT                  _IO(GSENSOR,  0x01)
+#define GSENSOR_IOCTL_READ_CHIPINFO         _IOR(GSENSOR, 0x02, int)
+#define GSENSOR_IOCTL_READ_SENSORDATA       _IOR(GSENSOR, 0x03, int)
+#define GSENSOR_IOCTL_READ_OFFSET			_IOR(GSENSOR, 0x04, GSENSOR_VECTOR3D)
+#define GSENSOR_IOCTL_READ_GAIN				_IOR(GSENSOR, 0x05, GSENSOR_VECTOR3D)
+#define GSENSOR_IOCTL_READ_RAW_DATA			_IOR(GSENSOR, 0x06, int)
+#define GSENSOR_IOCTL_SET_CALI				_IOW(GSENSOR, 0x06, SENSOR_DATA)
+#define GSENSOR_IOCTL_GET_CALI				_IOW(GSENSOR, 0x07, SENSOR_DATA)
+#define GSENSOR_IOCTL_CLR_CALI				_IO(GSENSOR, 0x08)
+
+
+
+
+/* IOCTLs for Msensor misc. device library */
+#define MSENSOR						   0x83
+#define MSENSOR_IOCTL_INIT					_IO(MSENSOR, 0x01)
+#define MSENSOR_IOCTL_READ_CHIPINFO			_IOR(MSENSOR, 0x02, int)
+#define MSENSOR_IOCTL_READ_SENSORDATA		_IOR(MSENSOR, 0x03, int)
+#define MSENSOR_IOCTL_READ_POSTUREDATA		_IOR(MSENSOR, 0x04, int)
+#define MSENSOR_IOCTL_READ_CALIDATA			_IOR(MSENSOR, 0x05, int)
+#define MSENSOR_IOCTL_READ_CONTROL			_IOR(MSENSOR, 0x06, int)
+#define MSENSOR_IOCTL_SET_CONTROL			_IOW(MSENSOR, 0x07, int)
+#define MSENSOR_IOCTL_SET_MODE           	_IOW(MSENSOR, 0x08, int)
+#define MSENSOR_IOCTL_SET_POSTURE        	_IOW(MSENSOR, 0x09, int)
+#define MSENSOR_IOCTL_SET_CALIDATA     	  	_IOW(MSENSOR, 0x0a, int)
+#define MSENSOR_IOCTL_SENSOR_ENABLE         _IOW(MSENSOR, 0x51, int)
+#define MSENSOR_IOCTL_READ_FACTORY_SENSORDATA  _IOW(MSENSOR, 0x52, int)
+
+
+/* IOCTLs for AKM library */
+#define ECS_IOCTL_WRITE                 _IOW(MSENSOR, 0x0b, char*)
+#define ECS_IOCTL_READ                  _IOWR(MSENSOR, 0x0c, char*)
+#define ECS_IOCTL_RESET      	        _IO(MSENSOR, 0x0d) /* NOT used in AK8975 */
+#define ECS_IOCTL_SET_MODE              _IOW(MSENSOR, 0x0e, short)
+#define ECS_IOCTL_GETDATA               _IOR(MSENSOR, 0x0f, char[SENSOR_DATA_SIZE])
+#define ECS_IOCTL_SET_YPR               _IOW(MSENSOR, 0x10, short[12])
+#define ECS_IOCTL_GET_OPEN_STATUS       _IOR(MSENSOR, 0x11, int)
+#define ECS_IOCTL_GET_CLOSE_STATUS      _IOR(MSENSOR, 0x12, int)
+#define ECS_IOCTL_GET_OSENSOR_STATUS	_IOR(MSENSOR, 0x13, int)
+#define ECS_IOCTL_GET_DELAY             _IOR(MSENSOR, 0x14, short)
+#define ECS_IOCTL_GET_PROJECT_NAME      _IOR(MSENSOR, 0x15, char[64])
+#define ECS_IOCTL_GET_MATRIX            _IOR(MSENSOR, 0x16, short [4][3][3])
+#define	ECS_IOCTL_GET_LAYOUT			_IOR(MSENSOR, 0x17, int[3])
+
+#define ECS_IOCTL_GET_OUTBIT        	_IOR(MSENSOR, 0x23, char)
+#define ECS_IOCTL_GET_ACCEL         	_IOR(MSENSOR, 0x24, short[3])
+#define MMC31XX_IOC_RM					_IO(MSENSOR, 0x25)
+#define MMC31XX_IOC_RRM					_IO(MSENSOR, 0x26)
+/* IOCTLs for akm09911 device */
+#define ECS_IOCTL_GET_INFO			_IOR(MSENSOR, 0x27, unsigned char[AKM_SENSOR_INFO_SIZE])
+#define ECS_IOCTL_GET_CONF			_IOR(MSENSOR, 0x28, unsigned char[AKM_SENSOR_CONF_SIZE])
+#define ECS_IOCTL_SET_YPR_09911               _IOW(MSENSOR, 0x29, int[26])
+#define ECS_IOCTL_GET_DELAY_09911             _IOR(MSENSOR, 0x30, int64_t[3])
+#define	ECS_IOCTL_GET_LAYOUT_09911			_IOR(MSENSOR, 0x31, char)
+
+/* IOCTLs for MMC31XX device */
+#define MMC31XX_IOC_TM					_IO(MSENSOR, 0x18)
+#define MMC31XX_IOC_SET					_IO(MSENSOR, 0x19)
+#define MMC31XX_IOC_RESET				_IO(MSENSOR, 0x1a)
+#define MMC31XX_IOC_READ				_IOR(MSENSOR, 0x1b, int[3])
+#define MMC31XX_IOC_READXYZ				_IOR(MSENSOR, 0x1c, int[3])
+
+#define ECOMPASS_IOC_GET_DELAY			_IOR(MSENSOR, 0x1d, int)
+#define ECOMPASS_IOC_GET_MFLAG			_IOR(MSENSOR, 0x1e, short)
+#define	ECOMPASS_IOC_GET_OFLAG			_IOR(MSENSOR, 0x1f, short)
+#define ECOMPASS_IOC_GET_OPEN_STATUS	_IOR(MSENSOR, 0x20, int)
+#define ECOMPASS_IOC_SET_YPR			_IOW(MSENSOR, 0x21, int[12])
+#define ECOMPASS_IOC_GET_LAYOUT			_IOR(MSENSOR, 0X22, int)
+
+
+
+
+#define ALSPS							0X84
+#define ALSPS_SET_PS_MODE					_IOW(ALSPS, 0x01, int)
+#define ALSPS_GET_PS_MODE					_IOR(ALSPS, 0x02, int)
+#define ALSPS_GET_PS_DATA					_IOR(ALSPS, 0x03, int)
+#define ALSPS_GET_PS_RAW_DATA				_IOR(ALSPS, 0x04, int)
+#define ALSPS_SET_ALS_MODE					_IOW(ALSPS, 0x05, int)
+#define ALSPS_GET_ALS_MODE					_IOR(ALSPS, 0x06, int)
+#define ALSPS_GET_ALS_DATA					_IOR(ALSPS, 0x07, int)
+#define ALSPS_GET_ALS_RAW_DATA           	_IOR(ALSPS, 0x08, int)
+/*-------------------yucong add-------------------------------------------*/
+#define ALSPS_GET_PS_TEST_RESULT           	_IOR(ALSPS, 0x09, int)
+#define ALSPS_GET_ALS_TEST_RESULT           	_IOR(ALSPS, 0x0A, int)
+#define ALSPS_GET_PS_THRESHOLD_HIGH           	_IOR(ALSPS, 0x0B, int)
+#define ALSPS_GET_PS_THRESHOLD_LOW           	_IOR(ALSPS, 0x0C, int)
+#define ALSPS_GET_ALS_THRESHOLD_HIGH           	_IOR(ALSPS, 0x0D, int)
+#define ALSPS_GET_ALS_THRESHOLD_LOW           	_IOR(ALSPS, 0x0E, int)
+#define ALSPS_IOCTL_CLR_CALI				_IOW(ALSPS, 0x0F, int)
+#define ALSPS_IOCTL_GET_CALI				_IOR(ALSPS, 0x10, int)
+#define ALSPS_IOCTL_SET_CALI				_IOW(ALSPS, 0x11, int)
+#define ALSPS_SET_PS_THRESHOLD           	_IOW(ALSPS, 0x12, int)
+#define ALSPS_SET_ALS_THRESHOLD           	_IOW(ALSPS, 0x13, int)
+#define AAL_SET_ALS_MODE				_IOW(ALSPS, 0x14,int)
+#define AAL_GET_ALS_MODE				_IOR(ALSPS, 0x15,int)
+#define AAL_GET_ALS_DATA				_IOR(ALSPS, 0x16,int)
+
+#define GYROSCOPE							0X86
+#define GYROSCOPE_IOCTL_INIT					_IO(GYROSCOPE, 0x01)
+#define GYROSCOPE_IOCTL_SMT_DATA			_IOR(GYROSCOPE, 0x02, int)
+#define GYROSCOPE_IOCTL_READ_SENSORDATA		_IOR(GYROSCOPE, 0x03, int)
+#define GYROSCOPE_IOCTL_SET_CALI			_IOW(GYROSCOPE, 0x04, SENSOR_DATA)
+#define GYROSCOPE_IOCTL_GET_CALI			_IOW(GYROSCOPE, 0x05, SENSOR_DATA)
+#define GYROSCOPE_IOCTL_CLR_CALI			_IO(GYROSCOPE, 0x06)
+#define GYROSCOPE_IOCTL_READ_SENSORDATA_RAW	_IOR(GYROSCOPE, 0x07, int)
+#define GYROSCOPE_IOCTL_READ_TEMPERATURE	_IOR(GYROSCOPE, 0x08, int)
+#define GYROSCOPE_IOCTL_GET_POWER_STATUS	_IOR(GYROSCOPE, 0x09, int)
+
+#define BROMETER							0X87
+#define BAROMETER_IOCTL_INIT				_IO(BROMETER, 0x01)
+#define BAROMETER_GET_PRESS_DATA			_IOR(BROMETER, 0x02, int)
+#define BAROMETER_GET_TEMP_DATA			    _IOR(BROMETER, 0x03, int)
+#define BAROMETER_IOCTL_READ_CHIPINFO		_IOR(BROMETER, 0x04, int)
+
+#define HEARTMONITOR                        0x88
+#define HRM_IOCTL_INIT                      _IO(HEARTMONITOR, 0x01)
+#define HRM_READ_SENSOR_DATA                _IOR(HEARTMONITOR, 0x02, int)
+
+#define HUMIDITY							0X89
+#define HUMIDITY_IOCTL_INIT				_IO(HUMIDITY, 0x01)
+#define HUMIDITY_GET_HMDY_DATA			_IOR(HUMIDITY, 0x02, int)
+#define HUMIDITY_GET_TEMP_DATA			    _IOR(HUMIDITY, 0x03, int)
+#define HUMIDITY_IOCTL_READ_CHIPINFO		_IOR(HUMIDITY, 0x04, int)
+
+#endif
+
diff --git a/kernel-headers/linux/slab.h b/kernel-headers/linux/slab.h
new file mode 100644
index 0000000..f3c1408
--- /dev/null
+++ b/kernel-headers/linux/slab.h
@@ -0,0 +1,21 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ ***   This header was automatically generated from a Linux kernel header
+ ***   of the same name, to make information necessary for userspace to
+ ***   call into the kernel available to libc.  It contains only constants,
+ ***   structures, and macros generated from the original header, and thus,
+ ***   contains no copyrightable information.
+ ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef _LINUX_SLAB_H
+#define _LINUX_SLAB_H
+#endif
diff --git a/kernel-headers/linux/vow.h b/kernel-headers/linux/vow.h
new file mode 100644
index 0000000..4b9a310
--- /dev/null
+++ b/kernel-headers/linux/vow.h
@@ -0,0 +1,108 @@
+#ifndef __VOW_H__
+#define __VOW_H__
+
+/***********************************************************************************
+** VOW Control Message
+************************************************************************************/
+#define VOW_DEVNAME "vow"
+#define VOW_IOC_MAGIC    'a'
+
+static char const *const kVOWDeviceName = "/dev/vow";
+
+#if 0
+//below is control message
+#define TEST_VOW_PRINT            _IO(VOW_IOC_MAGIC,  0x00)
+#define VOWEINT_GET_BUFSIZE       _IOW(VOW_IOC_MAGIC, 0x01, unsigned long)
+#define VOW_GET_STATUS            _IOW(VOW_IOC_MAGIC, 0x02, unsigned long)
+#define VOW_SET_CONTROL           _IOW(VOW_IOC_MAGIC, 0x03, unsigned long)
+#define VOW_SET_SPEAKER_MODEL     _IOW(VOW_IOC_MAGIC, 0x04, unsigned long)
+#define VOW_CLR_SPEAKER_MODEL     _IOW(VOW_IOC_MAGIC, 0x05, unsigned long)
+#define VOW_SET_INIT_MODEL        _IOW(VOW_IOC_MAGIC, 0x06, unsigned long)
+#define VOW_SET_FIR_MODEL         _IOW(VOW_IOC_MAGIC, 0x07, unsigned long)
+#define VOW_SET_NOISE_MODEL       _IOW(VOW_IOC_MAGIC, 0x08, unsigned long)
+#define VOW_SET_APREG_INFO        _IOW(VOW_IOC_MAGIC, 0x09, unsigned long)
+#define VOW_SET_REG_MODE          _IOW(VOW_IOC_MAGIC, 0x0A, unsigned long)
+#define VOW_FAKE_WAKEUP           _IOW(VOW_IOC_MAGIC, 0x0B, unsigned long)
+#else
+
+
+//below is control message
+#define TEST_VOW_PRINT            0x00
+#define VOWEINT_GET_BUFSIZE       0x01
+#define VOW_GET_STATUS            0x02
+#define VOW_SET_CONTROL           0x03
+#define VOW_SET_SPEAKER_MODEL     0x04
+#define VOW_CLR_SPEAKER_MODEL     0x05
+#define VOW_SET_INIT_MODEL        0x06
+#define VOW_SET_FIR_MODEL         0x07
+#define VOW_SET_NOISE_MODEL       0x08
+#define VOW_SET_APREG_INFO        0x09
+#define VOW_SET_REG_MODE          0x0A
+#define VOW_FAKE_WAKEUP           0x0B
+
+#endif
+
+
+
+/***********************************************************************************
+** Type Define
+************************************************************************************/
+enum VOW_Control_Cmd
+{
+    VOWControlCmd_Init = 0,
+    VOWControlCmd_ReadVoiceData,
+    VOWControlCmd_EnableDebug,
+    VOWControlCmd_DisableDebug,
+};
+
+typedef enum VOW_REG_MODE_T {
+   VOW_MODE_MD32_VOW = 0,
+   VOW_MODE_VOICECOMMAND,
+   VOW_MODE_MULTIPLE_KEY,
+   VOW_MODE_MULTIPLE_KEY_VOICECOMMAND
+}VOW_REG_MODE_T;
+
+typedef enum VOW_EINT_STATUS{
+    VOW_EINT_DISABLE = -2,
+    VOW_EINT_FAIL = -1,
+    VOW_EINT_PASS = 0,
+    VOW_EINT_RETRY = 1,
+    NUM_OF_VOW_EINT_STATUS
+}VOW_EINT_STATUS;
+
+typedef enum VOW_FLAG_TYPE{
+    VOW_FLAG_DEBUG,
+    VOW_FLAG_PRE_LEARN,
+    VOW_FLAG_DMIC_LOWPOWER,
+    NUM_OF_VOW_FLAG_TYPE
+}VOW_FLAG_TYPE;
+
+typedef enum VOW_PWR_STATUS{
+    VOW_PWR_OFF = 0,
+    VOW_PWR_ON = 1,
+    NUM_OF_VOW_PWR_STATUS
+}VOW_PWR_STATUS;
+
+typedef enum VOW_IPI_RESULT
+{
+   VOW_IPI_SUCCESS = 0,
+   VOW_IPI_CLR_SMODEL_ID_NOTMATCH,
+   VOW_IPI_SET_SMODEL_NO_FREE_SLOT,
+}VOW_IPI_RESULT;
+/*
+struct VOW_EINT_DATA_STRUCT{
+   int size;        // size of data section
+   int eint_status; // eint status
+   int id;
+   char *data;      // reserved for future extension
+}VOW_EINT_DATA_STRUCT;
+*/
+
+typedef struct{
+   long  id;
+   long  addr;
+   long  size;
+   void *data;
+}VOW_MODEL_INFO_T;
+
+#endif //__VOW_H__
diff --git a/kernel-headers/sync_write.h b/kernel-headers/sync_write.h
new file mode 100644
index 0000000..e4c6e85
--- /dev/null
+++ b/kernel-headers/sync_write.h
@@ -0,0 +1,80 @@
+#ifndef __MT65XX_SYNC_WRITE_H__
+#define __MT65XX_SYNC_WRITE_H__
+
+#define mt_reg_sync_writel(v, a)        mt65xx_reg_sync_writel(v, a)
+#define mt_reg_sync_writew(v, a)        mt65xx_reg_sync_writew(v, a)
+#define mt_reg_sync_writeb(v, a)        mt65xx_reg_sync_writeb(v, a)
+
+#if defined(__KERNEL__)
+
+#include <linux/io.h>
+#include <asm/cacheflush.h>
+#include <asm/system.h>
+
+/*
+ * Define macros.
+ */
+
+#define mt65xx_reg_sync_writel(v, a) \
+        do {    \
+            writel((v), (a));   \
+            dsb();  \
+        } while (0)
+
+#define mt65xx_reg_sync_writew(v, a) \
+        do {    \
+            writew((v), (a));   \
+            dsb();  \
+        } while (0)
+
+#define mt65xx_reg_sync_writeb(v, a) \
+        do {    \
+            writeb((v), (a));   \
+            dsb();  \
+        } while (0)
+
+#else   /* __KERNEL__ */
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <unistd.h>
+#include <string.h>
+
+#define dsb()   \
+        do {    \
+            __asm__ __volatile__ ("dsb sy" : : : "memory"); \
+        } while (0)
+
+#define outer_sync()    \
+        do {    \
+            int fd; \
+            char buf[] = "1";   \
+            fd = open("/sys/bus/platform/drivers/outercache/outer_sync", O_WRONLY); \
+            if (fd != -1) {  \
+                write(fd, buf, strlen(buf)); \
+                close(fd); \
+            }   \
+        } while (0)
+
+#define mt65xx_reg_sync_writel(v, a) \
+        do {    \
+            *(volatile unsigned int *)(a) = (v);    \
+            dsb(); \
+        } while (0)
+
+#define mt65xx_reg_sync_writew(v, a) \
+        do {    \
+            *(volatile unsigned short *)(a) = (v);    \
+            dsb(); \
+        } while (0)
+
+#define mt65xx_reg_sync_writeb(v, a) \
+        do {    \
+            *(volatile unsigned char *)(a) = (v);    \
+            dsb(); \
+        } while (0)
+
+#endif  /* __KERNEL__ */
+
+#endif  /* !__MT65XX_SYNC_WRITE_H__ */
diff --git a/kernel-headers/val_api_private.h b/kernel-headers/val_api_private.h
new file mode 100644
index 0000000..4e41082
--- /dev/null
+++ b/kernel-headers/val_api_private.h
@@ -0,0 +1,57 @@
+#ifndef _VAL_API_PRIVATE_H_
+#define _VAL_API_PRIVATE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_private.h"
+#include "val_api_public.h"
+#include "libmtk_cipher_export.h"
+
+
+VAL_RESULT_T eValInit(VAL_HANDLE_T *a_phHalHandle);
+VAL_RESULT_T eValDeInit(VAL_HANDLE_T *a_phHalHandle);
+
+VAL_RESULT_T eVideoIntMemAlloc(VAL_INTMEM_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoIntMemFree(VAL_INTMEM_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+VAL_RESULT_T eVideoCreateEvent(VAL_EVENT_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoSetEvent(VAL_EVENT_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoCloseEvent(VAL_EVENT_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoWaitEvent(VAL_EVENT_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+VAL_RESULT_T eVideoCreateMutex(VAL_MUTEX_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoCloseMutex(VAL_MUTEX_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoWaitMutex(VAL_MUTEX_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoReleaseMutex(VAL_MUTEX_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+VAL_RESULT_T eVideoMMAP(VAL_MMAP_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+VAL_RESULT_T eVideoUnMMAP(VAL_MMAP_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+VAL_RESULT_T eVideoInitLockHW(VAL_VCODEC_OAL_HW_REGISTER_T *prParam, int size);
+VAL_RESULT_T eVideoDeInitLockHW(VAL_VCODEC_OAL_HW_REGISTER_T *prParam, int size);
+
+VAL_RESULT_T eVideoVCodecCoreLoading(int CPUid, int *Loading);
+VAL_RESULT_T eVideoVCodecCoreNumber(int *CPUNums);
+
+VAL_RESULT_T eVideoConfigMCIPort(VAL_UINT32_T u4PortConfig, VAL_UINT32_T *pu4PortResult, VAL_MEM_CODEC_T eMemCodec);
+
+VAL_UINT32_T eVideoHwM4UEnable(VAL_BOOL_T bEnable); /* MTK_SEC_VIDEO_PATH_SUPPORT */
+VAL_UINT32_T eVideoLibDecrypt(VIDEO_ENCRYPT_CODEC_T a_eVIDEO_ENCRYPT_CODEC);
+
+/* for DirectLink Meta Mode + */
+VAL_RESULT_T eVideoAllocMetaHandleList(VAL_HANDLE_T *a_MetaHandleList);
+VAL_RESULT_T eVideoGetBufInfoFromMetaHandle(
+	VAL_HANDLE_T a_MetaHandleList,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+VAL_RESULT_T eVideoFreeMetaHandleList(VAL_HANDLE_T a_MetaHandleList);
+/* for DirectLink Meta Mode - */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_API_PRIVATE_H_ */
diff --git a/kernel-headers/val_api_public.h b/kernel-headers/val_api_public.h
new file mode 100644
index 0000000..9af8887
--- /dev/null
+++ b/kernel-headers/val_api_public.h
@@ -0,0 +1,402 @@
+#ifndef _VAL_API_PUBLIC_H_
+#define _VAL_API_PUBLIC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_public.h"
+
+
+/**
+ * @par Function
+ *   eVideoInitMVA
+ * @par Description
+ *   Alloc the handle for MVA usage
+ * @param
+ *   a_pvHandle         [IN] The handle for MVA usage
+ * @par Returns
+ *   VAL_UINT32_T       [OUT] Non-Used
+ */
+VAL_UINT32_T eVideoInitMVA(VAL_VOID_T **a_pvHandle);
+
+
+/**
+ * @par Function
+ *   eVideoAllocMVA
+ * @par Description
+ *   Use the given va and size, to get the MVA
+ * @param
+ *   a_pvHandle         [IN] The handle for MVA usage
+ * @param
+ *   a_u4Va             [IN] The given va used to get MVA
+ * @param
+ *   ap_u4Pa            [OUT] The MVA
+ * @param
+ *   a_u4Size           [IN] The given size used to get MVA
+ * @param
+ *   a_pvM4uConfig      [IN] The MVA config info
+ * @par Returns
+ *   VAL_UINT32_T       [OUT] Non-Used
+ */
+VAL_UINT32_T eVideoAllocMVA(
+	VAL_VOID_T *a_pvHandle,
+	VAL_UINT32_T a_u4Va,
+	VAL_UINT32_T *ap_u4Pa,
+	VAL_UINT32_T a_u4Size,
+	VAL_VCODEC_M4U_BUFFER_CONFIG_T * a_pvM4uConfig
+);
+
+/**
+ * @par Function
+ *   eVideoFreeMVA
+ * @par Description
+ *   Use the given va, MVA and size, to free the MVA
+ * @param
+ *   a_pvHandle         [IN] The handle for MVA usage
+ * @param
+ *   a_u4Va             [IN] The given va used to free MVA
+ * @param
+ *   a_u4Pa             [IN] The given MVA used to free MVA
+ * @param
+ *   a_u4Size           [IN] The given size used to get MVA
+ * @param
+ *   a_pvM4uConfig      [IN] The MVA config info
+ * @par Returns
+ *   VAL_UINT32_T       [OUT] Non-Used
+ */
+VAL_UINT32_T eVideoFreeMVA(
+	VAL_VOID_T *a_pvHandle,
+	VAL_UINT32_T a_u4Va,
+	VAL_UINT32_T a_u4Pa,
+	VAL_UINT32_T a_u4Size,
+	VAL_VCODEC_M4U_BUFFER_CONFIG_T * a_pvM4uConfig
+);
+
+
+/**
+ * @par Function
+ *   eVideoDeInitMVA
+ * @par Description
+ *   Free the handle for MVA usage
+ * @param
+ *   a_pvHandle         [IN] The handle for MVA usage
+ * @par Returns
+ *   VAL_UINT32_T       [OUT] Non-Used
+ */
+VAL_UINT32_T eVideoDeInitMVA(VAL_VOID_T *a_pvHandle);
+
+
+/**
+ * @par Function
+ *   eVideoGetM4UModuleID
+ * @par Description
+ *   Get the M4U module port ID
+ * @param
+ *   u4MemType          [IN] The memory usage for VENC or VDEC
+ * @par Returns
+ *   VAL_UINT32_T       [OUT] The M4U module port ID for VENC or VDEC
+ */
+VAL_INT32_T eVideoGetM4UModuleID(VAL_UINT32_T u4MemType);
+
+
+/**
+ * @par Function
+ *   eVideoAtoi
+ * @par Description
+ *   The abstraction layer for atoi() function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for atoi()
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoAtoi(VAL_ATOI_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoStrStr
+ * @par Description
+ *   The abstraction layer for strstr() function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for strstr()
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoStrStr(VAL_STRSTR_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoFlushCache
+ * @par Description
+ *   The flush cache usage function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for flush cache
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @param
+ *   optype             [IN] 0 for flush all, 1 for flush by page
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_MEMORY for fail
+ */
+VAL_RESULT_T eVideoFlushCache(VAL_MEMORY_T *a_prParam, VAL_UINT32_T a_u4ParamSize, VAL_UINT32_T optype);
+
+
+/**
+ * @par Function
+ *   eVideoInvalidateCache
+ * @par Description
+ *   The invalidate cache usage function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for invalidate cache
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @param
+ *   optype             [IN] 0 for flush all, 1 for invalidate by page
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_MEMORY for fail
+ */
+VAL_RESULT_T eVideoInvalidateCache(VAL_MEMORY_T *a_prParam, VAL_UINT32_T a_u4ParamSize, VAL_UINT32_T optype);
+
+
+/**
+ * @par Function
+ *   eVideoMemAlloc
+ * @par Description
+ *   The memory allocate usage function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for allocate memory
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT]
+ *   VAL_RESULT_NO_ERROR for success,
+ *   VAL_RESULT_INVALID_MEMORY or VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoMemAlloc(VAL_MEMORY_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoMemFree
+ * @par Description
+ *   The memory free usage function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for free memory
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoMemFree(VAL_MEMORY_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoMemSet
+ * @par Description
+ *   The memory set usage function
+ * @param
+ *   a_prParam          [IN] The structure contains used info for set memory
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @param
+ *   a_u4Value          [IN] The value for set to memory
+ * @param
+ *   a_u4Size           [IN] The size of "memory" want to be set
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoMemSet(
+	VAL_MEMORY_T *a_prParam,
+	VAL_UINT32_T a_u4ParamSize,
+	VAL_INT32_T a_u4Value,
+	VAL_UINT32_T a_u4Size
+);
+
+
+/**
+ * @par Function
+ *   eVideoMemCpy
+ * @par Description
+ *   The memory copy usage function
+ * @param
+ *   a_prParamDst       [IN] The structure contains destination memory info for copy memory
+ * @param
+ *   a_u4ParamDstSize   [IN] The size of a_prParamDst structure
+ * @param
+ *   a_prParamSrc       [IN] The structure contains source memory info for copy memory
+ * @param
+ *   a_u4ParamSrcSize   [IN] The size of a_prParamSrc structure
+ * @param
+ *   a_u4Size           [IN] The size of "source memory" and "destination memory" want to be copied
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoMemCpy(
+	VAL_MEMORY_T *a_prParamDst,
+	VAL_UINT32_T a_u4ParamDstSize,
+	VAL_MEMORY_T *a_prParamSrc,
+	VAL_UINT32_T a_u4ParamSrcSize,
+	VAL_UINT32_T a_u4Size
+);
+
+
+/**
+ * @par Function
+ *   eVideoMemCmp
+ * @par Description
+ *   The memory compare usage function
+ * @param
+ *   a_prParamSrc1      [IN] The structure contains memory 1 info for compare memory
+ * @param
+ *   a_u4ParamSrc1Size  [IN] The size of a_prParamSrc1 structure
+ * @param
+ *   a_prParamSrc2      [IN] The structure contains memory 2 info for compare memory
+ * @param
+ *   a_u4ParamSrc2Size  [IN] The size of a_prParamSrc2 structure
+ * @param
+ *   a_u4Size           [IN] The size of "memory 1" and "memory 2" want to be compared
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_INVALID_PARAMETER for fail
+ */
+VAL_RESULT_T eVideoMemCmp(
+	VAL_MEMORY_T *a_prParamSrc1,
+	VAL_UINT32_T a_u4ParamSrc1Size,
+	VAL_MEMORY_T *a_prParamSrc2,
+	VAL_UINT32_T a_u4ParamSrc2Size,
+	VAL_UINT32_T a_u4Size
+);
+
+
+/**
+ * @par Function
+ *   WaitISR
+ * @par Description
+ *   The ISR usage related function, whene trigger HW, we will use to wait HW complete
+ * @param
+ *   a_prParam          [IN] The structure contains used info for ISR usage
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_ISR_TIMEOUT for fail
+ */
+VAL_RESULT_T WaitISR(VAL_ISR_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to allow using HW
+ * @param
+ *   a_prParam          [IN] The structure contains used info for Lock HW
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_UNKNOWN_ERROR for fail
+ */
+VAL_RESULT_T eVideoLockHW(VAL_HW_LOCK_T *a_prParam, VAL_UINT32_T  a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to release HW for another instance
+ * @param
+ *   a_prParam          [IN] The structure contains used info for unLock HW
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success, VAL_RESULT_UNKNOWN_ERROR for fail
+ */
+VAL_RESULT_T eVideoUnLockHW(VAL_HW_LOCK_T *a_prParam, VAL_UINT32_T  a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eVideoGetTimeOfDay
+ * @par Description
+ *   The timing usage function, used to performance profiling
+ * @param
+ *   a_prParam          [IN] The structure contains used info for timing usage
+ * @param
+ *   a_u4ParamSize      [IN] The size of a_prParam structure
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success
+ */
+VAL_RESULT_T eVideoGetTimeOfDay(VAL_TIME_T *a_prParam, VAL_UINT32_T a_u4ParamSize);
+
+
+/**
+ * @par Function
+ *   eHalEMICtrlForRecordSize
+ * @par Description
+ *   The recording info function, to get the record size for setting to EMI controller
+ * @param
+ *   a_prDrvRecordSize  [IN] The structure contains used info for recording size
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success
+ */
+VAL_RESULT_T eHalEMICtrlForRecordSize(VAL_RECORD_SIZE_T *a_prDrvRecordSize);
+
+
+/**
+ * @par Function
+ *   eVideoVcodecSetThreadID
+ * @par Description
+ *   The thread info function, to set thread ID for used to lock/unlock HW and priority adjustment
+ * @param
+ *   a_prThreadID       [IN] The structure contains used info for thread info
+ * @par Returns
+ *   VAL_RESULT_T       [OUT] VAL_RESULT_NO_ERROR for success
+ */
+VAL_RESULT_T eVideoVcodecSetThreadID(VAL_VCODEC_THREAD_ID_T *a_prThreadID);
+
+
+/**
+ * @par Function
+ *   eVideoGetParam
+ * @par Description
+ *   The parameter info function, to get val parameter
+ * @param
+ *   a_eType        [IN]    The VAL_GET_TYPE_T enum
+ * @param
+ *   a_pvInParam    [IN]    The input parameter
+ * @param
+ *   a_pvOutParam   [OUT]   The output parameter
+ * @par Returns
+ *   VAL_RESULT_T   [OUT]   VAL_RESULT_NO_ERROR for success
+ */
+VAL_RESULT_T eVideoGetParam(VAL_GET_TYPE_T a_eType, VAL_VOID_T *a_pvInParam, VAL_VOID_T *a_pvOutParam);
+
+/**
+ * @par Function
+ *   eVideoSetParam
+ * @par Description
+ *   The parameter info function, to set val parameter
+ * @param
+ *   a_eType        [IN]    The VAL_SET_TYPE_T enum
+ * @param
+ *   a_pvInParam    [IN]    The input parameter
+ * @param
+ *   a_pvOutParam   [OUT]   The output parameter
+ * @par Returns
+ *   VAL_RESULT_T   [OUT]   VAL_RESULT_NO_ERROR for success
+ */
+VAL_RESULT_T eVideoSetParam(VAL_SET_TYPE_T a_eType, VAL_VOID_T *a_pvInParam, VAL_VOID_T *a_pvOutParam);
+
+VAL_RESULT_T eVideoE3TCMPowerON(VAL_UINT32_T a_u4E3TCMClk);
+VAL_RESULT_T eVideoE3TCMPowerOFF(VAL_UINT32_T a_u4E3TCMClk);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_API_PUBLIC_H_ */
diff --git a/kernel-headers/val_log.h b/kernel-headers/val_log.h
new file mode 100644
index 0000000..bbf4a84
--- /dev/null
+++ b/kernel-headers/val_log.h
@@ -0,0 +1,56 @@
+#ifndef _VAL_LOG_H_
+#define _VAL_LOG_H_
+
+#include <utils/Log.h>
+#include <cutils/log.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef MTK_LOG_ENABLE
+#undef MTK_LOG_ENABLE
+#endif
+#define MTK_LOG_ENABLE 1
+
+#define MFV_LOG_ERROR           /* /< error */
+#ifdef MFV_LOG_ERROR
+#define MFV_LOGE(...) LOG_PRI(ANDROID_LOG_ERROR, "VDO_LOG", __VA_ARGS__);   /* /< show error log */
+#define VDO_LOGE(...) LOG_PRI(ANDROID_LOG_ERROR, "VDO_LOG", __VA_ARGS__);   /* /< show error log */
+#else
+#define MFV_LOGE(...)           /* /< NOT show error log */
+#define VDO_LOGE(...)           /* /< NOT show error log */
+#endif
+
+#define MFV_LOG_WARNING         /* /< warning */
+#ifdef MFV_LOG_WARNING
+#define MFV_LOGW(...) LOG_PRI(ANDROID_LOG_WARN, "VDO_LOG", __VA_ARGS__);    /* /< show warning log */
+#define VDO_LOGW(...) LOG_PRI(ANDROID_LOG_WARN, "VDO_LOG", __VA_ARGS__);    /* /< show warning log */
+#else
+#define MFV_LOGW(...)           /* /< NOT show warning log */
+#define VDO_LOGW(...)           /* /< NOT show warning log */
+#endif
+
+/* #define MFV_LOG_DEBUG         ///< debug information */
+#ifdef MFV_LOG_DEBUG
+#define MFV_LOGD(...) LOG_PRI(ANDROID_LOG_DEBUG, "VDO_LOG", __VA_ARGS__);   /* /< show debug information log */
+#define VDO_LOGD(...) LOG_PRI(ANDROID_LOG_DEBUG, "VDO_LOG", __VA_ARGS__);   /* /< show debug information log */
+#else
+#define MFV_LOGD(...)           /* /< NOT show debug information log */
+#define VDO_LOGD(...)           /* /< NOT show debug information log */
+#endif
+
+#define MFV_LOG_INFO            /* /< information */
+#ifdef MFV_LOG_INFO
+#define MFV_LOGI(...) LOG_PRI(ANDROID_LOG_INFO, "VDO_LOG", __VA_ARGS__);    /* /< show information log */
+#define VDO_LOGI(...) LOG_PRI(ANDROID_LOG_INFO, "VDO_LOG", __VA_ARGS__);    /* /< show information log */
+#else
+#define MFV_LOGI(...)           /* /< NOT show information log */
+#define VDO_LOGI(...)           /* /< NOT show information log */
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_LOG_H_ */
diff --git a/kernel-headers/val_oal.h b/kernel-headers/val_oal.h
new file mode 100644
index 0000000..56f7711
--- /dev/null
+++ b/kernel-headers/val_oal.h
@@ -0,0 +1,1419 @@
+#ifndef _SP5_OAL_H_
+#define _SP5_OAL_H_
+
+/* SP5 interface */
+#include "vcodec_OAL_v2.h"
+
+/* ME1 interface */
+#include "val_types_private.h"
+
+/**
+ * @par Enumeration
+ *   __VAL_OAL_TYPE
+ * @par Description
+ *   This is the item used to set OAL type
+ */
+typedef enum ___VAL_OAL_TYPE {
+	_BYTE_  = 0x5000,     /* /< BYTE */
+	_WORD_,               /* /< WORD */
+	_LONG_                /* /< LONG */
+} __VAL_OAL_TYPE;
+
+/* /< VCodecDrvQueryMemType definition for SW/hybrid codec */
+#define  SP5_VCodecQueryMemType                       VCodecDrvQueryMemType
+/* /< VCodecDrvQueryPhysicalAddr definition for SW/hybrid codec */
+#define  SP5_VCodecQueryPhysicalAddr                  VCodecDrvQueryPhysicalAddr
+/* /< VCodecDrvSwitchMemType definition for SW/hybrid codec */
+#define  SP5_VCodecSwitchMemType                      VCodecDrvSwitchMemType
+/* /< VCodecDrvFlushCachedBuffer definition for SW/hybrid codec */
+#define  SP5_VCodecFlushCachedBuffer                  VCodecDrvFlushCachedBuffer
+/* /< VCodecDrvInvalidateCachedBuffer definition for SW/hybrid codec */
+#define  SP5_VCodecInvalidateCachedBuffer             VCodecDrvInvalidateCachedBuffer
+/* /< VCodecDrvFlushCachedBufferAll definition for SW/hybrid codec */
+#define  SP5_VCodecFlushCachedBufferAll               VCodecDrvFlushCachedBufferAll
+/* /< VCodecDrvInvalidateCachedBufferAll definition for SW/hybrid codec */
+#define  SP5_VCodecInvalidateCachedBufferAll          VCodecDrvInvalidateCachedBufferAll
+/* /< VCodecDrvFlushInvalidateCacheBufferAll definition for SW/hybrid codec */
+#define  SP5_VCodecFlushInvalidateCacheBufferAll      VCodecDrvFlushInvalidateCacheBufferAll
+/* /< VCodecDrvMemSet definition for SW/hybrid codec */
+#define  SP5_VCodecMemSet                             VCodecDrvMemSet
+/* /< VCodecDrvMemCopy definition for SW/hybrid codec */
+#define  SP5_VCodecMemCopy                            VCodecDrvMemCopy
+/* /< VCodecDrvAssertFail definition for SW/hybrid codec */
+#define  SP5_VCodecAssertFail                         VCodecDrvAssertFail
+/* /< VCodecDrvMMAP definition for SW/hybrid codec */
+#define  SP5_VCodecMMAP                               VCodecDrvMMAP
+/* /< VCodecDrvUnMMAP definition for SW/hybrid codec */
+#define  SP5_VCodecUnMMAP                             VCodecDrvUnMMAP
+/* /< VCodecDrvWaitISR definition for SW/hybrid codec */
+#define  SP5_VCodecWaitISR                            VCodecDrvWaitISR
+/* /< VCodecDrvLockHW definition for SW/hybrid codec */
+#define  SP5_VCodecLockHW                             VCodecDrvLockHW
+/* /< VCodecDrvUnLockHW definition for SW/hybrid codec */
+#define  SP5_VCodecUnLockHW                           VCodecDrvUnLockHW
+/* /< VCodecDrvInitHWLock definition for SW/hybrid codec */
+#define  SP5_VCodecInitHWLock                         VCodecDrvInitHWLock
+/* /< VCodecDrvDeInitHWLock definition for SW/hybrid codec */
+#define  SP5_VCodecDeInitHWLock                       VCodecDrvDeInitHWLock
+#if 0
+/* /< VCodecDrvTraceLog0 definition for SW/hybrid codec */
+#define  SP5_VcodecTraceLog0                          VCodecDrvTraceLog0
+/* /< VCodecDrvTraceLog1 definition for SW/hybrid codec */
+#define  SP5_VcodecTraceLog1                          VCodecDrvTraceLog1
+/* /< VCodecDrvTraceLog2 definition for SW/hybrid codec */
+#define  SP5_VcodecTraceLog2                          VCodecDrvTraceLog2
+/* /< VCodecDrvTraceLog4 definition for SW/hybrid codec */
+#define  SP5_VcodecTraceLog4                          VCodecDrvTraceLog4
+/* /< VCodecDrvTraceLog8 definition for SW/hybrid codec */
+#define  SP5_VcodecTraceLog8                          VCodecDrvTraceLog8
+#else
+/* /< VCodecPrintf definition for SW/hybrid codec */
+#define  SP5_VCodecPrintf                             VCodecPrintf
+#endif
+/* /< VCodecDrvMemAllocAligned definition for SW/hybrid codec */
+#define  SP5_VdoMemAllocAligned                       VCodecDrvMemAllocAligned
+/* /< VCodecDrvMemFree definition for SW/hybrid codec */
+#define  SP5_VdoMemFree                               VCodecDrvMemFree
+/* /< VCodecDrvIntMalloc definition for SW/hybrid codec */
+#define  SP5_VdoIntMalloc                             VCodecDrvIntMalloc
+/* /< VCodecDrvIntFree definition for SW/hybrid codec */
+#define  SP5_VdoIntFree                               VCodecDrvIntFree
+/* /< VCodecDrvRegSync definition for SW/hybrid codec */
+#define  SP5_RegSync                                  VCodecDrvRegSync
+/* /< VCodecDrvRegSyncWriteB definition for SW/hybrid codec */
+#define  SP5_RegSyncWriteB                            VCodecDrvRegSyncWriteB
+/* /< VCodecDrvRegSyncWriteW definition for SW/hybrid codec */
+#define  SP5_RegSyncWriteW                            VCodecDrvRegSyncWriteW
+/* /< VCodecDrvRegSyncWriteL definition for SW/hybrid codec */
+#define  SP5_RegSyncWriteL                            VCodecDrvRegSyncWriteL
+/* /< VMPEG4EncCodecDrvWaitISR definition for SW/hybrid codec */
+#define  SP5_VMPEG4EncCodecWaitISR                    VMPEG4EncCodecDrvWaitISR
+/* /< VMPEG4EncCodecDrvLockHW definition for SW/hybrid codec */
+#define  SP5_VMPEG4EncCodecLockHW                     VMPEG4EncCodecDrvLockHW
+/* /< VMPEG4EncCodecDrvUnLockHW definition for SW/hybrid codec */
+#define  SP5_VMPEG4EncCodecUnLockHW                   VMPEG4EncCodecDrvUnLockHW
+/* /< VH264DecCodecDrvWaitISR definition for SW/hybrid codec */
+#define  SP5_VH264DecCodecWaitISR                     VH264DecCodecDrvWaitISR
+/* /< VH264DecCodecDrvLockHW definition for SW/hybrid codec */
+#define  SP5_VH264DecCodecLockHW                      VH264DecCodecDrvLockHW
+/* /< VH264DecCodecDrvUnLockHW definition for SW/hybrid codec */
+#define  SP5_VH264DecCodecUnLockHW                    VH264DecCodecDrvUnLockHW
+
+
+/**
+ * @par Function
+ *   SP5_VCodecQueryMemType
+ * @par Description
+ *   The function used to query memory type for SW/hybrid codec
+ * @param
+ *   pBuffer_VA         [IN] The pointer of buffer address
+ * @param
+ *   u4Size             [IN] The size of buffer
+ * @param
+ *   peMemType          [OUT] The memory type
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecQueryMemType(
+	IN void            *pBuffer_VA,
+	IN unsigned int    u4Size,
+	OUT VCODEC_MEMORY_TYPE_T * peMemType);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecQueryPhysicalAddr
+ * @par Description
+ *   The function used to query physical address
+ * @param
+ *   pBuffer_VA         [IN] The pointer of buffer address
+ * @param
+ *   pBufferOut_PA      [OUT] The physical address
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecQueryPhysicalAddr(IN void       *pBuffer_VA,
+				 OUT void     **pBufferOut_PA);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecSwitchMemType
+ * @par Description
+ *   The function used to switch memory type for SW/hybrid codec
+ * @param
+ *   pBuffer_VA         [IN] The pointer of buffer address
+ * @param
+ *   u4Size             [IN] The size of buffer
+ * @param
+ *   eMemType           [IN] The memory type
+ * @param
+ *   pBufferOut_VA      [OUT] The pointer of buffer address
+ * @par Returns
+ *   int, return 0 if success, return -1 if failed
+ */
+int SP5_VCodecSwitchMemType(IN void            *pBuffer_VA,
+			    IN unsigned int    u4Size,
+			    IN VCODEC_MEMORY_TYPE_T eMemType,
+			    OUT void           **pBufferOut_VA);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecFlushCachedBuffer
+ * @par Description
+ *   The function used to flush cache by size
+ * @param
+ *   pBuffer_VA         [IN] The pointer of buffer address
+ * @param
+ *   u4Size             [IN] The size of buffer
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecFlushCachedBuffer(IN void         *pBuffer_VA,
+				 IN unsigned int u4Size);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecInvalidateCachedBuffer
+ * @par Description
+ *   The function used to invalidate cache by size
+ * @param
+ *   pBuffer_VA         [IN] The pointer of buffer address
+ * @param
+ *   u4Size             [IN] The size of buffer
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecInvalidateCachedBuffer(IN void         *pBuffer_VA,
+				      IN unsigned int   u4Size);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecFlushCachedBufferAll
+ * @par Description
+ *   The function used to flush all cache
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecFlushCachedBufferAll(void);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecInvalidateCachedBufferAll
+ * @par Description
+ *   The function used to invalidate all cache
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecInvalidateCachedBufferAll(void);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecFlushInvalidateCacheBufferAll
+ * @par Description
+ *   The function used to flush & invalidate all cache
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecFlushInvalidateCacheBufferAll(void);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecMemSet
+ * @par Description
+ *   The function used to memory set
+ * @param
+ *   pBuffer_VA         [IN] The pointer of buffer address
+ * @param
+ *   cValue             [IN] The value will be set to memory
+ * @param
+ *   u4Length           [IN] The length of memory will be set
+ * @par Returns
+ *   void
+ */
+void  SP5_VCodecMemSet(IN void                *pBuffer_VA,
+		       IN char                cValue,
+		       IN unsigned int        u4Length);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecMemCopy
+ * @par Description
+ *   The function used to memory copy
+ * @param
+ *   pvDest             [IN] The pointer of destination memory
+ * @param
+ *   pvSrc              [IN] The pointer of source memory
+ * @param
+ *   u4Length           [IN] The length of memory will be copied
+ * @par Returns
+ *   void
+ */
+void  SP5_VCodecMemCopy(IN void             *pvDest ,
+			IN const void      *pvSrc ,
+			IN unsigned int      u4Length);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecAssertFail
+ * @par Description
+ *   The function used to assert when occur error
+ * @param
+ *   ptr                [IN] The name of error source file
+ * @param
+ *   i4Line             [IN] The line of error source file
+ * @param
+ *   i4Arg              [IN] The argumnet of error source file
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecAssertFail(IN char *ptr,
+			  IN int i4Line,
+			  IN int i4Arg);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecMMAP
+ * @par Description
+ *   The function used to memory map
+ * @param
+ *   prParam            [IN/OUT] The structure contains memory info for memory map
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecMMAP(VCODEC_OAL_MMAP_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecUnMMAP
+ * @par Description
+ *   The function used to memory unmap
+ * @param
+ *   prParam            [IN/OUT] The structure contains memory info for memory unmap
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecUnMMAP(VCODEC_OAL_MMAP_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecWaitISR
+ * @par Description
+ *   The ISR usage related function, whene trigger HW, we will use to wait HW complete
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for ISR usage
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VCodecWaitISR(VCODEC_OAL_ISR_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to allow using HW
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for Lock HW
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VCodecLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecUnLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to release HW for another instance
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for unLock HW
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VCodecUnLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecInitHWLock
+ * @par Description
+ *   The function used to init HW lock
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for init HW lock
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecInitHWLock(VCODEC_OAL_HW_REGISTER_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VCodecDeInitHWLock
+ * @par Description
+ *   The function used to deinit HW lock
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for deinit HW lock
+ * @par Returns
+ *   void
+ */
+void SP5_VCodecDeInitHWLock(VCODEC_OAL_HW_REGISTER_T *prParam);
+
+
+#if 0
+/**
+ * @par Function
+ *   SP5_VcodecTraceLog0
+ * @par Description
+ *   The function used to trace log for debug
+ * @param
+ *   eGroup             [IN] The value to define log importance priority
+ * @param
+ *   eIndex             [IN] The value to define log type
+ * @par Returns
+ *   void
+ */
+void SP5_VcodecTraceLog0(IN VCODEC_LOG_GROUP_T eGroup,
+			 IN VCODEC_LOG_INDEX_T eIndex
+			);
+
+
+/**
+ * @par Function
+ *   SP5_VcodecTraceLog1
+ * @par Description
+ *   The function used to trace log for debug
+ * @param
+ *   eGroup             [IN] The value to define log importance priority
+ * @param
+ *   eIndex             [IN] The value to define log type
+ * @param
+ *   arg                [IN] The input argument
+ * @par Returns
+ *   void
+ */
+void SP5_VcodecTraceLog1(IN VCODEC_LOG_GROUP_T eGroup,
+			 IN VCODEC_LOG_INDEX_T eIndex,
+			 IN UINT64 arg
+			);
+
+
+/**
+ * @par Function
+ *   SP5_VcodecTraceLog2
+ * @par Description
+ *   The function used to trace log for debug
+ * @param
+ *   eGroup             [IN] The value to define log importance priority
+ * @param
+ *   eIndex             [IN] The value to define log type
+ * @param
+ *   arg1               [IN] The input argument1
+ * @param
+ *   arg2               [IN] The input argument2
+ * @par Returns
+ *   void
+ */
+void SP5_VcodecTraceLog2(IN VCODEC_LOG_GROUP_T eGroup,
+			 IN  VCODEC_LOG_INDEX_T eIndex,
+			 IN  UINT64 arg1,
+			 IN  UINT64 arg2
+			);
+
+
+/**
+ * @par Function
+ *   SP5_VcodecTraceLog4
+ * @par Description
+ *   The function used to trace log for debug
+ * @param
+ *   eGroup             [IN] The value to define log importance priority
+ * @param
+ *   eIndex             [IN] The value to define log type
+ * @param
+ *   arg1               [IN] The input argument1
+ * @param
+ *   arg2               [IN] The input argument2
+ * @param
+ *   arg3               [IN] The input argument3
+ * @param
+ *   arg4               [IN] The input argument4
+ * @par Returns
+ *   void
+ */
+void SP5_VcodecTraceLog4(IN VCODEC_LOG_GROUP_T eGroup,
+			 IN  VCODEC_LOG_INDEX_T eIndex,
+			 IN  UINT64 arg1,
+			 IN  UINT64 arg2, IN  UINT64 arg3,
+			 IN  UINT64 arg4
+			);
+
+
+/**
+ * @par Function
+ *   SP5_VcodecTraceLog4
+ * @par Description
+ *   The function used to trace log for debug
+ * @param
+ *   eGroup             [IN] The value to define log importance priority
+ * @param
+ *   eIndex             [IN] The value to define log type
+ * @param
+ *   arg1               [IN] The input argument1
+ * @param
+ *   arg2               [IN] The input argument2
+ * @param
+ *   arg3               [IN] The input argument3
+ * @param
+ *   arg4               [IN] The input argument4
+ * @param
+ *   arg5               [IN] The input argument5
+ * @param
+ *   arg6               [IN] The input argument6
+ * @param
+ *   arg7               [IN] The input argument7
+ * @param
+ *   arg8               [IN] The input argument8
+ * @par Returns
+ *   void
+ */
+void SP5_VcodecTraceLog8(IN VCODEC_LOG_GROUP_T eGroup,
+			 IN  VCODEC_LOG_INDEX_T eIndex,
+			 IN  UINT64 arg1,
+			 IN  UINT64 arg2,
+			 IN  UINT64 arg3,
+			 IN UINT64 arg4,
+			 IN  UINT64 arg5,
+			 IN  UINT64 arg6,
+			 IN  UINT64 arg7,
+			 IN  UINT64 arg8
+			);
+#else
+/**
+ * @par Function
+ *   SP5_VCodecPrintf
+ * @par Description
+ *   The function used to trace log for debug
+ * @param
+ *   format             [IN] log string
+ * @param
+ *   ...                   [IN] log argument
+ */
+VCODEC_OAL_ERROR_T SP5_VCodecPrintf(IN const char *_Format, ...);
+#endif
+
+
+/**
+ * @par Function
+ *   SP5_VdoMemAllocAligned
+ * @par Description
+ *   The function used to alloc external working memry
+ * @param
+ *   handle             [IN] codec/driver handle
+ * @param
+ *   size               [IN] allocated memory size
+ * @param
+ *   u4AlignSize        [IN] allocated memory byte alignment
+ * @param
+ *   cachable           [IN] memory type
+ * @param
+ *   pBuf               [OUT] allocated memory buffer info
+ * @param
+ *   eMemCodec          [IN] allocated memory used for venc/vdec
+ * @par Returns
+ *   VAL_VOID_T
+ */
+VAL_VOID_T SP5_VdoMemAllocAligned(
+	VAL_VOID_T * handle,
+	VAL_UINT32_T size,
+	unsigned int u4AlignSize,
+	VCODEC_MEMORY_TYPE_T cachable,
+	VCODEC_BUFFER_T * pBuf,
+	VAL_MEM_CODEC_T eMemCodec
+);
+
+
+/**
+ * @par Function
+ *   SP5_VdoMemFree
+ * @par Description
+ *   The function used to free external working memry
+ * @param
+ *   handle             [IN] codec/driver handle
+ * @param
+ *   pBuf               [IN] allocated memory buffer info
+ * @par Returns
+ *   VAL_VOID_T
+ */
+VAL_VOID_T SP5_VdoMemFree(VAL_VOID_T *handle, VCODEC_BUFFER_T *pBuf);
+
+
+/**
+ * @par Function
+ *   SP5_VdoIntMalloc
+ * @par Description
+ *   The function used to alloc internal working memry
+ * @param
+ *   handle             [IN] codec/driver handle
+ * @param
+ *   size               [IN] allocated memory size
+ * @param
+ *   alignedsize        [IN] allocated memory byte alignment
+ * @param
+ *   prBuffer_adr       [OUT] allocated memory buffer info
+ * @par Returns
+ *   VAL_VOID_T
+ */
+VAL_VOID_T SP5_VdoIntMalloc(HANDLE  handle, unsigned int size, unsigned int alignedsize, VCODEC_BUFFER_T *prBuffer_adr);
+
+
+/**
+ * @par Function
+ *   SP5_VdoIntFree
+ * @par Description
+ *   The function used to free internal working memry
+ * @param
+ *   handle             [IN] codec/driver handle
+ * @param
+ *   prBuffer_adr       [IN] allocated memory buffer info
+ * @par Returns
+ *   VAL_VOID_T
+ */
+VAL_VOID_T SP5_VdoIntFree(HANDLE handle, VCODEC_BUFFER_T *prBuffer_adr);
+
+
+/**
+ * @par Function
+ *   SP5_RegSync
+ * @par Description
+ *   The function used to set register sync
+ * @param
+ *   type               [IN] BYTE/WORD/LONG
+ * @param
+ *   v                  [IN] register value
+ * @param
+ *   a                  [IN] register address
+ * @par Returns
+ *   VAL_VOID_T
+ */
+VAL_VOID_T SP5_RegSync(int type, unsigned int v, unsigned int a);
+
+
+/**
+ * @par Function
+ *   SP5_VMPEG4EncCodecWaitISR
+ * @par Description
+ *   The ISR usage related function, whene trigger HW, we will use to wait HW complete
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for ISR usage
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VMPEG4EncCodecWaitISR(VCODEC_OAL_ISR_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VMPEG4EncCodecLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to allow using HW
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for Lock HW
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VMPEG4EncCodecLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VMPEG4EncCodecUnLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to release HW for another instance
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for unLock HW
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VMPEG4EncCodecUnLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VH264DecCodecWaitISR
+ * @par Description
+ *   The ISR usage related function, whene trigger HW, we will use to wait HW complete
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for ISR usage
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VH264DecCodecWaitISR(VCODEC_OAL_ISR_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VH264DecCodecLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to allow using HW
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for Lock HW
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VH264DecCodecLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+/**
+ * @par Function
+ *   SP5_VH264DecCodecUnLockHW
+ * @par Description
+ *   The single/multiple instance usage function, to release HW for another instance
+ * @param
+ *   prParam            [IN/OUT] The structure contains used info for unLock HW
+ * @par Returns
+ *   int, return 1 if success, return 0 if failed
+ */
+int SP5_VH264DecCodecUnLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+/**
+ * @par Function
+ *   eValInit
+ * @par Description
+ *   The init driver function
+ * @param
+ *   a_phHalHandle      [IN/OUT] The codec/driver handle
+ * @par Returns
+ *   VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return VAL_RESULT_UNKNOWN_ERROR if failed
+ */
+VAL_RESULT_T eValInit(VAL_HANDLE_T *a_phHalHandle);
+
+
+/**
+ * @par Function
+ *   eValDeInit
+ * @par Description
+ *   The deinit driver function
+ * @param
+ *   a_phHalHandle      [IN/OUT] The codec/driver handle
+ * @par Returns
+ *   VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return VAL_RESULT_UNKNOWN_ERROR if failed
+ */
+VAL_RESULT_T eValDeInit(VAL_HANDLE_T *a_phHalHandle);
+
+
+/**
+ * @par Function
+ *   VCodecDrvCheck_Version
+ * @par Description
+ *   The function used to check codec library version
+ * @param
+ *   version            [IN/OUT] The codec library version
+ * @par Returns
+ *   int, return 0 if success, return -1 if failed
+ */
+int VCodecDrvCheck_Version(int version);
+
+/************  Multi-thread function ***********/
+
+/***** Thread Management Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_attr_init
+ * @par Description
+ *   The pthread_attr_init wrapper function
+ * @param
+ *   attr               [OUT] attr
+ * @par Returns
+ *   int, pthread_attr_init((pthread_attr_t *)attr);
+ */
+int VCodecDrvPthread_attr_init(OUT VCODEC_PTHREAD_ATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_attr_destroy
+ * @par Description
+ *   The pthread_attr_destroy wrapper function
+ * @param
+ *   attr               [IN] attr
+ * @par Returns
+ *   int, pthread_attr_destroy((pthread_attr_t *)attr);
+ */
+int VCodecDrvPthread_attr_destroy(IN VCODEC_PTHREAD_ATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_attr_getdetachstate
+ * @par Description
+ *   The pthread_attr_getdetachstate wrapper function
+ * @param
+ *   attr               [IN] attr
+ * @param
+ *   detachstate        [OUT] detachstate
+ * @par Returns
+ *   int, pthread_attr_getdetachstate((pthread_attr_t const *)attr, detachstate);
+ */
+int VCodecDrvPthread_attr_getdetachstate(IN const VCODEC_PTHREAD_ATTR_T * attr, OUT int *detachstate);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_attr_getdetachstate
+ * @par Description
+ *   The pthread_attr_getdetachstate wrapper function
+ * @param
+ *   attr               [IN] attr
+ * @param
+ *   detachstate        [OUT] detachstate
+ * @par Returns
+ *   int, pthread_attr_getdetachstate((pthread_attr_t const *)attr, detachstate);
+ */
+int VCodecDrvPthread_attr_setdetachstate(IN VCODEC_PTHREAD_ATTR_T * attr, IN  int detachstate);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_create
+ * @par Description
+ *   The pthread_create wrapper function
+ * @param
+ *   thread             [OUT] thread
+ * @param
+ *   attr               [IN] attr
+ * @param
+ *   start_routine      [IN] start_routine
+ * @param
+ *   arg                [IN] arg
+ * @par Returns
+ *   int, pthread_create((pthread_t *)thread, (pthread_attr_t const *)attr, start_routine, arg);
+ */
+int VCodecDrvPthread_create(
+	OUT VCODEC_PTHREAD_T * thread,
+	IN  const VCODEC_PTHREAD_ATTR_T * attr,
+	IN  void * (*start_routine)(void *),
+	IN  void *arg
+);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_kill
+ * @par Description
+ *   The pthread_kill wrapper function
+ * @param
+ *   tid                [IN] tid
+ * @param
+ *   sig                [IN] sig
+ * @par Returns
+ *   int, pthread_kill((pthread_t)tid, SIGUSR1);
+ */
+int VCodecDrvPthread_kill(IN VCODEC_PTHREAD_T tid, IN  int sig);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_exit
+ * @par Description
+ *   The pthread_exit wrapper function
+ * @param
+ *   retval             [OUT] retval
+ * @par Returns
+ *   void
+ */
+void VCodecDrvPthread_exit(OUT void *retval);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_join
+ * @par Description
+ *   The pthread_join wrapper function
+ * @param
+ *   thid               [IN] thid
+ * @param
+ *   ret_val            [OUT] ret_val
+ * @par Returns
+ *   int, pthread_join((pthread_t)thid, ret_val);
+ */
+int VCodecDrvPthread_join(IN  VCODEC_PTHREAD_T thid, OUT void **ret_val);
+
+/* int VCodecDrvPthread_detach(IN VCODEC_PTHREAD_T  thid); */
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_once
+ * @par Description
+ *   The pthread_once wrapper function
+ * @param
+ *   once_control       [IN] once_control
+ * @param
+ *   init_routine       [IN] init_routine
+ * @par Returns
+ *   int, pthread_once((pthread_once_t *)once_control, init_routine);
+ */
+int VCodecDrvPthread_once(IN VCODEC_PTHREAD_ONCE_T * once_control, IN void (*init_routine)(void));
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_self
+ * @par Description
+ *   The pthread_self wrapper function
+ * @par Returns
+ *   VCODEC_PTHREAD_T, (VCODEC_PTHREAD_T)pthread_self()
+ */
+VCODEC_PTHREAD_T VCodecDrvPthread_self(void);
+
+/* VCODEC_OAL_ERROR_T VCodecDrvPthread_equal(IN VCODEC_PTHREAD_T one,IN  VCODEC_PTHREAD_T two); */
+
+/***** Mutex Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutexattr_init
+ * @par Description
+ *   The pthread_mutexattr_init wrapper function
+ * @param
+ *   attr               [OUT] attr
+ * @par Returns
+ *   int, pthread_mutexattr_init((pthread_mutexattr_t *)attr);
+ */
+int VCodecDrvPthread_mutexattr_init(OUT VCODEC_PTHREAD_MUTEXATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutexattr_destroy
+ * @par Description
+ *   The pthread_mutexattr_destroy wrapper function
+ * @param
+ *   attr               [IN] attr
+ * @par Returns
+ *   int, pthread_mutexattr_destroy((pthread_mutexattr_t *)attr);
+ */
+int VCodecDrvPthread_mutexattr_destroy(IN VCODEC_PTHREAD_MUTEXATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutex_init
+ * @par Description
+ *   The pthread_mutex_init wrapper function
+ * @param
+ *   mutex              [OUT] mutex
+ * @param
+ *   attr               [IN] attr
+ * @par Returns
+ *   int, pthread_mutex_init((pthread_mutex_t *)mutex, (const pthread_mutexattr_t *)attr);
+ */
+int VCodecDrvPthread_mutex_init(OUT VCODEC_PTHREAD_MUTEX_T * mutex, IN  const VCODEC_PTHREAD_MUTEXATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutex_destroy
+ * @par Description
+ *   The pthread_mutex_destroy wrapper function
+ * @param
+ *   mutex              [IN] mutex
+ * @par Returns
+ *   int, pthread_mutex_destroy((pthread_mutex_t *)mutex);
+ */
+int VCodecDrvPthread_mutex_destroy(IN VCODEC_PTHREAD_MUTEX_T * mutex);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutex_lock
+ * @par Description
+ *   The pthread_mutex_lock wrapper function
+ * @param
+ *   mutex              [IN] mutex
+ * @par Returns
+ *   int, pthread_mutex_lock((pthread_mutex_t *)mutex);
+ */
+int VCodecDrvPthread_mutex_lock(IN VCODEC_PTHREAD_MUTEX_T * mutex);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutex_unlock
+ * @par Description
+ *   The pthread_mutex_unlock wrapper function
+ * @param
+ *   mutex              [IN] mutex
+ * @par Returns
+ *   int, pthread_mutex_unlock((pthread_mutex_t *)mutex);
+ */
+int VCodecDrvPthread_mutex_unlock(IN VCODEC_PTHREAD_MUTEX_T * mutex);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_mutex_trylock
+ * @par Description
+ *   The pthread_mutex_trylock wrapper function
+ * @param
+ *   mutex              [IN] mutex
+ * @par Returns
+ *   int, pthread_mutex_trylock((pthread_mutex_t *)mutex);
+ */
+int VCodecDrvPthread_mutex_trylock(IN VCODEC_PTHREAD_MUTEX_T * mutex);
+
+/***** Spin Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_spin_init
+ * @par Description
+ *   The pthread_spin_init wrapper function
+ * @param
+ *   lock               [OUT] lock
+ * @param
+ *   pshared            [IN] pshared
+ * @par Returns
+ *   int, -1, NOT implement
+ */
+int VCodecDrvPthread_spin_init(OUT VCODEC_PTHREAD_SPINLOCK_T * lock, IN  int pshared);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_spin_destroy
+ * @par Description
+ *   The pthread_spin_destroy wrapper function
+ * @param
+ *   lock               [IN] lock
+ * @par Returns
+ *   int, -1, NOT implement
+ */
+int VCodecDrvPthread_spin_destroy(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_spin_lock
+ * @par Description
+ *   The pthread_spin_lock wrapper function
+ * @param
+ *   lock               [IN] lock
+ * @par Returns
+ *   int, -1, NOT implement
+ */
+int VCodecDrvPthread_spin_lock(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_spin_trylock
+ * @par Description
+ *   The pthread_spin_trylock wrapper function
+ * @param
+ *   lock               [IN] lock
+ * @par Returns
+ *   int, -1, NOT implement
+ */
+int VCodecDrvPthread_spin_trylock(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_spin_unlock
+ * @par Description
+ *   The pthread_spin_unlock wrapper function
+ * @param
+ *   lock               [IN] lock
+ * @par Returns
+ *   int, -1, NOT implement
+ */
+int VCodecDrvPthread_spin_unlock(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+
+/***** Condition Variable Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_condattr_init
+ * @par Description
+ *   The pthread_condattr_init wrapper function
+ * @param
+ *   attr               [OUT] attr
+ * @par Returns
+ *   int, pthread_condattr_init((pthread_condattr_t *)attr);
+ */
+int VCodecDrvPthread_condattr_init(OUT VCODEC_PTHREAD_CONDATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_condattr_destroy
+ * @par Description
+ *   The pthread_condattr_destroy wrapper function
+ * @param
+ *   attr               [IN] attr
+ * @par Returns
+ *   int, pthread_condattr_destroy((pthread_condattr_t *)attr);
+ */
+int VCodecDrvPthread_condattr_destroy(IN VCODEC_PTHREAD_CONDATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_cond_init
+ * @par Description
+ *   The pthread_cond_init wrapper function
+ * @param
+ *   cond               [OUT] cond
+ * @param
+ *   attr               [IN] attr
+ * @par Returns
+ *   int, pthread_cond_init((pthread_cond_t *)cond, (const pthread_condattr_t *)attr);
+ */
+int VCodecDrvPthread_cond_init(OUT VCODEC_PTHREAD_COND_T * cond, IN  const VCODEC_PTHREAD_CONDATTR_T * attr);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_cond_destroy
+ * @par Description
+ *   The pthread_cond_destroy wrapper function
+ * @param
+ *   cond               [IN] cond
+ * @par Returns
+ *   int, pthread_cond_destroy((pthread_cond_t *)cond);
+ */
+int VCodecDrvPthread_cond_destroy(IN VCODEC_PTHREAD_COND_T * cond);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_cond_broadcast
+ * @par Description
+ *   The pthread_cond_broadcast wrapper function
+ * @param
+ *   cond               [IN] cond
+ * @par Returns
+ *   int, pthread_cond_broadcast((pthread_cond_t *)cond);
+ */
+int VCodecDrvPthread_cond_broadcast(IN VCODEC_PTHREAD_COND_T * cond);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_cond_signal
+ * @par Description
+ *   The pthread_cond_signal wrapper function
+ * @param
+ *   cond               [IN] cond
+ * @par Returns
+ *   int, pthread_cond_signal((pthread_cond_t *)cond);
+ */
+int VCodecDrvPthread_cond_signal(IN VCODEC_PTHREAD_COND_T * cond);
+
+
+/**
+ * @par Function
+ *   VCodecDrvPthread_cond_signal
+ * @par Description
+ *   The pthread_cond_wait wrapper function
+ * @param
+ *   cond               [IN] cond
+ * @param
+ *   mutex              [IN] mutex
+ * @par Returns
+ *   int, pthread_cond_wait((pthread_cond_t *)cond, (pthread_mutex_t *)mutex);
+ */
+int VCodecDrvPthread_cond_wait(IN VCODEC_PTHREAD_COND_T * cond, IN  VCODEC_PTHREAD_MUTEX_T * mutex);
+
+/************  End of Multi-thread function ***********/
+
+/***** Semaphore Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrv_sem_init
+ * @par Description
+ *   The sem_init wrapper function
+ * @param
+ *   sem                [IN] sem
+ * @param
+ *   pshared            [IN] pshared
+ * @param
+ *   value              [IN] value
+ * @par Returns
+ *   int, sem_init((sem_t*)sem, pshared, value);
+ */
+int VCodecDrv_sem_init(IN VCODEC_OAL_SEM_T * sem, IN int pshared, IN unsigned int value);
+
+
+/**
+ * @par Function
+ *   VCodecDrv_sem_destroy
+ * @par Description
+ *   The sem_destroy wrapper function
+ * @param
+ *   sem                [IN] sem
+ * @par Returns
+ *   int, sem_destroy((sem_t*)sem);
+ */
+int VCodecDrv_sem_destroy(IN VCODEC_OAL_SEM_T * sem);
+
+
+/**
+ * @par Function
+ *   VCodecDrv_sem_post
+ * @par Description
+ *   The sem_post wrapper function
+ * @param
+ *   sem                [IN] sem
+ * @par Returns
+ *   int, sem_post((sem_t*)sem);
+ */
+int VCodecDrv_sem_post(IN VCODEC_OAL_SEM_T * sem);
+
+
+/**
+ * @par Function
+ *   VCodecDrv_sem_wait
+ * @par Description
+ *   The sem_wait wrapper function
+ * @param
+ *   sem                [IN] sem
+ * @par Returns
+ *   int, sem_wait((sem_t*)sem);
+ */
+int VCodecDrv_sem_wait(IN VCODEC_OAL_SEM_T * sem);
+
+/***** Binding Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrvBindingCore
+ * @par Description
+ *   The function used to set given thread to binding specific CPU Core
+ * @param
+ *   ThreadHandle       [IN] given thread
+ * @param
+ *   u4Mask             [IN] specific CPU Core
+ * @par Returns
+ *   VCODEC_OAL_ERROR_T, return VCODEC_OAL_ERROR_NONE if success, return VCODEC_OAL_ERROR_ERROR if failed
+ */
+VCODEC_OAL_ERROR_T VCodecDrvBindingCore(IN  VCODEC_PTHREAD_T ThreadHandle, IN  unsigned int u4Mask);
+
+
+/**
+ * @par Function
+ *   VCodecDrvDeBindingCore
+ * @par Description
+ *   The function used to set given thread to debinding specific CPU Core
+ * @param
+ *   ThreadHandle       [IN] given thread
+ * @par Returns
+ *   VCODEC_OAL_ERROR_T, return VCODEC_OAL_ERROR_NONE if success, return VCODEC_OAL_ERROR_ERROR if failed
+ */
+VCODEC_OAL_ERROR_T VCodecDrvDeBindingCore(IN  VCODEC_PTHREAD_T ThreadHandle);
+
+
+/**
+ * @par Function
+ *   VCodecDrvGetAffinity
+ * @par Description
+ *   The function used to set given thread to get specific CPU Core affinity
+ * @param
+ *   ThreadHandle       [IN] given thread
+ * @param
+ *   pu4Mask            [OUT] CPU mask
+ * @param
+ *   pu4SetMask         [OUT] Set CPU mask
+ * @par Returns
+ *   VCODEC_OAL_ERROR_T, return VCODEC_OAL_ERROR_NONE if success, return VCODEC_OAL_ERROR_ERROR if failed
+ */
+VCODEC_OAL_ERROR_T VCodecDrvGetAffinity(
+	IN  VCODEC_PTHREAD_T ThreadHandle,
+	OUT  unsigned int *pu4Mask,
+	OUT  unsigned int *pu4SetMask
+);
+
+
+/**
+ * @par Function
+ *   VCodecDrvGetAffinity
+ * @par Description
+ *   The function used to get specific CPU Core loading
+ * @param
+ *   s4CPUid            [IN] COU id
+ * @param
+ *   ps4Loading         [OUT] CPU loading
+ * @par Returns
+ *   VCODEC_OAL_ERROR_T, return VCODEC_OAL_ERROR_NONE if success, return VCODEC_OAL_ERROR_ERROR if failed
+ */
+VCODEC_OAL_ERROR_T VCodecDrvCoreLoading(IN  int s4CPUid, OUT int *ps4Loading);
+
+
+/**
+ * @par Function
+ *   VCodecDrvGetAffinity
+ * @par Description
+ *   The function used to get total CPU Core number
+ * @param
+ *   ps4CPUNums         [OUT] CPU number
+ * @par Returns
+ *   VCODEC_OAL_ERROR_T, return VCODEC_OAL_ERROR_NONE if success, return VCODEC_OAL_ERROR_ERROR if failed
+ */
+VCODEC_OAL_ERROR_T VCodecDrvCoreNumber(OUT int *ps4CPUNums);
+
+
+/**
+ * @par Function
+ *   VCodecDrvSleep
+ * @par Description
+ *   The function used to sleep a while
+ * @param
+ *   u4Tick             [IN] unit: us
+ * @par Returns
+ *   void
+ */
+void VCodecDrvSleep(IN unsigned int u4Tick);
+
+
+/**
+ * @par Function
+ *   OAL_SMP_BindingCore
+ * @par Description
+ *   The function used to set given thread to binding specific CPU Core (only for test)
+ * @param
+ *   aCurrentTid        [IN] given thread id
+ * @param
+ *   aCPUid             [IN] specific CPU Core
+ * @par Returns
+ *   int, return 0 if success, return -1 if failed
+ */
+int OAL_SMP_BindingCore(int aCurrentTid, int aCPUid);   /* ONLY used for TEST in main.c */
+
+/***** MCI Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecConfigMCIPort
+ * @par Description
+ *   The function used to config MCI port
+ * @param
+ *   u4PortConfig       [IN] port config
+ * @param
+ *   pu4PortResult      [OUT] port result
+ * @param
+ *   eCodecType         [OUT] VDEC or VENC
+ * @par Returns
+ *   VCODEC_OAL_ERROR_T,
+ *   return VCODEC_OAL_ERROR_NONE if success,
+ *   return VCODEC_OAL_ERROR_ERROR or VAL_RESULT_UNKNOWN_ERROR if failed
+ */
+VCODEC_OAL_ERROR_T VCodecConfigMCIPort(
+	IN unsigned int u4PortConfig,
+	OUT unsigned int *pu4PortResult,
+	IN VCODEC_CODEC_TYPE_T eCodecType
+);
+
+
+/***** Software vdec lib Functions ******/
+
+
+/**
+ * @par Function
+ *   VCodecDrvMemAllocAligned_NC
+ * @par Description
+ *   The function used to alloc external working memry for non-cacheable
+ * @param
+ *   hDrv               [IN] codec/driver handle
+ * @param
+ *   u4Size             [IN] allocated memory size
+ * @param
+ *   u4AlignSize        [IN] allocated memory byte alignment
+ * @param
+ *   fgCacheable        [IN] memory type
+ * @param
+ *   prBuf              [OUT] allocated memory buffer info
+ * @par Returns
+ *   void
+ */
+void VCodecDrvMemAllocAligned_NC(
+	IN HANDLE hDrv,
+	IN unsigned int u4Size,
+	unsigned int u4AlignSize,
+	IN VCODEC_MEMORY_TYPE_T fgCacheable,
+	OUT VCODEC_BUFFER_T *prBuf
+);
+
+
+/**
+ * @par Function
+ *   VCodecDrvMemFree_NC
+ * @par Description
+ *   The function used to free external working memry
+ * @param
+ *   hDrv               [IN] codec/driver handle
+ * @param
+ *   prBuf              [IN] allocated memory buffer info
+ * @par Returns
+ *   void
+ */
+void VCodecDrvMemFree_NC(IN HANDLE hDrv, IN VCODEC_BUFFER_T *prBuf);
+
+
+/**
+ * @par Function
+ *   VDecCodecQueryInfo
+ * @par Description
+ *   The function used to query info
+ * @param
+ *   hDrv               [IN] codec/driver handle
+ * @param
+ *   ID                 [IN] query info type
+ * @param
+ *   pvQueryData        [OUT] query data
+ * @par Returns
+ *   void
+ */
+VCODEC_DEC_ERROR_T VDecCodecQueryInfo(IN HANDLE hDrv, IN VCODEC_DEC_QUERY_INFO_TYPE_T ID, OUT void *pvQueryData);
+#if 0
+/* MACRO */
+
+#include "mach/sync_write.h"
+
+#define SP5_REGSYNC_WriteB(v, a) \
+	mt65xx_reg_sync_writeb(v, a);
+
+#define SP5_REGSYNC_WriteW(v, a) \
+	mt65xx_reg_sync_writew(v, a);
+
+#define SP5_REGSYNC_WriteL(v, a) \
+	mt65xx_reg_sync_writel(v, a);
+
+
+VAL_VOID_T SP5_RegSyncWriteB(VAL_UINT32_T v, VAL_UINT32_T a);
+VAL_VOID_T SP5_RegSyncWriteW(VAL_UINT32_T v, VAL_UINT32_T a);
+VAL_VOID_T SP5_RegSyncWriteL(VAL_UINT32_T v, VAL_UINT32_T a);
+#endif
+#endif
diff --git a/kernel-headers/val_types_private.h b/kernel-headers/val_types_private.h
new file mode 100644
index 0000000..0675703
--- /dev/null
+++ b/kernel-headers/val_types_private.h
@@ -0,0 +1,235 @@
+#ifndef _VAL_TYPES_PRIVATE_H_
+#define _VAL_TYPES_PRIVATE_H_
+
+#include "val_types_public.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* #define __EARLY_PORTING__ */
+
+#define OALMEM_STATUS_NUM 16
+
+/**
+ * @par Enumeration
+ *   VAL_HW_COMPLETE_T
+ * @par Description
+ *   This is polling or interrupt for waiting for HW done
+ */
+typedef enum _VAL_HW_COMPLETE_T {
+	VAL_POLLING_MODE = 0,                       /* /< polling */
+	VAL_INTERRUPT_MODE,                         /* /< interrupt */
+	VAL_MODE_MAX = 0xFFFFFFFF                   /* /< Max result */
+}
+VAL_HW_COMPLETE_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_CODEC_TYPE_T
+ * @par Description
+ *   This is the item in VAL_OBJECT_T for open driver type and
+ *                    in VAL_CLOCK_T for clock setting and
+ *                    in VAL_ISR_T for irq line setting
+ */
+typedef enum _VAL_CODEC_TYPE_T {
+	VAL_CODEC_TYPE_NONE = 0,                    /* /< None */
+	VAL_CODEC_TYPE_MP4_ENC,                     /* /< MP4 encoder */
+	VAL_CODEC_TYPE_MP4_DEC,                     /* /< MP4 decoder */
+	VAL_CODEC_TYPE_H263_ENC,                    /* /< H.263 encoder */
+	VAL_CODEC_TYPE_H263_DEC,                    /* /< H.263 decoder */
+	VAL_CODEC_TYPE_H264_ENC,                    /* /< H.264 encoder */
+	VAL_CODEC_TYPE_H264_DEC,                    /* /< H.264 decoder */
+	VAL_CODEC_TYPE_SORENSON_SPARK_DEC,          /* /< Sorenson Spark decoder */
+	VAL_CODEC_TYPE_VC1_SP_DEC,                  /* /< VC-1 simple profile decoder */
+	VAL_CODEC_TYPE_RV9_DEC,                     /* /< RV9 decoder */
+	VAL_CODEC_TYPE_MP1_MP2_DEC,                 /* /< MPEG1/2 decoder */
+	VAL_CODEC_TYPE_XVID_DEC,                    /* /< Xvid decoder */
+	VAL_CODEC_TYPE_DIVX4_DIVX5_DEC,             /* /< Divx4/5 decoder */
+	VAL_CODEC_TYPE_VC1_MP_WMV9_DEC,             /* /< VC-1 main profile (WMV9) decoder */
+	VAL_CODEC_TYPE_RV8_DEC,                     /* /< RV8 decoder */
+	VAL_CODEC_TYPE_WMV7_DEC,                    /* /< WMV7 decoder */
+	VAL_CODEC_TYPE_WMV8_DEC,                    /* /< WMV8 decoder */
+	VAL_CODEC_TYPE_AVS_DEC,                     /* /< AVS decoder */
+	VAL_CODEC_TYPE_DIVX_3_11_DEC,               /* /< Divx3.11 decoder */
+	VAL_CODEC_TYPE_H264_DEC_MAIN,               /* /< H.264 main profile decoder (due to different packet) == 20 */
+	VAL_CODEC_TYPE_MAX = 0xFFFFFFFF             /* /< Max driver type */
+} VAL_CODEC_TYPE_T;
+
+
+typedef enum _VAL_CACHE_TYPE_T {
+
+	VAL_CACHE_TYPE_CACHABLE = 0,
+	VAL_CACHE_TYPE_NONCACHABLE,
+	VAL_CACHE_TYPE_MAX = 0xFFFFFFFF
+
+} VAL_CACHE_TYPE_T;
+
+
+/**
+ * @par Structure
+ *  VAL_INTMEM_T
+ * @par Description
+ *  This is a parameter for eVideoIntMemUsed()
+ */
+typedef struct _VAL_INTMEM_T {
+	VAL_VOID_T      *pvHandle;                  /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T    u4HandleSize;               /* /< [IN]     The size of video codec driver handle */
+	VAL_UINT32_T    u4MemSize;                  /* /< [OUT]    The size of internal memory */
+	VAL_VOID_T      *pvMemVa;                   /* /< [OUT]    The internal memory start virtual address */
+	VAL_VOID_T      *pvMemPa;                   /* /< [OUT]    The internal memory start physical address */
+	VAL_VOID_T      *pvReserved;                /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T    u4ReservedSize;             /* /< [IN]     The size of reserved parameter structure */
+} VAL_INTMEM_T;
+
+
+/**
+ * @par Structure
+ *  VAL_EVENT_T
+ * @par Description
+ *  This is a parameter for eVideoWaitEvent() and eVideoSetEvent()
+ */
+typedef struct _VAL_EVENT_T {
+	VAL_VOID_T      *pvHandle;                  /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T    u4HandleSize;               /* /< [IN]     The size of video codec driver handle */
+	VAL_VOID_T      *pvWaitQueue;               /* /< [IN]     The waitqueue discription */
+	VAL_VOID_T      *pvEvent;                   /* /< [IN]     The event discription */
+	VAL_UINT32_T    u4TimeoutMs;                /* /< [IN]     The timeout ms */
+	VAL_VOID_T      *pvReserved;                /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T    u4ReservedSize;             /* /< [IN]     The size of reserved parameter structure */
+} VAL_EVENT_T;
+
+
+/**
+ * @par Structure
+ *  VAL_MUTEX_T
+ * @par Description
+ *  This is a parameter for eVideoWaitMutex() and eVideoReleaseMutex()
+ */
+typedef struct _VAL_MUTEX_T {
+	VAL_VOID_T      *pvHandle;                  /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T    u4HandleSize;               /* /< [IN]     The size of video codec driver handle */
+	VAL_VOID_T      *pvMutex;                   /* /< [IN]     The Mutex discriptor */
+	VAL_UINT32_T    u4TimeoutMs;                /* /< [IN]     The timeout ms */
+	VAL_VOID_T      *pvReserved;                /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T    u4ReservedSize;             /* /< [IN]     The size of reserved parameter structure */
+} VAL_MUTEX_T;
+
+
+/**
+ * @par Structure
+ *  VAL_POWER_T
+ * @par Description
+ *  This is a parameter for eVideoHwPowerCtrl()
+ */
+typedef struct _VAL_POWER_T {
+	VAL_VOID_T          *pvHandle;              /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T        u4HandleSize;           /* /< [IN]     The size of video codec driver handle */
+	VAL_DRIVER_TYPE_T   eDriverType;            /* /< [IN]     The driver type */
+	VAL_BOOL_T          fgEnable;               /* /< [IN]     Enable or not. */
+	VAL_VOID_T          *pvReserved;            /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T        u4ReservedSize;         /* /< [IN]     The size of reserved parameter structure */
+	/* VAL_UINT32_T        u4L2CUser;              ///< [OUT]    The number of power user right now */
+} VAL_POWER_T;
+
+
+/**
+ * @par Structure
+ *  VAL_MMAP_T
+ * @par Description
+ *  This is a parameter for eVideoMMAP() and eVideoUNMAP()
+ */
+typedef struct _VAL_MMAP_T {
+	VAL_VOID_T      *pvHandle;                  /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T    u4HandleSize;               /* /< [IN]     The size of video codec driver handle */
+	VAL_VOID_T      *pvMemPa;                   /* /< [IN]     The physical memory address */
+	VAL_UINT32_T    u4MemSize;                  /* /< [IN]     The memory size */
+	VAL_VOID_T      *pvMemVa;                   /* /< [IN]     The mapped virtual memory address */
+	VAL_VOID_T      *pvReserved;                /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T    u4ReservedSize;             /* /< [IN]     The size of reserved parameter structure */
+} VAL_MMAP_T;
+
+
+typedef struct {
+	VAL_ULONG_T     u4ReadAddr;                 /* / [IN]  memory source address in VA */
+	VAL_UINT32_T    u4ReadData;                 /* / [OUT] memory data */
+} VAL_VCODEC_OAL_MEM_STAUTS_T;
+
+
+typedef struct {
+	/*
+	    /< [IN/OUT] HW is Completed or not, set by driver & clear by codec
+	       (0: not completed or still in lock status;
+	       1: HW is completed or in unlock status)
+	*/
+	VAL_UINT32_T    u4HWIsCompleted;
+	/*
+	    /< [OUT]    HW is Timeout or not, set by driver & clear by codec
+	       (0: not in timeout status;
+	       1: HW is in timeout status)
+	*/
+	VAL_UINT32_T    u4HWIsTimeout;
+	VAL_UINT32_T    u4NumOfRegister;            /* /< [IN]     Number of HW register need to store; */
+	VAL_VCODEC_OAL_MEM_STAUTS_T *pHWStatus;
+} VAL_VCODEC_OAL_HW_REGISTER_T;
+
+
+typedef struct {
+	VAL_VCODEC_OAL_HW_REGISTER_T    *Oal_HW_reg;
+	VAL_UINT32_T                    *Oal_HW_mem_reg;
+	VAL_UINT32_T                    *kva_Oal_HW_mem_reg;
+	VAL_ULONG_T                     pa_Oal_HW_mem_reg;
+	VAL_ULONG_T                     ObjId;
+	VAL_EVENT_T                     IsrEvent;
+	VAL_UINT32_T                    slotindex;
+	VAL_UINT32_T                    u4VCodecThreadNum;
+	VAL_UINT32_T                    u4VCodecThreadID[VCODEC_THREAD_MAX_NUM];
+	VAL_HANDLE_T                    pvHandle;   /* physical address of the owner handle */
+	VAL_UINT32_T                    u4NumOfRegister;
+	/* MAX 16 items could be read; //kernel space access register */
+	VAL_VCODEC_OAL_MEM_STAUTS_T     oalmem_status[OALMEM_STATUS_NUM];
+	VAL_ULONG_T                     kva_u4HWIsCompleted;
+	VAL_ULONG_T                     kva_u4HWIsTimeout;
+	VAL_UINT32_T                    tid1;
+	VAL_UINT32_T                    tid2;
+
+	/* record VA, PA */
+	VAL_UINT32_T                    *va1;
+	VAL_UINT32_T                    *va2;
+	VAL_UINT32_T                    *va3;
+	VAL_UINT32_T                    pa1;
+	VAL_UINT32_T                    pa2;
+	VAL_UINT32_T                    pa3;
+
+} VAL_VCODEC_OAL_HW_CONTEXT_T;
+
+
+typedef struct {
+	int     CPUid;                              /* [in] */
+	int     Loading;                            /* [out] */
+} VAL_VCODEC_CORE_LOADING_T;
+
+typedef void (*ena)(int);
+typedef void (*disa)(int);
+typedef void (*ena_timeout)(int, int);
+typedef int (*user_reg)(int, int);
+typedef void (*user_unreg)(int);
+typedef void (*user_enable)(int);
+typedef void (*user_disable)(int);
+typedef void (*user_enable_timeout)(int, int);
+typedef int (*user_reg_scn)(void);
+typedef void (*user_reg_scn_config)(int, int, int, int, int, int);
+typedef void (*user_unreg_scn)(int);
+
+
+
+typedef struct _VAL_INIT_HANDLE {
+	int i4DriverType;
+	int i4VENCLivePhoto;
+} VAL_INIT_HANDLE;
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_TYPES_PRIVATE_H_ */
diff --git a/kernel-headers/val_types_public.h b/kernel-headers/val_types_public.h
new file mode 100644
index 0000000..ed407ac
--- /dev/null
+++ b/kernel-headers/val_types_public.h
@@ -0,0 +1,581 @@
+#ifndef _VAL_TYPES_PUBLIC_H_
+#define _VAL_TYPES_PUBLIC_H_
+
+#include <sys/types.h>
+#include <linux/ion.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define IRQ_STATUS_MAX_NUM 16                   /* /< support max 16 return register values when HW done */
+
+#define VCODEC_THREAD_MAX_NUM 16                /* /< support max 16 multiple thread currently */
+
+/*=============================================================================
+ *                              Type definition
+ *===========================================================================*/
+
+typedef void                VAL_VOID_T;         /* /< void type definition */
+typedef char                VAL_BOOL_T;         /* /< char type definition */
+typedef char                VAL_CHAR_T;         /* /< char type definition */
+typedef signed char         VAL_INT8_T;         /* /< signed char type definition */
+typedef signed short        VAL_INT16_T;        /* /< signed short type definition */
+typedef signed int         VAL_INT32_T;        /* /< signed int type definition */
+typedef unsigned char       VAL_UCHAR_T;        /* /< unsigned char type definition */
+typedef unsigned char       VAL_UINT8_T;        /* /< unsigned char type definition */
+typedef unsigned short      VAL_UINT16_T;       /* /< unsigned short definition */
+typedef unsigned int       VAL_UINT32_T;       /* /< unsigned int type definition */
+typedef unsigned long long  VAL_UINT64_T;       /* /< unsigned long long type definition */
+typedef long long           VAL_INT64_T;        /* /< long long type definition */
+typedef unsigned long       VAL_HANDLE_T;       /* /< unsigned int (handle) type definition */
+typedef signed long         VAL_LONG_T;       /* / */
+typedef unsigned long       VAL_ULONG_T;       /* / */
+
+#define VAL_NULL        (0)                     /* /< VAL_NULL = 0 */
+#define VAL_TRUE        (1)                     /* /< VAL_TRUE = 1 */
+#define VAL_FALSE       (0)                     /* /< VAL_FALSE = 0 */
+
+/* /< VAL_RESOLUTION_CHANGED = 2, used to video resolution changed during playback */
+#define VAL_RESOLUTION_CHANGED       (2)
+
+/**
+ * @par Enumeration
+ *   VAL_MEM_CODEC_T
+ * @par Description
+ *   This is the item used to memory usage for video encoder or video decoder
+ */
+typedef enum _VAL_MEM_CODEC_T {
+	VAL_MEM_CODEC_FOR_VENC = 0,                 /* /< Memory for Video Encoder */
+	VAL_MEM_CODEC_FOR_VDEC,                     /* /< Memory for Video Decoder */
+	VAL_MEM_CODEC_MAX = 0xFFFFFFFF              /* /< Max Value */
+} VAL_MEM_CODEC_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_CHIP_NAME_T
+ * @par Description
+ *   This is the item for query chip name for HAL interface
+ */
+typedef enum _VAL_CHIP_NAME_T {
+	VAL_CHIP_NAME_MT6516 = 0,                   /* /< MT6516 */
+	VAL_CHIP_NAME_MT6571,                       /* /< MT6571 */
+	VAL_CHIP_NAME_MT6572,                       /* /< MT6572 */
+	VAL_CHIP_NAME_MT6573,                       /* /< MT6573 */
+	VAL_CHIP_NAME_MT6575,                       /* /< MT6575 */
+	VAL_CHIP_NAME_MT6577,                       /* /< MT6577 */
+	VAL_CHIP_NAME_MT6589,                       /* /< MT6589 */
+	VAL_CHIP_NAME_MT6582,                       /* /< MT6582 */
+	VAL_CHIP_NAME_MT8135,                       /* /< MT8135 */
+	VAL_CHIP_NAME_ROME,                         /* /< ROME */
+	VAL_CHIP_NAME_MT6592,                       /* /< MT6592 */
+	VAL_CHIP_NAME_MT8127,                       /* /< MT8127 */
+	VAL_CHIP_NAME_MT6752,                       /* /< MT6752 */
+	VAL_CHIP_NAME_MT6795,                       /* /< MT6795 */
+	VAL_CHIP_NAME_DENALI_1,                     /* /< Denali-1 */
+	VAL_CHIP_NAME_DENALI_2,                     /* /< Denali-2 */
+	VAL_CHIP_NAME_DENALI_3,                     /* /< Denali-3 */
+	VAL_CHIP_NAME_MT6570,                       /* /< Rainier (2 core) */
+	VAL_CHIP_NAME_MT6580,                       /* /< Rainier (4 core) */
+	VAL_CHIP_NAME_MT8163,
+	VAL_CHIP_NAME_MT8173,                       /* / <8173 */
+	VAL_CHIP_NAME_MT6755,                       /* / <Jade */
+	VAL_CHIP_NAME_MT6797,                       /* / <Everest */
+	VAL_CHIP_NAME_MAX = 0xFFFFFFFF              /* /< Max Value */
+} VAL_CHIP_NAME_T;
+
+/**
+ * @par Enumeration
+ *   VAL_CHIP_VARIANT_T
+ * @par Description
+ *   This is the item for query chip variant for HAL interface
+ */
+typedef enum _VAL_CHIP_VARIANT_T {
+	VAL_CHIP_VARIANT_MT6571L = 0,       /* /< MT6571L */
+	VAL_CHIP_VARIANT_MAX = 0xFFFFFFFF  /* /< Max Value */
+} VAL_CHIP_VARIANT_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_CHIP_VERSION_T
+ * @par Description
+ *   This is the item used to GetChipVersionAPI()
+ */
+typedef enum _VAL_CHIP_VERSION_T {
+	/* /< The data will be "6595" for 6595 series; "6795" for 6795 series, ... */
+	VAL_CHIP_VERSION_HW_CODE = 0,
+	/* /< The data will be "0000" for E1; "0001" for E2, ... */
+	VAL_CHIP_VERSION_SW_VER,
+	/* /< Max Value */
+	VAL_CHIP_VERSION_MAX = 0xFFFFFFFF
+} VAL_CHIP_VERSION_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_DRIVER_TYPE_T
+ * @par Description
+ *   This is the item for driver type
+ */
+typedef enum _VAL_DRIVER_TYPE_T {
+	VAL_DRIVER_TYPE_NONE = 0,                   /* /< None */
+	VAL_DRIVER_TYPE_MP4_ENC,                    /* /< MP4 encoder */
+	VAL_DRIVER_TYPE_MP4_DEC,                    /* /< MP4 decoder */
+	VAL_DRIVER_TYPE_H263_ENC,                   /* /< H.263 encoder */
+	VAL_DRIVER_TYPE_H263_DEC,                   /* /< H.263 decoder */
+	VAL_DRIVER_TYPE_H264_ENC,                   /* /< H.264 encoder */
+	VAL_DRIVER_TYPE_H264_DEC,                   /* /< H.264 decoder */
+	VAL_DRIVER_TYPE_SORENSON_SPARK_DEC,         /* /< Sorenson Spark decoder */
+	VAL_DRIVER_TYPE_VC1_SP_DEC,                 /* /< VC-1 simple profile decoder */
+	VAL_DRIVER_TYPE_RV9_DEC,                    /* /< RV9 decoder */
+	VAL_DRIVER_TYPE_MP1_MP2_DEC,                /* /< MPEG1/2 decoder */
+	VAL_DRIVER_TYPE_XVID_DEC,                   /* /< Xvid decoder */
+	VAL_DRIVER_TYPE_DIVX4_DIVX5_DEC,            /* /< Divx4/5 decoder */
+	VAL_DRIVER_TYPE_VC1_MP_WMV9_DEC,            /* /< VC-1 main profile (WMV9) decoder */
+	VAL_DRIVER_TYPE_RV8_DEC,                    /* /< RV8 decoder */
+	VAL_DRIVER_TYPE_WMV7_DEC,                   /* /< WMV7 decoder */
+	VAL_DRIVER_TYPE_WMV8_DEC,                   /* /< WMV8 decoder */
+	VAL_DRIVER_TYPE_AVS_DEC,                    /* /< AVS decoder */
+	VAL_DRIVER_TYPE_DIVX_3_11_DEC,              /* /< Divx3.11 decoder */
+	VAL_DRIVER_TYPE_H264_DEC_MAIN,              /* /< H.264 main profile decoder (due to different packet) == 20 */
+	/* /< H.264 main profile decoder for CABAC type but packet is the same, just for reload. */
+	VAL_DRIVER_TYPE_H264_DEC_MAIN_CABAC,
+	VAL_DRIVER_TYPE_VP8_DEC,                    /* /< VP8 decoder */
+	VAL_DRIVER_TYPE_MP2_DEC,                    /* /< MPEG2 decoder */
+	VAL_DRIVER_TYPE_VP9_DEC,                    /* /< VP9 decoder */
+	VAL_DRIVER_TYPE_VP8_ENC,                    /* /< VP8 encoder */
+	VAL_DRIVER_TYPE_VC1_ADV_DEC,                /* /< VC1 advance decoder */
+	VAL_DRIVER_TYPE_VC1_DEC,                    /* /< VC1 simple/main/advance decoder */
+	VAL_DRIVER_TYPE_JPEG_ENC,                   /* /< JPEG encoder */
+	VAL_DRIVER_TYPE_HEVC_ENC,                   /* /< HEVC encoder */
+	VAL_DRIVER_TYPE_HEVC_DEC,                   /* /< HEVC decoder */
+	VAL_DRIVER_TYPE_H264_ENC_LIVEPHOTO,         /* LivePhoto type */
+	VAL_DRIVER_TYPE_MAX = 0xFFFFFFFF            /* /< Max driver type */
+} VAL_DRIVER_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_RESULT_T
+ * @par Description
+ *   This is the return status of each OSAL function
+ */
+typedef enum _VAL_RESULT_T {
+	VAL_RESULT_NO_ERROR = 0,                    /* /< The function work successfully */
+	VAL_RESULT_INVALID_DRIVER,                  /* /< Error due to invalid driver */
+	VAL_RESULT_INVALID_PARAMETER,               /* /< Error due to invalid parameter */
+	VAL_RESULT_INVALID_MEMORY,                  /* /< Error due to invalid memory */
+	VAL_RESULT_INVALID_ISR,                     /* /< Error due to invalid isr request */
+	VAL_RESULT_ISR_TIMEOUT,                     /* /< Error due to invalid isr request */
+	VAL_RESULT_UNKNOWN_ERROR,                   /* /< Unknown error */
+	VAL_RESULT_RESTARTSYS,                      /* /< Restart sys */
+	VAL_RESULT_MAX = 0xFFFFFFFF                 /* /< Max result */
+} VAL_RESULT_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_MEM_ALIGN_T
+ * @par Description
+ *   This is the item for allocation memory byte alignment
+ */
+typedef enum _VAL_MEM_ALIGN_T {
+	VAL_MEM_ALIGN_1 = 1,                        /* /< 1 byte alignment */
+	VAL_MEM_ALIGN_2 = (1 << 1),                 /* /< 2 byte alignment */
+	VAL_MEM_ALIGN_4 = (1 << 2),                 /* /< 4 byte alignment */
+	VAL_MEM_ALIGN_8 = (1 << 3),                 /* /< 8 byte alignment */
+	VAL_MEM_ALIGN_16 = (1 << 4),                /* /< 16 byte alignment */
+	VAL_MEM_ALIGN_32 = (1 << 5),                /* /< 32 byte alignment */
+	VAL_MEM_ALIGN_64 = (1 << 6),                /* /< 64 byte alignment */
+	VAL_MEM_ALIGN_128 = (1 << 7),               /* /< 128 byte alignment */
+	VAL_MEM_ALIGN_256 = (1 << 8),               /* /< 256 byte alignment */
+	VAL_MEM_ALIGN_512 = (1 << 9),               /* /< 512 byte alignment */
+	VAL_MEM_ALIGN_1K = (1 << 10),               /* /< 1K byte alignment */
+	VAL_MEM_ALIGN_2K = (1 << 11),               /* /< 2K byte alignment */
+	VAL_MEM_ALIGN_4K = (1 << 12),               /* /< 4K byte alignment */
+	VAL_MEM_ALIGN_8K = (1 << 13),               /* /< 8K byte alignment */
+	VAL_MEM_ALIGN_MAX = 0xFFFFFFFF              /* /< Max memory byte alignment */
+} VAL_MEM_ALIGN_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_MEM_TYPE_T
+ * @par Description
+ *   This is the item for allocation memory type
+ */
+typedef enum _VAL_MEM_TYPE_T {
+	VAL_MEM_TYPE_FOR_SW = 0,                    /* /< External memory foe SW */
+	VAL_MEM_TYPE_FOR_HW_CACHEABLE,              /* /< External memory for HW Cacheable */
+	VAL_MEM_TYPE_FOR_HW_CACHEABLE_MCI,          /* /< External memory for HW Cacheable, with MCI port config */
+	VAL_MEM_TYPE_FOR_HW_NONCACHEABLE,           /* /< External memory for HW Non-Cacheable */
+	VAL_MEM_TYPE_MAX = 0xFFFFFFFF               /* /< Max memory type */
+} VAL_MEM_TYPE_T;
+
+
+/**
+ * @par Structure
+ *  VAL_MEM_ADDR_T
+ * @par Description
+ *  This is a structure for memory address
+ */
+typedef struct _VAL_MEM_ADDR_T {                 /* union extend 64bits for TEE*/
+    union {
+        VAL_ULONG_T    u4VA;                       /* /< [IN/OUT] virtual address */
+        VAL_UINT64_T u4VA_ext64;
+    };
+    union {
+        VAL_ULONG_T    u4PA;                       /* /< [IN/OUT] physical address */
+        VAL_UINT64_T u4PA_ext64;
+    };
+    union {
+        VAL_ULONG_T    u4Size;                     /* /< [IN/OUT] size */
+        VAL_UINT64_T u4Size_ext64;
+    };
+} VAL_MEM_ADDR_T;
+
+
+/**
+ * @par Structure
+ *  VAL_VCODEC_THREAD_ID_T
+ * @par Description
+ *  This is a structure for thread info
+ */
+typedef struct _VAL_VCODEC_THREAD_ID_T {
+	VAL_UINT32_T    u4tid1; /* /< [IN/OUT] thread id for single core */
+	VAL_UINT32_T    u4tid2; /* /< [IN/OUT] thread id for single core */
+	VAL_UINT32_T    u4VCodecThreadNum;                          /* /< [IN/OUT] thread num */
+	VAL_UINT32_T    u4VCodecThreadID[VCODEC_THREAD_MAX_NUM];    /* /< [IN/OUT] thread id for each thread */
+} VAL_VCODEC_THREAD_ID_T;
+
+
+/**
+ * @par Structure
+ *  VAL_VCODEC_CPU_LOADING_INFO_T
+ * @par Description
+ *  This is a structure for CPU loading info
+ */
+typedef struct _VAL_VCODEC_CPU_LOADING_INFO_T {
+	unsigned long long  _cpu_idle_time;         /* /< [OUT] cpu idle time */
+	unsigned long long  _thread_cpu_time;       /* /< [OUT] thread cpu time */
+	unsigned long long  _sched_clock;           /* /< [OUT] sched clock */
+	unsigned int        _inst_count;            /* /< [OUT] inst count */
+} VAL_VCODEC_CPU_LOADING_INFO_T;
+
+
+/**
+ * @par Structure
+ *  VAL_VCODEC_CPU_OPP_LIMIT_T
+ * @par Description
+ *  This is a structure for CPU opp limit info
+ */
+typedef struct _VAL_VCODEC_CPU_OPP_LIMIT_T {
+	int limited_freq;                           /* /< [IN] limited freq */
+	int limited_cpu;                            /* /< [IN] limited cpu */
+	int enable;                                 /* /< [IN] enable */
+} VAL_VCODEC_CPU_OPP_LIMIT_T;
+
+
+/**
+ * @par Structure
+ *  VAL_VCODEC_M4U_BUFFER_CONFIG_T
+ * @par Description
+ *  This is a structure for m4u buffer config
+ */
+typedef struct _VAL_VCODEC_M4U_BUFFER_CONFIG_T {
+	VAL_MEM_CODEC_T eMemCodec;                  /* /< [IN] memory usage for encoder or decoder */
+	VAL_UINT32_T    cache_coherent;             /* /< [IN] cache coherent or not */
+	VAL_UINT32_T    security;                   /* /< [IN] security or not */
+} VAL_VCODEC_M4U_BUFFER_CONFIG_T;
+
+
+/**
+ * @par Structure
+ *  VAL_MEMORY_T
+ * @par Description
+ *  This is a parameter for memory usaged function
+ */
+typedef struct _VAL_MEMORY_T {                /* union extend 64bits for TEE*/
+	VAL_MEM_TYPE_T  eMemType;                   /* /< [IN]     The allocation memory type */
+	union {
+		VAL_ULONG_T     u4MemSize;              /* /< [IN]     The size of memory allocation */
+		VAL_UINT64_T u4MemSize_ext64;
+	};
+    union {
+        VAL_VOID_T *pvMemVa;
+        VAL_UINT64_T pvMemVa_ext64;
+    };
+    union {
+        VAL_VOID_T *pvMemPa;
+        VAL_UINT64_T pvMemPa_ext64;
+    };
+	VAL_MEM_ALIGN_T eAlignment;                 /* /< [IN]     The memory byte alignment setting */
+    union {
+        VAL_VOID_T *pvAlignMemVa;
+        VAL_UINT64_T pvAlignMemVa_ext64;
+    };
+    union {
+        VAL_VOID_T *pvAlignMemPa;
+        VAL_UINT64_T pvAlignMemPa_ext64;
+    };
+	VAL_MEM_CODEC_T eMemCodec;                  /* /< [IN]     The memory codec for VENC or VDEC */
+	VAL_UINT32_T    i4IonShareFd;
+
+    union {
+        ion_user_handle_t pIonBufhandle;
+        VAL_UINT64_T pIonBufhandle_ext64;
+    };
+    union {
+        VAL_VOID_T      *pvReserved;            /* /< [IN/OUT] The reserved parameter */
+        VAL_UINT64_T pvReserved_ext64;
+    };
+    union {
+        VAL_ULONG_T     u4ReservedSize;         /* /< [IN]     The size of reserved parameter structure */
+        VAL_UINT64_T u4ReservedSize_ext64;
+    };
+#ifdef __EARLY_PORTING__
+    union {
+        VAL_VOID_T      *pvReservedPmem;        /* /< [IN/OUT] The reserved parameter */
+        VAL_UINT64_T pvReservedPmem_ext64;
+    };
+#endif
+} VAL_MEMORY_T;
+
+/**
+ * @par Structure
+ *  VAL_RECORD_SIZE_T
+ * @par Description
+ *  This is a parameter for setting record size to EMI controller
+ */
+typedef struct __VAL_RECORD_SIZE_T {
+	VAL_UINT32_T    u4FrmWidth;                 /* /< [IN] Frame Width, (may not 16 byte-align) */
+	VAL_UINT32_T    u4FrmHeight;                /* /< [IN] Frame Height, (may not 16 byte-align) */
+	VAL_UINT32_T    u4BufWidth;                 /* /< [IN] Buffer Width, (must 16 byte-align) */
+	VAL_UINT32_T    u4BufHeight;                /* /< [IN] Buffer Height, (must 16 byte-align) */
+} VAL_RECORD_SIZE_T;
+
+
+/**
+ * @par Structure
+ *  VAL_ATOI_T
+ * @par Description
+ *  This is a parameter for eVideoAtoi()
+ */
+typedef struct _VAL_ATOI_T {
+	VAL_VOID_T      *pvStr;                     /* /< [IN]     Null-terminated String to be converted */
+	/* /< [Out]    returns the int value produced by interpreting the input characters as a number. */
+	VAL_INT32_T     i4Result;
+	VAL_VOID_T      *pvReserved;                /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T    u4ReservedSize;             /* /< [IN]     The size of reserved parameter structure */
+} VAL_ATOI_T;
+
+
+/**
+ * @par Structure
+ *  VAL_STRSTR_T
+ * @par Description
+ *  This is a parameter for eVideoStrStr()
+ */
+typedef struct _VAL_STRSTR_T {
+	VAL_VOID_T      *pvStr;                     /* /< [IN]     Null-terminated string to search. */
+	VAL_VOID_T      *pvStrSearch;               /* /< [IN]     Null-terminated string to search for */
+	/*
+	    /< [Out]    Returns a pointer to the first occurrence of strSearch in str,
+			or NULL if strSearch does not appear in str.
+	*/
+	VAL_VOID_T      *pvStrResult;
+	VAL_VOID_T      *pvReserved;                /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T    u4ReservedSize;             /* /< [IN]     The size of reserved parameter structure */
+} VAL_STRSTR_T;
+
+
+/**
+ * @par Structure
+ *  VAL_ISR_T
+ * @par Description
+ *  This is a parameter for ISR related function
+ */
+typedef struct _VAL_ISR_T {
+	VAL_VOID_T          *pvHandle;              /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T        u4HandleSize;           /* /< [IN]     The size of video codec driver handle */
+	VAL_DRIVER_TYPE_T   eDriverType;            /* /< [IN]     The driver type */
+	VAL_VOID_T          *pvIsrFunction;         /* /< [IN]     The isr function */
+	VAL_VOID_T          *pvReserved;            /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T        u4ReservedSize;         /* /< [IN]     The size of reserved parameter structure */
+	VAL_UINT32_T        u4TimeoutMs;            /* /< [IN]     The timeout in ms */
+	/* /< [IN]     The num of return registers when HW done */
+	VAL_UINT32_T        u4IrqStatusNum;
+	/* /< [IN/OUT] The value of return registers when HW done */
+	VAL_UINT32_T        u4IrqStatus[IRQ_STATUS_MAX_NUM];
+} VAL_ISR_T;
+
+
+/**
+ * @par Structure
+ *  VAL_HW_LOCK_T
+ * @par Description
+ *  This is a parameter for HW Lock/UnLock related function
+ */
+typedef struct _VAL_HW_LOCK_T {
+	VAL_VOID_T          *pvHandle;              /* /< [IN]     The video codec driver handle */
+	VAL_UINT32_T        u4HandleSize;           /* /< [IN]     The size of video codec driver handle */
+	VAL_VOID_T          *pvLock;                /* /< [IN/OUT] The Lock discriptor */
+	VAL_UINT32_T        u4TimeoutMs;            /* /< [IN]     The timeout ms */
+	VAL_VOID_T          *pvReserved;            /* /< [IN/OUT] The reserved parameter */
+	VAL_UINT32_T        u4ReservedSize;         /* /< [IN]     The size of reserved parameter structure */
+	VAL_DRIVER_TYPE_T   eDriverType;            /* /< [IN]     The driver type */
+	/* /< [IN] True if this is a secure instance // MTK_SEC_VIDEO_PATH_SUPPORT */
+	VAL_BOOL_T          bSecureInst;
+} VAL_HW_LOCK_T;
+
+
+/**
+ * @par Structure
+ *  VAL_TIME_T
+ * @par Description
+ *  This is a structure for system time.
+ */
+typedef struct _VAL_TIME_T {
+	VAL_UINT32_T    u4Sec;                      /* /< [IN/OUT] second */
+	VAL_UINT32_T    u4uSec;                     /* /< [IN/OUT] micro second */
+} VAL_TIME_T;
+
+
+/**
+ * @par Enumeration
+ *   VAL_SET_TYPE_T
+ * @par Description
+ *   This is the item for setting val parameter
+ */
+typedef enum _VAL_SET_TYPE_T {
+	VAL_SET_TYPE_CURRENT_SCENARIO,              /* /< Set current scenario */
+	VAL_SET_TYPE_MCI_PORT_CONFIG,               /* /< Set MCI port config */
+	VAL_SET_TYPE_M4U_PORT_CONFIG,               /* /< Set M4U port config */
+	VAL_SET_TYPE_SET_TCM_ON,                    /* /< Set TCM on */
+	VAL_SET_TYPE_SET_TCM_OFF,                   /* /< Set TCM off */
+} VAL_SET_TYPE_T;
+
+/**
+ * @par Enumeration
+ *   VAL_GET_TYPE_T
+ * @par Description
+ *   This is the item for getting val parameter
+ */
+typedef enum _VAL_GET_TYPE_T {
+	VAL_GET_TYPE_CURRENT_SCENARIO_CNT,          /* /< Get current scenario reference count */
+	VAL_GET_TYPE_LCM_INFO,                      /* /< Get LCM info */
+} VAL_GET_TYPE_T;
+
+/**
+ * @par Enumeration
+ *   VAL_VCODEC_SCENARIO
+ * @par Description
+ *   This is the item for get/setting current vcodec scenario
+ */
+typedef enum _VAL_VCODEC_SCENARIO_T {
+	VAL_VCODEC_SCENARIO_VENC_1080P  = 0x1,          /* /< Camera recording 1080P */
+	VAL_VCODEC_SCENARIO_VDEC_1080P  = 0x2,          /* /< Playback 1080P */
+	VAL_VCODEC_SCENARIO_VENC_WFD    = 0x4,          /* /< Wifi-display encoding */
+} VAL_VCODEC_SCENARIO_T;
+
+/**
+ * @par Structure
+ *  VAL_CURRENT_SCENARIO_T
+ * @par Description
+ *  This is a structure for set/get current scenario
+ */
+typedef struct _VAL_CURRENT_SCENARIO_T {
+	VAL_UINT32_T    u4Scenario;             /* /< [IN/OUT] set/get current scenario */
+	VAL_UINT32_T    u4OnOff;                /* /< [IN] set on/off (increment/decrement) 1 = inc, 0 = dec */
+} VAL_CURRENT_SCENARIO_T;
+
+/**
+ * @par Structure
+ *  VAL_CURRENT_SCENARIO_CNT_T
+ * @par Description
+ *  This is a structure for set/get current scenario reference count
+ */
+typedef struct _VAL_CURRENT_SCENARIO_CNT_T {
+	VAL_UINT32_T    u4Scenario;             /* /< [IN] current scenario type */
+	VAL_UINT32_T    u4ScenarioRefCount;     /* /< [OUT] current scenario reference count */
+} VAL_CURRENT_SCENARIO_CNT_T;
+
+
+/**
+ * @par Structure
+ *  VAL_MCI_PORT_CONFIG_T
+ * @par Description
+ *  This is a structure for set/get MCI port config
+ */
+typedef struct _VAL_MCI_PORT_CONFIG_T {
+	VAL_MEM_CODEC_T    eMemCodecType;       /* /< [IN] memory type - decoder/encoder */
+	VAL_UINT32_T       u4Config;            /* /< [IN] set port config */
+} VAL_MCI_PORT_CONFIG_T;
+
+/**
+ * @par Structure
+ *  VAL_LCM_INFO_T
+ * @par Description
+ *  This is a structure for get LCM info
+ */
+typedef struct _VAL_LCM_INFO_T {
+	VAL_UINT32_T        u4Width;            /* /< [OUT] width */
+	VAL_UINT32_T        u4Height;           /* /< [OUT] height */
+} VAL_LCM_INFO_T;
+
+#define VAL_M4U_PORT_ALL       (-1)        /* /< VAL_M4UPORT_DEFAULT_ALL = 1, config all M4U port for VENC or VDEC */
+
+/**
+ * @par Structure
+ *  VAL_M4U_MPORT_CONFIG_T
+ * @par Description
+ *  This is a parameter for eVideoSetParam() input structure
+ */
+typedef struct _VAL_M4U_MPORT_CONFIG_T {
+	/* /< [IN]  The memory codec for VENC or VDEC */
+	VAL_MEM_CODEC_T eMemCodec;
+	/* /< [IN]  config port ID (VAL_M4U_PORT_ALL[-1] = config all VENC or VDEC) */
+	VAL_UINT32_T        i4M4UPortID;
+	/* /< [IN]  config port security */
+	VAL_BOOL_T          bSecurity;
+	/* /< [IN]  config port virtuality */
+	VAL_BOOL_T          bVirtuality;
+} VAL_M4U_MPORT_CONFIG_T;
+
+
+/* for DirectLink Meta Mode + */
+#define META_HANDLE_LIST_MAX    50
+
+typedef struct _VAL_MetaBufInfo {
+	void               *pNativeHandle;
+	VAL_ULONG_T         u4VA;
+	VAL_ULONG_T         u4PA;
+	VAL_UINT32_T        u4BuffSize;
+	VAL_BOOL_T          bUseION;
+	int                 fd;
+    ion_user_handle_t   pIonBufhandle;
+} VAL_MetaBufInfo;
+
+typedef struct _VAL_MetaHandleList {
+	int                 mIonDevFd;
+	VAL_MetaBufInfo     rMetaBufInfo[META_HANDLE_LIST_MAX];
+	VAL_BOOL_T          fgSeqHdrEncoded;
+} VAL_MetaHandleList;
+
+typedef struct _VAL_BufInfo {
+	VAL_UINT8_T         fgIsConfigData;
+	VAL_ULONG_T         u4BSVA;
+	VAL_UINT8_T         fgBSStatus;
+	VAL_UINT8_T         fgIsKeyFrame;
+	VAL_UINT32_T        u4BSSize;
+} VAL_BufInfo;
+/* for DirectLink Meta Mode - */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_TYPES_PUBLIC_H_ */
diff --git a/kernel-headers/val_vcodec_utility.h b/kernel-headers/val_vcodec_utility.h
new file mode 100644
index 0000000..99ea8e9
--- /dev/null
+++ b/kernel-headers/val_vcodec_utility.h
@@ -0,0 +1,79 @@
+#ifndef _VAL_VCODEC_UTILITY_H_
+#define _VAL_VCODEC_UTILITY_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_public.h"
+#include "hal_api.h"
+
+/* for hardware vc1_dec + */
+
+/**
+ * @par Function
+ *   BPDec
+ * @par Description
+ *   The function used to BP dec
+ * @param
+ *   hHandle            [IN/OUT] handle
+ * @param
+ *   hBitHandle         [IN/OUT] bits nandle
+ * @param
+ *   bpType             [IN] WMV_BP_TYPE
+ * @par Returns
+ *   VDDRV_MRESULT_T, return VDDRV_MRESULT_SUCCESS is success, return others if fail
+ */
+VDDRV_MRESULT_T BPDec(VAL_HANDLE_T hHandle, VAL_HANDLE_T *hBitHandle, WMV_BP_TYPE bpType);
+
+
+/**
+ * @par Function
+ *   GetReadBSPt
+ * @par Description
+ *   The function used to get bitstream pointer
+ * @param
+ *   hHandle            [IN/OUT] handle
+ * @param
+ *   hBitsHandle        [IN/OUT] bits nandle
+ * @param
+ *   pBits              [IN] Bits
+ * @par Returns
+ *   VAL_UINT32_T, return bitstream pointer
+ */
+VAL_UINT32_T GetReadBSPt(VAL_HANDLE_T hHandle, VAL_HANDLE_T hBitsHandle, VAL_UINT32_T *pBits);
+
+
+/**
+ * @par Function
+ *   GetBPDecBits
+ * @par Description
+ *   The function used to get decode bits
+ * @param
+ *   hHandle            [IN/OUT] handle
+ * @par Returns
+ *   VAL_UINT32_T, return decode bits
+ */
+VAL_UINT32_T GetBPDecBits(VAL_HANDLE_T hHandle);
+
+
+/**
+ * @par Function
+ *   WMVDecode_HW
+ * @par Description
+ *   The function used to decode WMV
+ * @param
+ *   hHandle            [IN/OUT] handle
+ * @param
+ *   hBitHandle         [IN/OUT] bits nandle
+ * @par Returns
+ *   VDDRV_MRESULT_T, return VDDRV_MRESULT_SUCCESS is success, return others if fail
+ */
+VDDRV_MRESULT_T WMVDecode_HW(VAL_HANDLE_T hHandle, VAL_HANDLE_T *hBitHandle);
+/* for hardware vc1_dec - */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VAL_VCODEC_UTILITY_H_ */
diff --git a/kernel-headers/vcodec_OAL_v2.h b/kernel-headers/vcodec_OAL_v2.h
new file mode 100644
index 0000000..fa4ef40
--- /dev/null
+++ b/kernel-headers/vcodec_OAL_v2.h
@@ -0,0 +1,497 @@
+#ifndef VCODEC_OAL_V2_H
+#define VCODEC_OAL_V2_H
+#define IN
+#define OUT
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#include "vcodec_if_v2.h"
+
+#ifdef WIN32
+#include <windows.h>
+
+#endif
+#define VCODEC_OAL_VERSION 20140812
+#define VCODEC_ASSERT(expr, a)      \
+	do {if (!(expr)) rVCODEC_OAL_Function.VCodecAssertFail(__FILE__, __LINE__, a); } while (0)
+
+typedef enum {
+	VCODEC_OAL_CODEC_NONE = 0,
+	VCODEC_OAL_H264_DEC,
+	VCODEC_OAL_HEVC_DEC,
+	VCODEC_OAL_VP8_DEC,
+	VCODEC_OAL_VP9_DEC,
+	VCODEC_OAL_RMVB_DEC,
+	VCODEC_OAL_MPEG2_DEC,
+	VCODEC_OAL_MPEG4_DEC,
+	VCODEC_OAL_VC1_DEC,
+	VCODEC_OAL_H264_ENC,
+	VCODEC_OAL_HEVC_ENC,
+	VCODEC_OAL_VP8_ENC,
+	VCODEC_OAL_VP9_ENC,
+	VCODEC_OAL_MPEG4_ENC,
+	NUM_OF_VCODEC_OAL_CODEC_TYP,
+} VCODEC_OAL_CODEC_TYPE;
+
+typedef struct {
+	VCODEC_OAL_CODEC_TYPE eCodec;
+	void *reserve1;
+	void *reserve2;
+	void *reserve3;
+	void *reserve4;
+} VCODEC_OAL_HW_CTR_INFO_T;
+
+void VCodecQueryMemType(IN void *pBuffer_VA, IN unsigned int u4Size, OUT VCODEC_MEMORY_TYPE_T * peMemType);
+
+void VCodecQueryPhysicalAddr(IN void       *pBuffer_VA,
+			     OUT void     **pBufferOut_PA
+			    );
+
+/* VCodecSwitchMemType - return 0 if success. */
+/* return -1 if failed, but pBufferOut_VA will be assigned with pBuffer_VA */
+int VCodecSwitchMemType(IN void            *pBuffer_VA,
+			IN unsigned int    u4Size,
+			IN VCODEC_MEMORY_TYPE_T eMemType,
+			OUT void           **pBufferOut_VA
+		       );
+
+/* VCodecFlushCachedBuffer - u4Size is in byte */
+void VCodecFlushCachedBuffer(IN void         *pBuffer_VA,
+			     IN unsigned int u4Size
+			    );
+
+/* VCodecInvalidateCachedBuffer - u4Size is in byte */
+void VCodecInvalidateCachedBuffer(IN void         *pBuffer_VA,
+				  IN unsigned int  u4Size
+				 );
+
+void VCodecFlushCachedBufferAll(void);
+
+void VCodecInvalidateCachedBufferAll(void);
+
+void VCodecFlushInvalidateCacheBufferAll(void);
+
+void  VCodecMemSet(IN void                *pBuffer_VA,
+		   IN char                cValue,
+		   IN unsigned int        u4Length
+		  );
+
+void  VCodecMemCopy(IN void             *pvDest ,
+		    IN const void       *pvSrc ,
+		    IN unsigned int      u4Length
+		   );
+typedef struct {
+	void *pBuffer_PA;                  /* /< [IN]     The physical memory address */
+	unsigned int u4MemSize;      /* /< [IN]     The memory size to be mapped */
+	void *pBuffer_VA;               /* /< [OUT]     The mapped virtual memory address */
+} VCODEC_OAL_MMAP_T;
+
+void VCodecMMAP(VCODEC_OAL_MMAP_T *prParam);
+void VCodecUnMMAP(VCODEC_OAL_MMAP_T *prParam);
+
+
+typedef enum {
+	VCODEC_OAL_VDEC,
+	VCODEC_OAL_VENC
+} VCODEC_OAL_CODEC;
+
+typedef struct {
+	unsigned int u4ReadAddr;            /* / [IN]    memory source address in VA */
+	unsigned int u4ReadData;            /* / [OUT]   memory data */
+} VCODEC_OAL_MEM_STAUTS_T;
+
+typedef struct {
+	/* /< [IOUT]    HW is Completed or not, set by driver & clear by codec
+			(0: not completed or still in lock status;
+			1: HW is completed or in unlock status)
+	*/
+	unsigned int u4HWIsCompleted;
+	/* /< [OUT]     HW is Timeout or not, set by driver & clear by codec
+			(0: not in timeout status;
+			1: HW is in timeout status)
+	*/
+	unsigned int u4HWIsTimeout;
+	unsigned int u4NumOfRegister;       /* /< [IN]     Number of HW register need to store; */
+	VCODEC_OAL_MEM_STAUTS_T *pHWStatus;
+} VCODEC_OAL_HW_REGISTER_T;
+
+typedef struct {
+	void *pvHandle;                  /* /< [IN]     The video codec handle */
+	void *pvIsrFunction;            /* /< [IN]     The isr function */
+	unsigned int u4TimeoutMs;       /* /< [IN]     The timeout in ms */
+	VCODEC_OAL_CODEC eCodec; /* /< [IN]     VDEC or VENC interrupt */
+} VCODEC_OAL_ISR_T;
+
+/* return value: HW is completed (1) or not (0) when function return */
+int VCodecWaitISR(VCODEC_OAL_ISR_T *prParam);
+
+
+typedef struct {
+	void *pvHandle;                               /* /< [IN]     The video codec handle */
+	unsigned int u4TimeoutMs;             /* /< [IN]     The timeout ms */
+} VCODEC_OAL_HW_LOCK_T;
+
+/* return value: HW is completed (1) or not (0) when function return */
+int VCodecLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+/* return value: HW is completed (1) or not (0) when function return */
+int VCodecUnLockHW(VCODEC_OAL_HW_LOCK_T *prParam);
+
+
+void VCodecInitHWLock(VCODEC_OAL_HW_REGISTER_T *prParam);
+
+void VCodecDeInitHWLock(VCODEC_OAL_HW_REGISTER_T *prParam);
+
+
+/****** Pthread define******/
+#ifdef WIN32
+#define VCODEC_PTHREAD_PROCESS_PRIVATE  0
+#define VCODEC_PTHREAD_PROCESS_SHARED   1
+#define VCODEC_PTHREAD_CREATE_JOINABLE  0
+#define VCODEC_PTHREAD_CREATE_DETACHED  1
+#define VCODEC_PTHREAD_SCOPE_PROCESS    0
+#define VCODEC_PTHREAD_SCOPE_SYSTEM     1
+#define VCODEC_PTHREAD_ONCE_INIT    0
+typedef volatile int  VCODEC_PTHREAD_ONCE_T;
+
+typedef int VCODEC_PTHREAD_ATTR_T;
+
+typedef int VCODEC_PTHREAD_MUTEXATTR_T;
+typedef int VCODEC_PTHREAD_CONDATTR_T;
+typedef CRITICAL_SECTION VCODEC_PTHREAD_MUTEX_T;
+
+typedef struct {
+	void *handle;
+	void *(*func)(void *arg);
+	void *arg;
+	void *ret;
+} VCODEC_PTHREAD_T;
+
+
+typedef struct {
+	int interlock;
+	VCODEC_PTHREAD_MUTEX_T mutex;
+} VCODEC_PTHREAD_SPINLOCK_T;
+typedef struct {
+	void *ptr;
+} VCODEC_PTHREAD_COND_T;
+#elif defined(ANDROID)
+#define VCODEC_PTHREAD_PROCESS_PRIVATE  0
+#define VCODEC_PTHREAD_PROCESS_SHARED   1
+#define VCODEC_PTHREAD_CREATE_JOINABLE  0
+#define VCODEC_PTHREAD_CREATE_DETACHED  1
+#define VCODEC_PTHREAD_SCOPE_PROCESS    0
+#define VCODEC_PTHREAD_SCOPE_SYSTEM     1
+#define VCODEC_PTHREAD_ONCE_INIT    0
+typedef long VCODEC_PTHREAD_T;
+typedef volatile int  VCODEC_PTHREAD_ONCE_T;
+typedef long VCODEC_PTHREAD_MUTEXATTR_T;
+typedef long VCODEC_PTHREAD_CONDATTR_T;
+typedef struct {
+	unsigned int flags;
+	void *stack_base;
+	unsigned int stack_size;
+	unsigned int guard_size;
+	unsigned int sched_policy;
+	unsigned int sched_priority;
+} VCODEC_PTHREAD_ATTR_T;
+
+typedef struct {
+	int volatile value;
+} VCODEC_PTHREAD_MUTEX_T;
+
+typedef struct {
+	int volatile value;
+} VCODEC_PTHREAD_COND_T;
+
+typedef struct {
+	int interlock;
+	VCODEC_PTHREAD_MUTEX_T mutex;
+} VCODEC_PTHREAD_SPINLOCK_T;
+/****** End of Pthread define******/
+#elif defined(LINUX)
+#define VCODEC_PTHREAD_CREATE_JOINABLE  0
+#define VCODEC_PTHREAD_CREATE_DETACHED  1
+#define VCODEC_SIZEOF_PTHREAD_ATTR_T 36
+#define VCODEC_SIZEOF_PTHREAD_MUTEX_T 24
+#define VCODEC_SIZEOF_PTHREAD_MUTEXATTR_T 4
+#define VCODEC_SIZEOF_PTHREAD_COND_T 48
+#define VCODEC_SIZEOF_PTHREAD_COND_COMPAT_T 12
+#define VCODEC_SIZEOF_PTHREAD_CONDATTR_T 4
+typedef unsigned long int VCODEC_PTHREAD_T;
+typedef union {
+	char __size[VCODEC_SIZEOF_PTHREAD_ATTR_T];
+	long int _align;
+} VCODEC_PTHREAD_ATTR_T;
+typedef struct VCODEC_PTHREAD_INTERNAL_SLIST {
+	struct VCODEC_PTHREAD_INTERNAL_SLIST *__next;
+} VCODEC_PTHREAD_SLIST_T;
+typedef union {
+	struct VCODEC_PTHREAD_MUTEX_S {
+		int __lock;
+		unsigned int __count;
+		int __owner;
+		int __kind;
+		unsigned int __nusers;
+		__extension__ union {
+			int __spins;
+			VCODEC_PTHREAD_SLIST_T __list;
+		};
+	} __data;
+	char __size[VCODEC_SIZEOF_PTHREAD_MUTEX_T];
+	long int _align;
+} VCODEC_PTHREAD_MUTEX_T;
+typedef union {
+	char __size[VCODEC_SIZEOF_PTHREAD_MUTEXATTR_T];
+	long int _align;
+} VCODEC_PTHREAD_MUTEXATTR_T;
+typedef union {
+	struct {
+		int __lock;
+		unsigned int __futex;
+		__extension__ unsigned long long int __total_seq;
+		__extension__ unsigned long long int __wakeup_seq;
+		__extension__ unsigned long long int __woken_seq;
+		void *__mutex;
+		unsigned int __nwaiters;
+		unsigned int __broadcast_seq;
+	} __data;
+	char __size[VCODEC_SIZEOF_PTHREAD_COND_T];
+	__extension__ long long int _align;
+} VCODEC_PTHREAD_COND_T;
+typedef union {
+	char __size[VCODEC_SIZEOF_PTHREAD_CONDATTR_T];
+	long int _align;
+} VCODEC_PTHREAD_CONDATTR_T;
+typedef int VCODEC_PTHREAD_ONCE_T;
+typedef volatile int VCODEC_PTHREAD_SPINLOCK_T;
+#else
+#error "platform undefined. @ vcodec_OAL.h"
+#endif /* endif WIN32 */
+
+
+typedef enum {
+	VCODEC_OAL_ERROR_NONE,
+	VCODEC_OAL_ERROR_ERROR,
+	VCODEC_OAL_ERROR_ASSERT_FAIL,
+	VCODEC_OAL_ERROR_ATTR_NOT_SUPPORT,
+	NUM_OF_VCODEC_OAL_ERROR_TYPE
+} VCODEC_OAL_ERROR_T;
+
+/* Semaphore */
+
+typedef struct {
+	volatile unsigned int  count;
+} VCODEC_OAL_SEM_T;
+
+
+int VCodecPthread_attr_init(OUT VCODEC_PTHREAD_ATTR_T * attr);
+int VCodecPthread_attr_destroy(IN VCODEC_PTHREAD_ATTR_T * attr);
+int VCodecPthread_attr_getdetachstate(IN const VCODEC_PTHREAD_ATTR_T * attr,
+				      OUT int *detachstate);
+int VCodecPthread_attr_setdetachstate(IN VCODEC_PTHREAD_ATTR_T * attr,
+				      IN  int detachstate);
+int VCodecPthread_create(
+	OUT VCODEC_PTHREAD_T * thread,
+	IN  const VCODEC_PTHREAD_ATTR_T * attr,
+	IN  void * (*start_routine)(void *),
+	IN  void *arg
+);
+int  VCodecPthread_kill(IN VCODEC_PTHREAD_T tid, IN  int sig);
+void VCodecPthread_exit(OUT void *retval);
+int  VCodecPthread_join(IN  VCODEC_PTHREAD_T thid, OUT void **ret_val);
+int  VCodecPthread_once(IN VCODEC_PTHREAD_ONCE_T * once_control,  IN void (*init_routine)(void));
+VCODEC_PTHREAD_T VCodecPthread_self(void);
+int VCodecPthread_mutexattr_init(OUT VCODEC_PTHREAD_MUTEXATTR_T * attr);
+int VCodecPthread_mutexattr_destroy(IN VCODEC_PTHREAD_MUTEXATTR_T * attr);
+int VCodecPthread_mutex_init(OUT VCODEC_PTHREAD_MUTEX_T *mutex, IN  const VCODEC_PTHREAD_MUTEXATTR_T * attr);
+int VCodecPthread_mutex_destroy(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+int VCodecPthread_mutex_lock(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+int VCodecPthread_mutex_unlock(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+int VCodecPthread_mutex_trylock(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+int VCodecPthread_spin_init(OUT VCODEC_PTHREAD_SPINLOCK_T * lock, IN  int pshared);
+int VCodecPthread_spin_destroy(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+int VCodecPthread_spin_lock(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+int VCodecPthread_spin_trylock(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+int VCodecPthread_spin_unlock(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+int VCodecPthread_condattr_init(OUT VCODEC_PTHREAD_CONDATTR_T * attr);
+int VCodecPthread_condattr_destroy(IN VCODEC_PTHREAD_CONDATTR_T * attr);
+int VCodecPthread_cond_init(OUT VCODEC_PTHREAD_COND_T * cond, IN const VCODEC_PTHREAD_CONDATTR_T * attr);
+int VCodecPthread_cond_destroy(IN VCODEC_PTHREAD_COND_T * cond);
+int VCodecPthread_cond_broadcast(IN VCODEC_PTHREAD_COND_T * cond);
+int VCodecPthread_cond_signal(IN VCODEC_PTHREAD_COND_T * cond);
+int VCodecPthread_cond_wait(IN VCODEC_PTHREAD_COND_T * cond, IN VCODEC_PTHREAD_MUTEX_T *mutex);
+
+VCODEC_OAL_ERROR_T VCodecBindingCore(IN  VCODEC_PTHREAD_T tid,
+				     IN  unsigned int u4Mask);
+VCODEC_OAL_ERROR_T VCodecDeBindingCore(IN  VCODEC_PTHREAD_T tid);
+VCODEC_OAL_ERROR_T VCodecGetAffinity(IN  VCODEC_PTHREAD_T tid,
+				     OUT  unsigned int *pu4Mask,
+				     OUT  unsigned int *pu4SetMask);
+VCODEC_OAL_ERROR_T VCodecCoreLoading(IN  int s4CPUid,
+				     OUT int *ps4Loading);
+VCODEC_OAL_ERROR_T VCodecCoreNumber(OUT int *ps4CPUNums);
+void VCodecSleep(IN unsigned int u4Tick);
+int VCodec_sem_init(IN VCODEC_OAL_SEM_T * sem,
+		    IN int pshared,
+		    IN unsigned int value);
+int VCodec_sem_destroy(IN VCODEC_OAL_SEM_T * sem);
+int VCodec_sem_post(IN VCODEC_OAL_SEM_T * sem);
+int VCodec_sem_wait(IN VCODEC_OAL_SEM_T * sem);
+
+int VCodecCheck_Version(IN int version);
+
+#define VCodecOALPrintf(...) {rVCODEC_OAL_Function.VCodecPrintf(__VA_ARGS__); }
+
+VCODEC_OAL_ERROR_T VCodecConfigMCIPort(
+	IN unsigned int u4PortConfig,
+	OUT unsigned int *pu4PortResult,
+	IN VCODEC_CODEC_TYPE_T eCodecType
+);
+typedef struct {
+
+	void (*VCodecQueryMemType)(IN void *pBuffer_VA, IN unsigned int u4Size, OUT VCODEC_MEMORY_TYPE_T * peMemType);
+
+	void (*VCodecQueryPhysicalAddr)(IN void       *pBuffer_VA,
+					OUT void     **pBufferOut_PA);
+
+	/* VCodecSwitchMemType - return 0 if success. */
+	/* return -1 if failed, but pBufferOut_VA will be assigned with pBuffer_VA */
+	int (*VCodecSwitchMemType)(IN void            *pBuffer_VA,
+				   IN unsigned int    u4Size,
+				   IN VCODEC_MEMORY_TYPE_T eMemType,
+				   OUT void           **pBufferOut_VA);
+
+	/* VCodecFlushCachedBuffer - u4Size is in byte */
+	void (*VCodecFlushCachedBuffer)(IN void         *pBuffer_VA,
+					IN unsigned int u4Size);
+
+	/* VCodecInvalidateCachedBuffer - u4Size is in byte */
+	void (*VCodecInvalidateCachedBuffer)(IN void         *pBuffer_VA,
+					     IN unsigned int   u4Size);
+
+	void (*VCodecFlushCachedBufferAll)(void);
+
+	void (*VCodecInvalidateCachedBufferAll)(void);
+
+	void (*VCodecFlushInvalidateCacheBufferAll)(void);
+
+	void (*VCodecMemSet)(IN void                *pBuffer_VA,
+			     IN char                cValue,
+			     IN unsigned int        u4Length);
+
+	void (*VCodecMemCopy)(IN void             *pvDest ,
+			      IN const void      *pvSrc ,
+			      IN unsigned int      u4Length);
+
+	void (*VCodecAssertFail)(IN char *ptr,
+				 IN int i4Line,
+				 IN int i4Arg);
+
+	void (*VCodecMMAP)(VCODEC_OAL_MMAP_T *prParam);
+	void (*VCodecUnMMAP)(VCODEC_OAL_MMAP_T *prParam);
+	int (*VCodecWaitISR)(VCODEC_OAL_ISR_T *prParam);
+	int (*VCodecLockHW)(VCODEC_OAL_HW_LOCK_T *prParam);
+	int (*VCodecUnLockHW)(VCODEC_OAL_HW_LOCK_T *prParam);
+
+	void (*VCodecInitHWLock)(IN VCODEC_OAL_HW_REGISTER_T *prParam);
+
+	void (*VCodecDeInitHWLock)(IN VCODEC_OAL_HW_REGISTER_T *prParam);
+	int (*VCodecCheck_Version)(IN int version);
+	/************  Multi-thread function ***********/
+
+	/***** Thread Management Functions ******/
+	int (*VCodecPthread_attr_init)(OUT VCODEC_PTHREAD_ATTR_T * attr);
+	int (*VCodecPthread_attr_destroy)(IN VCODEC_PTHREAD_ATTR_T * attr);
+	int (*VCodecPthread_attr_getdetachstate)(IN const VCODEC_PTHREAD_ATTR_T * attr,
+						 OUT int *detachstate);
+	int (*VCodecPthread_attr_setdetachstate)(IN VCODEC_PTHREAD_ATTR_T * attr,
+						 IN  int detachstate);
+	int (*VCodecPthread_create)(
+		OUT VCODEC_PTHREAD_T *thread,
+		IN  const VCODEC_PTHREAD_ATTR_T * attr,
+		IN  void * (*start_routine)(void *),
+		IN  void *arg
+	);
+	int (*VCodecPthread_kill)(IN VCODEC_PTHREAD_T tid,
+				  IN  int sig);
+	void (*VCodecPthread_exit)(OUT void *retval);
+	int (*VCodecPthread_join)(IN  VCODEC_PTHREAD_T thid,
+				  OUT void **ret_val);
+	int (*VCodecPthread_once)(IN VCODEC_PTHREAD_ONCE_T * once_control,
+				  IN void (*init_routine)(void));
+	VCODEC_PTHREAD_T(*VCodecPthread_self)(void);
+
+	/***** Mutex Functions ******/
+	int (*VCodecPthread_mutexattr_init)(OUT VCODEC_PTHREAD_MUTEXATTR_T * attr);
+	int (*VCodecPthread_mutexattr_destroy)(IN VCODEC_PTHREAD_MUTEXATTR_T * attr);
+	int (*VCodecPthread_mutex_init)(OUT VCODEC_PTHREAD_MUTEX_T *mutex, IN  const VCODEC_PTHREAD_MUTEXATTR_T * attr);
+	int (*VCodecPthread_mutex_destroy)(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+	int (*VCodecPthread_mutex_lock)(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+	int (*VCodecPthread_mutex_unlock)(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+	int (*VCodecPthread_mutex_trylock)(IN VCODEC_PTHREAD_MUTEX_T *mutex);
+
+	/***** Spin Functions ******/
+	int (*VCodecPthread_spin_init)(OUT VCODEC_PTHREAD_SPINLOCK_T * lock,
+				       IN  int pshared);
+	int (*VCodecPthread_spin_destroy)(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+	int (*VCodecPthread_spin_lock)(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+	int (*VCodecPthread_spin_trylock)(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+	int (*VCodecPthread_spin_unlock)(IN VCODEC_PTHREAD_SPINLOCK_T * lock);
+
+	/***** Condition Variable Functions ******/
+	int (*VCodecPthread_condattr_init)(OUT VCODEC_PTHREAD_CONDATTR_T * attr);
+	int (*VCodecPthread_condattr_destroy)(IN VCODEC_PTHREAD_CONDATTR_T * attr);
+	int (*VCodecPthread_cond_init)(OUT VCODEC_PTHREAD_COND_T * cond, IN  const VCODEC_PTHREAD_CONDATTR_T * attr);
+	int (*VCodecPthread_cond_destroy)(IN VCODEC_PTHREAD_COND_T * cond);
+	int (*VCodecPthread_cond_broadcast)(IN VCODEC_PTHREAD_COND_T * cond);
+	int (*VCodecPthread_cond_signal)(IN VCODEC_PTHREAD_COND_T * cond);
+	int (*VCodecPthread_cond_wait)(IN VCODEC_PTHREAD_COND_T * cond,
+				       IN  VCODEC_PTHREAD_MUTEX_T *mutex);
+
+	/************  End of Multi-thread function ***********/
+
+	/***** Semaphore Functions ******/
+
+	int (*VCodec_sem_init)(IN VCODEC_OAL_SEM_T * sem,
+			       IN int pshared,
+			       IN unsigned int value);
+
+	int (*VCodec_sem_destroy)(IN VCODEC_OAL_SEM_T * sem);
+
+	int (*VCodec_sem_post)(IN VCODEC_OAL_SEM_T * sem);
+
+	int (*VCodec_sem_wait)(IN VCODEC_OAL_SEM_T * sem);
+
+	/***** Binding Functions ******/
+
+	VCODEC_OAL_ERROR_T(*VCodecBindingCore)(IN  VCODEC_PTHREAD_T tid,
+					       IN  unsigned int u4SetMask);
+	VCODEC_OAL_ERROR_T(*VCodecDeBindingCore)(IN  VCODEC_PTHREAD_T tid);
+
+	VCODEC_OAL_ERROR_T(*VCodecGetAffinity)(IN  VCODEC_PTHREAD_T tid,
+					       OUT  unsigned int *pu4CPUMask,
+					       OUT  unsigned int *pu4SetMask);
+
+	VCODEC_OAL_ERROR_T(*VCodecCoreLoading)(IN  int s4CPUid,
+					       OUT int *ps4Loading);
+	VCODEC_OAL_ERROR_T(*VCodecCoreNumber)(OUT int *ps4CPUNums);
+	/***** Others Functions ******/
+	void (*VCodecSleep)(IN unsigned int u4Tick);
+
+	VCODEC_OAL_ERROR_T(*VCodecConfigMCIPort)(
+		IN unsigned int u4PortConfig,
+		OUT unsigned int *pu4PortResult,
+		IN VCODEC_CODEC_TYPE_T eCodecType
+	);
+
+	VCODEC_OAL_ERROR_T(*VCodecPrintf)(IN const char *_Format, ...);
+
+} VCODEC_OAL_CALLBACK_T;
+
+extern VCODEC_OAL_CALLBACK_T rVCODEC_OAL_Function;
+int VCodecOALInit(IN VCODEC_OAL_CALLBACK_T *prVCODEC_OAL_Function);
+
+#endif /* VCODEC_OAL_H */
diff --git a/kernel-headers/vcodec_customization.h b/kernel-headers/vcodec_customization.h
new file mode 100644
index 0000000..b8e22b9
--- /dev/null
+++ b/kernel-headers/vcodec_customization.h
@@ -0,0 +1,19 @@
+#ifndef VCODEC_CUSTOMIZATION_H
+#define VCODEC_CUSTOMIZATION_H
+
+#include "vcodec_if_v2.h"
+
+
+
+
+
+extern VCODEC_DEC_API_T *GetH264DecoderAPI(void);
+/* VCODEC_DEC_API_T *GetRMDecoderAPI(void);  //RV8,RV9,RV10 */
+/* VCODEC_DEC_API_T *GetMPEG4DecoderAPI(void); */
+/* VCODEC_DEC_API_T *GetMPEG4VTDecoderAPI(void); */
+/* VCODEC_DEC_API_T *GetVP8DecoderAPI(void); */
+
+/* VCODEC_ENC_API_T *GetMPEG4EncoderAPI(void); */
+/* VCODEC_ENC_API_T *GetMPEG4SWVTEncoderAPI(void); */
+
+#endif /* VCODEC_CUSTOMIZATION_H */
diff --git a/kernel-headers/vcodec_dec_demuxer_if_v2.h b/kernel-headers/vcodec_dec_demuxer_if_v2.h
new file mode 100644
index 0000000..057b778
--- /dev/null
+++ b/kernel-headers/vcodec_dec_demuxer_if_v2.h
@@ -0,0 +1,98 @@
+
+#ifndef VCODEC_DEC_DEMUXER_V2_IF_H
+#define VCODEC_DEC_DEMUXER_V2_IF_H
+
+
+typedef struct {
+	unsigned char *u4Address;
+	unsigned int u4Length;
+	int fgValid;
+} RM_DECODER_PAYLOAD_INFO_T;
+
+typedef struct {
+	unsigned int u4PayloadNumber;
+	RM_DECODER_PAYLOAD_INFO_T *pu1PayloadAddress;
+} RM_DECODER_INPUT_PARAM_T;
+
+typedef enum {
+	RV8 = 0,
+	RV9,
+	RV10
+} RM_CODEC_VERSION_T;
+
+#define MAX_NUM_RPR_SIZES 8
+typedef struct {
+	RM_CODEC_VERSION_T eDecoderVersion;
+	unsigned int u4MaxDimWidth;
+	unsigned int u4MaxDimHeight;
+	unsigned int u4NumRPRSizes;
+	unsigned int au4RPRSizes[2 * MAX_NUM_RPR_SIZES];
+} RM_DECODER_INIT_PARAM_T;
+
+typedef struct {
+	unsigned int MaxSupportWidthForYUV420_ASP;
+	unsigned int MaxSupportHeightForYUV420_ASP;
+	unsigned short u2FrameWidthInContainer;
+	unsigned short u2FrameHeightInContainer;
+} MPEG4_DECODER_PRIVATE_PARAM_T;
+
+/* The H264 uses the private data to transfer NAL units */
+/* The related data structure informations are defined as below */
+/*  */
+
+typedef struct {
+	unsigned char *u4Address;
+	unsigned int u4Length;
+} H264_DECODER_PAYLOAD_INFO_T;
+
+typedef struct {
+	unsigned int u4PayloadNumber;
+	H264_DECODER_PAYLOAD_INFO_T *pu1PayloadAddress;
+} H264_DECODER_INPUT_PARAM_T;
+
+typedef struct {
+	unsigned char *u4Address;
+	unsigned int u4Length;
+} VC1_DECODER_PAYLOAD_INFO_T;
+
+typedef struct {
+	unsigned int u4PayloadNumber;
+	VC1_DECODER_PAYLOAD_INFO_T *pu1PayloadAddress;
+} VC1_DECODER_INPUT_PARAM_T;
+
+typedef struct {
+	unsigned char *u4Address;
+	unsigned int u4Length;
+	unsigned short u2FrameWidthInContainer;
+	unsigned short u2FrameHeightInContainer;
+} MPEG4_DECODER_PAYLOAD_INFO_T;
+
+typedef struct {
+	unsigned int u4PayloadNumber;
+	MPEG4_DECODER_PAYLOAD_INFO_T *pu1PayloadAddress;
+} MPEG4_DECODER_INPUT_PARAM_T;
+typedef struct {
+	unsigned char *u4Address;
+	unsigned int u4Length;
+} MPEG4VT_DECODER_PAYLOAD_INFO_T;
+
+typedef struct {
+	unsigned int u4PayloadNumber;
+	MPEG4VT_DECODER_PAYLOAD_INFO_T *pu1PayloadAddress;
+} MPEG4VT_DECODER_INPUT_PARAM_T;
+
+typedef struct {
+	VCODEC_BUFFER_T     rPayload;
+	unsigned int        u4Length;
+} VP8_DECODER_INPUT_UNIT_T;
+
+typedef struct {
+	unsigned char *u4Address;
+	unsigned int u4Length;
+} HEVC_DECODER_PAYLOAD_INFO_T;
+
+typedef struct {
+	unsigned int u4PayloadNumber;
+	HEVC_DECODER_PAYLOAD_INFO_T *pu1Payload;
+} HEVC_DECODER_INPUT_PARAM_T;
+#endif /* VCODEC_DEC_DEMUXER_IF_H */
diff --git a/kernel-headers/vcodec_if_v2.h b/kernel-headers/vcodec_if_v2.h
new file mode 100644
index 0000000..72f1bcd
--- /dev/null
+++ b/kernel-headers/vcodec_if_v2.h
@@ -0,0 +1,991 @@
+
+#ifndef VCODEC_IF_V2_H
+#define VCODEC_IF_V2_H
+
+/***************************************************
+*
+*   Chip definitions and Series definitions
+*
+***************************************************/
+
+
+#ifndef TRUE
+#define TRUE 1
+#elif TRUE != 1
+#error TRUE is not equal to 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#elif FALSE != 0
+#error FALSE is not equal to 0
+#endif
+#define IN
+#define OUT
+#define INOUT
+typedef void *HANDLE;
+#ifdef WIN32
+typedef unsigned __int64    UINT64;
+#else
+typedef unsigned long long  UINT64;
+#endif
+
+typedef enum {
+	VCODEC_DECODER,
+	VCODEC_ENCODER,
+	NUM_OF_CODEC_TYPE
+} VCODEC_CODEC_TYPE_T;
+
+typedef struct {
+	unsigned int u4YStride;
+	unsigned int u4UVStride;
+} VCODEC_YUV_STRIDE_T;
+
+typedef enum {
+	VCODEC_COLOR_FORMAT_YUV420,
+	VCODEC_COLOR_FORMAT_YV12,
+} VCODEC_COLOR_FORMAT_T;
+
+typedef struct {
+	unsigned int                MaxSupportWidth;
+	unsigned int                MaxSupportHeight;
+	unsigned int                eFlag;                   /* VCODEC_DEC_INPUT_FLAG_T */
+	unsigned int                ExternalMEMSize;
+	int                         OutBufferNum;            /* -1: .inf */
+	VCODEC_YUV_STRIDE_T         stride;
+	VCODEC_COLOR_FORMAT_T       eColorFormat;
+	void *PrivateData[4];
+} VCODEC_OPEN_SETTING_T;
+
+typedef struct {
+	unsigned int MaxSupportWidthForYUV420_BP;
+	unsigned int MaxSupportHeightForYUV420_BP;
+	unsigned int MaxSupportWidthForYUV420_MPHP;
+	unsigned int MaxSupportHeightForYUV420_MPHP;
+	unsigned int ExternalMEMSize;
+	unsigned int DPBSize;
+} H264_DEC_CUSTOM_SETTING_T;
+
+typedef struct {
+	unsigned int MaxSupportWidthForYUV420_MPHP;
+	unsigned int MaxSupportHeightForYUV420_MPHP;
+	unsigned int NormalMaxWidthForYUV420_MPHP;
+	unsigned int NormalMaxHeightForYUV420_MPHP;
+	unsigned int u4dpbSizes;
+	void *reserved[4];
+} H264_DECODER_PRIVATE_PARAM_T;
+/*
+typedef struct
+{
+    unsigned int MaxSupportWidthForYUV420_SP;
+    unsigned int MaxSupportHeightForYUV420_SP;
+    unsigned int MaxSupportWidthForYUV420_ASP;
+    unsigned int MaxSupportHeightForYUV420_ASP;
+    unsigned int ExternalMEMSize;
+} MPEG4_DEC_CUSTOM_SETTING_T;
+
+typedef struct
+{
+  unsigned int MaxSupportWidthForYUV420;
+  unsigned int MaxSupportHeightForYUV420;
+  unsigned int eFlag;                   //VCODEC_DEC_INPUT_FLAG_T
+  unsigned int ExternalMEMSize;
+  void *PrivateData[4];
+} VC1_DEC_CUSTOM_SETTING_T;
+*/
+
+typedef enum {
+	VCODEC_FRAMETYPE_I,
+	VCODEC_FRAMETYPE_NS_I, /* non-seek I, non-IDR frame */
+	VCODEC_FRAMETYPE_P,
+	VCODEC_FRAMETYPE_B,
+	VCODEC_HEADER,
+	VCODEC_FRM_DROPPED,
+	VCODEC_UNKNOWN_TYPE,
+	NUM_OF_FRAME_TYPE
+} VCODEC_FRAME_TYPE_T;
+
+
+
+typedef enum {
+	VA_NON_CACHED   = 0x0,
+	VA_CACHED       = 0x1,
+} VCODEC_BUFFER_ATTRIBUTE_T;
+
+typedef enum {
+	VCODEC_BUFFER_CACHEABLE           = 0,
+	VCODEC_BUFFER_NON_CACHEABLE     = 1,
+	VCODEC_BUFFER_MCI_SHARABLE      = 2
+} VCODEC_MEMORY_TYPE_T;
+typedef struct {
+	unsigned int u4InternalSize;
+	unsigned int u4ExternalSize;
+} VCODEC_MEMORY_SIZE_T;
+
+typedef struct {
+	unsigned char           *pu1Buffer_VA;
+	unsigned char           *pu1Buffer_PA;
+	unsigned int             eBufferStatus;/* VCODEC_BUFFER_ATTRIBUTE_T */
+} VCODEC_BUFFER_T;
+
+typedef enum {
+	VCODEC_DEC_ERROR_NONE,
+	VCODEC_DEC_ERROR_DECODE_ERROR,
+	VCODEC_DEC_ERROR_ASSERT_FAIL,
+	VCODEC_DEC_ERROR_FATAL_ERROR,
+	VCODEC_DEC_ERROR_NOT_SUPPORT,
+	VCODEC_DEC_ERROR_NOT_ENOUGH_MEM,
+	VCODEC_DEC_ERROR_PAYLOAD_DATA_ERROR,
+	VCODEC_DEC_ERROR_OAL_CHECK_VERSION_FAIL,
+	VCODEC_DEC_ERROR_DIMENSION_CHANGE,
+	NUM_OF_DEC_ERROR_TYPE
+} VCODEC_DEC_ERROR_T;
+
+
+typedef enum {
+	CUSTOM_SETTING, /* custom setting */
+	BEST_QUALITY,    /* standard mode */
+	FAVOR_QUALITY,   /* adaptive control decode mode , quality first */
+	FAVOR_FLUENCY,   /* adaptive control decode mode , fluency first */
+	BEST_FLUENCY,    /* fast mode */
+	NUM_OF_DECODE_MODE,
+} VCODEC_DEC_DECODE_MODE_T;
+
+
+
+typedef enum {
+	VCODEC_DEC_PARAM_EOF,
+	VCODEC_DEC_PARAM_QUERY_RESOLUTION_AHEAD,
+	VCODEC_DEC_PARAM_QUERY_RESOLUTION,
+	VCODEC_DEC_PARAM_QUERY_PREDICATION_TIME,
+	VCODEC_DEC_PARAM_MEMORY_REQUIREMENT,
+	VCODEC_DEC_PARAM_CAPABILITY,
+	VCODEC_DEC_PARAM_NOT_BUFFERING,
+	VCODEC_DEC_PARAM_BUFFERING,
+	VCODEC_DEC_PARAM_BITRATE,
+	VCODEC_DEC_PARAM_FRAMERATE,
+	VCODEC_DEC_PARAM_EXCLUDE_BUF_NUM,
+	VCODEC_DEC_PARAM_NO_OUTPUT_REORDERING,
+	VCODEC_DEC_PARAM_FLUSH_BUFFER,
+	VCODEC_DEC_PARAM_SET_DECRYPTION_MODE,
+	VCODEC_DEC_PARAM_SET_DECODE_MODE,
+	VCODEC_DEC_PARAM_GET_DECODE_MODE,
+	VCODEC_DEC_PARAM_CTRL_VOS,
+	VCODEC_DEC_PARAM_GET_SBSFLAG,
+	VCODEC_DEC_PARAM_CONCEAL_LEVEL,
+	VCODEC_DEC_PARAM_NUM_OF_HW_CTRL_THID,
+	/*Get registered HW control thread id , output structure : VCODEC_REG_HW_CTRL_THID_T*/
+	VCODEC_DEC_PARAM_GET_REG_HW_CTRL_THID,
+	VCODEC_DEC_PARAM_SET_COLOR_FORMAT,
+	/* VCODEC_DEC_PARAM_SET_STRIDE_ALIGNMENT, */
+	VCODEC_DEC_PARAM_SET_AVAILABLE_CPU_NUM,
+	VCODEC_DEC_PARAM_SET_MCI,                             /* enable or disable MCI mechanism */
+	NUM_OF_DEC_PARAM_TYPE,
+} VCODEC_DEC_PARAM_TYPE_T;
+
+typedef enum {
+	VCODEC_DEC_DISPLAY_CONCEALED_FRAME_DURING_PLAYBACK  = 0x01,
+	VCODEC_DEC_DISPLAY_CONCEALED_FRAME_BEFORE_FIRST_I   = 0X02,
+	VCODEC_DEC_DISPLAY_CONCEALED_FRAME_AFTER_FIRST_I   = 0X04,
+	NUM_OF_DEC_CONCEAL_LEVEL_TYPE,
+} VCODEC_DEC_CONCEAL_LEVEL_TYPE_T;
+typedef enum {
+	/* VCODEC_DEC_QUERY_INFO_AVAILABLE_YUV,                    //Total available YUV buffer */
+	/* VCODEC_DEC_QUERY_INFO_TOTAL_YUV,                        //Total number of YUV buffer */
+	/* //Total available display frame(without frame repeat) */
+	/* VCODEC_DEC_QUERY_INFO_AVAILABLE_DISPLAY_FRAME,      */
+	/* //Total real available display frame(including frame repeat) */
+	/* VCODEC_DEC_QUERY_INFO_REAL_AVAILABLE_DISPLAY_FRAME,  */
+	VCODEC_DEC_QUERY_INFO_OAL_FUNCTION,                 /* Query OAL Function pointer */
+	VCODEC_DEC_QUERY_INFO_CURRENT_TIME,                 /* Current play time */
+	VCODEC_DEC_QUERY_INFO_LAST_VIDEO_TIME,                 /* Last delivered frame time */
+	/* VCODEC_DEC_QUERY_INFO_OAL_FUNCTION_SMP,               //Query OAL Function pointer */
+	NUM_OF_QUERY_INFO_TYPE
+} VCODEC_DEC_QUERY_INFO_TYPE_T;
+
+typedef struct {
+	VCODEC_COLOR_FORMAT_T eColorFormat;
+	unsigned int          u4MaxWidth;
+	unsigned int          u4MaxHeight;
+	unsigned int          MaxVideoCodingResolution;
+} VCODEC_ENC_GENERAL_SETTING_T;
+
+typedef struct {
+	VCODEC_COLOR_FORMAT_T eColorFormat;
+	unsigned int         u4MaxWidth;
+	unsigned int         u4MaxHeight;
+	unsigned int         MaxVideoCodingResolution;
+	unsigned int         complexityIndex;
+} VCODEC_ENC_MPEG4_SETTING_T;
+
+typedef union {
+	VCODEC_ENC_MPEG4_SETTING_T     rMPEG4;
+	VCODEC_ENC_GENERAL_SETTING_T   rVT;
+	VCODEC_ENC_GENERAL_SETTING_T   rH264;
+	VCODEC_ENC_GENERAL_SETTING_T   rHEVC;
+	VCODEC_ENC_GENERAL_SETTING_T   rVP9;
+	VCODEC_ENC_GENERAL_SETTING_T   rVP8;
+} VCODEC_ENC_SETTING_T;
+
+typedef struct {
+	unsigned char *pu1ParamStream;
+	unsigned int  u4ParamLength;
+	unsigned int  u4Width;
+	unsigned int  u4Height;
+} VCODEC_DEC_QUERY_FRAME_SIZE_TYPE_T;
+
+typedef enum {
+	DISPLAY_CURRENT,  /* Normal dispaly */
+	REPEAT_LAST,      /* Frame skipping , error handling */
+	NOT_DISPLAY,      /* for vp8, error handling */
+	LAST_FRAME,       /* EOF */
+	NO_PIC,           /* buffering */
+	NOT_USED,         /* H.264 multi-slice */
+	DISPLAY_CURRENT_INTERLACE,    /* interlace dispaly */
+	NUM_OF_DISPLAY_FRAME_STATUS
+} VCODEC_DEC_DISPLAY_FRAME_STATUS;
+
+typedef struct {
+	int                      i4AspectRatioWidth;  /* width aspect ratio */
+	int                      i4AspectRatioHeight; /* height aspect ratio */
+	/* unsigned int                        u4IntraMBNum; */
+	/* unsigned int                        u4InterFMBNum; */
+	/* unsigned int                        u4InterBMBNum; */
+	/* unsigned int                        u4SkipMBNum; */
+	void                     *prExtra;
+} VCODEC_DEC_PRIVATE_OUTPUT_EXTRA_T;
+
+typedef struct {
+	UINT64                             u8TimeStamp;
+	int                                fgUpdateTime;   /* update time stamp */
+	unsigned short                     u2FrameWidth;   /* Full Frame Size */
+	unsigned short                     u2FrameHeight;  /* Full Frame Size */
+	unsigned short                     u2ClipTop;
+	unsigned short                     u2ClipBottom;
+	unsigned short                     u2ClipLeft;
+	unsigned short                     u2ClipRight;
+	VCODEC_FRAME_TYPE_T                eFrameType;
+	VCODEC_BUFFER_T                    rYStartAddr;   /*YUV buffer start address, include padding up and left*/
+	VCODEC_BUFFER_T                    rUStartAddr;
+	VCODEC_BUFFER_T                    rVStartAddr;
+	VCODEC_DEC_DISPLAY_FRAME_STATUS    eDisplayFrameStatus;
+	void                               *prExtra;
+} VCODEC_DEC_PRIVATE_OUTPUT_T;
+
+
+
+typedef void VCODEC_DEC_INPUT_DATA_T;
+
+typedef enum {
+	INPUT_FLAG_STREAM_DATA_TYPE     =  0x01,  /* Bit 0 = 1: Slice base data(non-frame base) ; 0: Frame base data*/
+	INPUT_FLAG_STARTTIME            =  0x02,  /* seek start time at end of seek */
+	INPUT_FLAG_DECODEONLY           =  0x04,  /* seek */
+	/* H.264 for SPS,PPS issue, send first frame bitstream for set parameter*/
+	INPUT_FLAG_PARAMETERSET         =  0x08,
+	INPUT_FLAG_CUSTOM_SETTING       =  0x10,  /* Get max external memory size(VE)*/
+	INPUT_FLAG_DECODE_INTRA_ONLY    =  0x20,  /* Only Decode Intra Frame */
+	INPUT_FLAG_OPENAPI              =  0x40,  /* OPENAPI */
+	INPUT_FLAG_DECODE_MODE          =  0x80,  /* Decode Mode */
+	INPUT_FLAG_LEGACY_MODE          =  0x100, /* legacy Mode */
+	INPUT_FLAG_MAX_DEC
+} VCODEC_DEC_INPUT_FLAG_T;
+
+typedef struct {
+	UINT64                      u8TimeStamp;
+	unsigned int                eFlags;           /* VCODEC_DEC_INPUT_FLAG_T */
+	VCODEC_DEC_INPUT_DATA_T *prInputData;
+	VCODEC_BUFFER_T             *prBuffer;        /* Input data address */
+	unsigned int                 u4BuffSize;      /* Input buffer total size */
+	void                        *prExtra;
+} VCODEC_DEC_INPUT_T;
+
+
+
+
+
+
+typedef struct {
+	unsigned int    u4Width;                /* Full size 16 byte align */
+	unsigned int    u4Height;               /* Full size 16 byte align */
+	unsigned short  u2ClipTop;
+	unsigned short  u2ClipBottom;
+	unsigned short  u2ClipLeft;
+	unsigned short  u2ClipRight;
+	unsigned int    u4Offset;               /* Offset of YUV buffer start address */
+	unsigned int    u4ReduceLength;         /* Padding size(End of YUV buffer pool) */
+	unsigned char   u1Alignment;            /* YUV buffer address alignment */
+	VCODEC_MEMORY_TYPE_T rYUVBUfferMemType; /* YUV buffer memory type */
+	unsigned int    u4MaxBufferNum;
+	unsigned int    u4ExtraBufferNum;
+	void            *prExtra;
+} VCODEC_DEC_OUTPUT_BUFFER_PARAM_T;
+
+typedef struct {
+	VCODEC_MEMORY_TYPE_T rBitStreamBufferMemType; /* bitstream buffer memory type */
+	unsigned int    u4MaxBufferNum;
+	void *PrivateData[4];
+} VCODEC_DEC_INPUT_BUFFER_PARAM_T;
+
+typedef struct {
+	VCODEC_BUFFER_T rYBuffer;
+	VCODEC_BUFFER_T rUBuffer;
+	VCODEC_BUFFER_T rVBuffer;
+} VCODEC_DEC_INPUT_YUV_INFO_T;
+
+/* non-callback */
+#define MAX_BITSTREAM_BUFFER_INFO_NUM 10
+#define MAX_REF_FREE_YUV_BUFFER_NUM 19
+typedef struct {
+	VCODEC_BUFFER_T       *prRetBitsBuf;    /* for mt6575, mt6577 */
+	unsigned int          u4ReturnInputCnt;
+	VCODEC_BUFFER_T       rReturnInput[MAX_BITSTREAM_BUFFER_INFO_NUM];
+	unsigned int          u4RefFreeYUVBufCnt;
+	VCODEC_DEC_INPUT_YUV_INFO_T       parRefFreeYUVBuf[MAX_REF_FREE_YUV_BUFFER_NUM];
+} VCODEC_DEC_OUTPUT_PARAM_T;
+/* ~non-callback */
+
+typedef struct {
+	unsigned int u4SupportWidth;
+	unsigned int u4SupportHeight;
+	unsigned int u4SupportResolution;
+	unsigned int u4SupportProfile;
+	unsigned int u4SupportLevel;
+} VCODEC_DEC_CAPABILITY_T;
+
+typedef struct {
+	void (*pfnMalloc)(IN HANDLE                             /* hDrv */,
+			  IN unsigned int                       /* u4Size */,
+			  IN unsigned int                       /*u4AlignSize*/,
+			  IN VCODEC_MEMORY_TYPE_T                     /* fgCacheable */,
+			  OUT VCODEC_BUFFER_T *                  /* prBuf */
+			 );  /* buffer address must cache line align */
+
+	void (*pfnIntMalloc)(IN HANDLE                             /* hDrv */,
+			     IN unsigned int                       /* u4Size */,
+			     IN unsigned int                       /*u4AlignSize*/,
+			     OUT VCODEC_BUFFER_T *                 /* pBuffer_adr */
+			    );
+
+	void (*pfnFree)(IN HANDLE                             /* hDrv */,
+			IN VCODEC_BUFFER_T *                   /* prBuf */
+		       );  /* same memory type with malloc */
+
+	void (*pfnIntFree)(IN HANDLE                             /* hDrv */,
+			   IN VCODEC_BUFFER_T *                 /* pBuffer_adr */
+			  );
+
+	VCODEC_DEC_ERROR_T(*pfnSetYUVBuffer)(IN HANDLE                              /* hDrv */,
+					     IN VCODEC_DEC_OUTPUT_BUFFER_PARAM_T *  /* prYUVParam */
+					    );
+
+	VCODEC_DEC_ERROR_T(*pfnGetYUVBuffer)(IN  HANDLE                             /* hDrv */,
+					     OUT VCODEC_DEC_INPUT_YUV_INFO_T *      /* prYUVBuf */
+					    );
+
+	void (*pfnRefFreeYUVBuffer)(IN HANDLE                             /* hDrv */,
+				    IN VCODEC_DEC_INPUT_YUV_INFO_T *      /* prYUVBuf */
+				   );
+
+	VCODEC_DEC_ERROR_T(*pfnQueryInfo)(IN HANDLE                              /* hDrv */,
+					  IN VCODEC_DEC_QUERY_INFO_TYPE_T        /* query id*/,
+					  OUT void *                           /* pvParamData*/ /* */
+					 );
+
+	void (*pfnReturnBitstream)(IN HANDLE /* hDrv */,
+				   IN VCODEC_BUFFER_T  * /* prBuffer */  /* Input buffer address */,
+				   IN unsigned int /* u4BuffSize */ /* Input buffer total size */
+				  );
+
+} VCODEC_DEC_CALLBACK_T;
+
+
+/* non-callback */
+typedef struct {
+	VCODEC_DEC_INPUT_T              *prInputData;
+	VCODEC_DEC_INPUT_YUV_INFO_T     *prYUVBufAddr;   /* prYUVBuf */
+} VIDEO_DECODER_INPUT_NC_T;
+
+
+
+typedef struct {
+	VCODEC_DEC_ERROR_T(*pfnGetCodecRequired)(IN    VCODEC_DEC_INPUT_T *                 /* prInput */ ,
+						 OUT   VCODEC_MEMORY_SIZE_T *               /* prMemSize */,
+						 OUT   VCODEC_DEC_OUTPUT_BUFFER_PARAM_T *   /* prBufferParameter*/,
+						 OUT   VCODEC_DEC_INPUT_BUFFER_PARAM_T *    /* prBitStreamParameter */,
+						 INOUT void *                               /* reserve */
+						);
+
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_DEC_ERROR_T(*pfnOpen)(IN HANDLE,                                             /* hDrv */
+				     IN VCODEC_DEC_CALLBACK_T *,        /* pfnCallback */
+				     IN void *,                            /* open setting */
+				     OUT HANDLE * ,                         /* hCodec */
+				     INOUT void *                                  /* reserve */
+				    );
+
+	VCODEC_DEC_ERROR_T(*pfnClose)(IN HANDLE   ,                                          /* hCodec */
+				      INOUT void *                           /* reserve */
+				     );
+
+	VCODEC_DEC_ERROR_T(*pfnInit)(IN HANDLE   ,                                           /* hCodec */
+				     INOUT void *                          /* reserve */
+				    );
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_DEC_ERROR_T(*pfnDeInit)(
+		IN HANDLE, /* hCodec */
+		IN HANDLE, /* hWrap */
+		OUT VCODEC_DEC_OUTPUT_PARAM_T * *, /* for smart phone */
+		INOUT void * /* reserve */);
+
+	VCODEC_DEC_ERROR_T(*pfnGetParameter)(IN HANDLE,                                     /* hCodec */
+					     IN VCODEC_DEC_PARAM_TYPE_T,
+					     INOUT void *                          /* pvParamData */
+					    );
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_DEC_ERROR_T(*pfnSetParameter)(IN HANDLE,                                     /* hCodec */
+					     IN HANDLE,                            /* hWrap */
+					     IN VCODEC_DEC_PARAM_TYPE_T,           /* eParamType */
+					     IN void *  ,                           /* pvParamData */
+					     INOUT void *                          /* reserve */
+					    );
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_DEC_ERROR_T(*pfnDecodeOneUnit)(
+		IN HANDLE, /* hCodec */
+		IN HANDLE, /* hWrap */
+		IN VIDEO_DECODER_INPUT_NC_T *, /* prInput */
+		OUT VCODEC_DEC_OUTPUT_PARAM_T * *, /* for smart phone */
+		INOUT void * /* reserve */
+	);
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_DEC_ERROR_T(*pfnGetNextDisplay)(IN HANDLE,                                   /* hCodec */
+					       IN HANDLE,                            /* hWrap */
+					       OUT VCODEC_DEC_PRIVATE_OUTPUT_T * ,    /* prPrivOutput */
+					       INOUT void *                          /* reserve */
+					      );
+} VIDEO_DEC_API_T;
+/* ~non-callback */
+
+
+
+
+
+
+
+typedef struct {
+
+	VCODEC_DEC_ERROR_T(*pfnGetCodecRequired)(IN    VCODEC_DEC_INPUT_T *                 /* prInput */ ,
+						 OUT   VCODEC_MEMORY_SIZE_T *               /* prMemSize */,
+						 /* prBufferParameter*/
+						 OUT   VCODEC_DEC_OUTPUT_BUFFER_PARAM_T *      ,
+						 /*prBitStreamParameter */
+						 OUT   VCODEC_DEC_INPUT_BUFFER_PARAM_T *       ,
+						 INOUT void *                              /* reserve */
+						);
+
+
+	VCODEC_DEC_ERROR_T(*pfnOpen)(IN HANDLE                             /* hDrv */,
+				     IN VCODEC_DEC_CALLBACK_T *            /* pfnCallback */,
+				     IN void *                             /* prOpenSetting */,
+				     OUT HANDLE *                          /* hCodec */  ,
+				     INOUT void *                          /* reserve */
+				    );
+
+	VCODEC_DEC_ERROR_T(*pfnClose)(IN HANDLE                             /* hCodec */,
+				      INOUT void *                          /* reserve */
+				     );
+
+	VCODEC_DEC_ERROR_T(*pfnInit)(IN HANDLE                             /* hCodec */,
+				     INOUT void *                          /* reserve */
+				    );
+
+	VCODEC_DEC_ERROR_T(*pfnDeInit)(IN HANDLE                             /* hCodec */,
+				       INOUT void *                          /* reserve */
+				      );
+
+	VCODEC_DEC_ERROR_T(*pfnGetParameter)(IN HANDLE                             /* hCodec */,
+					     IN VCODEC_DEC_PARAM_TYPE_T            /* eParamType */,
+					     INOUT void *                          /* pvParamData */,
+					     INOUT void *                          /* reserve */
+					    );
+
+	VCODEC_DEC_ERROR_T(*pfnSetParameter)(IN HANDLE                             /* hCodec */,
+					     IN VCODEC_DEC_PARAM_TYPE_T            /* eParamType */,
+					     IN void *                             /* pvParamData */,
+					     INOUT void *                          /* reserve */
+					    );
+
+	VCODEC_DEC_ERROR_T(*pfnDecodeOneUnit)(IN    HANDLE                         /* hCodec */,
+					      IN    VCODEC_DEC_INPUT_T *           /* prInput */,
+					      INOUT void *                         /* reserve */
+					     );
+
+	VCODEC_DEC_ERROR_T(*pfnGetNextDisplay)(IN    HANDLE                         /* hCodec */,
+					       OUT   VCODEC_DEC_PRIVATE_OUTPUT_T *  /* prPrivOutput */,
+					       INOUT void *                         /* reserve */
+					      );
+
+
+
+
+} VCODEC_DEC_API_T;
+
+typedef struct {
+	VIDEO_DEC_API_T  rVideoDecAPI;
+	VCODEC_DEC_API_T *pfnVcodecDecAPI;
+	VCODEC_DEC_INPUT_YUV_INFO_T rGetYUVBuf;
+	VCODEC_BUFFER_T rRetBitsBuf;
+	VCODEC_DEC_OUTPUT_PARAM_T rDecoderOutputParam;
+	unsigned int fgTookYUVBuff;
+	HANDLE hDriver;
+} VIDEO_WRAP_HANDLE_T;
+
+
+#define VCODEC_ENC_MAX_PKTS_IN_SET        99
+#define VCODEC_ENC_MAX_NALS_IN_SET        10
+
+typedef struct {
+	void        *u4Addr;
+	unsigned int u4Size;
+} VCODEC_ENC_CODEC_PACKET_INFO_T;
+
+
+/* Note the first two items in the next structure must be (in order): */
+/* 1. number of Packets */
+/* 2. pointer to the packet info */
+typedef struct {
+	unsigned int                                    u4NumOfPkts;
+	VCODEC_ENC_CODEC_PACKET_INFO_T  arPktInfo[VCODEC_ENC_MAX_PKTS_IN_SET];
+} VCODEC_ENC_PACKET_SET_T;
+
+
+typedef struct {
+	int          u4NalUnitType;
+	void        *u4Addr;        /* p_payload */
+	unsigned int u4Size;        /* i_payload */
+} VCODEC_ENC_CODEC_NAL_INFO_T;
+
+typedef struct {
+	unsigned int                    u4NumOfNals;
+	VCODEC_ENC_CODEC_NAL_INFO_T     arNalInfo[VCODEC_ENC_MAX_NALS_IN_SET];
+} VCODEC_ENC_NAL_SET_T;
+
+typedef enum {
+	MPEG4_RECODER,
+	MPEG4_VT,
+	H264_RECODER,
+	H264_VT,
+	NUM_OF_ENC_CODEC_TYPE
+} VCODEC_ENC_CODEC_TYPE_T;
+
+typedef struct {
+	VCODEC_FRAME_TYPE_T      eFrameType;
+	/* added to merge remained individual parameters in the phototype */
+	VCODEC_BUFFER_T          rBitstreamAddr;
+	unsigned int             u4BitstreamLength;
+	int                      fgEndOfFrame;
+	void                     *prChassis;
+	VCODEC_ENC_CODEC_TYPE_T   eCodecType;
+	UINT64                    u8TimeStamp;
+	void                      *reserved[4];
+} VCODEC_ENC_GENERAL_OUTPUT_T;
+
+typedef struct {
+	VCODEC_BUFFER_T rStartAddr;
+	VCODEC_BUFFER_T rEndAddr;
+	VCODEC_BUFFER_T rWriteAddr;
+	VCODEC_BUFFER_T rReadAddr;
+	unsigned int    u4BufferLength;
+} VCODEC_ENC_BUFFER_INFO_T;
+
+
+typedef enum {
+	INPUT_FLAG_YUVBUFFER          = 0x01,
+	INPUT_FLAG_NO_INPUT           = 0x02,
+	INPUT_FLAG_NO_MORE_INPUT    = 0x03,
+	INPUT_FLAG_MAX_ENC
+} VCODEC_ENC_INPUT_FLAG_T;
+
+typedef struct {
+	VCODEC_BUFFER_T rYUVBuffer;
+	unsigned int u4Length;
+} VCODEC_ENC_INPUT_INFO_T;
+
+typedef struct {
+	VCODEC_BUFFER_T rYBuffer;
+	VCODEC_BUFFER_T rUBuffer;
+	VCODEC_BUFFER_T rVBuffer;
+	unsigned int u4Length;
+} VCODEC_ENC_INPUT_YUV_INFO_T;
+
+
+
+typedef struct {
+	UINT64                 u8TimeStamp;
+	VCODEC_ENC_INPUT_FLAG_T  eFlags;
+	VCODEC_ENC_INPUT_INFO_T  rInput;
+} VCODEC_ENC_INPUT_PARAM_T;
+
+typedef struct {
+	UINT64                       u8TimeStamp;
+	VCODEC_ENC_INPUT_FLAG_T      eFlags;
+	VCODEC_ENC_INPUT_YUV_INFO_T rInput;
+	void *prExtra;
+} VCODEC_ENC_INPUT_YUV_PARAM_T;
+
+typedef struct {
+	VCODEC_BUFFER_T  rWp;
+	int            fgSliceContained;
+} VCODEC_ENC_UPDATE_WP_INTO_T;
+
+typedef enum {
+	VCODEC_ENC_ERROR_NONE,
+	VCODEC_ENC_ERROR,
+	VCODEC_ENC_ASSERT_FAIL,
+	VCODEC_ENC_BS_BUFFER_NOT_ENOUGH,
+	VCODEC_ENC_INPUT_REJECT,
+	VCODEC_ENC_PARAM_NOT_SUPPORT,
+	NUM_OF_ENC_ERROR_TYPE
+} VCODEC_ENC_ERROR_T;
+
+
+typedef enum {
+	/* Query ext/int memory requirement for adaptation */
+	VCODEC_ENC_PARAM_MEMORY_REQUIREMENT,
+	/* Query the prefer memory type of bitstream buffer, return true means cacheable buffer is preferred */
+	VCODEC_ENC_PARAM_BITSTREAM_IN_CACHE,
+	/* Query the alignment needed on frame buffer for codec */
+	VCODEC_ENC_PARAM_FRM_BUFFER_ALIGNMENT,
+	VCODEC_ENC_PARAM_HOLD_RES_TILL_RELEASE_FRM,
+	VCODEC_ENC_PARAM_IS_BLOCKBASED_YUV,
+	VCODEC_ENC_PARAM_DECODER_CONFIGURATION_RECORD,
+	VCODEC_ENC_PARAM_IF_ADAPTOR_MODIFY_TIMESTAMP,
+	VCODEC_ENC_PARAM_WIDTH,
+	VCODEC_ENC_PARAM_HEIGHT,
+	VCODEC_ENC_PARAM_BITRATE,
+	VCODEC_ENC_PARAM_FRAME_RATE,
+	VCODEC_ENC_PARAM_FRAME_RATE_NUM,
+	VCODEC_ENC_PARAM_FRAME_RATE_DEN,
+	VCDOEC_ENC_PARAM_AUD,
+	VCODEC_ENC_PARAM_REPEAD_HEADERS,
+	VCODEC_ENC_PARAM_ANNEXB,
+	VCODEC_ENC_PARAM_GEN_HEADER_FRM_RATE,
+	VCODEC_ENC_PARAM_SHORT_HEADER,
+	VCODEC_ENC_PARAM_SYNC_INTERVAL,
+	VCODEC_ENC_PARAM_MAX_PKG_SIZE,
+	VCODEC_ENC_PARAM_FORCE_ENCODE_I,
+	VCODEC_ENC_PARAM_QUALITY,
+	VCODEC_ENC_PARAM_SCENARIO,
+	VCODEC_ENC_PARAM_CODEC_TYPE,
+	VCODEC_ENC_PARAM_VT_RESTART,
+	VCODEC_ENC_PARAM_ROTATE,
+	VCODEC_ENC_PARAM_SET_CALLBACK,
+	VCODEC_ENC_PARAM_SET_NO_MORE_INPUT,
+	VCODEC_ENC_PARAM_NUM_OF_HW_CTRL_THID,
+	/* Get registered HW control thread id , output structure : VCODEC_REG_HW_CTRL_THID_T */
+	VCODEC_ENC_PARAM_GET_REG_HW_CTRL_THID,
+	VCODEC_ENC_PARAM_SET_COLOR_FORMAT,
+	VCODEC_ENC_PARAM_SET_YUV_STRIDE_ALIGNMENT,
+	VCODEC_ENC_PARAM_SET_AVAILABLE_CPU_NUM,
+	/* enable or disable MCI mechanism */
+	VCODEC_ENC_PARAM_SET_MCI,
+	VCODEC_ENC_PARAM_WPP,
+	VCODEC_ENC_PARAM_CONSTQ,
+	VCODEC_ENC_PARAM_RC_VERSION,
+	VCODEC_ENC_PARAM_INIT_QP,
+	VCODEC_ENC_PARAM_MAX_QP,
+	VCODEC_ENC_PARAM_MIN_QP,
+	VCODEC_ENC_PARAM_NUM_OF_SLICE,
+	VCODEC_ENC_PARAM_PROFILE,
+	VCODEC_ENC_PARAM_LEVEL,
+	VCODEC_ENC_PARAM_THREADS,
+	VCODEC_ENC_PARAM_VP8_TOKEN_PARTITIONS,
+	VCODEC_ENC_PARAM_VP9_ENABLE_TILES,
+	VCODEC_ENC_PARAM_VPX_ERR_RESILIENT,
+	VCODEC_ENC_PARAM_VPX_NUMBER_OF_LAYERS,
+	VCODEC_ENC_PARAM_VPX_MODE,
+	VCODEC_ENC_PARAM_VPX_CPU_USED,
+	VCODEC_ENC_PARAM_YUV_STRIDE,
+	NUM_OF_ENC_PARAM_TYPE
+} VCODEC_ENC_PARAM_TYPE_T;
+
+typedef enum {
+	VCODEC_ENC_QUERY_INFO_TOTAL_FRAME_BUFFER,      /* Total frame buffer size */
+	VCODEC_ENC_QUERY_INFO_FRAMES_QUEUED,           /* Number of frames waited to encoder */
+	VCODEC_ENC_QUERY_INFO_VTBUFFER_FULLNESS_DENOM, /* Denominator of VT buffer fullness */
+	VCODEC_ENC_QUERY_INFO_VTBUFFER_FULLNESS_NUM,   /* Numerator of VT buffer fullness */
+	VCODEC_ENC_QUERY_INFO_INIT_Q,                  /* Used by codec */
+	VCODEC_ENC_QUERY_INFO_MIN_QP,                  /* Used by codec */
+	VCODEC_ENC_QUERY_INFO_MAX_QP,                  /* Used by codec */
+	VCODEC_ENC_QUERY_INFO_INTRA_VOP_RATE,          /* Used by MED/codec */
+	VCODEC_ENC_QUERY_INFO_ALGORITHM,               /* Used by codec */
+	VCODEC_ENC_QUERY_INFO_BIT_RATE,                /* Used by MED/codec */
+	VCODEC_ENC_QUERY_INFO_RATE_HARD_LIMIT,         /* Used by codec */
+	VCODEC_ENC_QUERY_INFO_RATE_BALANCE,            /* Used by codec */
+	VCODEC_ENC_QUERY_INFO_DYNAMIC_RANGE_REDUCTION,
+	VCODEC_ENC_QUERY_INFO_IF_CUSTOMER_SET_TABLE,
+	VCODEC_ENC_QUERY_INFO_DYNAMIC_RANGE_TABLE,
+	VCODEC_ENC_QUERY_INFO_OAL_FUNCTION,
+	VCODEC_ENC_QUERY_INFO_ENCODER_FRAME_RATE,      /* Used by H.264 recoder */
+	VCODEC_ENC_QUERY_INFO_TARGET_COMPLEXITY,       /* Used by H.264 recoder */
+	VCODEC_ENC_QUERY_INFO_THRESHOLD_AVG_LOW,       /* Used by H.264 recoder */
+	VCODEC_ENC_QUERY_INFO_THRESHOLD_AVG_HIGH,      /* Used by H.264 recoder */
+	VCODEC_ENC_QUERY_INFO_THRESHOLD_CUR_LOW,       /* Used by H.264 recoder */
+	VCODEC_ENC_QUERY_INFO_THRESHOLD_CUR_HIGH,       /* Used by H.264 recoder */
+	/* VCODEC_ENC_QUERY_INFO_OAL_FUNCTION_SMP, */
+	VCODEC_ENC_QUERY_INFO_VPX_CPU_USED,
+	VCODEC_ENC_QUERY_INFO_VPX_MODE,
+	VCODEC_ENC_QUERY_INFO_FIXED_QP,
+	VCODEC_ENC_QUERY_INFO_SCENARIO,
+	NUM_OF_ENC_QUERY_INFO_TYPE
+} VCODEC_ENC_QUERY_INFO_TYPE_T;
+
+/**********************************************************************
+
+
+		       Encoder enumerations
+
+ **********************************************************************/
+
+/* clock-wise */
+typedef enum {
+	VCODEC_ENC_ROTATE_0     =   0,
+	VCODEC_ENC_ROTATE_90    =   1,
+	VCODEC_ENC_ROTATE_180   =   2,
+	VCODEC_ENC_ROTATE_270   =   3
+} VCODEC_ENC_ROTATE_ANGLE_T;
+
+typedef enum {
+	VCODEC_ENC_QUALITY_NONE,
+	VCODEC_ENC_QUALITY_LOW,
+	VCODEC_ENC_QUALITY_NORMAL,
+	VCODEC_ENC_QUALITY_GOOD,
+	VCODEC_ENC_QUALITY_FINE,
+	VCODEC_ENC_QUALITY_CUSTOM
+} VCODEC_ENC_QUALITY_T;
+
+typedef enum {
+	VCODEC_ENC_CODEC_TYPE_NONE,
+	VCODEC_ENC_CODEC_TYPE_MPEG4,
+	VCODEC_ENC_CODEC_TYPE_H263,
+	VCODEC_ENC_CODEC_TYPE_H264
+} VCODEC_ENC_CODEC_T;
+
+typedef struct {
+
+	void (*pfnMalloc)(IN HANDLE                             /* hDrv */,
+			  IN unsigned int                       /* u4Size */,
+			  IN unsigned int                       /*u4AlignSize*/,
+			  IN VCODEC_MEMORY_TYPE_T                     /* fgCacheable */,
+			  OUT VCODEC_BUFFER_T *                  /* prBuf */
+			 );   /*buffer address must cache line align */
+
+	void (*pfnIntMalloc)(IN HANDLE                             /* hDrv */,
+			     IN unsigned int                       /* u4Size */,
+			     IN unsigned int                       /*u4AlignSize*/,
+			     OUT VCODEC_BUFFER_T *                      /* prBuffer_adr */
+			    );
+
+
+	void (*pfnFree)(IN HANDLE                             /* hDrv */,
+			IN VCODEC_BUFFER_T *                   /* prBuf */
+		       );  /* same memory type with malloc */
+
+
+	void (*pfnIntFree)(IN HANDLE                             /* hDrv */,
+			   IN VCODEC_BUFFER_T *                   /* prBuffer_adr */
+			  );
+
+	void (*pfnReleaseYUV)(IN HANDLE                             /* hDrv */,
+			      IN VCODEC_BUFFER_T *                   /* prYUVBuf */
+			     );
+
+	void (*pfnPaused)(IN HANDLE                              /* hDrv */,
+			  IN VCODEC_BUFFER_T *                    /* prBitstreamBuf */
+			 );
+
+	void (*pfnAllocateBitstreamBuffer)(IN HANDLE                              /* hDrv */,
+					   OUT VCODEC_ENC_BUFFER_INFO_T *      /* prBitstreamBuf */
+					  );
+
+	void (*pfnUpdateBitstreamWP)(IN HANDLE                               /* hDrv */,
+				     IN VCODEC_ENC_UPDATE_WP_INTO_T *     /* prUpdateWritePointer */
+				    );
+	VCODEC_ENC_ERROR_T(*pfnQueryInfo)(IN HANDLE                              /* hDrv */,
+					  IN VCODEC_ENC_QUERY_INFO_TYPE_T        /* query id*/,
+					  OUT void *                           /* pvParamData*/
+					 );
+
+
+} VCODEC_ENC_CALLBACK_T;
+
+/* non-callback */
+typedef struct {
+	UINT64                       u8TimeStamp;
+	VCODEC_ENC_INPUT_FLAG_T      eFlags;
+	VCODEC_ENC_INPUT_INFO_T      rInput;
+	VCODEC_ENC_BUFFER_INFO_T     pBuffInfo;
+	VCODEC_COLOR_FORMAT_T       eVEncFormat;
+	unsigned int                 u4Width;
+	unsigned int                 u4Height;
+	unsigned int                 u4YStride;
+	unsigned int                 u4UVStride;
+	unsigned int                 u4SliceHeight;
+	void                         *reserved[4];
+} VIDEO_ENCODER_INPUT_PARAM_NC_T;
+/* non-callback */
+typedef struct {
+	UINT64                       u8TimeStamp;
+	VCODEC_ENC_INPUT_FLAG_T      eFlags;
+	VCODEC_ENC_INPUT_YUV_INFO_T  rInput;
+	VCODEC_ENC_BUFFER_INFO_T     pBuffInfo;
+	VCODEC_COLOR_FORMAT_T        eVEncFormat;
+	unsigned int                 u4Width;
+	unsigned int                 u4Height;
+	unsigned int                 u4YStride;
+	unsigned int                 u4UVStride;
+	unsigned int                 u4SliceHeight;
+	void                         *reserved[4];
+} VIDEO_ENCODER_INPUT_YUV_PARAM_NC_T;
+
+typedef struct {
+	VCODEC_ENC_ERROR_T(*pfnGetMemoryRequired)(
+		IN VCODEC_ENC_SETTING_T * rCodecFormat,
+		OUT VCODEC_MEMORY_SIZE_T * prExternalSize
+	);
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_ENC_ERROR_T(*pfnOpen)(IN HANDLE hDrv,
+				     IN HANDLE hWrapper,
+				     IN VCODEC_ENC_CALLBACK_T * ,
+				     OUT HANDLE *hCodec
+				    );
+
+	VCODEC_ENC_ERROR_T(*pfnInit)(IN HANDLE hCodec
+				    );
+
+	VCODEC_ENC_ERROR_T(*pfnGetParameter)(IN HANDLE hCodec,
+					     OUT VCODEC_ENC_PARAM_TYPE_T, /*VIDEO_ENC_MEMORY_T,*/
+					     void *
+					    );
+
+	VCODEC_ENC_ERROR_T(*pfnSetParameter)(IN HANDLE hCodec,
+					     /*VIDEO_ENCODER_QUALITY_T,
+					     VIDEO_ENCODER_CODEC_T,
+					     VIDEO_CODEC_ROTATE_ANGLE_T,*/
+					     IN VCODEC_ENC_PARAM_TYPE_T,
+					     void *
+					    );
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_ENC_ERROR_T(*pfnGenerateHeader)(IN HANDLE hCodec,
+					       IN HANDLE hWrapper,
+					       IN VCODEC_ENC_BUFFER_INFO_T *prBufferInfo /* for smart phone */
+					      );
+
+	/********************************************************
+	*  wrapped for smart phone
+	********************************************************/
+	VCODEC_ENC_ERROR_T(*pfnEncodeOneUnit)(IN HANDLE hCodec,
+					      IN HANDLE hWrapper,
+					      IN VIDEO_ENCODER_INPUT_YUV_PARAM_NC_T * prEncoderInputParamNC);
+
+	VCODEC_ENC_ERROR_T(*pfnDeInit)(IN HANDLE hCodec
+				      );
+
+	VCODEC_ENC_ERROR_T(*pfnClose)(IN HANDLE hCodec
+				     );
+
+	VCODEC_ENC_ERROR_T(*pfnGetNextBitstream)(IN HANDLE hCodec,
+						 OUT VCODEC_ENC_GENERAL_OUTPUT_T *
+						);
+} VIDEO_ENC_API_T;
+
+
+/* ~non-callback */
+
+typedef struct {
+	VCODEC_ENC_ERROR_T(*pfnGetMemoryRequired)(IN VCODEC_ENC_SETTING_T *,          /*prInput*/
+						  OUT VCODEC_MEMORY_SIZE_T *          /*prExternalSize*/
+						 );
+
+	VCODEC_ENC_ERROR_T(*pfnOpen)(IN HANDLE                            /*  hDrv  */,
+				     IN VCODEC_ENC_CALLBACK_T *        /* pfnCallback */,
+				     OUT HANDLE *                          /* hCodec */
+				    );
+
+	VCODEC_ENC_ERROR_T(*pfnInit)(IN HANDLE                                          /* hCodec */
+				    );
+
+	VCODEC_ENC_ERROR_T(*pfnGetParameter)(IN HANDLE                            /* hCodec */,
+					     IN VCODEC_ENC_PARAM_TYPE_T       /*VIDEO_ENC_MEMORY_T,*/,
+					     OUT void *                           /* pvParamData */
+					    );
+
+	VCODEC_ENC_ERROR_T(*pfnSetParameter)(IN HANDLE                            /* hCodec */,
+					     /*VCODEC_ENC_QUALITY_T,VCODEC_ENC_CODEC_T,VIDEO_CODEC_ROTATE_ANGLE_T,*/
+					     IN VCODEC_ENC_PARAM_TYPE_T        /* rEncodeParam*/,
+					     IN void *                            /* pvParamData */
+					    );
+
+	VCODEC_ENC_ERROR_T(*pfnGenerateHeader)(IN HANDLE                                 /* hCodec */
+					      );
+
+	VCODEC_ENC_ERROR_T(*pfnEncodeOneUnit)(IN HANDLE                             /* hCodec */,
+					      /*prInput*/  /*VCODEC_ENC_INPUT_YUV_INFO_T , VCODEC_ENC_INPUT_INFO_T*/
+					      IN void *
+					     );
+	VCODEC_ENC_ERROR_T(*pfnDeInit)(IN HANDLE                                         /* hCodec */
+				      );
+
+	VCODEC_ENC_ERROR_T(*pfnClose)(IN HANDLE                                          /* hCodec */
+				     );
+
+	VCODEC_ENC_ERROR_T(*pfnGetNextBitstream)(IN HANDLE                             /* hCodec */,
+						 OUT VCODEC_ENC_GENERAL_OUTPUT_T *  /* prPrivOutput*/
+						);
+} VCODEC_ENC_API_T;
+
+typedef struct {
+	VIDEO_ENC_API_T             rVideoEncAPI;
+	VCODEC_ENC_API_T            *pfnVcodecEncAPI;
+	HANDLE                      hDriver;
+	VCODEC_BUFFER_T             rReleaseYUV;
+	VCODEC_ENC_BUFFER_INFO_T    rEncoderBuffInfoNC;
+	unsigned int	 			u4EncType;// for sw venc type
+} VIDEO_ENC_WRAP_HANDLE_T;
+
+typedef struct {
+	unsigned int u4TimeIncrResolution;
+	unsigned int      u4BufferSize;
+	VCODEC_BUFFER_T    *prBuffer;
+} MPEG4_VT_ENCODER_GEN_VT_HEADER_INPUT_T;
+
+VCODEC_ENC_ERROR_T MPEG4EncoderGenerateVTHeader(
+	IN    MPEG4_VT_ENCODER_GEN_VT_HEADER_INPUT_T * prInput,
+	OUT   unsigned int *pu4EncodedSize
+);
+
+
+
+
+
+
+#endif /* VCODEC_IF_H */
diff --git a/kernel-headers/vcodec_log.h b/kernel-headers/vcodec_log.h
new file mode 100644
index 0000000..ac4abf1
--- /dev/null
+++ b/kernel-headers/vcodec_log.h
@@ -0,0 +1,134 @@
+#ifndef VCODEC_LOG_H
+#define VCODEC_LOG_H
+
+#include "vcodec_if_v2.h"
+
+#define lmx_prt(a, b, c)
+
+/* Add your index here */
+typedef enum {
+	/* MPEG4 ENCODER */
+	VCODEC_LOG_INDEX_MP4ENC_ENCODE_ERROR,
+	VCODEC_LOG_INDEX_MP4ENC_ERROR_GET_BITSTREAM,
+	VCODEC_LOG_INDEX_MP4ENC_ALLOCATE_EXT_MEMORY,
+	VCODEC_LOG_INDEX_MP4ENC_FREE_EXT_MEMORY,
+	VCODEC_LOG_INDEX_MP4ENC_QPHDR,
+	VCODEC_LOG_INDEX_MP4ENC_FRAMETYPE,
+	VCODEC_LOG_INDEX_MP4ENC_SETTING,
+	VCODEC_LOG_INDEX_MP4ENC_GET_BITSTREAM,
+
+	/* MPEG4 DECODER */
+	VCODEC_LOG_INDEX_MP4DEC_DECODE_ERROR,
+	VCODEC_LOG_INDEX_MP4DEC_DECODE_FIRST_FRAME,
+	VCODEC_LOG_INDEX_MP4DEC_DECODE_VOP_TYPE,
+	VCODEC_LOG_INDEX_MP4DEC_DECODE_RESOLUTION,
+	VCODEC_LOG_INDEX_MP4DEC_DECODE_EOF,
+	VCODEC_LOG_INDEX_MP4DEC_SET_FRAME_RATE,
+	VCODEC_LOG_INDEX_MP4DEC_SET_BIT_RATE,
+	VCODEC_LOG_INDEX_SWMP4DEC_LOSSY_INIT_QTY,
+	VCODEC_LOG_INDEX_SWMP4DEC_LOSSY_INIT_DSWITCH,
+	VCODEC_LOG_INDEX_SWMP4DEC_LOSSY_SWITCH_QTY,
+
+	/* RMVB DECODER */
+	VCODEC_LOG_INDEX_RMDEC_DECODE_RESULT1,
+	VCODEC_LOG_INDEX_RMDEC_DECODE_RESULT2,
+	VCODEC_LOG_INDEX_RMDEC_ERROR_FRM,
+	VCODEC_LOG_INDEX_RMDEC_DECODE_ERROR,
+	VCODEC_LOG_INDEX_RMDEC_HOLD_PIC_TYPE_ERROR,
+	VCODEC_LOG_INDEX_RMDEC_UNKNOW_ERROR,
+	VCODEC_LOG_INDEX_RMDEC_TIMESTAMP1,
+	VCODEC_LOG_INDEX_RMDEC_TIMESTAMP2,
+	VCODEC_LOG_INDEX_RMDEC_SKIP_FRM,
+	VCODEC_LOG_INDEX_RMDEC_SKIP_SETTING2,
+	VCODEC_LOG_INDEX_RMDEC_STANDARD_DEC,
+	VCODEC_LOG_INDEX_RMDEC_LOSSY_DEC,
+	VCODEC_LOG_INDEX_RMDEC_OPEN,
+	VCODEC_LOG_INDEX_RMDEC_CLOSE,
+	VCODEC_LOG_INDEX_RMDEC_UNSUPPORT,
+
+	/* H.264 DECODER */
+	VCODEC_LOG_INDEX_H264DEC_INIT,
+	VCODEC_LOG_INDEX_H264DEC_DEINIT,
+	VCODEC_LOG_INDEX_H264DEC_OPEN,
+	VCODEC_LOG_INDEX_H264DEC_CLOSE,
+	VCODEC_LOG_INDEX_H264DEC_INIT_ERROR,
+	VCODEC_LOG_INDEX_H264DEC_DECODE_RESULT,
+	VCODEC_LOG_INDEX_H264DEC_DECODE_ERROR,
+	VCODEC_LOG_INDEX_H264DEC_ARGUMENT_ERROR,
+	VCODEC_LOG_INDEX_H264DEC_SUPPORT_ERROR,
+	VCODEC_LOG_INDEX_H264DEC_DECODING_CONCEAL,
+	VCODEC_LOG_INDEX_H264DEC_DISPLAY_INFO,
+	VCODEC_LOG_INDEX_H264DEC_CROP_INFO,
+	VCODEC_LOG_INDEX_H264DEC_BITSTREAM_INFO,
+	VCODEC_LOG_INDEX_H264DEC_PAYLOAD_INFO,
+	VCODEC_LOG_INDEX_H264DEC_CHANGE_SPS,
+	VCODEC_LOG_INDEX_H264DEC_ABNORMAL_NALU_SIZE,
+	VCODEC_LOG_INDEX_H264DEC_HEADER_ERROR,
+	VCODEC_LOG_INDEX_H264DEC_OUTPUT_IDR,
+	VCODEC_LOG_INDEX_H264DEC_ALIGN_ERROR,
+	VCODEC_LOG_INDEX_H264DEC_ALLOCATE_ERROR,
+	VCODEC_LOG_INDEX_SWH264DEC_LOSSY_INIT_QTY,
+	VCODEC_LOG_INDEX_SWH264DEC_LOSSY_INIT_DSWITCH,
+	VCODEC_LOG_INDEX_SWH264DEC_LOSSY_SWITCH_QTY,
+	VCODEC_LOG_INDEX_SWH264DEC_MEM_ALLOCATE,
+	VCODEC_LOG_INDEX_SWH264DEC_DPB_INIT,
+	VCODEC_LOG_INDEX_SWH264DEC_DPB_MARK_REFPIC,
+	VCODEC_LOG_INDEX_SWH264DEC_CONCEAL,
+	VCODEC_LOG_INDEX_SWH264DEC_OUTPIC1,
+	VCODEC_LOG_INDEX_SWH264DEC_OUTPIC2,
+	VCODEC_LOG_INDEX_SWH264DEC_SPSDPB_CHECK,
+	VCODEC_LOG_INDEX_H264DEC_SKIPB,
+	VCODEC_LOG_INDEX_H264DEC_TIMESTAMP,
+	VCODEC_LOG_INDEX_H264DEC_TIMESTAMP_INIT,
+	VCODEC_LOG_INDEX_H264DEC_TIMESTAMP_INFO,
+	VCODEC_LOG_INDEX_H264DEC_TIMESTAMP_BP,
+	VCODEC_LOG_INDEX_H264DEC_TIMESTAMP_MPHP,
+	VCODEC_LOG_INDEX_H264DEC_TIMESTAMP_STATUS,
+	VCODEC_LOG_INDEX_H264ENC_STREAMBUFFER_ALLOC,
+	VCODEC_LOG_INDEX_H264ENC_STREAMBUFFER_UPDATE,
+	VCODEC_LOG_INDEX_MAX
+} VCODEC_LOG_INDEX_T;
+
+typedef enum {
+	VCODEC_LOG_GROUP_HIGH,
+	VCODEC_LOG_GROUP_MEDIUM,
+	VCODEC_LOG_GROUP_LOW,
+	VCODEC_LOG_GROUP_MAX
+} VCODEC_LOG_GROUP_T;
+
+void VcodecTraceLog0(
+	VCODEC_LOG_GROUP_T eGroup,
+	VCODEC_LOG_INDEX_T eIndex
+);
+void VcodecTraceLog1(
+	VCODEC_LOG_GROUP_T eGroup,
+	VCODEC_LOG_INDEX_T eIndex,
+	UINT64 arg
+);
+void VcodecTraceLog2(
+	VCODEC_LOG_GROUP_T eGroup,
+	VCODEC_LOG_INDEX_T eIndex,
+	UINT64 arg1,
+	UINT64 arg2
+);
+void VcodecTraceLog4(
+	VCODEC_LOG_GROUP_T eGroup,
+	VCODEC_LOG_INDEX_T eIndex,
+	UINT64 arg1,
+	UINT64 arg2,
+	UINT64 arg3,
+	UINT64 arg4
+);
+void VcodecTraceLog8(
+	VCODEC_LOG_GROUP_T eGroup,
+	VCODEC_LOG_INDEX_T eIndex,
+	UINT64 arg1,
+	UINT64 arg2,
+	UINT64 arg3,
+	UINT64 arg4,
+	UINT64 arg5,
+	UINT64 arg6,
+	UINT64 arg7,
+	UINT64 arg8
+);
+#endif /* VCODEC_LOG_H */
diff --git a/kernel-headers/vdec_drv_base.h b/kernel-headers/vdec_drv_base.h
new file mode 100644
index 0000000..3bd80d2
--- /dev/null
+++ b/kernel-headers/vdec_drv_base.h
@@ -0,0 +1,128 @@
+#define DumpInput__
+#ifdef DumpInput__
+#include <stdio.h>
+#endif
+#include "vdec_drv_if_private.h"
+
+#ifndef _VDEC_DRV_BASE_
+#define _VDEC_DRV_BASE_
+#define MAX_BUFFER_SIZE 37
+
+#if 1
+#define WAITING_MODE VAL_INTERRUPT_MODE
+#else
+#define WAITING_MODE VAL_POLLING_MODE
+#endif
+
+#define DO_VCODEC_RESET(cmd, index)                                                             \
+	{                                                                                               \
+		ADD_QUEUE(cmd, index, WRITE_REG_CMD, MT6589_VDEC_MISC, VDEC_INT_CFG, 0 , WAITING_MODE);     \
+	}
+
+typedef enum __VDDRV_MRESULT_T {
+	VDDRV_MRESULT_SUCCESS = VAL_TRUE,  /* /< Represent success */
+	VDDRV_MRESULT_FAIL = VAL_FALSE,    /* /< Represent failure */
+	VDDRV_MRESULT_RESOLUTION_CHANGED = VAL_RESOLUTION_CHANGED,   /* /< Represent resoluion changed */
+	VDDRV_MRESULT_NEED_MORE_OUTPUT_BUFFER,   /* /< Represent need more output buffer */
+	VDDRV_MRESULT_FATAL
+} VDDRV_MRESULT_T;
+
+typedef struct __VDEC_DRV_BASE_T {
+	VAL_UINT32_T(*Init)(
+		VAL_HANDLE_T * handle,
+		VAL_HANDLE_T halhandle,
+		VAL_HANDLE_T valhandle,
+		P_VDEC_DRV_RINGBUF_T pBitstream,
+		P_VDEC_DRV_SEQINFO_T pSeqinfo,
+		VDEC_DRV_VIDEO_FORMAT_T eFormat
+	);
+	VAL_UINT32_T(*Decode)(
+		VAL_HANDLE_T handle,
+		P_VDEC_DRV_RINGBUF_T pBitstream,
+		P_VDEC_DRV_FRAMEBUF_T pFrame
+	); /* /< Driver Decode Main Funciton */
+	P_VDEC_DRV_FRAMEBUF_T(*GetDisplayBuffer)(
+		VAL_HANDLE_T handle
+	); /* /< Get Buffer ready to display */
+	P_VDEC_DRV_FRAMEBUF_T(*GetFreeBuffer)(
+		VAL_HANDLE_T handle
+	);  /* /< Get Buffer ready to release */
+	VAL_UINT32_T(*GetParam)(
+		VAL_HANDLE_T handle,
+		VDEC_DRV_GET_TYPE_T a_eType,
+		VAL_VOID_T * a_pvInParam,
+		VAL_VOID_T * a_pvOutParam
+	);
+	VAL_UINT32_T(*SetParam)(
+		VAL_HANDLE_T handle,
+		VDEC_DRV_SET_TYPE_T a_eType,
+		VAL_VOID_T * a_pvInParam,
+		VAL_VOID_T * a_pvOutParam
+	);
+	VAL_UINT32_T(*DeInit)(
+		VAL_HANDLE_T handle
+	); /* /< Function to do driver de-initialization */
+	P_VDEC_DRV_RINGBUF_T(*GetFreeInputBuffer)(
+		VAL_HANDLE_T handle
+	);
+	VAL_UINT32_T(*Init_ex)(
+		VAL_HANDLE_T * handle,
+		VAL_HANDLE_T halhandle,
+		VAL_HANDLE_T valhandle,
+		P_VDEC_DRV_RINGBUF_T pBitstream,
+		P_VDEC_DRV_SEQINFO_T pSeqinfo,
+		VDEC_DRV_VIDEO_FORMAT_T eFormat,
+		VAL_VOID_T * pConfig
+	);
+	VAL_UINT32_T(*DecodeEx)(
+        VAL_HANDLE_T handle,
+        P_VDEC_DRV_RINGBUF_T pBitstream,
+        VAL_UINT32_T u4Flag,
+        VAL_VOID_T * pExtra
+    ); /* /< Driver Decode Main Funciton */
+
+
+} VDEC_DRV_BASE_T;
+
+typedef struct __VDEC_DRV_BUF_STATUS_T {
+	VAL_BOOL_T          bDisplay;
+	VAL_BOOL_T          bFree;
+	VDEC_DRV_FRAMEBUF_T *pFrameBuf;
+} VDEC_DRV_BUF_STATUS_T, *P_VDEC_DRV_BUF_STATUS_T;
+
+typedef struct __VDEC_DRV_INPUT_BUF_STATUS_T {
+	VDEC_DRV_RINGBUF_T *pInputBuf;
+	VAL_UINT32_T    u4RefCnt;
+} VDEC_DRV_INPUT_BUF_STATUS_T, *P_VDEC_DRV_INPUT_BUF_STATUS_T;
+
+typedef struct __VDEC_HANDLE_T {
+	VDEC_DRV_VIDEO_FORMAT_T CodecFormat;
+	VDEC_DRV_BASE_T         rFuncPtr;      /* /< Point to driver's proprietary function. */
+	VAL_HANDLE_T            hDrvHandle;    /* /< Handle of each format driver */
+	VAL_BOOL_T              fgDrvInitFlag; /* /< hDrvHandle is available or not */
+	VAL_HANDLE_T            hHalHandle;    /* /< HAL handle */
+	VAL_BOOL_T              fgHalInitFlag; /* /< hHalHandle is available or not */
+	VAL_HANDLE_T            hValHandle;    /* /< VAL handle */
+	VAL_BOOL_T              fgValInitFlag; /* /< hValHandle is available or not */
+	VAL_MEMORY_T            rHandleMem;    /* /< Memory for vdec handle */
+	P_VDEC_DRV_FRAMEBUF_T   pDispFrameBuf;
+	P_VDEC_DRV_FRAMEBUF_T   pFreeFrameBuf;
+	P_VDEC_DRV_RINGBUF_T    pInputFreeBuf;
+	VDEC_DRV_BUF_STATUS_T   pFrameBufArray[MAX_BUFFER_SIZE];
+	VDEC_DRV_INPUT_BUF_STATUS_T pInputBufArray[MAX_BUFFER_SIZE];
+	VAL_BOOL_T              bFlushAll;
+	VAL_BOOL_T              bInputFlushAll;
+	/* for no VOS header when MPEG4 */
+	VAL_UINT16_T            nDefWidth;
+	VAL_UINT16_T            nDefHeight;
+	VDEC_DRV_SET_DECODE_MODE_T      rSetDecodeMode;
+	VAL_INT32_T             nPerfServiceHandle;
+#ifdef DumpInput__
+	FILE *pf_out;
+	VAL_MEM_ADDR_T          rDumpBase;
+#endif
+	VAL_UINT32_T            nOmxTids;
+    VDEC_DRV_CALLBACK_T     rCallbackHook;
+} VDEC_HANDLE_T;
+
+#endif
diff --git a/kernel-headers/vdec_drv_if_dep.h b/kernel-headers/vdec_drv_if_dep.h
new file mode 100644
index 0000000..52be8f4
--- /dev/null
+++ b/kernel-headers/vdec_drv_if_dep.h
@@ -0,0 +1,152 @@
+#ifndef VDEC_DRV_IF_DEP_H /* for 6572 only */
+#define VDEC_DRV_IF_DEP_H
+
+/*=============================================================================
+ *                              Include Files
+ *===========================================================================*/
+
+#include "val_types_private.h"
+#include "vcodec_if_v2.h"
+/* #include "rv_format_info.h" */
+#include "wmc_type.h"
+/* #include "strm_iem.h" */
+#include "vcodec_dec_demuxer_if_v2.h"
+/* #include "ts_vcodec_common.h" */
+#define DumpInput__
+#ifdef DumpInput__
+#include <stdio.h>
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*=============================================================================
+ *                              Definition
+ *===========================================================================*/
+#define MAX_BUFFER_SIZE 21
+/*typedef struct
+{
+    // for speedy mode
+    VAL_UINT32_T    nBufferStatus;
+    VAL_INT64_T     llLastVideoTime;
+    VAL_INT64_T     llCurrentPlayTime;
+} DRIVER_HANDLER_T;
+*/
+/*
+typedef struct __RV9_DRV_DATA_T
+{
+    VAL_UINT32_T            uStreamHdrWidth;
+    VAL_UINT32_T            uStreamHdrHeight;
+    RM_DECODER_INPUT_PARAM_T rRM_INPUT_Data;
+    payload_inf_st payload_inf_tab_rv9[200]; //set up 200
+    RM_DECODER_PAYLOAD_INFO_T payload_inf_tab_rv9_MAUI[200]; //set up 200
+} RV9_DRV_DATA_T, *P_RV9_DRV_DATA_T;
+*/
+
+typedef struct __H264_DRV_DATA_T {
+	H264_DECODER_PAYLOAD_INFO_T     prH264Payload;
+	H264_DECODER_INPUT_PARAM_T      prInputData;
+	H264_DECODER_PRIVATE_PARAM_T    rPrivateData;
+} H264_DRV_DATA_T, *P_H264_DRV_DATA_T;
+
+typedef struct __MPEG4_DRV_DATA_T {
+	MPEG4_DECODER_PAYLOAD_INFO_T     prMPEG4Payload;
+	MPEG4_DECODER_INPUT_PARAM_T      prInputData;
+	MPEG4_DECODER_PRIVATE_PARAM_T    rPrivateData;
+} MPEG4_DRV_DATA_T, *P_MPEG4_DRV_DATA_T;
+
+typedef struct __VP8_DRV_DATA_T {
+	/* VP8_DEC_CUSTOM_SETTING_T        VP8CustSetting; */
+} VP8_DRV_DATA_T, *P_VP8_DRV_DATA_T;
+
+typedef struct __VP9_DRV_DATA_T {
+	/* VP9_DEC_CUSTOM_SETTING_T        VP9CustSetting; */
+} VP9_DRV_DATA_T, *P_VP9_DRV_DATA_T;
+
+typedef struct __VC1_DRV_DATA_T {
+	VAL_BOOL_T                      bVC1FirstDecode;
+	VC1_DECODER_PAYLOAD_INFO_T      prVC1Payload;
+	VC1_DECODER_INPUT_PARAM_T       prInputData;
+	TEMP_INTERFACE                  VC1TempInterface;
+} VC1_DRV_DATA_T, *P_VC1_DRV_DATA_T;
+
+typedef struct __VDEC_DRV_BUF_STATUS_T {
+	VAL_BOOL_T          bDisplay;
+	VAL_BOOL_T          bFree;
+	VDEC_DRV_FRAMEBUF_T *pFrameBuf;
+} VDEC_DRV_BUF_STATUS_T, *P_VDEC_DRV_BUF_STATUS_T;
+
+typedef enum {
+	VDEC_DRV_STATUS_OPEN_DONE   = 0x00000001,
+	VDEC_DRV_STATUS_INIT_DONE   = 0x00000002,
+	VDEC_DRV_STATUS_DECODE_EVER = 0x00000004
+} VDEC_DRV_STATUS;
+
+
+typedef struct __VDEC_HANDLE_T {
+	VAL_HANDLE_T            hHalHandle;    /* /< HAL data. */
+	VAL_HANDLE_T            vHandle;       /* /< for MMSYS power on/off */
+	VAL_MEMORY_T            rHandleMem;    /* /< Save handle memory information to be used in release. */
+	VAL_BOOL_T              bFirstDecoded; /* / < already pass first video data to codec */
+	VAL_BOOL_T              bHeaderPassed; /* / < already pass video header to codec */
+	VAL_BOOL_T              bFlushAll;
+	VAL_BOOL_T              bNewMemory;    /* / allocate buffer for first DOU */
+	VAL_MEMORY_T            HeaderBuf;
+	VAL_MEMORY_T            HeaderBufwithFrame;
+	VAL_HANDLE_T            hCodec;
+	DRIVER_HANDLER_T        hDrv;
+	VIDEO_WRAP_HANDLE_T     hWrapper;
+	VAL_UINT32_T            CustomSetting;
+	VCODEC_BUFFER_T         rVideoBitBuf;
+	VCODEC_DEC_INPUT_YUV_INFO_T rVideoFrameBuf;
+	VCODEC_MEMORY_TYPE_T    rVideoDecMemType;
+	VAL_UINT32_T            YUVBuffer[MAX_BUFFER_SIZE];
+	VAL_UINT32_T            nYUVBufferIndex;
+	VAL_UINT32_T            nDrvStatus;
+	VDEC_DRV_BUF_STATUS_T   pFrameBufArray[MAX_BUFFER_SIZE];
+	VDEC_DRV_FRAMEBUF_T     *DispFrameBuf, *FreeFrameBuf;
+	VCODEC_OPEN_SETTING_T           codecOpenSetting;
+	VCODEC_DEC_INPUT_T              rInputUnit;
+	VIDEO_DECODER_INPUT_NC_T        rVideoDecInputNC;
+	VCODEC_DEC_OUTPUT_PARAM_T       *rVideoDecOutputParam;
+	VCODEC_DEC_PRIVATE_OUTPUT_T     rVideoDecOutput;
+	VCODEC_DEC_OUTPUT_BUFFER_PARAM_T   rVideoDecYUVBufferParameter;
+	VCODEC_DEC_INPUT_BUFFER_PARAM_T    rBitStreamParam;
+	/* for seek and thumbnail mode optimization */
+	VAL_BOOL_T                      bFirstDecodeForThumbnail;
+	VAL_BOOL_T                      bThumbnailModeOK;
+	VDEC_DRV_SET_DECODE_MODE_T      rSetDecodeMode;
+	/* for no VOS header when MPEG4 */
+	VAL_UINT16_T            nDefWidth;
+	VAL_UINT16_T            nDefHeight;
+
+	VDEC_DRV_VIDEO_FORMAT_T CodecFormat;
+	VAL_VOID_T              *prExtraData;  /* /< Driver private data pointer. */
+	VAL_MEMORY_T             rExtraDataMem; /* /< Save extra data memory information to be used in release. */
+	VCODEC_DEC_PRIVATE_OUTPUT_EXTRA_T prExtraDecOutput;
+#ifdef DumpInput__
+	FILE *pf_out;
+	VAL_MEM_ADDR_T          rDumpBase;
+#endif
+
+	/* Morris Yang 20111101 [ */
+	VAL_UINT32_T  nOmxTids;
+	/* ] */
+#if 1   /* defined(MT6572)     //VCODEC_MULTI_THREAD */
+	/* Jackal Chen [ */
+	VAL_VOID_T              *pDrvModule;    /* /< used for dlopen and dlclose */
+	/* ] */
+#endif
+	VAL_BOOL_T              fgValInitFlag; /* /< hValHandle is available or not */
+} VDEC_HANDLE_T;
+
+/*=============================================================================
+  *                             Function Declaration
+  *===========================================================================*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* VDEC_DRV_IF_DEP_H */
diff --git a/kernel-headers/vdec_drv_if_private.h b/kernel-headers/vdec_drv_if_private.h
new file mode 100644
index 0000000..4e27516
--- /dev/null
+++ b/kernel-headers/vdec_drv_if_private.h
@@ -0,0 +1,437 @@
+#ifndef _VDEC_DRV_IF_PRIVATE_H_
+#define _VDEC_DRV_IF_PRIVATE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_private.h"
+#include "vdec_drv_if_public.h"
+
+
+typedef enum {
+	UNKNOWN_FBTYPE = 0,                         /* /< Unknown type */
+	VDEC_DRV_FBTYPE_YUV420_BK_16x1 = (1 << 0),  /* /< YCbCr 420 block in three planar */
+	VDEC_DRV_FBTYPE_YUV420_BK_8x2  = (1 << 1),  /* /< YCbCr 420 block in three planar */
+	VDEC_DRV_FBTYPE_YUV420_BK_4x4  = (1 << 2),  /* /< YCbCr 420 block in three planar */
+	VDEC_DRV_FBTYPE_YUV420_RS      = (1 << 3),  /* /< YCbCr 420 raster scan in three planar */
+	VDEC_DRV_FBTYPE_RGB565_RS      = (1 << 4)   /* /< RGB565 in one planar */
+}
+VDEC_DRV_FBTYPE_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_BUFFER_CONTROL_T
+ * @par Description
+ *  Type of buffer control
+ *  - Here are two types of buffer
+ *    - 1.Reference buffer
+ *    - 2.Display buffer
+ *  - Buffer can be fixed size or derived from memory pool.
+ *  - Buffer can be created from internal or external memory.
+ */
+typedef enum {
+	/* /< Unknown Type */
+	VDEC_DRV_BUFFER_CONTROL_UNKNOWN                    = 0,
+
+	/* /< Reference frame and Display frame share the same external buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_IS_DISP_EXT            = (1 << 0),
+
+	/* /< Reference frame and Display frame share the same internal buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_IS_DISP_INT            = (1 << 1),
+
+	/* /< Reference frame and Display frame share the same external memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_IS_DISP_EXT_POOL       = (1 << 2),
+
+	/* /< Reference frame and Display frame share the same internal memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_IS_DISP_INT_POOL       = (1 << 3),
+
+	/* /< Reference frame uses external buffer and Display frame use another external buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_DISP_EXT           = (1 << 4),
+
+	/* /< Reference frame uses external buffer and Display frame uses internal buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_DISP_INT           = (1 << 5),
+
+	/* /< Reference frame uses external buffer and Display frame uses external memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_DISP_EXT_POOL      = (1 << 6),
+
+	/* /< Reference frame uses external buffer and Display frame uses internal memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_DISP_INT_POOL      = (1 << 7),
+
+	/* /< Reference frame uses external memory pool and Display frame use external buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_POOL_DISP_EXT      = (1 << 8),
+
+	/* /< Reference frame uses external memory pool and Display frame uses internal buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_POOL_DISP_INT      = (1 << 9),
+
+	/* /< Reference frame uses external memory pool and Display frame uses external memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_POOL_DISP_EXT_POOL = (1 << 10),
+
+	/* /< Reference frame uses external memory pool and Display frame uses internal memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_EXT_POOL_DISP_INT_POOL = (1 << 11),
+
+	/* /< Reference frame uses internal buffer and Display frame use external buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_DISP_EXT           = (1 << 12),
+
+	/* /< Reference frame uses internal buffer and Display frame uses internal buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_DISP_INT           = (1 << 13),
+
+	/* /< Reference frame uses internal buffer and Display frame uses external memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_DISP_EXT_POOL      = (1 << 14),
+
+	/* /< Reference frame uses internal buffer and Display frame uses internal memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_DISP_INT_POOL      = (1 << 15),
+
+	/* /< Reference frame uses internal memory pool and Display frame use external buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_POOL_DISP_EXT      = (1 << 16),
+
+	/* /< Reference frame uses internal memory pool and Display frame uses internal buffer */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_POOL_DISP_INT      = (1 << 17),
+
+	/* /< Reference frame uses internal memory pool and Display frame uses external memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_POOL_DISP_EXT_POOL = (1 << 18),
+
+	/* /< Reference frame uses external memory pool and Display frame uses another internal memory pool */
+	VDEC_DRV_BUFFER_CONTROL_REF_INT_POOL_DISP_INT_POOL = (1 << 19)
+} VDEC_DRV_BUFFER_CONTROL_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_DOWNSIZE_RATIO_T
+ * @par Description
+ *  DownSize Ratio
+ *  - The aspect ratio of frame is kept after downsizing.
+ */
+typedef enum {
+	VDEC_DRV_DOWNSIZE_RATIO_UNKNOWN = 0,        /* /< Unknown ratio */
+	VDEC_DRV_DOWNSIZE_RATIO_1_1     = (1 << 0), /* /< Original ratio */
+	VDEC_DRV_DOWNSIZE_RATIO_1_2     = (1 << 1), /* /< ratio = 1/2 */
+	VDEC_DRV_DOWNSIZE_RATIO_1_3     = (1 << 2), /* /< ratio = 1/3 */
+	VDEC_DRV_DOWNSIZE_RATIO_1_4     = (1 << 3), /* /< ratio = 1/4 */
+	VDEC_DRV_DOWNSIZE_RATIO_1_5     = (1 << 4), /* /< ratio = 1/5 */
+	VDEC_DRV_DOWNSIZE_RATIO_1_6     = (1 << 5), /* /< ratio = 1/6 */
+	VDEC_DRV_DOWNSIZE_RATIO_1_7     = (1 << 6), /* /< ratio = 1/7 */
+	VDEC_DRV_DOWNSIZE_RATIO_1_8     = (1 << 7)  /* /< ratio = 1/8 */
+} VDEC_DRV_DOWNSIZE_RATIO_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_PIC_STRUCT_T
+ * @par Description
+ *  [Unused]Picture Struct
+ *  - Consecutive Frame or filed
+ *  - Separated  top/bottom field
+ */
+typedef enum {
+	VDEC_DRV_PIC_STRUCT_UNKNOWN = 0,            /* /< Unknown */
+	VDEC_DRV_PIC_STRUCT_CONSECUTIVE_FRAME,      /* /< Consecutive Frame */
+	VDEC_DRV_PIC_STRUCT_CONSECUTIVE_TOP_FIELD,  /* /< Consecutive top field */
+	VDEC_DRV_PIC_STRUCT_CONSECUTIVE_BOT_FIELD,  /* /< Consecutive bottom field */
+	VDEC_DRV_PIC_STRUCT_SEPARATED_TOP_FIELD,    /* /< Separated  top field */
+	VDEC_DRV_PIC_STRUCT_SEPARATED_BOT_FIELD,     /* /< Separated  bottom field */
+	VDEC_DRV_PIC_STRUCT_FIELD,
+} VDEC_DRV_PIC_STRUCT_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_FRAME_RATE_T
+ * @par Description
+ *  Frame rate types
+ */
+typedef enum {
+	VDEC_DRV_FRAME_RATE_UNKNOWN = 0,            /* /< Unknown fps */
+	VDEC_DRV_FRAME_RATE_23_976,                 /* /< fps = 24000/1001 (23.976...) */
+	VDEC_DRV_FRAME_RATE_24,                     /* /< fps = 24 */
+	VDEC_DRV_FRAME_RATE_25,                     /* /< fps = 25 */
+	VDEC_DRV_FRAME_RATE_29_97,                  /* /< fps = 30000/1001 (29.97...) */
+	VDEC_DRV_FRAME_RATE_30,                     /* /< fps = 30 */
+	VDEC_DRV_FRAME_RATE_50,                     /* /< fps = 50 */
+	VDEC_DRV_FRAME_RATE_59_94,                  /* /< fps = 60000/1001 (59.94...) */
+	VDEC_DRV_FRAME_RATE_60,                     /* /< fps = 60 */
+	VDEC_DRV_FRAME_RATE_120,                    /* /< fps = 120 */
+	VDEC_DRV_FRAME_RATE_1,                      /* /< fps = 1 */
+	VDEC_DRV_FRAME_RATE_5,                      /* /< fps = 5 */
+	VDEC_DRV_FRAME_RATE_8,                      /* /< fps = 8 */
+	VDEC_DRV_FRAME_RATE_10,                     /* /< fps = 10 */
+	VDEC_DRV_FRAME_RATE_12,                     /* /< fps = 12 */
+	VDEC_DRV_FRAME_RATE_15,                     /* /< fps = 15 */
+	VDEC_DRV_FRAME_RATE_16,                     /* /< fps = 16 */
+	VDEC_DRV_FRAME_RATE_17,                     /* /< fps = 17 */
+	VDEC_DRV_FRAME_RATE_18,                     /* /< fps = 18 */
+	VDEC_DRV_FRAME_RATE_20,                     /* /< fps = 20 */
+	VDEC_DRV_FRAME_RATE_2,                      /* /< fps = 2 */
+	VDEC_DRV_FRAME_RATE_6,                      /* /< fps = 6 */
+	VDEC_DRV_FRAME_RATE_48,                     /* /< fps = 48 */
+	VDEC_DRV_FRAME_RATE_70,                     /* /< fps = 70 */
+	VDEC_DRV_FRAME_RATE_VARIABLE                /* /< fps = VBR */
+} VDEC_DRV_FRAME_RATE_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_POST_PROC_T
+ * @par Description
+ *  input of type SET_POST_PROC (output is NULL, use return value)
+ */
+typedef enum {
+	VDEC_DRV_POST_PROC_UNKNOWN = 0,             /* /< Unknown */
+	VDEC_DRV_POST_PROC_DISABLE,                 /* /< Do not do post-processing */
+	VDEC_DRV_POST_PROC_DOWNSIZE,                /* /< Do downsize */
+	VDEC_DRV_POST_PROC_RESIZE,                  /* /< Do resize */
+	VDEC_DRV_POST_PROC_DEBLOCK,                 /* /< Do deblocking */
+	VDEC_DRV_POST_PROC_DEINTERLACE              /* /< Do deinterlace */
+} VDEC_DRV_POST_PROC_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_NALU_T
+ * @par Description
+ *  Buffer Structure
+ *  - Store NALU buffer base address
+ *  - Store length of NALU buffer
+ */
+
+typedef struct {
+	VAL_UINT32_T    u4AddrOfNALu;               /* /< NALU buffer base address */
+	VAL_UINT32_T    u4LengthOfNALu;             /* /< Length of NALU buffer */
+	void            *pReseved;                  /* /< reserved */
+} VDEC_DRV_NALU_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_STATISTIC_T
+ * @par Description
+ *  VDecDrv Statistic information
+ */
+typedef struct __VDEC_DRV_STATISTIC_T {
+	VAL_UINT32_T   u4DecTimeMax;                /* /< [Out] Decode one frame period, Max. */
+	VAL_UINT32_T   u4DecTimeMin;                /* /< [Out] Decode one frame period, Min. */
+	VAL_UINT32_T   u4DecTimeAvg;                /* /< [Out] Decode one frame period, Average. */
+} VDEC_DRV_STATISTIC_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_STATISTIC_T
+ * @par Description
+ *  Pointer of VDEC_DRV_STATISTIC_T
+ */
+typedef VDEC_DRV_STATISTIC_T * P_VDEC_DRV_STATISTIC_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_FBTYPE_T
+ * @par Description
+ *  Supported frame buffer type in driver layer
+ */
+typedef struct {
+	/* for speedy mode */
+	VAL_UINT32_T    nBufferStatus;
+	VAL_INT64_T     llLastVideoTime;
+	VAL_INT64_T     llCurrentPlayTime;
+} DRIVER_HANDLER_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_VIDEO_FBTYPE_T
+ * @par Description
+ *  Both input and output of type QUERY_FBTYPE
+ */
+typedef struct __VDEC_DRV_VIDEO_FBTYPE_T {
+	VAL_UINT32_T u4FBType;  /* /< VDEC_DRV_FBTYPE */
+} VDEC_DRV_VIDEO_FBTYPE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_VIDEO_FBTYPE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_VIDEO_FBTYPE_T
+ */
+typedef VDEC_DRV_VIDEO_FBTYPE_T * P_VDEC_DRV_VIDEO_FBTYPE_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_QUERY_BUFFER_MODE_T
+ * @par Description
+ *  Both input and output of type QUERY_BUFFER_CONTROL
+ */
+typedef struct __VDEC_DRV_QUERY_BUFFER_MODE_T {
+	VAL_UINT32_T u4BufCtrl;        /* /< VDEC_DRV_BUFFER_CONTROL */
+} VDEC_DRV_QUERY_BUFFER_MODE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_QUERY_BUFFER_MODE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_QUERY_BUFFER_MODE_T
+ */
+typedef VDEC_DRV_QUERY_BUFFER_MODE_T * P_VDEC_DRV_QUERY_BUFFER_MODE_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_QUERY_POOL_SIZE_T
+ * @par Description
+ *   output of type QUERY_REF_POOL_SIZE and QUERY_DISP_POOL_SIZE (input is NULL)
+ */
+typedef struct __VDEC_DRV_QUERY_POOL_SIZE_T {
+	VAL_UINT32_T    u4Size;     /* /< buffer size of the memory pool */
+} VDEC_DRV_QUERY_POOL_SIZE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_QUERY_POOL_SIZE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_QUERY_POOL_SIZE_T
+ */
+typedef VDEC_DRV_QUERY_POOL_SIZE_T * P_VDEC_DRV_QUERY_POOL_SIZE_T;
+
+/* output of type DISP_FRAME_BUFFER and FREE_FRAME_BUFFER is P_VDEC_DRV_FRAMEBUF_T (input is NULL) */
+/* output of type GET_PICTURE_INFO is P_VDEC_DRV_PICINFO_T (input is NULL) */
+/* both input and output of type QUERY_REORDER_ABILITY are NULL (use return value) */
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_QUERY_POOL_DOWNSIZE_T
+ * @par Description
+ *  output of type QUERY_DOWNSIZE_ABILITY (input is NULL)
+ */
+typedef struct __VDEC_DRV_QUERY_POOL_DOWNSIZE_T {
+	VAL_UINT32_T    u4Ratio;    /* /< VDEC_DRV_DOWNSIZE_RATIO */
+} VDEC_DRV_QUERY_POOL_DOWNSIZE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_QUERY_POOL_DOWNSIZE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_QUERY_POOL_DOWNSIZE_T
+ */
+typedef VDEC_DRV_QUERY_POOL_DOWNSIZE_T * P_VDEC_DRV_QUERY_POOL_DOWNSIZE_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_QUERY_POOL_RESIZE_T
+ * @par Description
+ *  input of type QUERY_RESIZE_ABILITY (output is NULL, use return value)
+ */
+typedef struct __VDEC_DRV_QUERY_POOL_RESIZE_T {
+	VAL_UINT32_T    u4OutWidth;     /* /<Width of buffer */
+	VAL_UINT32_T    u4OutHeight;    /* /<Height of buffer */
+} VDEC_DRV_QUERY_POOL_RESIZE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_QUERY_POOL_RESIZE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_QUERY_POOL_RESIZE_T
+ */
+typedef VDEC_DRV_QUERY_POOL_RESIZE_T * P_VDEC_DRV_QUERY_POOL_RESIZE_T;
+
+/* both input and output of type QUERY_DEBLOCK_ABILITY are NULL (use return value) */
+/* both input and output of type QUERY_DERING_ABILITY are NULL (use return value) */
+/* both input and output of type QUERY_DEINTERLACE_ABILITY are NULL (use return value) */
+/* both input and output of type QUERY_DROPFRAME_ABILITY are NULL (use return value) */
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_SET_BUFFER_MODE_T
+ * @par Description
+ *  input of type VDEC_DRV_SET_BUFFER_MODE_T (output is NULL, use return value)
+ */
+typedef struct __VDEC_DRV_SET_BUFFER_MODE_T {
+	VAL_UINT32_T    u4BufferMode;       /* /< VDEC_DRV_BUFFER_CONTROL */
+} VDEC_DRV_SET_BUFFER_MODE_T;
+
+/* input of type SET_FRAME_BUFFER_TYPE is VDEC_DRV_VIDEO_FBTYPE_T (output is NULL, use return value) */
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_SET_BUFFER_MODE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_SET_BUFFER_MODE_T
+ */
+typedef VDEC_DRV_SET_BUFFER_MODE_T * P_VDEC_DRV_SET_BUFFER_MODE_T;
+
+/* input of type SET_FRAME_BUFFER_TYPE is VDEC_DRV_VIDEO_FBTYPE_T (output is NULL, use return value) */
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_SET_BUFFER_ADDR_T
+ * @par Description
+ *  input of type FREE_FRAME_BFFER (buffer_len=NULL, output is NULL, use return value)
+ */
+typedef struct __VDEC_DRV_SET_BUFFER_ADDR_T {
+	VAL_MEM_ADDR_T rBufferAddr;         /* /< buffer memory base address */
+} VDEC_DRV_SET_BUFFER_ADDR_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_SET_BUFFER_ADDR_T
+ * @par Description
+ *  Pointer of VDEC_DRV_SET_BUFFER_ADDR_T
+ */
+typedef VDEC_DRV_SET_BUFFER_ADDR_T * P_VDEC_DRV_SET_BUFFER_ADDR_T;
+
+/* input of type SET_REF_EXT_POOL_ADDR and SET_DISP_EXT_POOL_ADDR is
+    VDEC_DRV_SET_BUFFER_ADDR_T (output is NULL, use return value) */
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_SET_POST_PROC_MODE_T
+ * @par Description
+ *  Parameters of set post process mode
+ */
+typedef struct __VDEC_DRV_SET_POST_PROC_MODE_T {
+	VAL_UINT32_T    u4PostProcMode;     /* /< one of VDEC_DRV_POST_PROC */
+	VAL_UINT32_T    u4DownsizeRatio;    /* /< if mode is POST_PROC_DOWNSIZE */
+	VAL_UINT32_T    u4ResizeWidth;      /* /< if mode is POST_PROC_RESIZE */
+	VAL_UINT32_T    u4ResizeHeight;     /* /< if mode is POST_PROC_RESIZE */
+} VDEC_DRV_SET_POST_PROC_MODE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_SET_POST_PROC_MODE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_SET_POST_PROC_MODE_T
+ */
+typedef VDEC_DRV_SET_POST_PROC_MODE_T * P_VDEC_DRV_SET_POST_PROC_MODE_T;
+
+
+
+typedef struct _VDEC_DRV_HW_REG_T {
+	VAL_UINT32_T    u4VdecHWBase;
+	VAL_UINT32_T    u4VdecHWSYS;
+	VAL_UINT32_T    u4VdecMISC;
+	VAL_UINT32_T    u4VdecVLD;
+	VAL_UINT32_T    u4VdecVLDTOP;
+	VAL_UINT32_T    u4VdecMC;
+	VAL_UINT32_T    u4VdecAVCVLD;
+	VAL_UINT32_T    u4VdecAVCMV;
+	VAL_UINT32_T    u4VdecPP;
+	VAL_UINT32_T    u4VdecSQT;
+	VAL_UINT32_T    u4VdecVP8VLD;
+	VAL_UINT32_T    u4VdecVP6VLD;
+	VAL_UINT32_T    u4VdecVP8VLD2;
+} VDEC_DRV_HW_REG_T;
+
+typedef VDEC_DRV_HW_REG_T * P_VDEC_DRV_HW_REG_T;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VDEC_DRV_IF_PRIVATE_H_ */
diff --git a/kernel-headers/vdec_drv_if_public.h b/kernel-headers/vdec_drv_if_public.h
new file mode 100644
index 0000000..8a141a3
--- /dev/null
+++ b/kernel-headers/vdec_drv_if_public.h
@@ -0,0 +1,943 @@
+#ifndef _VDEC_DRV_IF_PUBLIC_H_
+#define _VDEC_DRV_IF_PUBLIC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_public.h"
+
+#define MTK_VDEC_PROP_WAITKEYFRAME                 "mtk.vdec.waitkeyframeforplayback"
+#define MTK_VDEC_VALUE_WAITKEYFRAME_AT_START       (1)
+#define MTK_VDEC_VALUE_WAITKEYFRAME_FOR_SEEK       (1 << 1)
+
+/**
+ * @par Enumeration
+ *   VDEC_DRV_FBSTSTUS
+ * @par Description
+ *   This is the item for frame buffer status
+ */
+typedef enum _VDEC_DRV_FBSTSTUS {
+	VDEC_DRV_FBSTSTUS_NORMAL      = 0,          /* /< normal type */
+	VDEC_DRV_FBSTSTUS_REPEAT_LAST = (1 << 0),   /* /< repeat last frame */
+	VDEC_DRV_FBSTSTUS_NOT_DISPLAY = (1 << 1),   /* /< not displayed */
+	VDEC_DRV_FBSTSTUS_NOT_USED    = (1 << 2),   /* /< not used */
+	VDEC_DRV_FBSTSTUS_INVALID_TIMESTAMP    = (1 << 3),   /* /< invalid timestamp */
+}
+VDEC_DRV_FBSTSTUS;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_VIDEO_FORMAT_T
+ * @par Description
+ *  video_format of VDecDrvCreate()
+ */
+ 
+typedef enum _VDEC_DRV_VIDEO_FORMAT_T {
+	VDEC_DRV_VIDEO_FORMAT_UNKNOWN_VIDEO_FORMAT  = 0,            /* /< Unknown video format */
+	VDEC_DRV_VIDEO_FORMAT_DIVX311               = (1 << 0),     /* /< Divix 3.11 */
+	VDEC_DRV_VIDEO_FORMAT_DIVX4                 = (1 << 1),     /* /< Divix 4 */
+	VDEC_DRV_VIDEO_FORMAT_DIVX5                 = (1 << 2),     /* /< Divix 5 */
+	VDEC_DRV_VIDEO_FORMAT_XVID                  = (1 << 3),     /* /< Xvid */
+	VDEC_DRV_VIDEO_FORMAT_MPEG1                 = (1 << 4),     /* /< MPEG-1 */
+	VDEC_DRV_VIDEO_FORMAT_MPEG2                 = (1 << 5),     /* /< MPEG-2 */
+	VDEC_DRV_VIDEO_FORMAT_MPEG4                 = (1 << 6),     /* /< MPEG-4 */
+	VDEC_DRV_VIDEO_FORMAT_H263                  = (1 << 7),     /* /< H263 */
+	VDEC_DRV_VIDEO_FORMAT_H264                  = (1 << 8),     /* /< H264 */
+	VDEC_DRV_VIDEO_FORMAT_H265                  = (1 << 9),     /* /< H265 */
+	VDEC_DRV_VIDEO_FORMAT_WMV7                  = (1 << 10),    /* /< WMV7 */
+	VDEC_DRV_VIDEO_FORMAT_WMV8                  = (1 << 11),    /* /< WMV8 */
+	VDEC_DRV_VIDEO_FORMAT_WMV9                  = (1 << 12),    /* /< WMV9 */
+	VDEC_DRV_VIDEO_FORMAT_VC1                   = (1 << 13),    /* /< VC1 */
+	VDEC_DRV_VIDEO_FORMAT_REALVIDEO8            = (1 << 14),    /* /< RV8 */
+	VDEC_DRV_VIDEO_FORMAT_REALVIDEO9            = (1 << 15),    /* /< RV9 */
+	VDEC_DRV_VIDEO_FORMAT_VP6                   = (1 << 16),    /* /< VP6 */
+	VDEC_DRV_VIDEO_FORMAT_VP7                   = (1 << 17),    /* /< VP7 */
+	VDEC_DRV_VIDEO_FORMAT_VP8                   = (1 << 18),    /* /< VP8 */
+	VDEC_DRV_VIDEO_FORMAT_VP8_WEBP_PICTURE_MODE = (1 << 19),    /* /< VP8 WEBP PICTURE MODE */
+	VDEC_DRV_VIDEO_FORMAT_VP8_WEBP_MB_ROW_MODE  = (1 << 20),    /* /< VP8 WEBP ROW MODE */
+	VDEC_DRV_VIDEO_FORMAT_VP9                   = (1 << 21),    /* /< VP9 */
+	VDEC_DRV_VIDEO_FORMAT_VP9_WEBP_PICTURE_MODE = (1 << 22),    /* /< VP9 WEBP PICTURE MODE */
+	VDEC_DRV_VIDEO_FORMAT_VP9_WEBP_MB_ROW_MODE  = (1 << 23),    /* /< VP9 WEBP ROW MODE */
+	VDEC_DRV_VIDEO_FORMAT_AVS                   = (1 << 24),    /* /< AVS */
+	VDEC_DRV_VIDEO_FORMAT_MJPEG                 = (1 << 25),    /* /< Motion JPEG */
+	VDEC_DRV_VIDEO_FORMAT_S263                  = (1 << 26),    /* /< Sorenson Spark */
+	VDEC_DRV_VIDEO_FORMAT_H264HP                = (1 << 27),
+	VDEC_DRV_VIDEO_FORMAT_H264SEC               = (1 << 28),	
+	VDEC_DRV_VIDEO_FORMAT_H265SEC               = (1 << 29)
+} VDEC_DRV_VIDEO_FORMAT_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_H265_VIDEO_PROFILE_T
+ * @par Description
+ *  video profile for H.265
+ */
+typedef enum _VDEC_DRV_H265_VIDEO_PROFILE_T {
+	VDEC_DRV_H265_VIDEO_PROFILE_UNKNOWN         = 0,            /* /< Unknown video profile */
+	VDEC_DRV_H265_VIDEO_PROFILE_H265_MAIN       = (1 << 0),      /* /< H265 main profile */
+	VDEC_DRV_H265_VIDEO_PROFILE_H265_MAIN_10       = (1 << 1),      /* /< H265 main 10 profile */
+	VDEC_DRV_H265_VIDEO_PROFILE_H265_STILL_IMAGE       = (1 << 2)      /* /< H265 still image profile */
+} VDEC_DRV_H265_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_H264_VIDEO_PROFILE_T
+ * @par Description
+ *  video profile for H.264
+ */
+typedef enum _VDEC_DRV_H264_VIDEO_PROFILE_T {
+	VDEC_DRV_H264_VIDEO_PROFILE_UNKNOWN                   = 0,          /* /< Unknown video profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_BASELINE             = (1 << 0),   /* /< H264 baseline profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE = (1 << 1),   /* /< H264 constrained baseline profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_MAIN                 = (1 << 2),   /* /< H264 main profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_EXTENDED             = (1 << 3),   /* /< H264 extended profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH                 = (1 << 4),   /* /< H264 high profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH_10              = (1 << 5),   /* /< H264 high 10 profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH422              = (1 << 6),   /* /< H264 high 422 profile */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH444              = (1 << 7),   /* /< H264 high 444 profile */
+
+	/* /< H264 high 10 intra profile in Amendment 2 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH_10_INTRA        = (1 << 8),
+
+	/* /< H264 high 422 intra profile in Amendment 2 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH422_INTRA        = (1 << 9),
+
+	/* /< H264 high 444 intra profile in Amendment 2 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH444_INTRA        = (1 << 10),
+
+	/* /< H264 CAVLC 444 intra profile in Amendment 2 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_CAVLC444_INTRA       = (1 << 11),
+
+	/* /< H264 high 444 predictive profile in Amendment 2 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_HIGH444_PREDICTIVE   = (1 << 12),
+
+	/* /< H264 scalable baseline profile in Amendment 3 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_SCALABLE_BASELINE    = (1 << 13),
+
+	/* /< H264 scalable high profile in Amendment 3 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_SCALABLE_HIGH        = (1 << 14),
+
+	/* /< H264 scalable high intra profile in Amendment 3 */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_SCALABLE_HIGH_INTRA  = (1 << 15),
+
+	/* /< Corrigendum 1 (2009) */
+	VDEC_DRV_H264_VIDEO_PROFILE_H264_MULTIVIEW_HIGH       = (1 << 16)
+} VDEC_DRV_H264_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_MPEG_VIDEO_PROFILE_T
+ * @par Description
+ *  video profile for H263, MPEG2, MPEG4
+ */
+typedef enum _VDEC_DRV_MPEG_VIDEO_PROFILE_T {
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_0                = (1 << 0),   /* /< H263 Profile 0 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_1                = (1 << 1),   /* /< H263 Profile 1 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_2                = (1 << 2),   /* /< H263 Profile 2 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_3                = (1 << 3),   /* /< H263 Profile 3 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_4                = (1 << 4),   /* /< H263 Profile 4 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_5                = (1 << 5),   /* /< H263 Profile 5 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_6                = (1 << 6),   /* /< H263 Profile 6 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_7                = (1 << 7),   /* /< H263 Profile 7 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_H263_8                = (1 << 8),   /* /< H263 Profile 8 */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG2_SIMPLE          = (1 << 9),   /* /< MPEG2 Simple Profile */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG2_MAIN            = (1 << 10),  /* /< MPEG2 Main Profile */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG2_SNR             = (1 << 11),  /* /< MPEG2 SNR Profile */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG2_SPATIAL         = (1 << 12),  /* /< MPEG2 Spatial Profile */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG2_HIGH            = (1 << 13),  /* /< MPEG2 High Profile */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG4_SIMPLE          = (1 << 14),  /* /< MPEG4 Simple Profile */
+	VDEC_DRV_MPEG_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE = (1 << 15)   /* /< MPEG4 Advanced Simple Profile */
+} VDEC_DRV_MPEG_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_MS_VIDEO_PROFILE_T
+ * @par Description
+ *  video profile for VC1, WMV9
+ */
+typedef enum _VDEC_DRV_MS_VIDEO_PROFILE_T {
+	VDEC_DRV_MS_VIDEO_PROFILE_VC1_SIMPLE   = (1 << 0),  /* /< VC-1 Simple Profile */
+	VDEC_DRV_MS_VIDEO_PROFILE_VC1_MAIN     = (1 << 1),  /* /< VC-1 Main Profile */
+	VDEC_DRV_MS_VIDEO_PROFILE_VC1_ADVANCED = (1 << 2),  /* /< VC-1 Advanced Profile */
+	VDEC_DRV_MS_VIDEO_PROFILE_WMV9_SIMPLE  = (1 << 3),  /* /< WMV9 Simple Profile */
+	VDEC_DRV_MS_VIDEO_PROFILE_WMV9_MAIN    = (1 << 4),  /* /< WMV9 Main Profile */
+	VDEC_DRV_MS_VIDEO_PROFILE_WMV9_COMPLEX = (1 << 5)   /* /< WMV9 Complex Profile */
+} VDEC_DRV_MS_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_VIDEO_LEVEL_T
+ * @par Description
+ *  video level
+ */
+typedef enum _VDEC_DRV_VIDEO_LEVEL_T {
+	VDEC_DRV_VIDEO_LEVEL_UNKNOWN = 0,           /* /< Unknown level */
+	VDEC_DRV_VIDEO_LEVEL_0,                     /* /< Specified by VC1 */
+	VDEC_DRV_VIDEO_LEVEL_1,                     /* /< Specified by H264, VC1, MPEG4, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_1,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_1b,                    /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_1_1,                   /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_1_2,                   /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_1_3,                   /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_2,                     /* /< Specified by H264, VC1, MPEG4, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_2,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_2_1,                   /* /< Specified by H264, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_2_1,  /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_2_2,                   /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_3,                     /* /< Specified by H264, VC1, MPEG4, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_3,    /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_3_1,                   /* /< Specified by H264, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_3_1,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_3_2,                   /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_4,                     /* /< Specified by H264, VC1, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_4,     /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_4_1,                   /* /< Specified by H264, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_4_1,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_4_2,                   /* /< Specified by H264 */
+	VDEC_DRV_VIDEO_LEVEL_5,                     /* /< Specified by H264, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_5,     /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_5_1,                   /* /< Specified by H264, HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_5_1,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_5_2,                    /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_5_2,    /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_6,                        /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_6,     /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_6_1,                    /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_6_1,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_6_2,                    /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_HIGH_TIER_LEVEL_6_2,   /* /< Specified by HEVC */
+	VDEC_DRV_VIDEO_LEVEL_LOW,                   /* /< Specified by MPEG2, VC1 */
+	VDEC_DRV_VIDEO_LEVEL_MEDIUM,                /* /< Specified by MPEG2, VC1 */
+	VDEC_DRV_VIDEO_LEVEL_HIGH1440,              /* /< Specified by MPEG2 */
+	VDEC_DRV_VIDEO_LEVEL_HIGH                  /* /< Specified by MPEG2, VC1 */
+
+} VDEC_DRV_VIDEO_LEVEL_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_RESOLUTION_T
+ * @par Description
+ *  video resolution support
+ */
+typedef enum _VDEC_DRV_RESOLUTION_T {
+	VDEC_DRV_RESOLUTION_UNKNOWN = 0,    /* /< Unknown resolution */
+	VDEC_DRV_RESOLUTION_SUPPORT_QCIF,   /* /< QCIF */
+	VDEC_DRV_RESOLUTION_SUPPORT_QVGA,   /* /< QVGA */
+	VDEC_DRV_RESOLUTION_SUPPORT_CIF,    /* /< CIF */
+	VDEC_DRV_RESOLUTION_SUPPORT_480I,   /* /< 720x480 interlace */
+	VDEC_DRV_RESOLUTION_SUPPORT_480P,   /* /< 720x480 progressive */
+	VDEC_DRV_RESOLUTION_SUPPORT_576I,   /* /< 720x576 interlace */
+	VDEC_DRV_RESOLUTION_SUPPORT_576P,   /* /< 720x576 progressive */
+	VDEC_DRV_RESOLUTION_SUPPORT_720P,   /* /< 1280x720 progressive */
+	VDEC_DRV_RESOLUTION_SUPPORT_1080I,  /* /< 1920x1080 interlace */
+	VDEC_DRV_RESOLUTION_SUPPORT_1080P,   /* /< 1920x1080 progressive */
+	VDEC_DRV_RESOLUTION_SUPPORT_2160P   /* /< 4096x2160 progressive */
+} VDEC_DRV_RESOLUTION_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_QUERY_TYPE_T
+ * @par Description
+ *  video driver used to query different info
+ */
+typedef enum _VDEC_DRV_QUERY_TYPE_T {
+	VDEC_DRV_QUERY_TYPE_FBTYPE,             /* /< Query VDEC_DRV_QUERY_TYPE_FBTYPE */
+	VDEC_DRV_QUERY_TYPE_VIDEO_FORMAT,       /* /< Query VDEC_DRV_QUERY_TYPE_VIDEO_FORMAT */
+	VDEC_DRV_QUERY_TYPE_PROPERTY,           /* /< Query VDEC_DRV_PROPERTY_T */
+	VDEC_DRV_QUERY_TYPE_CHIP_NAME,          /* /< Query VDEC_DRV_QUERY_TYPE_CHIP_NAME */
+	VDEC_DRV_QUERY_TYPE_BUFFER_CONTROL,     /* /< Query VDEC_DRV_QUERY_TYPE_BUFFER_CONTROL */
+	VDEC_DRV_QUERY_TYPE_FEATURE_SUPPORTED,   /* /< Query VDEC_DRV_QUERY_TYPE_FEATURE_SUPPORTED */
+	VDEC_DRV_QUERY_TYPE_CPUCORE_FREQUENCY,   /* /< Query VDEC_DRV_QUERY_TYPE_CPUCORE_FREQUENCY */
+} VDEC_DRV_QUERY_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_QUERY_TYPE_T
+ * @par Description
+ *  video driver used to queue multiple input buffers
+ */
+typedef enum _VDEC_DRV_FEATURE_TYPE_T {
+	VDEC_DRV_FEATURE_TYPE_NONE                = 0,        /* /< Empty */
+	VDEC_DRV_FEATURE_TYPE_QUEUE_INPUT_BUFFER  = (1 << 0), /* /< Driver will queue multiple input buffers */
+} VDEC_DRV_FEATURE_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_GET_TYPE_T
+ * @par Description
+ *  video driver used to get/query different info
+ */
+typedef enum _VDEC_DRV_GET_TYPE_T {
+	/* /< how many buffer size of the reference pool needs in driver */
+	VDEC_DRV_GET_TYPE_QUERY_REF_POOL_SIZE,
+
+	/* /< how many buffer size of the display pool needs in driver */
+	VDEC_DRV_GET_TYPE_QUERY_DISP_POOL_SIZE,
+
+	/* /< return a P_VDEC_DRV_FRAMEBUF_T address (especially in display order != decode order) */
+	VDEC_DRV_GET_TYPE_DISP_FRAME_BUFFER,
+
+	/*
+	/< return a frame didn't be a reference more
+	(when buffer_mode = REF_IS_DISP_EXT, REF_INT_DISP_EXT or REF_INT_POOL_DISP_EXT)
+	*/
+	VDEC_DRV_GET_TYPE_FREE_FRAME_BUFFER,
+	VDEC_DRV_GET_TYPE_GET_PICTURE_INFO,             /* /< return a pointer address point to P_VDEC_DRV_PICINFO_T */
+	VDEC_DRV_GET_TYPE_GET_STATISTIC_INFO,           /* /< return statistic information. */
+	VDEC_DRV_GET_TYPE_GET_FRAME_MODE,               /* /< return frame mode parameter. */
+	VDEC_DRV_GET_TYPE_GET_FRAME_CROP_INFO,          /* /< return frame crop information. */
+
+	/* /< query if driver can re-order the decode order to display order */
+	VDEC_DRV_GET_TYPE_QUERY_REORDER_ABILITY,
+	VDEC_DRV_GET_TYPE_QUERY_DOWNSIZE_ABILITY,       /* /< query if driver can downsize decoded frame */
+	VDEC_DRV_GET_TYPE_QUERY_RESIZE_ABILITY,         /* /< query if driver can resize decoded frame */
+	VDEC_DRV_GET_TYPE_QUERY_DEBLOCK_ABILITY,        /* /< query if driver can do deblocking */
+	VDEC_DRV_GET_TYPE_QUERY_DEINTERLACE_ABILITY,    /* /< query if driver can do deinterlace */
+	VDEC_DRV_GET_TYPE_QUERY_DROPFRAME_ABILITY,      /* /< query if driver can drop frame */
+
+	/* /< query if driver finish decode one frame but no output (main profile with B frame case.) */
+	VDEC_DRV_GET_TYPE_GET_DECODE_STATUS_INFO,
+	VDEC_DRV_GET_TYPE_GET_PIXEL_FORMAT,             /* /< query the driver output pixel format */
+	VDEC_DRV_GET_TYPE_GET_CPU_LOADING_INFO,         /* /< query the cpu loading info from kernel driver */
+	VDEC_DRV_GET_TYPE_GET_HW_CRC,                   /* /< query the hw CRC */
+	VDEC_DRV_GET_TYPE_GET_CODEC_TIDS,               /* /< query the thread ids from the codec lib */
+	VDEC_DRV_GET_TYPE_GET_FRAME_INTERVAL,           /* /< query frame interval from the codec lib */
+	VDEC_DRV_GET_TYPE_FREE_INPUT_BUFFER,            /* /< free input buffer */
+	VDEC_DRV_GET_TYPE_QUERY_VIDEO_INTERLACING,      /* /< query video interlace information */
+	VDEC_DRV_GET_TYPE_QUERY_VIDEO_DPB_SIZE,         /* /< query video DPB size */
+        VDEC_DRV_SET_TYPE_SET_WAIT_KEYFRAME,            ///< set wait keyframe mode, default 0, 1 = wait at start/flush, 2 = wait at seek mode, 3 = always wait
+	VDEC_DRV_GET_TYPE_CODEC_PROPERTY                /* /< get teh codec specific property for decode flow*/
+} VDEC_DRV_GET_TYPE_T;
+
+typedef enum _VDEC_DRV_CODEC_PROPERTY_T {
+    VDEC_CODEC_NONE                                 = 0x00000000,
+    VDEC_CODEC_SUPPORT_DPB_SIZE                     = 0x00000001,
+} VDEC_DRV_CODEC_PROPERTY_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_PIXEL_FORMAT_T
+ * @par Description
+ *  pixel format
+ */
+typedef enum _VDEC_DRV_PIXEL_FORMAT_T {
+	VDEC_DRV_PIXEL_FORMAT_NONE =   0,               /* /< None */
+	VDEC_DRV_PIXEL_FORMAT_YUV_420_PLANER,           /* /< YUV 420 planer */
+	VDEC_DRV_PIXEL_FORMAT_YUV_420_PLANER_MTK,       /* /< YUV 420 planer MTK mode */
+	VDEC_DRV_PIXEL_FORMAT_YUV_420_PLANER_UFO,       /* /< YUV 420 planer MTK UFO mode */
+	VDEC_DRV_PIXEL_FORMAT_YUV_YV12                  /* /< YUV YV12 */
+} VDEC_DRV_PIXEL_FORMAT_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_DECODER_TYPE_T
+ * @par Description
+ *  decoder type
+ */
+typedef enum _VDEC_DRV_DECODER_TYPE_T {
+	VDEC_DRV_DECODER_MTK_HARDWARE = 0,              /* /< MTK software */
+	VDEC_DRV_DECODER_MTK_SOFTWARE,                  /* /< MTK hardware */
+	VDEC_DRV_DECODER_GOOGLE_SOFTWARE                /* /< google software (default) */
+}   VDEC_DRV_DECODER_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_SET_TYPE_T
+ * @par Description
+ *  video driver used to set different info
+ */
+typedef enum _VDEC_DRV_SET_TYPE_T {
+	/* /< =1, use timestamp in sVDEC_DRV_FRAMEBUF_T for the picture */
+	VDEC_DRV_SET_TYPE_USE_EXT_TIMESTAMP,
+	VDEC_DRV_SET_TYPE_SET_BUFFER_MODE,              /* /< value is one of VDEC_DRV_BUFFER_MODE */
+
+	/* /< one of VDEC_DRV_FBTYPE, if output type is the same as decode type, buffer mode can be REF_IS_DISP */
+	VDEC_DRV_SET_TYPE_SET_FRAME_BUFFER_TYPE,
+	VDEC_DRV_SET_TYPE_FREE_FRAME_BFFER,             /* /< release buffer if DISP BUFFER is allocated from driver */
+	VDEC_DRV_SET_TYPE_SET_REF_EXT_POOL_ADDR,        /* /< if use REF_EXT_POOL in SET_BUFFER_MODE */
+	VDEC_DRV_SET_TYPE_SET_DISP_EXT_POOL_ADDR,       /* /< if use DISP_EXT_POOL in SET_BUFFER_MODE */
+	VDEC_DRV_SET_TYPE_SET_DECODE_MODE,              /* /< set if drop frame */
+
+	/* /< buffer mode cannot set to REF_IS_DISP when using post-processing */
+	VDEC_DRV_SET_TYPE_SET_POST_PROC,
+	VDEC_DRV_SET_TYPE_SET_STATISTIC_ON,             /* /< enable statistic function. */
+	VDEC_DRV_SET_TYPE_SET_STATISTIC_OFF,            /* /< disable statistic function. */
+	VDEC_DRV_SET_TYPE_SET_FRAME_MODE,               /* /< set frame mode */
+	VDEC_DRV_SET_TYPE_SET_BUF_STATUS_FOR_SPEEDY,    /* /< set buffer status for speedy mode */
+	VDEC_DRV_SET_TYPE_SET_LAST_DISPLAY_TIME,        /* /< set the last display time */
+	VDEC_DRV_SET_TYPE_SET_CURRENT_PLAY_TIME,        /* /< set the current play time */
+	VDEC_DRV_SET_TYPE_SET_CONCEAL_LEVEL,            /* /< error conceal level for decoder */
+	VDEC_DRV_SET_TYPE_SET_OMX_TIDS,                 /* /< set omx thread ids */
+	VDEC_DRV_SET_TYPE_SET_SWITCH_TVOUT,             /* /< set ot switch to TV OUT */
+	VDEC_DRV_SET_TYPE_SET_CODEC_COLOR_FORAMT,       /* /< set codec color format */
+	VDEC_DRV_SET_TYPE_SET_CODEC_YUV_STRIDE,         /* /< set codec yuv stride */
+	VDEC_DRV_SET_TYPE_SET_FRAMESIZE,                /* /< set frame size from caller for MPEG4 decoder */
+
+	/* /< use the max suppoerted size as output buffer size. for smooth */
+	VDEC_DRV_SET_TYPE_SET_FIXEDMAXOUTPUTBUFFER,
+	VDEC_DRV_SET_TYPE_SET_UFO_DECODE,
+	VDEC_DRV_SET_TYPE_SET_CALLBACK,
+    VDEC_DRV_SET_TYPE_SET_FULL_SPEED,
+} VDEC_DRV_SET_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_DECODE_MODE_T
+ * @par Description
+ *  video driver decode mode
+ */
+typedef enum _VDEC_DRV_DECODE_MODE_T {
+	VDEC_DRV_DECODE_MODE_UNKNOWN = 0,               /* /< Unknown */
+	VDEC_DRV_DECODE_MODE_NORMAL,                    /* /< decode all frames (no drop) */
+	VDEC_DRV_DECODE_MODE_I_ONLY,                    /* /< skip P and B frame */
+	VDEC_DRV_DECODE_MODE_B_SKIP,                    /* /< skip B frame */
+	VDEC_DRV_DECODE_MODE_DROPFRAME,                 /* /< display param1 frames & drop param2 frames */
+	VDEC_DRV_DECODE_MODE_NO_REORDER,                /* /< output display ASAP without reroder */
+	VDEC_DRV_DECODE_MODE_THUMBNAIL,                 /* /< thumbnail mode */
+
+	/* /< skip reference check mode - force decode and display from first frame */
+	VDEC_DRV_DECODE_MODE_SKIP_REFERENCE_CHECK,
+
+	/* /< decode immediately no check. (parser should make sure the completed frame) */
+	VDEC_DRV_DECODE_MODE_LOW_LATENCY_DECODE,
+} VDEC_DRV_DECODE_MODE_T;
+
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_MRESULT_T
+ * @par Description
+ *  Driver return type
+ */
+typedef enum __VDEC_DRV_MRESULT_T {
+	VDEC_DRV_MRESULT_OK = 0,                        /* /< OK */
+	VDEC_DRV_MRESULT_FAIL,                          /* /< Fail */
+	VDEC_DRV_MRESULT_FATAL,                         /* /< Fatal error to stop. */
+	VDEC_DRV_MRESULT_RESOLUTION_CHANGED,            /* /< Represent resoluion changed */
+	VDEC_DRV_MRESULT_NEED_MORE_OUTPUT_BUFFER,       /* /< Represent need more output buffer */
+	VDEC_DRV_MRESULT_MAX = 0x0FFFFFFF               /* /< Max Value */
+} VDEC_DRV_MRESULT_T;
+
+/**
+ * @par Enumeration
+ *  VDEC_DRV_INPUTBUF_T
+ * @par Description
+ *  Description the input buffer property
+ */
+
+typedef enum _VDEC_DRV_INPUTBUF_T {
+	VDEC_DRV_INPUT_BUF_INIT_CONFIG_DATA                 = (1 << 0), /*/ < init data, most case this is video header only*/
+	VDEC_DRV_INPUT_BUF_EOS                              = (1 << 1), /*/ < input buffer with EOS flag*/
+	VDEC_DRV_INPUT_BUF_INVALID_TIMESTAMP                = (1 << 2), /*/ < input buffer with invalid timestamp flag*/
+} VDEC_DRV_INPUTBUF_T;
+
+/**
+ * @par Structure
+ *  VDEC_DRV_RINGBUF_T
+ * @par Description
+ *  Ring Buffer Structure
+ *  - Store buffer base address
+ *  - Store read/write pointer address
+ */
+typedef struct __VDEC_DRV_RINGBUF_T { // union extend 64bits for TEE
+	VAL_MEM_ADDR_T  rBase;         /* /< [IN]     Base address of ring buffer */
+    union {
+        VAL_ULONG_T u4Read;        /* /< [IN/OUT] Virtual address of read pointer */
+        VAL_UINT64_T u4Read_ext64;
+    };
+    union {
+        VAL_ULONG_T u4Write;       /* /< [IN]     Virtual address of write pointer */
+        VAL_UINT64_T u4Write_ext64;
+    };
+	VAL_UINT32_T    u4Timestamp;   /* /< [IN/OUT] store timestamp */
+	VAL_UINT32_T    rSecMemHandle; /* /< [IN/OUT] security memory handle    // MTK_SEC_VIDEO_PATH_SUPPORT */
+    VAL_UINT32_T    u4InputFlag;   /*/ < [IN]     the property of input buffer */
+} VDEC_DRV_RINGBUF_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_RINGBUF_T
+ * @par Description
+ *  Pointer of VDEC_DRV_RINGBUF_T
+ */
+typedef VDEC_DRV_RINGBUF_T * P_VDEC_DRV_RINGBUF_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_FRAMEBUF_T
+ * @par Description
+ *  Frame buffer information
+ */
+typedef struct __VDEC_DRV_FRAMEBUF_T {
+	VAL_MEM_ADDR_T  rBaseAddr;                  /* /< [IN/OUT] Base address */
+	VAL_MEM_ADDR_T  rPostProcAddr;              /* /< [IN/OUT] Post process address */
+	VAL_UINT32_T    u4BufWidth;                 /* /< [IN/OUT] Buffer width */
+	VAL_UINT32_T    u4BufHeight;                /* /< [IN/OUT] Buffer height */
+	VAL_UINT32_T    u4DispWidth;                /* /< [OUT]    Display width */
+	VAL_UINT32_T    u4DispHeight;               /* /< [OUT]    Display width */
+	VAL_UINT32_T    u4DispPitch;                /* /< [OUT]    Display pitch */
+	VAL_UINT32_T    u4Timestamp;                /* /< [IN/OUT] Timestamp for last decode picture */
+	VAL_UINT32_T    u4AspectRatioW;             /* /< [OUT]    The horizontal size of the sample aspect ratio. */
+	VAL_UINT32_T    u4AspectRatioH;             /* /< [OUT]    The vertical size of the sample aspect ratio. */
+	VAL_UINT32_T    u4FrameBufferType;          /* /< [OUT]    One of VDEC_DRV_FBTYPE */
+	VAL_UINT32_T    u4PictureStructure;         /* /< [OUT]    One of VDEC_DRV_PIC_STRUCT */
+	VAL_UINT32_T    u4FrameBufferStatus;        /* /< [OUT]    One of VDEC_DRV_FBSTSTUS */
+	VAL_UINT32_T    u4IsUFOEncoded;             /* /< [OUT]    FB Is UFO Encoded */
+	VAL_UINT32_T    u4Reserved1;                /* /< [IN/OUT] Reserved */
+	VAL_UINT32_T    u4Reserved2;                /* /< [IN/OUT] Reserved */
+	VAL_UINT32_T    u4Reserved3;                /* /< [IN/OUT] Reserved */
+
+	/* /< [IN/OUT] security memory handle    // MTK_SEC_VIDEO_PATH_SUPPORT */
+	VAL_UINT32_T    rSecMemHandle;
+	VAL_UINT32_T    u4ReeVA;                    /* /< [IN/OUT] Ree Va    // MTK_SEC_VIDEO_PATH_SUPPORT */
+
+	/* /< [IN/OUT] share handle of rBaseAddr.u4VA (for UT only)  // MTK_SEC_VIDEO_PATH_SUPPORT */
+	VAL_UINT32_T    rFrameBufVaShareHandle;
+} VDEC_DRV_FRAMEBUF_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_FRAMEBUF_T
+ * @par Description
+ *  Pointer of VDEC_DRV_FRAMEBUF_T
+ */
+typedef VDEC_DRV_FRAMEBUF_T * P_VDEC_DRV_FRAMEBUF_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_CROPINFO_T
+ * @par Description
+ *  Frame cropping information
+ */
+typedef struct __VDEC_DRV_CROPINFO_T {
+	VAL_UINT32_T u4CropLeft;        /* /< Frame cropping left index */
+	VAL_UINT32_T u4CropRight;      /* /< Frame cropping right index */
+	VAL_UINT32_T u4CropTop;           /* /< Frame cropping top index */
+	VAL_UINT32_T u4CropBottom;      /* /< Frame cropping bottom index */
+} VDEC_DRV_CROPINFO_T;
+
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_CROPINFO_T
+ * @par Description
+ *  Pointer of VDEC_DRV_CROPINFO_T
+ */
+typedef VDEC_DRV_CROPINFO_T * P_VDEC_DRV_CROPINFO_T;
+
+/**
+ * @par Structure
+ *  VDEC_DRV_PICINFO_T
+ * @par Description
+ *  Picture information
+ */
+typedef struct __VDEC_DRV_PICINFO_T {
+	VAL_UINT32_T    u4Width;                    /* /< [OUT] Frame width */
+	VAL_UINT32_T    u4Height;                   /* /< [OUT] Frame height */
+	VAL_UINT32_T    u4RealWidth;                /* /< [OUT] Frame real width (allocate buffer size) */
+	VAL_UINT32_T    u4RealHeight;               /* /< [OUT] Frame real height (allocate buffer size) */
+	VAL_UINT32_T    u4Timestamp;                /* /< [OUT] Timestamp for last decode picture */
+	VAL_UINT32_T    u4AspectRatioW;             /* /< [OUT] The horizontal size of the sample aspect ratio */
+	VAL_UINT32_T    u4AspectRatioH;             /* /< [OUT] The vertical size of the sample aspect ratio */
+	VAL_UINT32_T    u4FrameRate;                /* /< [OUT] One of VDEC_DRV_FRAME_RATE */
+	VAL_UINT32_T    u4PictureStructure;         /* /< [OUT] One of VDEC_DRV_PIC_STRUCT */
+	VAL_UINT32_T    u4IsProgressiveOnly;        /* /< [OUT] 1: Progressive only. 0: Not progressive only. */
+	VAL_INT32_T     u4BitDepthLuma;             /* /< [OUT] Sequence luma bitdepth */
+	VAL_INT32_T     u4BitDepthChroma;           /* /< [OUT] Sequence chroma bitdepth */
+	VAL_BOOL_T      bIsHorizontalScaninLSB;     /* /< [OUT] Scan direction in 10bit LSB 2 bit */
+} VDEC_DRV_PICINFO_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_PICINFO_T
+ * @par Description
+ *  Pointer of VDEC_DRV_PICINFO_T
+ */
+typedef VDEC_DRV_PICINFO_T * P_VDEC_DRV_PICINFO_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_SEQINFO_T
+ * @par Description
+ *  Sequence information.
+ *  - Including Width/Height
+ */
+typedef struct __VDEC_DRV_SEQINFO_T {
+	VAL_UINT32_T    u4Width;                    /* /< [OUT] Sequence buffer width */
+	VAL_UINT32_T    u4Height;                   /* /< [OUT] Sequence buffer height */
+	VAL_UINT32_T    u4PicWidth;                 /* /< [OUT] Sequence display width */
+	VAL_UINT32_T    u4PicHeight;                /* /< [OUT] Sequence display height */
+	VAL_INT32_T     i4AspectRatioWidth;         /* /< [OUT] Sequence aspect ratio width */
+	VAL_INT32_T     i4AspectRatioHeight;        /* /< [OUT] Sequence aspect ratio height */
+	VAL_BOOL_T      bIsThumbnail;               /* /< [OUT] check thumbnail */
+	VAL_INT32_T     u4BitDepthLuma;             /* /< [OUT] Sequence luma bitdepth */
+	VAL_INT32_T     u4BitDepthChroma;           /* /< [OUT] Sequence chroma bitdepth */
+	VAL_BOOL_T      bIsHorizontalScaninLSB;     /* /< [OUT] Scan direction in 10bit LSB 2 bit */
+} VDEC_DRV_SEQINFO_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_SEQINFO_T
+ * @par Description
+ *  Pointer of VDEC_DRV_SEQINFO_T
+ */
+typedef VDEC_DRV_SEQINFO_T * P_VDEC_DRV_SEQINFO_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_YUV_STRIDE_T
+ * @par Description
+ *  Y/UV Stride information
+ */
+typedef struct __VDEC_DRV_YUV_STRIDE_T {
+	unsigned int    u4YStride;                  /* /< [IN] Y Stride */
+	unsigned int    u4UVStride;                 /* /< [IN] UV Stride */
+} VDEC_DRV_YUV_STRIDE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_YUV_STRIDE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_YUV_STRIDE_T
+ */
+typedef VDEC_DRV_YUV_STRIDE_T * P_VDEC_DRV_YUV_STRIDE_T;
+
+#define VDEC_DRV_CONCURRENCE_LIMIT_WFD       0x00000001
+#define VDEC_DRV_CONCURRENCE_LIMIT_MHL       0x00000002
+#define VDEC_DRV_CONCURRENCE_LIMIT_BLUETOOTH 0x00000004
+#define VDEC_DRV_CONCURRENCE_LIMIT_MASK      0x00000007
+/**
+ * @par Structure
+ *  VDEC_DRV_QUERY_VIDEO_FORMAT_T
+ * @par Description
+ *  Both input and output of type QUERY_VIDEO_FORMAT
+ */
+typedef struct __VDEC_DRV_QUERY_VIDEO_FORMAT_T {
+	VAL_UINT32_T            u4VideoFormat;          /* /< [OUT] VDEC_DRV_VIDEO_FORMAT */
+	VAL_UINT32_T            u4Profile;              /* /< [OUT] VDEC_DRV_VIDEO_PROFILE */
+	VAL_UINT32_T            u4Level;                /* /< [OUT] VDEC_DRV_VIDEO_LEVEL */
+	VAL_UINT32_T            u4Resolution;           /* /< [OUT] VDEC_DRV_RESOLUTION */
+	VAL_UINT32_T            u4Width;                /* /< [OUT] Frame Width */
+	VAL_UINT32_T            u4Height;               /* /< [OUT] Frame Height */
+	VAL_UINT32_T            u4StrideAlign;          /* /< [OUT] Frame Stride Alignment */
+	VAL_UINT32_T            u4SliceHeightAlign;     /* /< [OUT] Frame Slice Height Alignment */
+	VDEC_DRV_PIXEL_FORMAT_T ePixelFormat;           /* /< [OUT] Frame Format */
+	VDEC_DRV_DECODER_TYPE_T eDecodeType;            /* /< [OUT] Decoder type */
+	VAL_UINT32_T            u4CompatibleFlag;       /* /< [OUT] CompatibleFlag */
+} VDEC_DRV_QUERY_VIDEO_FORMAT_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_QUERY_VIDEO_FORMAT_T
+ * @par Description
+ *  Pointer of VDEC_DRV_QUERY_VIDEO_FORMAT_T
+ */
+typedef VDEC_DRV_QUERY_VIDEO_FORMAT_T * P_VDEC_DRV_QUERY_VIDEO_FORMAT_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_SET_DECODE_MODE_T
+ * @par Description
+ *  [Unused]Set Decode Mode
+ */
+typedef struct __VDEC_DRV_SET_DECODE_MODE_T {
+	VDEC_DRV_DECODE_MODE_T  eDecodeMode;            /* /< [IN/OUT] one of VDEC_DRV_DECODE_MODE */
+	VAL_UINT32_T            u4DisplayFrameNum;      /* /< [IN/OUT] 0  8  7  6  5  4  3  2  1  1  1  1  1  1  1  1 */
+	VAL_UINT32_T            u4DropFrameNum;         /* /< [IN/OUT] 0  1  1  1  1  1  1  1  1  2  3  4  5  6  7  8 */
+} VDEC_DRV_SET_DECODE_MODE_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_SET_DECODE_MODE_T
+ * @par Description
+ *  Pointer of VDEC_DRV_SET_DECODE_MODE_T
+ */
+typedef VDEC_DRV_SET_DECODE_MODE_T * P_VDEC_DRV_SET_DECODE_MODE_T;
+
+
+/**
+ * @par Structure
+ *  VDEC_DRV_PROPERTY_T
+ * @par Description
+ *  VDecDrv property information
+ */
+typedef struct __VDEC_DRV_PROPERTY_T {
+	/* /< [OUT] buffer alignment requirement. */
+	VAL_UINT32_T        u4BufAlign;
+
+	/* /< [OUT] buffer unit size is N bytes . (e.g., 8, 16, or 64 bytes per unit.) */
+	VAL_UINT32_T        u4BufUnitSize;
+
+	/* /< [OUT] support post-process. */
+	VAL_BOOL_T          fgPostprocessSupport;
+
+	/* /< [IN/OUT] Post process property */
+	struct {
+		VAL_UINT32_T    fgOverlay:1;
+		VAL_UINT32_T    fgRotate:1;
+		VAL_UINT32_T    fgResize:1;
+		VAL_UINT32_T    fgCrop:1;
+	} PostProcCapability;
+} VDEC_DRV_PROPERTY_T;
+
+/**
+ * @par Structure
+ *  P_VDEC_DRV_PROPERTY_T
+ * @par Description
+ *  Pointer of VDEC_DRV_PROPERTY_T
+ */
+typedef VDEC_DRV_PROPERTY_T * P_VDEC_DRV_PROPERTY_T;
+
+/**
+* @par Structure
+* VDEC_DRV_CALLBACK_T
+* @par Description
+* VDEC callback function
+*/
+typedef struct __VDEC_DRV_CALLBACK_T_ { // union extend 64bits for TEE
+    union {
+        VAL_HANDLE_T u4hHandle;
+        VAL_UINT64_T u4hHandle_ext64;
+    };
+    union {
+        VAL_UINT32_T (*pfnGetOutputBuffer)(VAL_HANDLE_T, P_VDEC_DRV_FRAMEBUF_T *, VAL_UINT32_T, VAL_BOOL_T, VAL_VOID_T *);
+        VAL_UINT64_T pfnGetOutputBuffer_ext64;
+    };
+} VDEC_DRV_CALLBACK_T;
+
+typedef VDEC_DRV_CALLBACK_T * P_VDEC_DRV_CALLBACK_T;
+
+
+/**
+ * @par Function:
+ *   eVDecDrvQueryCapability
+ * @par Description:
+ *    - Query Decode Driver Capability
+ *    - Input argument will be compare with driver's capability to check if the query is successful or not.
+ * @param
+ *   a_eType            [IN]  Driver query type, such as FBType, Video Format, etc.
+ * @param
+ *   a_pvInParam        [IN]  Input parameter for each type of query.
+ * @param
+ *   a_pvOutParam       [OUT] Store query result, such as FBType, Video Format, etc.
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Query Success
+ *    - VDEC_DRV_MRESULT_FAIL: Query Fail
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvQueryCapability(
+	VDEC_DRV_QUERY_TYPE_T a_eType,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+/**
+ * @par Function:
+ *   eVDecDrvCreate
+ * @par Description:
+ *    - Create handle
+ *    - Allocate extra data for each driver
+ *      - According to the input parameter, "a_eVideoFormat."
+ * @param
+ *   a_phHandle         [IN/OUT] Driver handle
+ * @param
+ *   a_eVideoFormat     [IN]     Video format, such as MPEG4, H264, etc.
+ * @par Returns:
+ *   Reason for return value. Show the default returned value at which condition.
+ *    - VDEC_DRV_MRESULT_OK:   Create handle successfully
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to create handle
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvCreate(VAL_HANDLE_T *a_phHandle, VDEC_DRV_VIDEO_FORMAT_T a_eVideoFormat);
+
+
+/**
+ * @par Function:
+ *   eVDecDrvRelease
+ * @par Description:
+ *    - Release Decode Driver
+ *      - Need to perform driver deinit before driver release.
+ *    - Procedure of release
+ *      - Release extra data
+ *      - Release handle
+ * @param
+ *   a_hHandle          [IN] Handle needed to be released.
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Release handle successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to release handle.
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvRelease(VAL_HANDLE_T a_hHandle);
+
+
+/**
+ * @par Function:
+ *   eVDecDrvInit
+ * @par Description:
+ *    - Initialize Decode Driver
+ *    - Get width and height of bitstream
+ * @param
+ *   a_hHandle          [IN]  Driver handle
+ * @param
+ *   a_prBitstream      [IN]  Input bitstream for driver initialization
+ * @param
+ *   a_prSeqinfo        [OUT] Return width and height of bitstream
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Init driver successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to init driver.
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvInit(
+	VAL_HANDLE_T a_hHandle,
+	VDEC_DRV_RINGBUF_T *a_prBitstream,
+	VDEC_DRV_SEQINFO_T * a_prSeqinfo
+);
+
+
+/**
+ * @par Function:
+ *   eVDecDrvDeInit
+ * @par Description:
+ *    - Deinitialize driver
+ *      - Have to deinit driver before release driver
+ * @param
+ *   a_hHandle          [IN] Driver handle
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Deinit driver successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to deinit driver.
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvDeInit(VAL_HANDLE_T a_hHandle);
+
+
+/**
+ * @par Function:
+ *   eVDecDrvGetParam
+ * @par Description:
+ *    - Get driver's parameter
+ *      - Type of parameter can be referred to VDEC_DRV_GET_TYPE_T.
+ * @param
+ *   a_hHandle          [IN]  Driver handle
+ * @param
+ *   a_eType            [IN]  Parameter type
+ * @param
+ *   a_pvInParam        [OUT] Input argument for query parameter.
+ * @param
+ *   a_pvOutParam       [OUT] Store output parameter
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Get parameter successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to get parameter.
+ *      - Fail reason might be
+ *        - wrong or unsupported parameter type
+ *        - fail to get reference memory pool size.
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvGetParam(
+	VAL_HANDLE_T a_hHandle,
+	VDEC_DRV_GET_TYPE_T a_eType,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+/**
+ * @par Function:
+ *   eVDecDrvSetParam
+ * @par Description:
+ *    - Set driver's parameters
+ * @param
+ *   a_hHandle          [IN]  driver handle
+ * @param
+ *   a_eType            [IN]  parameter type
+ * @param
+ * a_pvInParam          [IN]  input parameter
+ * @param
+ * a_pvOutParam         [OUT] output parameter
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Get parameter successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to get parameter.
+ *      - Fail reason might be
+ *        - wrong or unsupported parameter type
+ *        - fail to set parameter
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvSetParam(
+	VAL_HANDLE_T a_hHandle,
+	VDEC_DRV_SET_TYPE_T a_eType,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+/**
+ * @par Function:
+ *  eVDecDrvDecode
+ * @par Description:
+ *    - Trigger Decode
+ *      - Need to Provide frame buffer to store unused buffer
+ *    - The procedure of decode including:
+ *      - Header parsing
+ *      - trigger hw decode
+ *    - While we want to decode the last frame,
+ *       we need to set input bitstream as VAL_NULL and still give free frame buffer.
+ * @param
+ *   a_hHandle          [IN] driver handle
+ * @param
+ *   a_prBitstream      [IN] input bitstream
+ * @param
+ *   a_prFramebuf       [IN] free frame buffer
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Decode successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to decode.
+ */
+VDEC_DRV_MRESULT_T  eVDecDrvDecode(
+	VAL_HANDLE_T a_hHandle,
+	VDEC_DRV_RINGBUF_T *a_prBitstream,
+	VDEC_DRV_FRAMEBUF_T * a_prFramebuf
+);
+
+/**
+ * @par Function:
+ *  eVDecDrvDecodeEx
+ * @par Description:
+ *    - Trigger Decode
+ *      - Need to Provide frame buffer to store unused buffer
+ *    - The procedure of decode including:
+ *      - Header parsing
+ *      - trigger hw decode
+ *    - While we want to decode the last frame,
+ *       we need to set input bitstream as VAL_NULL and still give free frame buffer.
+ * @param
+ *   a_hHandle          [IN] driver handle
+ * @param
+ *   a_prBitstream      [IN] input bitstream
+ * @par Returns:
+ *    - VDEC_DRV_MRESULT_OK:   Decode successfully.
+ *    - VDEC_DRV_MRESULT_FAIL: Failed to decode.
+ */
+VDEC_DRV_MRESULT_T eVDecDrvDecodeEx(
+    VAL_HANDLE_T a_hHandle,
+    VDEC_DRV_RINGBUF_T *a_prBitstream,
+    VAL_UINT32_T u4Flag,
+    VAL_VOID_T * pExtra
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VDEC_DRV_IF_PUBLIC_H_ */
diff --git a/kernel-headers/venc_drv_base.h b/kernel-headers/venc_drv_base.h
new file mode 100644
index 0000000..ff02e7b
--- /dev/null
+++ b/kernel-headers/venc_drv_base.h
@@ -0,0 +1,102 @@
+#include "venc_drv_if_private.h"
+#include "vcodec_if_v2.h"
+
+#include <sys/time.h>
+
+#ifndef _VENC_DRV_BASE_
+#define _VENC_DRV_BASE_
+
+#define DO_VCODEC_RESET(cmd, index)                                                             \
+	{                                                                                               \
+	}
+
+typedef enum __VDDRV_MRESULT_T {
+	VDDRV_MRESULT_SUCCESS = VAL_TRUE,  /* /< Represent success */
+	VDDRV_MRESULT_FAIL = VAL_FALSE     /* /< Represent failure */
+} VDDRV_MRESULT_T;
+
+typedef struct __VENC_DRV_BASE_T {
+	VAL_UINT32_T(*Init)(
+		VAL_HANDLE_T * handle,
+		VAL_HANDLE_T halhandle,
+		VAL_HANDLE_T valhandle
+	);
+	VAL_UINT32_T(*Encode)(
+		VAL_HANDLE_T handle,
+		VENC_DRV_START_OPT_T eOpt,
+		P_VENC_DRV_PARAM_FRM_BUF_T pFrameBuf,
+		P_VENC_DRV_PARAM_BS_BUF_T pBitstreamBuf,
+		VENC_DRV_DONE_RESULT_T * pResult
+	);
+	VAL_UINT32_T(*GetParam)(
+		VAL_HANDLE_T handle,
+		VENC_DRV_GET_TYPE_T a_eType,
+		VAL_VOID_T * a_pvInParam,
+		VAL_VOID_T * a_pvOutParam
+	);
+	VAL_UINT32_T(*SetParam)(
+		VAL_HANDLE_T handle,
+		VENC_DRV_SET_TYPE_T a_eType,
+		VAL_VOID_T * a_pvInParam,
+		VAL_VOID_T * a_pvOutParam
+	);
+	VAL_UINT32_T(*DeInit)(
+		VAL_HANDLE_T handle
+	); /* /< Function to do driver de-initialization */
+} VENC_DRV_BASE_T;
+
+/**
+ * @par Structure
+ *   mhalVdoDrv_t
+ * @par Description
+ *   This is a structure which store common video enc driver information
+ */
+typedef struct mhalVdoDrv_s {
+	VAL_VOID_T                      *prCodecHandle;
+	VAL_UINT32_T                    u4EncodedFrameCount;
+	VCODEC_ENC_CALLBACK_T           rCodecCb;
+	VIDEO_ENC_API_T                 *prCodecAPI;
+	VENC_BS_T                       pBSBUF;
+
+	VCODEC_ENC_BUFFER_INFO_T        EncoderInputParamNC;
+	VENC_DRV_PARAM_BS_BUF_T         BSout;
+	VENC_HYBRID_ENCSETTING          rVencSetting;
+	VAL_UINT8_T                     *ptr;
+} mhalVdoDrv_t;
+
+
+typedef struct __VENC_HYBRID_HANDLE_T {
+	mhalVdoDrv_t                    rMhalVdoDrv;
+	VAL_MEMORY_T                    rBSDrvWorkingMem;
+	VAL_UINT32_T                    nOmxTids;
+	VAL_VCODEC_THREAD_ID_T          rThreadID;
+	VIDEO_ENC_WRAP_HANDLE_T         hWrapper;
+	VAL_VOID_T                      *pDrvModule;    /* /< used for dlopen and dlclose */
+} VENC_HYBRID_HANDLE_T;
+
+
+typedef struct __VENC_HANDLE_T {
+	VENC_DRV_VIDEO_FORMAT_T CodecFormat;
+	VENC_DRV_BASE_T         rFuncPtr;      /* /< Point to driver's proprietary function. */
+	VAL_HANDLE_T            hDrvHandle;    /* /< Handle of each format driver */
+	VAL_HANDLE_T            hHalHandle;    /* /< HAL handle */
+	VAL_HANDLE_T            hValHandle;    /* /< VAL handle */
+	VAL_MEMORY_T            rHandleMem;    /* /< Memory for venc handle */
+	VAL_VOID_T              *prExtraData;  /* /< Driver private data pointer. */
+	VAL_MEMORY_T            rExtraDataMem; /* /< Save extra data memory information to be used in release. */
+	VENC_HYBRID_HANDLE_T    rHybridHandle; /* /< Hybrid handle */
+	FILE *pfDump;
+	VAL_UINT32_T            u4ShowInfo;    /* /< Flag for show FPS and BitRate */
+	VAL_UINT32_T            u4FPS;         /* /< FPS */
+	VAL_UINT32_T            u4Bitrate;     /* /< Bitrate */
+	struct timeval          tStart;        /* /< Start time counting FPS and bitrate */
+	VENC_DRV_SCENARIO_T     eScenario;     /* /< VENC Senario */
+	VAL_INT32_T             nPerfServiceHandle; /* /< Used by performace service */
+	VAL_UINT32_T            u4RecFrmWidth;  /* /< Recoded frame width, (may not 16 byte-align) */
+	VAL_UINT32_T            u4RecFrmHeight; /* /< Recoded frame height, (may not 16 byte-align) */
+} VENC_HANDLE_T;
+
+VENC_DRV_MRESULT_T ParseConfig(const char *cfgFileName, const char *ParameterItem, VAL_UINT32_T *val);
+
+
+#endif
diff --git a/kernel-headers/venc_drv_if_dep.h b/kernel-headers/venc_drv_if_dep.h
new file mode 100644
index 0000000..a3976b6
--- /dev/null
+++ b/kernel-headers/venc_drv_if_dep.h
@@ -0,0 +1,75 @@
+#ifndef VENC_DRV_IF_DEP_H
+#define VENC_DRV_IF_DEP_H
+
+/*=============================================================================
+ *                              Include Files
+ *===========================================================================*/
+
+#include "val_types_private.h"
+#include "vcodec_if_v2.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*=============================================================================
+ *                              Type definition
+ *===========================================================================*/
+
+/**
+ * @par Structure
+ *   mhalVdoDrv_t
+ * @par Description
+ *   This is a structure which store common video enc driver information
+ */
+typedef struct mhalVdoDrv_s {
+	VAL_VOID_T                      *prCodecHandle;
+	VAL_UINT32_T                    u4EncodedFrameCount;
+	VCODEC_ENC_CALLBACK_T           rCodecCb;
+	VIDEO_ENC_API_T                 *prCodecAPI;
+	VENC_BS_T                       pBSBUF;
+
+	VCODEC_ENC_BUFFER_INFO_T        EncoderInputParamNC;
+	VENC_DRV_PARAM_BS_BUF_T         BSout;
+	VENC_HYBRID_ENCSETTING          rVencSetting;
+	VAL_UINT8_T                     *ptr;
+} mhalVdoDrv_t;
+
+typedef struct __VENC_HANDLE_T {
+	VAL_HANDLE_T            hHalHandle;    /* /< HAL data. */
+	VAL_HANDLE_T            vdriver_Handle;       /* /< for MMSYS power on/off */
+	VAL_MEMORY_T            rHandleMem;    /* /< Save handle memory information to be used in release. */
+	VAL_BOOL_T              bFirstDecoded; /* / < already pass first video data to codec */
+	VAL_BOOL_T              bHeaderPassed; /* / < already pass video header to codec */
+	VAL_BOOL_T              bFlushAll;
+	VAL_MEMORY_T            HeaderBuf;
+	VAL_HANDLE_T            hCodec;
+	/* DRIVER_HANDLER_T        hDrv; */
+	VAL_UINT32_T            CustomSetting;
+	VCODEC_MEMORY_TYPE_T    rVideoDecMemType;
+	VAL_UINT32_T            nYUVBufferIndex;
+	VCODEC_OPEN_SETTING_T   codecOpenSetting;
+
+	mhalVdoDrv_t            rMhalVdoDrv;
+	VAL_MEMORY_T            bs_driver_workingmem;
+
+	/* Morris Yang 20110411 [ */
+	VENC_DRV_VIDEO_FORMAT_T CodecFormat;
+	VAL_VOID_T              *prExtraData;  /* /< Driver private data pointer. */
+	VAL_MEMORY_T             rExtraDataMem; /* /< Save extra data memory information to be used in release. */
+	/* ] */
+	VAL_UINT32_T  nOmxTids;
+#if 1   /* defined(MT6572)     //VCODEC_MULTI_THREAD */
+	/* Jackal Chen [ */
+	VAL_VOID_T              *pDrvModule;    /* /< used for dlopen and dlclose */
+	/* ] */
+#endif
+	VIDEO_ENC_WRAP_HANDLE_T hWrapper;
+} VENC_HANDLE_T;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* VENC_DRV_IF_DEP_H */
diff --git a/kernel-headers/venc_drv_if_private.h b/kernel-headers/venc_drv_if_private.h
new file mode 100644
index 0000000..4cff833
--- /dev/null
+++ b/kernel-headers/venc_drv_if_private.h
@@ -0,0 +1,129 @@
+#ifndef _VENC_DRV_IF_PRIVATE_H_
+#define _VENC_DRV_IF_PRIVATE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_private.h"
+#include "venc_drv_if_public.h"
+
+
+typedef enum __VENC_DRV_COLOR_FORMAT_T {
+	VENC_DRV_COLOR_FORMAT_YUV420,
+	VENC_DRV_COLOR_FORMAT_YV12,
+}
+VENC_DRV_COLOR_FORMAT_T;
+
+
+typedef struct __VENC_DRV_YUV_STRIDE_T {
+	unsigned int    u4YStride;
+	unsigned int    u4UVStride;
+} VENC_DRV_YUV_STRIDE_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_PARAM_EIS_T
+ * @par Description
+ *   This is the EIS information and used as input or output parameter for\n
+ *   eVEncDrvSetParam() or eVEncDrvGetParam()\n
+ */
+typedef struct __VENC_DRV_PARAM_EIS_T {
+	VAL_BOOL_T      fgEISEnable;            /* /<: EIS Enable/disable. */
+	VAL_UINT32_T    u4EISFrameWidth;        /* /<: EIS FrameWidth */
+	VAL_UINT32_T    u4EISFrameHeight;       /* /<: EIS FrameHeight */
+	VAL_UINT32_T    u4GMV_X;                /* /<: Golbal Motion Vector (GMV) of the VOP Frame used for EIS */
+	VAL_UINT32_T    u4GMV_Y;                /* /<: Golbal Motion Vector (GMV) of the VOP Frame used for EIS */
+} VENC_DRV_PARAM_EIS_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_PARAM_EIS_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_PARAM_EIS_T
+ */
+typedef VENC_DRV_PARAM_EIS_T * P_VENC_DRV_PARAM_EIS_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_STATISTIC_T
+ * @par Description
+ *   This is statistic information and used as output parameter for\n
+ *   eVEncDrvGetParam()\n
+ */
+typedef struct __VENC_DRV_STATISTIC_T {
+	VAL_UINT32_T    u4EncTimeMax;   /* /<: Encode one frame time. Max */
+	VAL_UINT32_T    u4EncTimeMin;   /* /<: Encode one frame time. Min */
+	VAL_UINT32_T    u4EncTimeAvg;   /* /<: Encode one frame time. Average */
+	VAL_UINT32_T    u4EncTimeSum;   /* /<: Encode one frame time. Sum */
+} VENC_DRV_STATISTIC_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_STATISTIC_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_STATISTIC_T
+ */
+typedef VENC_DRV_STATISTIC_T * P_VENC_DRV_STATISTIC_T;
+
+
+typedef struct __VENC_HYB_ENCSETTING {
+
+	/* used in SetParameter */
+	VAL_UINT32_T    u4Width;
+	VAL_UINT32_T    u4Height;
+	VAL_UINT32_T    u4IntraVOPRate;     /* u4NumPFrm; */
+	VAL_UINT32_T    eFrameRate;
+	VAL_UINT32_T    u4VEncBitrate;
+	VAL_UINT32_T    u4QualityLevel;
+	VAL_UINT32_T    u4ShortHeaderMode;
+	VAL_UINT32_T    u4CodecType;        /* mepg4, h263, h264... */
+	VAL_UINT32_T    u4RotateAngle;
+
+	/* used in QueryFunctions */
+	VENC_DRV_COLOR_FORMAT_T     eVEncFormat;    /* YUV420, I420 ..... */
+	VENC_DRV_YUV_STRIDE_T       rVCodecYUVStride;
+	VAL_UINT32_T    u4Profile;
+	VAL_UINT32_T    u4Level;
+	VAL_UINT32_T    u4BufWidth;
+	VAL_UINT32_T    u4BufHeight;
+	VAL_UINT32_T    u4NumBFrm;
+	VAL_UINT32_T    fgInterlace;
+
+	/* used in Query */
+	VAL_UINT32_T    u4InitQ;
+	VAL_UINT32_T    u4MinQ;
+	VAL_UINT32_T    u4MaxQ;
+	VAL_UINT32_T    u4Algorithm;
+	VAL_UINT32_T    u4_Rate_Hard_Limit;
+	VAL_UINT32_T    u4RateBalance;
+	VAL_UINT32_T    u4ForceIntraEnable;
+	VAL_UINT32_T    u4VEncMinBitrate;   /* Min bit-rate */
+
+	/* hardware dependent function settings */
+	VAL_BOOL_T      fgUseMCI;
+	VAL_UINT32_T    u4VEncThreadNum;
+        VAL_UINT32_T    u4LivePhoto;
+} VENC_HYBRID_ENCSETTING;
+
+
+typedef struct VENC_BS_s {
+	VAL_UINT8_T                     *u4BS_addr;
+	VAL_UINT8_T                     *u4BS_addr_PA;
+	VAL_UINT32_T                    u4BSSize;
+	VAL_UINT32_T                    u4BS_frmSize;
+	VAL_UINT32_T                    u4BS_frmCount;
+	VAL_UINT32_T                    u4BS_index;
+	VAL_UINT32_T                    u4BS_preindex;
+	VAL_UINT32_T                    u4Fillcnt;
+	VAL_UINT32_T                    Handle;
+} VENC_BS_T;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VENC_DRV_IF_PRIVATE_H_ */
diff --git a/kernel-headers/venc_drv_if_public.h b/kernel-headers/venc_drv_if_public.h
new file mode 100644
index 0000000..7035dde
--- /dev/null
+++ b/kernel-headers/venc_drv_if_public.h
@@ -0,0 +1,861 @@
+#ifndef _VENC_DRV_IF_PUBLIC_H_
+#define _VENC_DRV_IF_PUBLIC_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "val_types_public.h"
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_QUERY_TYPE_T
+ * @par Description
+ *   This is the item used for query driver
+ */
+typedef enum __VENC_DRV_QUERY_TYPE_T {
+	VENC_DRV_QUERY_TYPE_NONE,                   /* /< Default value (not used) */
+	VENC_DRV_QUERY_TYPE_VIDEO_FORMAT,           /* /< Query the driver capability */
+	VENC_DRV_QUERY_TYPE_VIDEO_PROPERTY,         /* /< Query the video property */
+	VENC_DRV_QUERY_TYPE_VIDEO_PROPERTY_LIST,    /* /< Query the video property list */
+	VENC_DRV_QUERY_TYPE_PROPERTY,               /* /< Get the driver property */
+	VENC_DRV_QUERY_TYPE_MCI_SUPPORTED,          /* /< Query if the codec support MCI */
+	VENC_DRV_QUERY_TYPE_CHIP_NAME,              /* /< Query chip name */
+	VENC_DRV_QUERY_TYPE_INPUT_BUF_LIMIT,        /* /< Query input buffer stride and sliceheight */
+	VENC_DRV_QUERY_TYPE_NORMAL_PRIO,            /* /< Query if recorder scenario adjust to normal priority, for 6571. */
+	VENC_DRV_QUERY_TYPE_VIDEO_CAMCORDER_CAP,    /* /< Query spec. for MediaProfile */
+	VENC_DRV_QUERY_TYPE_CHIP_VARIANT,           /* /< Query chip variant */
+	VENC_DRV_QUERY_TYPE_MAX = 0xFFFFFFFF        /* /< Max VENC_DRV_QUERY_TYPE_T value */
+}
+VENC_DRV_QUERY_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_YUV_FORMAT_T
+ * @par Description
+ *   This is the item used for input YUV buffer format
+ */
+typedef enum __VENC_DRV_YUV_FORMAT_T {
+	VENC_DRV_YUV_FORMAT_NONE,                   /* /< Default value (not used) */
+	VENC_DRV_YUV_FORMAT_GRAY,                   /* /< GRAY YUV format */
+	VENC_DRV_YUV_FORMAT_422,                    /* /< 422 YUV format */
+	VENC_DRV_YUV_FORMAT_420,                    /* /< 420 YUV format */
+	VENC_DRV_YUV_FORMAT_411,                    /* /< 411 YUV format */
+	VENC_DRV_YUV_FORMAT_YV12,                   /* /< Android YV12 (16/16/16) YUV format */
+	VENC_DRV_YUV_FORMAT_NV12,                   /* /< NV12 YUV format */
+	VENC_DRV_YUV_FORMAT_NV21,                   /* /< NV21 YUV format */
+	VENC_DRV_YUV_FORMAT_BLK16X32,               /* /< Block 16x32 YUV format */
+	VENC_DRV_YUV_FORMAT_BLK64X32,               /* /< Block 64x32 YUV format */
+	VENC_DRV_YUV_FORMAT_YV12_1688,              /* /< YV12 YUV format */
+	VENC_DRV_YUV_FORMAT_MAX = 0xFFFFFFFF        /* /< Max VENC_DRV_YUV_FORMAT_T value */
+} VENC_DRV_YUV_FORMAT_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_VIDEO_FORMAT_T
+ * @par Description
+ *   This is the item used for encode video format
+ */
+typedef enum __VENC_DRV_VIDEO_FORMAT_T {
+	VENC_DRV_VIDEO_FORMAT_NONE,                 /* /< Default value (not used) */
+	VENC_DRV_VIDEO_FORMAT_MPEG4,                /* /< MPEG4 video format */
+	VENC_DRV_VIDEO_FORMAT_MPEG4_1080P,          /* /< MPEG4 video format for 1080p */
+	VENC_DRV_VIDEO_FORMAT_MPEG4_SHORT,          /* /< MPEG4_SHORT (H.263 baseline profile) video format */
+	VENC_DRV_VIDEO_FORMAT_H263,                 /* /< H.263 video format */
+	VENC_DRV_VIDEO_FORMAT_H264,                 /* /< H.264 video format */
+	VENC_DRV_VIDEO_FORMAT_H264_VGA,             /* /< H.264 video format for VGA */
+	VENC_DRV_VIDEO_FORMAT_WMV9,                 /* /< WMV9 video format */
+	VENC_DRV_VIDEO_FORMAT_VC1,                  /* /< VC1 video format */
+	VENC_DRV_VIDEO_FORMAT_VP8,                  /* /< VP8 video format */
+	VENC_DRV_VIDEO_FORMAT_JPEG,                 /* /< JPEG picture format */
+	VENC_DRV_VIDEO_FORMAT_HEVC,                 /* /< HEVC video format */
+	VENC_DRV_VIDEO_FORMAT_H264SEC,              /* /<: Secure H.264 */
+	VENC_DRV_VIDEO_FORMAT_MAX = 0xFFFFFFFF      /* /< Max VENC_DRV_VIDEO_FORMAT_T value */
+} VENC_DRV_VIDEO_FORMAT_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_FRAME_RATE_T
+ * @par Description
+ *   This is the item used for encode frame rate
+ */
+typedef enum __VENC_DRV_FRAME_RATE_T {
+	VENC_DRV_FRAME_RATE_NONE    = 0,            /* /< Default value (not used) */
+	VENC_DRV_FRAME_RATE_7_5     = 75,           /* /< 7.5 */
+	VENC_DRV_FRAME_RATE_10      = 10,           /* /< 10 */
+	VENC_DRV_FRAME_RATE_15      = 15,           /* /< 15 */
+	VENC_DRV_FRAME_RATE_20      = 20,           /* /< 20 */
+	VENC_DRV_FRAME_RATE_24      = 24,           /* /< 24 */
+	VENC_DRV_FRAME_RATE_25      = 25,           /* /< 25 */
+	VENC_DRV_FRAME_RATE_29_97   = 2997,         /* /< 29.97 */
+	VENC_DRV_FRAME_RATE_30      = 30,           /* /< 30 */
+	VENC_DRV_FRAME_RATE_60      = 60,           /* /< 60 */
+	VENC_DRV_FRAME_RATE_120     = 120,          /* /< 120 */
+	VENC_DRV_FRAME_RATE_180     = 180,          /* /< 180 */
+	VENC_DRV_FRAME_RATE_240     = 240,          /* /< 240 */
+	VENC_DRV_FRAME_RATE_480     = 480,          /* /< 480 */
+	VENC_DRV_FRAME_RATE_MAX     = 0xFFFFFFFF    /* /< Max VENC_DRV_FRAME_RATE_T value */
+} VENC_DRV_FRAME_RATE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_START_OPT_T
+ * @par Description
+ *   This is the item used for encode frame type
+ */
+typedef enum __VENC_DRV_START_OPT_T {
+	VENC_DRV_START_OPT_NONE,                                /* /< Default value (not used) */
+	VENC_DRV_START_OPT_ENCODE_SEQUENCE_HEADER,              /* /< Encode a Sequence header */
+	VENC_DRV_START_OPT_ENCODE_SEQUENCE_HEADER_H264_SPS,     /* /< Encode a Sequence header H264 SPS */
+	VENC_DRV_START_OPT_ENCODE_SEQUENCE_HEADER_H264_PPS,     /* /< Encode a Sequence header H264 PPS */
+	VENC_DRV_START_OPT_ENCODE_FRAME,                        /* /< Encode a frame */
+	VENC_DRV_START_OPT_ENCODE_KEY_FRAME,                    /* /< Encode a key frame */
+	VENC_DRV_START_OPT_ENCODE_FINAL,                        /* /< Final encode (Only use to encode final frame) */
+	VENC_DRV_START_OPT_ENCODE_DUMMY_NAL,                    /* /< Encode a dummy NAL for WFD */
+	VENC_DRV_START_OPT_MAX = 0xFFFFFFFF                     /* /< Max VENC_DRV_START_OPT_T value */
+} VENC_DRV_START_OPT_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_MESSAGE_T
+ * @par Description
+ *   This is the item used for encode frame status
+ */
+typedef enum __VENC_DRV_MESSAGE_T {
+	VENC_DRV_MESSAGE_NONE,                      /* /< Default value (not used) */
+	VENC_DRV_MESSAGE_OK,                        /* /< Encode ok */
+	VENC_DRV_MESSAGE_ERR,                       /* /< Encode error */
+	VENC_DRV_MESSAGE_TIMEOUT,                   /* /< Encode timeout */
+	VENC_DRV_MESSAGE_PARTIAL,                   /* /< Encode partial frame (ok means EOF) */
+	VENC_DRV_MESSAGE_MAX = 0xFFFFFFFF           /* /< Max VENC_DRV_MESSAGE_T value */
+} VENC_DRV_MESSAGE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_H264_VIDEO_PROFILE_T
+ * @par Description
+ *   This is the item used for h.264 encoder profile capability
+ */
+typedef enum __VENC_DRV_H264_VIDEO_PROFILE_T {
+	VENC_DRV_H264_VIDEO_PROFILE_UNKNOWN              = 0,           /* /< Default value (not used) */
+	VENC_DRV_H264_VIDEO_PROFILE_BASELINE             = (1 << 0),    /* /< Baseline */
+	VENC_DRV_H264_VIDEO_PROFILE_CONSTRAINED_BASELINE = (1 << 1),    /* /< Constrained Baseline */
+	VENC_DRV_H264_VIDEO_PROFILE_MAIN                 = (1 << 2),    /* /< Main */
+	VENC_DRV_H264_VIDEO_PROFILE_EXTENDED             = (1 << 3),    /* /< Extended */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH                 = (1 << 4),    /* /< High */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH_10              = (1 << 5),    /* /< High 10 */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH422              = (1 << 6),    /* /< High 422 */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH444              = (1 << 7),    /* /< High 444 */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH_10_INTRA        = (1 << 8),    /* /< High 10 Intra (Amendment 2) */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH422_INTRA        = (1 << 9),    /* /< High 422 Intra (Amendment 2) */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH444_INTRA        = (1 << 10),   /* /< High 444 Intra (Amendment 2) */
+	VENC_DRV_H264_VIDEO_PROFILE_CAVLC444_INTRA       = (1 << 11),   /* /< CAVLC 444 Intra (Amendment 2) */
+	VENC_DRV_H264_VIDEO_PROFILE_HIGH444_PREDICTIVE   = (1 << 12),   /* /< High 444 Predictive (Amendment 2) */
+	VENC_DRV_H264_VIDEO_PROFILE_SCALABLE_BASELINE    = (1 << 13),   /* /< Scalable Baseline (Amendment 3) */
+	VENC_DRV_H264_VIDEO_PROFILE_SCALABLE_HIGH        = (1 << 14),   /* /< Scalable High (Amendment 3) */
+	VENC_DRV_H264_VIDEO_PROFILE_SCALABLE_HIGH_INTRA  = (1 << 15),   /* /< Scalable High Intra (Amendment 3) */
+	VENC_DRV_H264_VIDEO_PROFILE_MULTIVIEW_HIGH       = (1 << 16),   /* /< Multiview High (Corrigendum 1 (2009)) */
+	VENC_DRV_H264_VIDEO_PROFILE_MAX                  = 0xFFFFFFFF   /* /< Max VENC_DRV_H264_VIDEO_PROFILE_T value */
+} VENC_DRV_H264_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_HEVC_VIDEO_PROFILE_T
+ * @par Description
+ *   This is the item used for hevc encoder profile capability
+ */
+typedef enum __VENC_DRV_HEVC_VIDEO_PROFILE_T {
+	VENC_DRV_HEVC_VIDEO_PROFILE_UNKNOWN              = 0,           /* /< Default value (not used) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_BASELINE             = (1 << 0),    /* /< Baseline */
+	VENC_DRV_HEVC_VIDEO_PROFILE_CONSTRAINED_BASELINE = (1 << 1),    /* /< Constrained Baseline */
+	VENC_DRV_HEVC_VIDEO_PROFILE_MAIN                 = (1 << 2),    /* /< Main */
+	VENC_DRV_HEVC_VIDEO_PROFILE_EXTENDED             = (1 << 3),    /* /< Extended */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH                 = (1 << 4),    /* /< High */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH_10              = (1 << 5),    /* /< High 10 */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH422              = (1 << 6),    /* /< High 422 */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH444              = (1 << 7),    /* /< High 444 */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH_10_INTRA        = (1 << 8),    /* /< High 10 Intra (Amendment 2) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH422_INTRA        = (1 << 9),    /* /< High 422 Intra (Amendment 2) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH444_INTRA        = (1 << 10),   /* /< High 444 Intra (Amendment 2) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_CAVLC444_INTRA       = (1 << 11),   /* /< CAVLC 444 Intra (Amendment 2) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_HIGH444_PREDICTIVE   = (1 << 12),   /* /< High 444 Predictive (Amendment 2) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_SCALABLE_BASELINE    = (1 << 13),   /* /< Scalable Baseline (Amendment 3) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_SCALABLE_HIGH        = (1 << 14),   /* /< Scalable High (Amendment 3) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_SCALABLE_HIGH_INTRA  = (1 << 15),   /* /< Scalable High Intra (Amendment 3) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_MULTIVIEW_HIGH       = (1 << 16),   /* /< Multiview High (Corrigendum 1 (2009)) */
+	VENC_DRV_HEVC_VIDEO_PROFILE_MAX                  = 0xFFFFFFFF   /* /< Max VENC_DRV_HEVC_VIDEO_PROFILE_T value */
+} VENC_DRV_HEVC_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_MPEG_VIDEO_PROFILE_T
+ * @par Description
+ *   This is the item used for h.263, mpeg2, mpeg4 encoder profile capability
+ */
+typedef enum __VENC_DRV_MPEG_VIDEO_PROFILE_T {
+	VENC_DRV_MPEG_VIDEO_PROFILE_UNKNOWN               = 0,          /* /< Default value (not used) */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_0                = (1 << 0),   /* /< H.263 0 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_1                = (1 << 1),   /* /< H.263 1 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_2                = (1 << 2),   /* /< H.263 2 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_3                = (1 << 3),   /* /< H.263 3 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_4                = (1 << 4),   /* /< H.263 4 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_5                = (1 << 5),   /* /< H.263 5 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_6                = (1 << 6),   /* /< H.263 6 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_7                = (1 << 7),   /* /< H.263 7 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_H263_8                = (1 << 8),   /* /< H.263 8 */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG2_SIMPLE          = (1 << 9),   /* /< MPEG2 Simple */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG2_MAIN            = (1 << 10),  /* /< MPEG2 Main */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG2_SNR             = (1 << 11),  /* /< MPEG2 SNR */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG2_SPATIAL         = (1 << 12),  /* /< MPEG2 Spatial */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG2_HIGH            = (1 << 13),  /* /< MPEG2 High */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG4_SIMPLE          = (1 << 14),  /* /< MPEG4 Simple */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE = (1 << 15),  /* /< MPEG4 Advanced Simple */
+	VENC_DRV_MPEG_VIDEO_PROFILE_MAX                   = 0xFFFFFFFF  /* /< Max VENC_DRV_MPEG_VIDEO_PROFILE_T value */
+} VENC_DRV_MPEG_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_MS_VIDEO_PROFILE_T
+ * @par Description
+ *   This is the item used for MS encoder profile capability
+ */
+typedef enum __VENC_DRV_MS_VIDEO_PROFILE_T {
+	VENC_DRV_MS_VIDEO_PROFILE_UNKNOWN      = 0,             /* /< Default value (not used) */
+	VENC_DRV_MS_VIDEO_PROFILE_VC1_SIMPLE   = (1 << 0),      /* /< VC1 Simple */
+	VENC_DRV_MS_VIDEO_PROFILE_VC1_MAIN     = (1 << 1),      /* /< VC1 Main */
+	VENC_DRV_MS_VIDEO_PROFILE_VC1_ADVANCED = (1 << 2),      /* /< VC1 Advanced */
+	VENC_DRV_MS_VIDEO_PROFILE_WMV9_SIMPLE  = (1 << 3),      /* /< WMV9 Simple */
+	VENC_DRV_MS_VIDEO_PROFILE_WMV9_MAIN    = (1 << 4),      /* /< WMV9 Main */
+	VENC_DRV_MS_VIDEO_PROFILE_WMV9_COMPLEX = (1 << 5),      /* /< WMV9 Complex */
+	VENC_DRV_MS_VIDEO_PROFILE_MAX          = 0xFFFFFFFF     /* /< Max VENC_DRV_MS_VIDEO_PROFILE_T value */
+} VENC_DRV_MS_VIDEO_PROFILE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_VIDEO_LEVEL_T
+ * @par Description
+ *   This is the item used for encoder level capability
+ */
+typedef enum __VENC_DRV_VIDEO_LEVEL_T {
+	VENC_DRV_VIDEO_LEVEL_UNKNOWN = 0,       /* /< Default value (not used) */
+	VENC_DRV_VIDEO_LEVEL_0,                 /* /< VC1 */
+	VENC_DRV_VIDEO_LEVEL_1,                 /* /< H264, HEVC, VC1, MPEG4 */
+	VENC_DRV_VIDEO_LEVEL_1b,                /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_1_1,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_1_2,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_1_3,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_2,                 /* /< H264, HEVC, VC1, MPEG4 */
+	VENC_DRV_VIDEO_LEVEL_2_1,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_2_2,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_3,                 /* /< H264, HEVC, VC1, MPEG4 */
+	VENC_DRV_VIDEO_LEVEL_3_1,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_3_2,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_4,                 /* /< H264, HEVC, VC1 */
+	VENC_DRV_VIDEO_LEVEL_4_1,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_4_2,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_5,                 /* /< H264, HEVC, HEVC */
+	VENC_DRV_VIDEO_LEVEL_5_1,               /* /< H264, HEVC */
+	VENC_DRV_VIDEO_LEVEL_LOW,               /* /< VC1, MPEG2 */
+	VENC_DRV_VIDEO_LEVEL_MEDIUM,            /* /< VC1, MPEG2 */
+	VENC_DRV_VIDEO_LEVEL_HIGH1440,          /* /< MPEG2 */
+	VENC_DRV_VIDEO_LEVEL_HIGH,              /* /< VC1, MPEG2 */
+	VENC_DRV_VIDEO_LEVEL_6,                 /* /< H263 */
+	VENC_DRV_VIDEO_LEVEL_7,               /* /< H263 */
+	VENC_DRV_VIDEO_LEVEL_MAX = 0xFFFFFFFF   /* /< Max VENC_DRV_VIDEO_LEVEL_T value */
+} VENC_DRV_VIDEO_LEVEL_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_RESOLUTION_T
+ * @par Description
+ *   This is the item used for encoder resolution capability
+ */
+typedef enum __VENC_DRV_RESOLUTION_T {
+	VENC_DRV_RESOLUTION_UNKNOWN = 0,                /* /< Default value (not used) */
+	VENC_DRV_RESOLUTION_SUPPORT_QCIF,               /* /< CIF */
+	VENC_DRV_RESOLUTION_SUPPORT_QVGA,               /* /< QVGA */
+	VENC_DRV_RESOLUTION_SUPPORT_CIF,                /* /< QCIF */
+	VENC_DRV_RESOLUTION_SUPPORT_HVGA,               /* /< HVGA: 480x320 */
+	VENC_DRV_RESOLUTION_SUPPORT_VGA,                /* /< VGA: 640x480 */
+	VENC_DRV_RESOLUTION_SUPPORT_480I,               /* /< 480I */
+	VENC_DRV_RESOLUTION_SUPPORT_480P,               /* /< 480P */
+	VENC_DRV_RESOLUTION_SUPPORT_576I,               /* /< 576I */
+	VENC_DRV_RESOLUTION_SUPPORT_576P,               /* /< 480P */
+	VENC_DRV_RESOLUTION_SUPPORT_FWVGA,              /* /< FWVGA: 864x480 */
+	VENC_DRV_RESOLUTION_SUPPORT_720I,               /* /< 720I */
+	VENC_DRV_RESOLUTION_SUPPORT_720P,               /* /< 720P */
+	VENC_DRV_RESOLUTION_SUPPORT_1080I,              /* /< 1080I */
+	VENC_DRV_RESOLUTION_SUPPORT_1080P,              /* /< 1080P */
+	VENC_DRV_RESOLUTION_SUPPORT_2160P,              /* /< 2160P */
+	VENC_DRV_RESOLUTION_SUPPORT_MAX = 0xFFFFFFFF    /* /< Max VENC_DRV_RESOLUTION_T value */
+} VENC_DRV_RESOLUTION_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_SET_TYPE_T
+ * @par Description
+ *   This is the input parameter for eVEncDrvSetParam()
+ */
+typedef enum __VENC_DRV_SET_TYPE_T {
+	VENC_DRV_SET_TYPE_UNKONW = 0,           /* /< Default value (not used) */
+	VENC_DRV_SET_TYPE_RST,                  /* /< Set reset */
+	VENC_DRV_SET_TYPE_CB,                   /* /< Set callback function */
+	VENC_DRV_SET_TYPE_PARAM_RC,             /* /< Set rate control parameter */
+	VENC_DRV_SET_TYPE_PARAM_ME,             /* /< Set motion estimation parameter */
+	VENC_DRV_SET_TYPE_PARAM_EIS,            /* /< Set EIS parameter */
+	VENC_DRV_SET_TYPE_PARAM_ENC,            /* /< Set encoder parameters such as I-frame period, etc. */
+	VENC_DRV_SET_TYPE_STATISTIC_ON,         /* /< Enable statistic function */
+	VENC_DRV_SET_TYPE_STATISTIC_OFF,        /* /< Disable statistic function */
+	VENC_DRV_SET_TYPE_SET_OMX_TIDS,         /* /< Set OMX thread IDs */
+	VENC_DRV_SET_TYPE_MPEG4_SHORT,          /* /< Set MPEG4 short header mode */
+	VENC_DRV_SET_TYPE_FORCE_INTRA_ON,       /* /< Set Force Intra Frame on */
+	VENC_DRV_SET_TYPE_FORCE_INTRA_OFF,      /* /< Set Force Intra Frame off */
+	VENC_DRV_SET_TYPE_TIME_LAPSE,           /* /< Set time lapse */
+	VENC_DRV_SET_TYPE_ALLOC_WORK_BUF,       /* /< Set to alloc working buffer */
+	VENC_DRV_SET_TYPE_DUMP_WORK_BUF,        /* /< Set to dump working buffer */
+	VENC_DRV_SET_TYPE_FREE_WORK_BUF,        /* /< Set to free working buffer */
+	VENC_DRV_SET_TYPE_ADJUST_BITRATE,       /* /< Set to adjust bitrate */
+	VENC_DRV_SET_TYPE_I_FRAME_INTERVAL,     /* /< Set I Frame interval */
+	VENC_DRV_SET_TYPE_WFD_MODE,             /* /< Set Wifi-Display Mode */
+	VENC_DRV_SET_TYPE_RECORD_SIZE,          /* /< Ser record size */
+	VENC_DRV_SET_TYPE_USE_MCI_BUF,          /* /< Set to use MCI buffer */
+	VENC_DRV_SET_TYPE_ADJUST_FRAMERATE,     /* /< Set frame rate */
+	VENC_DRV_SET_TYPE_INIT_QP,              /* /< Set init QP */
+	VENC_DRV_SET_TYPE_SKIP_FRAME,           /* /< Set skip one frame */
+	VENC_DRV_SET_TYPE_SCENARIO,             /* /< Set VENC Scenario */
+	VENC_DRV_SET_TYPE_PREPEND_HEADER,       /* /< Set prepend SPS/PPS before IDR */
+	VENC_DRV_SET_TYPE_SLOW_MOTION_ENCODE,       /* /< Set to Slow Motion Video Recording for header or frame */
+	VENC_DRV_SET_TYPE_SLOW_MOTION_POST_PROC,    /* /< Set to Slow Motion Video Recording for encoded bs with post processing */
+	VENC_DRV_SET_TYPE_SLOW_MOTION_LOCK_HW,      /* /< Set to Slow Motion Video Recording for Lock HW */
+	VENC_DRV_SET_TYPE_SLOW_MOTION_UNLOCK_HW,    /* /< Set to Slow Motion Video Recording for UnLock HW */
+	VENC_DRV_SET_TYPE_NONREFP,              /* /< Set Enable/Disable Non reference P frame */
+	VENC_DRV_SET_TYPE_CONFIG_QP,            /* /< Set init QP */
+	VENC_DRV_SET_TYPE_MAX = 0xFFFFFFFF      /* /< Max VENC_DRV_SET_TYPE_T value */
+} VENC_DRV_SET_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_GET_TYPE_T
+ * @par Description
+ *   This is the input parameter for eVEncDrvGetParam()
+ */
+typedef enum __VENC_DRV_GET_TYPE_T {
+	VENC_DRV_GET_TYPE_UNKONW = 0,               /* /< Default value (not used) */
+	VENC_DRV_GET_TYPE_PARAM_RC,                 /* /< Get rate control parameter */
+	VENC_DRV_GET_TYPE_PARAM_ME,                 /* /< Get motion estimation parameter */
+	VENC_DRV_GET_TYPE_PARAM_EIS,                /* /< Get EIS parameter */
+	VENC_DRV_GET_TYPE_PARAM_ENC,                /* /< Get encoder parameters such as I-frame period, etc. */
+	VENC_DRV_GET_TYPE_STATISTIC,                /* /< Get statistic. */
+	VENC_DRV_GET_TYPE_GET_CPU_LOADING_INFO,     /* /< query the cpu loading info from kernel driver */
+	VENC_DRV_GET_TYPE_GET_YUV_FORMAT,           /* /< Get YUV format */
+	VENC_DRV_GET_TYPE_GET_CODEC_TIDS,
+	/* for DirectLink Meta Mode + */
+	VENC_DRV_GET_TYPE_ALLOC_META_HANDLE_LIST,           /* /< Alloc a handle to store meta handle list */
+	VENC_DRV_GET_TYPE_GET_BUF_INFO_FROM_META_HANDLE,    /* /< Get buffer virtual address from meta buffer handle */
+	VENC_DRV_GET_TYPE_FREE_META_HANDLE_LIST,            /* /< free a handle allocated from VENC_DRV_GET_TYPE_ALLOC_META_HANDLE_LIST */
+	/* for DirectLink Meta Mode - */
+	VENC_DRV_GET_TYPE_MAX = 0xFFFFFFFF          /* /< Max VENC_DRV_GET_TYPE_MAX value */
+} VENC_DRV_GET_TYPE_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_MRESULT_T
+ * @par Description
+ *   This is the return value for eVEncDrvXXX()
+ */
+typedef enum __VENC_DRV_MRESULT_T {
+	VENC_DRV_MRESULT_OK = 0,                    /* /< Return Success */
+	VENC_DRV_MRESULT_FAIL,                      /* /< Return Fail */
+	VENC_DRV_MRESULT_MAX = 0x0FFFFFFF           /* /< Max VENC_DRV_MRESULT_T value */
+} VENC_DRV_MRESULT_T;
+
+
+/**
+ * @par Enumeration
+ *   VENC_DRV_SCENARIO_T
+ * @par Description
+ *   This is the scenario for VENC scenario
+ */
+typedef enum __VENC_DRV_SCENARIO_T {
+	VENC_DRV_SCENARIO_CAMERA_REC            = 1,        /* /< Camera recording */
+	VENC_DRV_SCENARIO_LIVEPHOTO_CAPTURE     = (1 << 1), /* /< LivePhoto recording */
+	VENC_DRV_SCENARIO_LIVEPHOTO_EFFECT      = (1 << 2), /* /< LivePhoto effect transcoding */
+	VENC_DRV_SCENARIO_CAMERA_REC_SLOW_MOTION = (1 << 3), /* /< Camera recording with slow motion */
+	VENC_DRV_SCENARIO_SCREEN_REC            = (1 << 4), /* /< Screen recording */
+} VENC_DRV_SCENARIO_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_QUERY_VIDEO_FORMAT_T
+ * @par Description
+ *   This is a input parameter for eVEncDrvQueryCapability()
+ */
+typedef struct __VENC_DRV_QUERY_VIDEO_FORMAT_T {
+	VENC_DRV_VIDEO_FORMAT_T eVideoFormat;       /* /< [OUT] video format capability */
+	VAL_UINT32_T            u4Profile;          /* /< [OUT] video profile capability (VENC_DRV_H264_VIDEO_PROFILE_T, VENC_DRV_MPEG_VIDEO_PROFILE_T, VENC_DRV_MS_VIDEO_PROFILE_T) */
+	VENC_DRV_VIDEO_LEVEL_T  eLevel;             /* /< [OUT] video level capability */
+	VENC_DRV_RESOLUTION_T   eResolution;        /* /< [OUT] video resolution capability */
+	VAL_UINT32_T            u4Width;            /* /< [OUT] video width capability */
+	VAL_UINT32_T            u4Height;           /* /< [OUT] video height capability */
+	VAL_UINT32_T            u4Bitrate;          /* /< [OUT] video bitrate capability */
+	VAL_UINT32_T            u4FrameRate;        /* /< [OUT] video FrameRate capability, 15, 30,... */
+} VENC_DRV_QUERY_VIDEO_FORMAT_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_QUERY_VIDEO_FORMAT_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_QUERY_VIDEO_FORMAT_T
+ */
+typedef VENC_DRV_QUERY_VIDEO_FORMAT_T * P_VENC_DRV_QUERY_VIDEO_FORMAT_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_QUERY_INPUT_BUF_LIMIT
+ * @par Description
+ *   This is a input parameter for eVEncDrvQueryCapability()
+ */
+typedef struct __VENC_DRV_QUERY_INPUT_BUF_LIMIT {
+	VENC_DRV_VIDEO_FORMAT_T eVideoFormat;       /* /< [IN]  video format */
+	VAL_UINT32_T            u4Width;            /* /< [IN]  video width */
+	VAL_UINT32_T            u4Height;           /* /< [IN]  video height */
+	VAL_UINT32_T            u4Stride;           /* /< [OUT] video stride */
+	VAL_UINT32_T            u4SliceHeight;      /* /< [OUT] video sliceheight */
+	VENC_DRV_SCENARIO_T     eScenario;          /* /< [IN]  venc scenario */
+} VENC_DRV_QUERY_INPUT_BUF_LIMIT;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_PARAM_ENC_T
+ * @par Description
+ *   This is the encoder settings and used as input or output parameter for eVEncDrvSetParam() or eVEncDrvGetParam()
+ */
+typedef struct __VENC_DRV_PARAM_ENC_T {      /*union extend 64bits for TEE*/
+	VENC_DRV_YUV_FORMAT_T   eVEncFormat;        /* /< [IN/OUT] YUV format */
+	VAL_UINT32_T            u4Profile;          /* /< [IN/OUT] Profile */
+	VAL_UINT32_T            u4Level;            /* /< [IN/OUT] Level */
+	VAL_UINT32_T            u4Width;            /* /< [IN/OUT] Image Width */
+	VAL_UINT32_T            u4Height;           /* /< [IN/OUT] Image Height */
+	VAL_UINT32_T            u4BufWidth;         /* /< [IN/OUT] Buffer Width */
+	VAL_UINT32_T            u4BufHeight;        /* /< [IN/OUT] Buffer Heigh */
+	VAL_UINT32_T            u4NumPFrm;          /* /< [IN/OUT] The number of P frame between two I frame. */
+	VAL_UINT32_T            u4NumBFrm;          /* /< [IN/OUT] The number of B frame between two reference frame. */
+	VENC_DRV_FRAME_RATE_T   eFrameRate;         /* /< [IN/OUT] Frame rate */
+	VAL_BOOL_T              fgInterlace;        /* /< [IN/OUT] Interlace coding. */
+	union {
+		VAL_VOID_T          *pvExtraEnc;
+		VAL_UINT64_T        pvExtraEnc_ext64;
+	};
+	VAL_MEMORY_T            rExtraEncMem;       /* /< [IN/OUT] Extra Encoder Memory Info */
+	VAL_BOOL_T              fgUseMCI;           /* /< [IN/OUT] Use MCI */
+	VAL_BOOL_T              fgMultiSlice;       /* /< [IN/OUT] Is multi-slice bitstream ? */
+	VAL_BOOL_T              fgMBAFF;
+} VENC_DRV_PARAM_ENC_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_PARAM_ENC_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_PARAM_ENC_T
+ */
+typedef VENC_DRV_PARAM_ENC_T * P_VENC_DRV_PARAM_ENC_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_PARAM_ENC_EXTRA_T
+ * @par Description
+ *   This is the encoder settings and used as input or output parameter for eVEncDrvSetParam() or eVEncDrvGetParam()
+ */
+typedef struct __VENC_DRV_PARAM_ENC_EXTRA_T {
+	VAL_UINT32_T            u4IntraFrameRate;   /* /< [IN/OUT] Intra frame rate */
+	VAL_UINT32_T            u4BitRate;          /* /< [IN/OUT] BitRate kbps */
+	VAL_UINT32_T            u4FrameRateQ16;     /* /< [IN/OUT] Frame rate in Q16 format */
+	VAL_UINT32_T            u4UseMBAFF;         /* /< [IN/OUT] Use MBAFF */
+} VENC_DRV_PARAM_ENC_EXTRA_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_PARAM_ENC_EXTRA_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_PARAM_ENC_EXTRA_T
+ */
+typedef VENC_DRV_PARAM_ENC_EXTRA_T * pVENC_DRV_PARAM_ENC_EXTRA_T;
+
+
+#define VENC_DRV_VDO_PROP_LIST_MAX      (64)
+
+/**
+ * @par Structure
+ *   VENC_DRV_VIDEO_PROPERTY_T
+ * @par Description
+ *   This is used to get the "target bitrate" according to "resolution and frame rate"
+ */
+typedef struct __VENC_DRV_VIDEO_PROPERTY_T {
+	VENC_DRV_VIDEO_FORMAT_T     eVideoFormat;
+	VAL_UINT32_T    u4Width;
+	VAL_UINT32_T    u4Height;
+	VAL_UINT32_T    u4FrameRate;
+	VAL_UINT32_T    u4BitRate;    /* used for query table */
+	VAL_BOOL_T      fgPropIsValid;
+} VENC_DRV_VIDEO_PROPERTY_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_VIDEO_PROPERTY_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_VIDEO_PROPERTY_T
+ */
+typedef VENC_DRV_VIDEO_PROPERTY_T * P_VENC_DRV_VIDEO_PROPERTY_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_TIMESTAMP_T
+ * @par Description
+ *   This is timestamp information and used as items for VENC_DRV_PARAM_FRM_BUF_T and VENC_DRV_PARAM_BS_BUF_T
+ */
+typedef struct __VENC_DRV_TIMESTAMP_T {
+	VAL_UINT32_T    u4TimeStamp[2];     /* /< [IN] Timestamp information */
+} VENC_DRV_TIMESTAMP_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_TIMESTAMP_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_TIMESTAMP_T
+ */
+typedef VENC_DRV_TIMESTAMP_T * P_VENC_DRV_TIMESTAMP_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_EIS_INPUT_T
+ * @par Description
+ *   This is EIS information and used as items for VENC_DRV_PARAM_FRM_BUF_T
+ */
+typedef struct __VENC_DRV_EIS_INPUT_T {
+	VAL_UINT32_T    u4X;    /* /< [IN] Start coordination X */
+	VAL_UINT32_T    u4Y;    /* /< [IN] Start coordination Y */
+} VENC_DRV_EIS_INPUT_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_EIS_INPUT_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_EIS_INPUT_T
+ */
+typedef VENC_DRV_EIS_INPUT_T * P_VENC_DRV_EIS_INPUT_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_PARAM_FRM_BUF_T
+ * @par Description
+ *   This is frame buffer information and used as input parameter for eVEncDrvEncode()
+ */
+typedef struct __VENC_DRV_PARAM_FRM_BUF_T {
+	VAL_MEM_ADDR_T          rFrmBufAddr;        /* /< [IN] Frame buffer address */
+	VAL_MEM_ADDR_T          rCoarseAddr;        /* /< [IN] Coarse address */
+	VENC_DRV_TIMESTAMP_T    rTimeStamp;         /* /< [IN] Timestamp information */
+	VENC_DRV_EIS_INPUT_T    rEISInput;          /* /< [IN] EIS information */
+	VAL_UINT32_T            rSecMemHandle;      /* /< [IN/OUT] security memory handle for SVP */
+} VENC_DRV_PARAM_FRM_BUF_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_PARAM_FRM_BUF_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_PARAM_FRM_BUF_T
+ */
+typedef VENC_DRV_PARAM_FRM_BUF_T * P_VENC_DRV_PARAM_FRM_BUF_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_PARAM_BS_BUF_T
+ * @par Description
+ *   This is bitstream buffer information and used as input parameter for\n
+ *   eVEncDrvEncode()\n
+ */
+typedef struct __VENC_DRV_PARAM_BS_BUF_T {/*union extend 64bits for TEE */
+	VAL_MEM_ADDR_T          rBSAddr;        /* /< [IN] Bitstream buffer address */
+	union {
+		VAL_ULONG_T         u4BSStartVA;    /* /< [IN] Bitstream fill start address */
+		VAL_UINT64_T        u4BSStartVA_ext64;
+	};
+	union {
+		VAL_ULONG_T         u4BSSize;       /* /< [IN] Bitstream size (filled bitstream in bytes) */
+		VAL_UINT64_T        u4BSSize_ext64;
+	};
+	VENC_DRV_TIMESTAMP_T    rTimeStamp;     /* /< [IN] Time stamp information */
+	VAL_UINT32_T            rSecMemHandle;  /* /< [IN/OUT] security memory handle for SVP */
+} VENC_DRV_PARAM_BS_BUF_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_PARAM_BS_BUF_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_PARAM_BS_BUF_T
+ */
+typedef VENC_DRV_PARAM_BS_BUF_T * P_VENC_DRV_PARAM_BS_BUF_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_DONE_RESULT_T
+ * @par Description
+ *   This is callback and return information and used as output parameter for eVEncDrvEncode()
+ */
+typedef struct __VENC_DRV_DONE_RESULT_T {        /*union extend 64bits for TEE */
+	VENC_DRV_MESSAGE_T          eMessage;           /* /< [OUT] Message, such as success or error code */
+	union {
+		P_VENC_DRV_PARAM_BS_BUF_T  prBSBuf;         /* /< [OUT] Bitstream information */
+		VAL_UINT64_T               prBSBuf_ext64;
+	};
+	union {
+		P_VENC_DRV_PARAM_FRM_BUF_T prFrmBuf;        /* /< [OUT] Input frame buffer information. if address is null, don't use this buffer, else reuse */
+		VAL_UINT64_T               prFrmBuf_ext64;
+	};
+	VAL_BOOL_T                  fgIsKeyFrm;         /* /< [OUT] output is key frame or not */
+	VAL_UINT32_T                u4HWEncodeTime;     /* /< [OUT] HW encode Time */
+} VENC_DRV_DONE_RESULT_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_DONE_RESULT_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_DONE_RESULT_T
+ */
+typedef VENC_DRV_DONE_RESULT_T * P_VENC_DRV_DONE_RESULT_T;
+
+
+/**
+ * @par Structure
+ *   VENC_DRV_PROPERTY_T
+ * @par Description
+ *   This is property information and used as output parameter for eVEncDrvQueryCapability()
+ */
+typedef struct __VENC_DRV_PROPERTY_T {
+	VAL_UINT32_T    u4BufAlign;             /* /< [OUT] Buffer alignment requirement */
+	VAL_UINT32_T    u4BufUnitSize;          /* /< [OUT] Buffer unit size is N bytes (e.g., 8, 16, or 64 bytes per unit.) */
+	VAL_UINT32_T    u4ExtraBufSize;         /* /< [OUT] Extra buffer size in initial stage */
+	VAL_BOOL_T      fgOutputRingBuf;        /* /< [OUT] Output is ring buffer */
+	VAL_BOOL_T      fgCoarseMESupport;      /* /< [OUT] Support ME coarse search */
+	VAL_BOOL_T      fgEISSupport;           /* /< [OUT] Support EIS */
+} VENC_DRV_PROPERTY_T;
+
+/**
+ * @par Structure
+ *   P_VENC_DRV_PROPERTY_T
+ * @par Description
+ *   This is the pointer of VENC_DRV_PROPERTY_T
+ */
+typedef VENC_DRV_PROPERTY_T * P_VENC_DRV_PROPERTY_T;
+
+/**
+ * @par Structure
+ *  SEC_VENC_INIT_CONFIG
+ * @par Description
+ *  This is the structure for initial Venc TLC
+ */
+typedef struct sec_venc_init_config {
+	int         width;
+	int         height;
+	void        *pVencHandle;
+	uint32_t    uVencHandleLen;
+	unsigned char *pRCCode;
+} SEC_VENC_INIT_CONFIG;
+
+/**
+ * @par Structure
+ *  SEC_VENC_INIT_CONFIG
+ * @par Description
+ *  This is the structure for setting Venc TLC
+ */
+typedef struct sec_venc_enc_parameter {
+	uint32_t bitstreamSecHandle;
+	uint32_t uBitstreamBufSize;
+	uint32_t uBitstreamDataLen;
+
+	uint32_t frameSecHandle;
+	uint32_t uFrameBufSize;
+	uint32_t uFrameDataLen;
+} SEC_VENC_ENC_PARAM;
+
+/**
+ * @par Function
+ *   eVEncDrvQueryCapability
+ * @par Description
+ *   Query the driver capability
+ * @param
+ *   a_eType                [IN/OUT] The VENC_DRV_QUERY_TYPE_T structure
+ * @param
+ *   a_pvInParam            [IN]     The input parameter
+ * @param
+ *   a_pvOutParam           [OUT]    The output parameter
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT]    VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvQueryCapability(
+	VENC_DRV_QUERY_TYPE_T a_eType,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+/**
+ * @par Function
+ *   eVEncDrvCreate
+ * @par Description
+ *   Create the driver handle
+ * @param
+ *   a_phHandle             [OUT] The driver handle
+ * @param
+ *   a_eVideoFormat         [IN]  The VENC_DRV_VIDEO_FORMAT_T structure
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvCreate(VAL_HANDLE_T *a_phHandle, VENC_DRV_VIDEO_FORMAT_T a_eVideoFormat
+				  );
+
+
+/**
+ * @par Function
+ *   eVEncDrvRelease
+ * @par Description
+ *   Release the driver handle
+ * @param
+ *   a_hHandle              [IN]  The driver handle
+ * @param
+ *   a_eVideoFormat         [IN]  The VENC_DRV_VIDEO_FORMAT_T structure
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvRelease(
+	VAL_HANDLE_T a_hHandle,
+	VENC_DRV_VIDEO_FORMAT_T a_eVideoFormat
+);
+
+
+/**
+ * @par Function
+ *   eVEncDrvInit
+ * @par Description
+ *   Init the driver setting, alloc working memory ... etc.
+ * @param
+ *   a_hHandle              [IN]  The driver handle
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvInit(
+	VAL_HANDLE_T a_hHandle
+);
+
+/**
+ * @par Function
+ *   eVEncDrvDeInit
+ * @par Description
+ *   DeInit the driver setting, free working memory ... etc.
+ * @param
+ *   a_hHandle              [IN]  The driver handle
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvDeInit(
+	VAL_HANDLE_T a_hHandle
+);
+
+
+/**
+ * @par Function
+ *   eVEncDrvSetParam
+ * @par Description
+ *   Set parameter to driver
+ * @param
+ *   a_hHandle              [IN]  The driver handle
+ * @param
+ *   a_eType                [IN]  The VENC_DRV_SET_TYPE_T structure
+ * @param
+ *   a_pvInParam            [IN]  The input parameter
+ * @param
+ *   a_pvOutParam           [OUT] The output parameter
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvSetParam(
+	VAL_HANDLE_T a_hHandle,
+	VENC_DRV_SET_TYPE_T a_eType,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+/**
+ * @par Function
+ *   eVEncDrvGetParam
+ * @par Description
+ *   Get parameter from driver
+ * @param
+ *   a_hHandle              [IN]  The driver handle
+ * @param
+ *   a_eType                [IN]  The VENC_DRV_SET_TYPE_T structure
+ * @param
+ *   a_pvInParam            [IN]  The input parameter
+ * @param
+ *   a_pvOutParam           [OUT] The output parameter
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvGetParam(
+	VAL_HANDLE_T a_hHandle,
+	VENC_DRV_GET_TYPE_T a_eType,
+	VAL_VOID_T *a_pvInParam,
+	VAL_VOID_T *a_pvOutParam
+);
+
+
+/**
+ * @par Function
+ *   eVEncDrvEncode
+ * @par Description
+ *   Encode frame
+ * @param
+ *   a_hHandle              [IN]  The driver handle
+ * @param
+ *   a_eOpt                 [IN]  The VENC_DRV_START_OPT_T structure
+ * @param
+ *   a_prFrmBuf             [IN]  The input frame buffer with VENC_DRV_PARAM_FRM_BUF_T structure
+ * @param
+ *   a_prBSBuf              [IN]  The input bitstream buffer with VENC_DRV_PARAM_BS_BUF_T structure
+ * @param
+ *   a_prResult             [OUT] The output result with VENC_DRV_DONE_RESULT_T structure
+ * @par Returns
+ *   VENC_DRV_MRESULT_T     [OUT] VENC_DRV_MRESULT_OK for success, VENC_DRV_MRESULT_FAIL for fail
+ */
+VENC_DRV_MRESULT_T  eVEncDrvEncode(VAL_HANDLE_T a_hHandle, VENC_DRV_START_OPT_T a_eOpt, VENC_DRV_PARAM_FRM_BUF_T *a_prFrmBuf, VENC_DRV_PARAM_BS_BUF_T *a_prBSBuf, VENC_DRV_DONE_RESULT_T *a_prResult);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* #ifndef _VENC_DRV_IF_PUBLIC_H_ */
diff --git a/kernel-headers/video_custom_sp.h b/kernel-headers/video_custom_sp.h
new file mode 100644
index 0000000..933267f
--- /dev/null
+++ b/kernel-headers/video_custom_sp.h
@@ -0,0 +1,121 @@
+#ifndef VIDEO_CUSTOM_SP_H
+#define VIDEO_CUSTOM_SP_H
+
+/* #include "video_codec_if_sp.h" */
+#include "vcodec_if_v2.h"
+
+#define ASSERT(expr)                                            \
+	do {                                                        \
+		if (!(expr))                                            \
+			AssertionFailed(__func__, __FILE__, __LINE__);   \
+	} while (0)     /* /< ASSERT definition */
+
+/******************************************************************************
+ *
+ *
+ * decode
+ *
+ *
+******************************************************************************/
+
+
+/**
+ * @par Enumeration
+ *   VIDEO_DECODER_T
+ * @par Description
+ *   This is the item for video decoder format
+ */
+typedef enum _VIDEO_DECODER_T {
+	CODEC_DEC_NONE      = 0,            /* /< NONE */
+	CODEC_DEC_H263      = (0x1 << 0),   /* /< H263 */
+	CODEC_DEC_MPEG4     = (0x1 << 1),   /* /< MPEG4 */
+	CODEC_DEC_H264      = (0x1 << 2),   /* /< H264 */
+	CODEC_DEC_RV        = (0x1 << 3),   /* /< RV */
+	CODEC_DEC_VC1       = (0x1 << 4),   /* /< VC1 */
+	CODEC_DEC_VP8       = (0x1 << 5),   /* /< VP8 */
+	CODEC_DEC_VP9       = (0x1 << 6),   /* /< VP9 */
+	CODEC_DEC_HEVC      = (0x1 << 7),   /* /< HEVC */
+	CODEC_DEC_MPEG2     = (0x1 << 8),   /* /< MPEG2 */
+	CODEC_DEC_MAX       = (0x1 << 9)    /* /< MAX */
+} VIDEO_DECODER_T;
+
+#if 1   /* defined(MT6572)     //VCODEC_MULTI_THREAD */
+
+
+/**
+ * @par Function
+ *   GetDecoderAPI
+ * @par Description
+ *   The function used to get decoder API for codec library
+ * @param
+ *   eDecType           [IN] decoder type
+ * @param
+ *   hWrapper           [IN] wrapper
+ * @param
+ *   ppDrvModule        [IN/OUT] driver module
+ * @param
+ *   bUseMultiCoreCodec [IN] multi core codec flag
+ * @par Returns
+ *   VIDEO_DEC_API_T,   the decoder API
+ */
+VIDEO_DEC_API_T  *GetDecoderAPI(VIDEO_DECODER_T eDecType, HANDLE hWrapper, void **ppDrvModule, unsigned int bUseMultiCoreCodec);
+#else
+VIDEO_DEC_API_T  *GetDecoderAPI(VIDEO_DECODER_T, HANDLE); /* HANDLE : wrapper's handle */
+#endif
+/* VCODEC_DEC_API_T *GetMPEG4DecoderAPI(void); */
+/* VCODEC_DEC_API_T *GetH264DecoderAPI(void); */
+/* VCODEC_DEC_API_T *GetRVDecoderAPI(void); */
+/* VCODEC_DEC_API_T *GetVP8DecoderAPI(void); */
+/* VCODEC_DEC_API_T *GetVC1DecoderAPI(void); */
+
+
+/******************************************************************************
+*
+*
+* encode
+*
+*
+******************************************************************************/
+
+
+/**
+ * @par Enumeration
+ *   VIDEO_ENCODER_T
+ * @par Description
+ *   This is the item for video decoder format
+ */
+typedef enum _VIDEO_ENCODER_T {
+	CODEC_ENC_NONE      = 0,            /* /< NONE */
+	CODEC_ENC_H263      = (0x1 << 0),   /* /< H263 */
+	CODEC_ENC_MPEG4     = (0x1 << 1),   /* /< MPEG4 */
+	CODEC_ENC_H264      = (0x1 << 2),   /* /< H264 */
+	CODEC_ENC_HEVC      = (0x1 << 3),   /* /< HEVC */
+	CODEC_ENC_VP8       = (0x1 << 5),   /* /< VP8 */
+	CODEC_ENC_VP9       = (0x1 << 6),   /* /< VP9 */
+	CODEC_ENC_MAX       = (0x1 << 7)    /* /< MAX */
+} VIDEO_ENCODER_T;
+
+
+/**
+ * @par Function
+ *   GetEncoderAPI
+ * @par Description
+ *   The function used to get encoder API for codec library
+ * @param
+ *   eEncType           [IN] encoder type
+ * @param
+ *   hWrapper           [IN] wrapper
+ * @param
+ *   ppDrvModule        [IN/OUT] driver module
+ * @param
+ *   bUseMultiCoreCodec [IN] multi core codec flag
+ * @par Returns
+ *   VIDEO_DEC_API_T,   the encoder API
+ */
+VIDEO_ENC_API_T *GetEncoderAPI(VIDEO_ENCODER_T eEncType, HANDLE hWrapper, void **ppDrvModule, unsigned int bUseMultiCoreCodec);
+/* VCODEC_ENC_API_T *GetMPEG4EncoderAPI(void); */
+/* VCODEC_ENC_API_T* GetH264EncoderAPI(void); */
+/* VIDEO_ENCODER_API_T *GetVP8EncoderAPI(void); */
+
+
+#endif /* VIDEO_CUSTOM_SP_H */