diff options
| author | Meizu OpenSource <patchwork@meizu.com> | 2016-08-15 10:19:42 +0800 |
|---|---|---|
| committer | Meizu OpenSource <patchwork@meizu.com> | 2016-08-15 10:19:42 +0800 |
| commit | d2e1446d81725c351dc73a03b397ce043fb18452 (patch) | |
| tree | 4dbc616b7f92aea39cd697a9084205ddb805e344 /tools/dct | |
first commit
Diffstat (limited to 'tools/dct')
51 files changed, 6741 insertions, 0 deletions
diff --git a/tools/dct/ADC_YuSu.cmp b/tools/dct/ADC_YuSu.cmp new file mode 100755 index 000000000..0605853e9 --- /dev/null +++ b/tools/dct/ADC_YuSu.cmp @@ -0,0 +1,19 @@ +[ADC_variables] +TEMPERATURE +TEMPERATURE1 +REF_CURRENT +BATTERY_VOLTAGE +CHARGER_VOLTAGE +LCM_VOLTAGE +HF_MIC +UTMS +ADC_FDD_RF_PARAMS_DYNAMIC_CUSTOM_CH + + + +[cust_adc.h_HEADER] +#ifndef __CUST_AUXADC_TOOL_H +#define __CUST_AUXADC_TOOL_H + +[cust_adc.h_TAILER] +#endif //_CUST_AUXADC_TOOL_H diff --git a/tools/dct/Application.cmp b/tools/dct/Application.cmp new file mode 100755 index 000000000..c3a245403 --- /dev/null +++ b/tools/dct/Application.cmp @@ -0,0 +1,52 @@ +[APPLICATION] +Camera_A +Camera_A2 +Camera_D +Camera_D2 +G_sensor +M_3G_PA +M_sensor +Cap_touch +Cyroscope +WiFi2V8 +WiFi1V8 +Bluetooth +FM_Radio +BFC +OFN +Vibrator +Memory_Card +MHL_POWER_LDO1 +MHL_POWER_LDO2 +SIM2 +mATV +CMMB +eMMC +Others + +[APPLICATION_V2] +CAP_TOUCH_VDD +CAP_TOUCH_VIO +MAIN_CAMERA_POWER_A +MAIN_CAMERA_POWER_D +MAIN_CAMERA_POWER_IO +MAIN_CAMERA_POWER_AF +MHL_POWER_LDO1 +MHL_POWER_LDO2 +SUB_CAMERA_POWER_A +SUB_CAMERA_POWER_D +SUB_CAMERA_POWER_IO +SUB_CAMERA_POWER_AF +ACCELEROMETER_SENSOR_VDD +ACCELEROMETER_SENSOR_VIO +AMBIENT_LIGHT_SENSOR_VDD +AMBIENT_LIGHT_SENSOR_VIO +PROXIMITY_SENSOR_VDD +PROXIMITY_SENSOR_VIO +MAGNETOMETER_SENSOR_VDD +MAGNETOMETER_SENSOR_VIO +GYROSCOPE_VDD +GYROSCOPE_VIO +BAROMETER_VDD +BAROMETER_VIO +MEMORY_CARD_VDD diff --git a/tools/dct/DrvGen b/tools/dct/DrvGen Binary files differnew file mode 100755 index 000000000..f8efb1f4b --- /dev/null +++ b/tools/dct/DrvGen diff --git a/tools/dct/DrvGen.exe b/tools/dct/DrvGen.exe Binary files differnew file mode 100755 index 000000000..0ad7dd179 --- /dev/null +++ b/tools/dct/DrvGen.exe diff --git a/tools/dct/EINT_YuSu.cmp b/tools/dct/EINT_YuSu.cmp new file mode 100755 index 000000000..daf114342 --- /dev/null +++ b/tools/dct/EINT_YuSu.cmp @@ -0,0 +1,174 @@ +[EINT_variables] +MT7118_WIMAX +MT5921_WIFI +BT +KPD_PWRKEY +KPD_SLIDE +TOUCH_PANEL +MT6326_PMIC +HEADSET +MHALL +HALL_1 +HALL_2 +HALL_3 +FM_RDS +HALL_4 +ALS +OFN +WIFI +COMBO_BGF +COMBO_ALL +GSE_1 +GSE_2 +MSE +MHL +GYRO +ACCDET +OTG_IDDIG +CMMB +NFC +IRQ_NFC +HEADSET_HOOK +MT6329_PMIC +EINT_HDMI_HPD +DT_EXT_MD_EXP +DT_EXT_MD_WDT +DT_EXT_MD_WK_UP +DT_EXT_MD_WK_UP_USB +DT_EXT_MD_EXP +EVDO_DT_EXT_MDM_RDY +EVDO_DT_EXT_MDM_WAKE_AP +EVDO_DT_EXT_MDM_RST_IND +EVDO_DT_EXT_MDM_PWR_ON +EVDO_DT_EXT_UART_MDM_WAKE_AP +EVDO_DT_EXT_MDM_ACK +EVDO_DT_EXT_MDM_FLOW_CTRL +MT6280_USB_WAKEUP +MT6280_WD +SIM1_HOT_PLUG +SIM2_HOT_PLUG +MSDC1_INS +MSDC2_INS +MT6322_PMIC +MT6323_PMIC +MT6333_PMIC +MT6397_PMIC +CHR_STAT +LTE_SDIO +LTE_WDT +EXT_BUCK_OC +EDP_INTN +DSI_TE_1 +VBUS_DETECT_PIN_EINT +HALL_INT +MUIC_TSU6721 + +[MD1_EINT_variables] +MD1_SIM1_HOT_PLUG_EINT +MD1_SIM2_HOT_PLUG_EINT +MD1_SIM3_HOT_PLUG_EINT +MD1_SIM4_HOT_PLUG_EINT + +[MD2_EINT_variables] +AST_DATA_INTR +MD2_SIM1_HOT_PLUG_EINT +MD2_SIM2_HOT_PLUG_EINT + +[SRC_PIN] +PAD_INT_SIM1 +PAD_INT_SIM2 +PAD_SPI_MO +PAD_SPI_CS +PAD_URXD0 +PAD_URTS0 +PAD_URXD3 +PAD_DPI_D0 +PAD_DPI_D2 + + +[cust_eint.h_HEADER] +#ifndef __CUST_EINTH +#define __CUST_EINTH + +#ifdef __cplusplus +extern "C" { +#endif + +#define CUST_EINT_POLARITY_LOW 0 +#define CUST_EINT_POLARITY_HIGH 1 +#define CUST_EINT_DEBOUNCE_DISABLE 0 +#define CUST_EINT_DEBOUNCE_ENABLE 1 +#define CUST_EINT_EDGE_SENSITIVE 0 +#define CUST_EINT_LEVEL_SENSITIVE 1 + +////////////////////////////////////////////////////////////////////////////// + +[cust_eint2.h_HEADER] +#ifndef __CUST_EINTH +#define __CUST_EINTH + +#ifdef __cplusplus +extern "C" { +#endif + +#define CUST_EINTF_TRIGGER_RISING 1 //High Polarity and Edge Sensitive +#define CUST_EINTF_TRIGGER_FALLING 2 //Low Polarity and Edge Sensitive +#define CUST_EINTF_TRIGGER_HIGH 4 //High Polarity and Level Sensitive +#define CUST_EINTF_TRIGGER_LOW 8 //Low Polarity and Level Sensitive + +#define CUST_EINT_DEBOUNCE_DISABLE 0 +#define CUST_EINT_DEBOUNCE_ENABLE 1 + +////////////////////////////////////////////////////////////////////////////// + +[cust_eint_ext.h_HEADER] +#ifndef __CUST_EINT_EXTH +#define __CUST_EINT_EXTH + +#ifdef __cplusplus +extern "C" { +#endif + +#define CUST_EINT_POLARITY_LOW 0 +#define CUST_EINT_POLARITY_HIGH 1 +#define CUST_EINT_DEBOUNCE_DISABLE 0 +#define CUST_EINT_DEBOUNCE_ENABLE 1 +#define CUST_EINT_EDGE_SENSITIVE 0 +#define CUST_EINT_LEVEL_SENSITIVE 1 +////////////////////////////////////////////////////////////////////////////// + +[cust_eint_ext2.h_HEADER] +#ifndef __CUST_EINTH +#define __CUST_EINTH + +#ifdef __cplusplus +extern "C" { +#endif + +#define CUST_EINTF_TRIGGER_RISING 1 //High Polarity and Edge Sensitive +#define CUST_EINTF_TRIGGER_FALLING 2 //Low Polarity and Edge Sensitive +#define CUST_EINTF_TRIGGER_HIGH 4 //High Polarity and Level Sensitive +#define CUST_EINTF_TRIGGER_LOW 8 //Low Polarity and Level Sensitive + +#define CUST_EINT_DEBOUNCE_DISABLE 0 +#define CUST_EINT_DEBOUNCE_ENABLE 1 + +////////////////////////////////////////////////////////////////////////////// + +[cust_eint.h_TAILER] + +////////////////////////////////////////////////////////////////////////////// +#ifdef __cplusplus +} + +#endif +#endif //_CUST_EINT_H + +[cust_eint_ext.h_TAILER] + +////////////////////////////////////////////////////////////////////////////// +#ifdef __cplusplus +} + +#endif +#endif //_CUST_EINT__EXT_H diff --git a/tools/dct/GPIO_YuSu.cmp b/tools/dct/GPIO_YuSu.cmp new file mode 100755 index 000000000..6bc0e4d04 --- /dev/null +++ b/tools/dct/GPIO_YuSu.cmp @@ -0,0 +1,599 @@ +[GPIO_variables] +GPIO_AST_RST_PIN +GPIO_AST_CS_PIN +GPIO_AST_CLK32K_PIN +GPIO_AST_WAKEUP_PIN +GPIO_AST_INTR_PIN +GPIO_AST_WAKEUP_INTR_PIN +GPIO_AST_AFC_SWITCH_PIN +GPIO_HEADSET_INSERT_PIN +GPIO_HEADSET_REMOTE_BUTTON_PIN +GPIO_EXTERNAL_AMPLIFIER_PIN +GPIO_BT_POWREN_PIN +GPIO_BT_RESET_PIN +GPIO_BT_EINT_PIN +GPIO_BT_CLK_PIN +GPIO_CMMB_EINT_PIN +GPIO_CMMB_LDO_EN_PIN +GPIO_CMMB_RST_PIN +GPIO_I2C0_SCA_PIN +GPIO_I2C0_SDA_PIN +GPIO_I2C1_SCA_PIN +GPIO_I2C1_SDA_PIN +GPIO_I2C2_SCA_PIN +GPIO_I2C2_SDA_PIN +GPIO_I2C3_SCA_PIN +GPIO_I2C3_SDA_PIN +GPIO_I2C4_SCA_PIN +GPIO_I2C4_SDA_PIN +GPIO_NFC_FIRM_PIN +GPIO_NFC_EINT_PIN +GPIO_NFC_VENB_PIN +GPIO_NFC_OSC_EN_PIN +GPIO_IRQ_NFC_PIN +GPIO_NFC_RST_PIN +GPIO_SPI_CS_PIN +GPIO_SPI_SCK_PIN +GPIO_SPI_MISO_PIN +GPIO_SPI_MOSI_PIN +GPIO_SPI2_CS_PIN +GPIO_SPI2_SCK_PIN +GPIO_SPI2_MISO_PIN +GPIO_SPI2_MOSI_PIN +GPIO_PWM_1_PIN +GPIO_PWM_2_PIN +GPIO_PWM_3_PIN +GPIO_PWM_4_PIN +GPIO_PWM_5_PIN +GPIO_PWM_6_PIN +GPIO_PWM_7_PIN +GPIO_PWR_AVAIL_WLC +GPIO_PWR_BUTTON_PIN +GPIO_PMIC_EINT_PIN +GPIO_RFIC0_BSI_CK +GPIO_RFIC0_BSI_CS +GPIO_RFIC0_BSI_D0 +GPIO_RFIC0_BSI_D1 +GPIO_RFIC0_BSI_D2 +GPIO_SDHC_EINT_PIN +GPIO_SDHC_MC2CM_PIN +GPIO_SDHC_MC2DA2_PIN +GPIO_SDHC_MC2DA3_PIN +GPIO_SDHC_MC2WP_PIN +GPIO_SDHC_MC2PWRON_PIN +GPIO_SDHC_MC2INS_PIN +GPIO_TDM_REQ +GPIO_DISP_LSCK_PIN +GPIO_DISP_LSA0_PIN +GPIO_DISP_LSDA_PIN +GPIO_DISP_LSCE_PIN +GPIO_DISP_ID0_PIN +GPIO_DISP_ID1_PIN +GPIO_GPS_PWREN_PIN +GPIO_GPS_SYNC_PIN +GPIO_GPS_EINT_PIN +GPIO_GPS_CLK_PIN +GPIO_GPS_RST_PIN +GPIO_GPS_LNA_PIN +GPIO_UART_URXD0_PIN +GPIO_UART_UTXD0_PIN +GPIO_UART_UCTS0_PIN +GPIO_UART_URTS0_PIN +GPIO_UART_URXD1_PIN +GPIO_UART_UTXD1_PIN +GPIO_UART_UCTS1_PIN +GPIO_UART_URTS1_PIN +GPIO_UART_URXD2_PIN +GPIO_UART_UTXD2_PIN +GPIO_UART_UCTS2_PIN +GPIO_UART_URTS2_PIN +GPIO_UART_URXD3_PIN +GPIO_UART_UTXD3_PIN +GPIO_UART_UCTS3_PIN +GPIO_UART_URTS3_PIN +GPIO_UART_URXD4_PIN +GPIO_UART_UTXD4_PIN +GPIO_UART_UCTS4_PIN +GPIO_UART_URTS4_PIN +GPIO_KPD_KCOL0_PIN +GPIO_KPD_KCOL1_PIN +GPIO_KPD_KCOL2_PIN +GPIO_KPD_KCOL3_PIN +GPIO_KPD_KCOL4_PIN +GPIO_KPD_KCOL5_PIN +GPIO_KPD_KCOL6_PIN +GPIO_KPD_KCOL7_PIN +GPIO_KPD_KROW0_PIN +GPIO_KPD_KROW1_PIN +GPIO_KPD_KROW2_PIN +GPIO_KPD_KROW3_PIN +GPIO_KPD_KROW4_PIN +GPIO_KPD_KROW5_PIN +GPIO_KPD_KROW6_PIN +GPIO_KPD_KROW7_PIN +GPIO_CTP_EINT_PIN +GPIO_CTP_EN_PIN +GPIO_CTP_RST_PIN +GPIO_WIFI_RST_PIN +GPIO_WIFI_CLK_PIN +GPIO_WIFI_EINT_PIN +GPIO_WIFI_PMU_EN_PIN +GPIO_WIFI_LDO_EN_PIN +GPIO_BQ_INT_PIN +GPIO_WIMAX_INT_PIN +GPIO_WIMAX_RST_PIN +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_FLASH_EN_PIN +GPIO_CAMERA_FLASH_MODE_PIN +GPIO_CAMERA_LDO_EN_PIN +GPIO_CAMERA_AF_EN_PIN +GPIO_CAMERA_RCN_PIN +GPIO_CAMERA_RCP_PIN +GPIO_CAMERA_RDN0_PIN +GPIO_CAMERA_RDP0_PIN +GPIO_CAMERA_RDN1_PIN +GPIO_CAMERA_RDP1_PIN +GPIO_CAMERA_RDN2_PIN +GPIO_CAMERA_RDP2_PIN +GPIO_CAMERA_RDN3_PIN +GPIO_CAMERA_RDP3_PIN +GPIO_CAMERA_RCN_A_PIN +GPIO_CAMERA_RCP_A_PIN +GPIO_CAMERA_RDN0_A_PIN +GPIO_CAMERA_RDP0_A_PIN +GPIO_CAMERA_RDN1_A_PIN +GPIO_CAMERA_RDP1_A_PIN +GPIO_CAMERA_RDN2_A_PIN +GPIO_CAMERA_RDP2_A_PIN +GPIO_CAMERA_RDN3_A_PIN +GPIO_CAMERA_RDP3_A_PIN +GPIO_CAMERA_RCN_B_PIN +GPIO_CAMERA_RCP_B_PIN +GPIO_CAMERA_RDN0_B_PIN +GPIO_CAMERA_RDP0_B_PIN +GPIO_CAMERA_RDN1_B_PIN +GPIO_CAMERA_RDP1_B_PIN +GPIO_PMIC_EINT_PIN +GPIO_PCM_DAICLK_PIN +GPIO_PCM_DAIPCMOUT_PIN +GPIO_PCM_DAIPCMIN_PIN +GPIO_PCM_DAISYNC_PIN +GPIO_JBD_INPUT_UP_PIN +GPIO_JBD_INPUT_LEFT_PIN +GPIO_JBD_INPUT_RIGHT_PIN +GPIO_JBD_INPUT_DOWN_PIN +GPIO_JTAG_TMS_PIN +GPIO_JTAG_TCK_PIN +GPIO_JTAG_TDI_PIN +GPIO_JTAG_TDO_PIN +GPIO_JTAG_TRSTN_PIN +GPIO_QWERTYSLIDE_EINT_PIN +GPIO_CAPTOUCH_EINT_PIN +GPIO_HALL_1_PIN +GPIO_HALL_2_PIN +GPIO_HALL_3_PIN +GPIO_HALL_4_PIN +GPIO_OFN_EINT_PIN +GPIO_OFN_DWN_PIN +GPIO_OFN_RST_PIN +GPIO_MHALL_EINT_PIN +GPIO_FM_RDS_PIN +GPIO_FM_CLK_PIN +GPIO_ALS_EINT_PIN +GPIO_MATV_PWR_ENABLE +GPIO_MATV_N_RST +GPIO_I2S_DATA +GPIO_SPEAKER_EN_PIN +GPIO_RECEIVER_EN_PIN +GPIO_SPEAKER_EARPIECE_SWITCH_PIN +GPIO_SWCHARGER_EN_PIN +GPIO_COMBO_PMU_EN_PIN +GPIO_COMBO_PMUV28_EN_PIN +GPIO_COMBO_RST_PIN +GPIO_COMBO_RTCCLK_PIN +GPIO_COMBO_BGF_EINT_PIN +GPIO_COMBO_ALL_EINT_PIN +GPIO_COMBO_6620_LDO_EN_PIN +GPIO_COMBO_I2S_CK_PIN +GPIO_COMBO_I2S_DAT_PIN +GPIO_COMBO_I2S_WS_PIN +GPIO_COMBO_UTXD_PIN +GPIO_COMBO_URXD_PIN +GPIO_I2S0_CK_PIN +GPIO_I2S0_DAT_PIN +GPIO_I2S0_MCLK_PIN +GPIO_I2S0_WS_PIN +GPIO_I2S1_CK_PIN +GPIO_I2S1_DAT_PIN +GPIO_I2S1_MCLK_PIN +GPIO_I2S1_WS_PIN +GPIO_GSE_1_EINT_PIN +GPIO_GSE_2_EINT_PIN +GPIO_MSE_EINT_PIN +GPIO_GYRO_EINT_PIN +GPIO_ACCDET_EINT_PIN +GPIO_OTG_IDDIG_EINT_PIN +GPIO_OTG_DRVVBUS_PIN +GPIO_VBUS_DETECT_PIN +GPIO_USB_DEFAULT_DEVICE_MODE +GPIO_HEADSET_SW_EN_PIN +GPIO_HEADSET_JPOLE_PIN +GPIO_HEADSET_REMOTE_BUTTON_PIN +GPIO_DISP_LRSTB_PIN +GPIO_HDMI_I2S_OUT_CK_PIN +GPIO_HDMI_I2S_OUT_WS_PIN +GPIO_HDMI_I2S_OUT_DAT_PIN +GPIO_HDMI_I2C_SCL +GPIO_HDMI_I2C_SDA +GPIO_HDMI_POWER_CONTROL +GPIO_HDMI_9024_RESET +GPIO_HDMI_EINT_PIN +GPIO_HDMI_LCD_SW_EN +GPIO_HDMI_PWR_1_2V_EN +GPIO_HIFI_VCCA_EN_PIN +GPIO_HIFI_AVCC_EN_PIN +GPIO_HIFI_DVCC_EN_PIN +GPIO_HW_VER_CHECK_PIN +GPIO_MATV_I2S_CK_PIN +GPIO_MATV_I2S_WS_PIN +GPIO_MATV_I2S_DAT_PIN +GPIO_2G_TX_FILTER_MODE_PIN +GPIO_2G_RX_ACTIVE_PIN +GPIO_4G_RX_ACTIVE_PIN +GPIO_4G_TX_FILTER_MODE_PIN +GPIO_52_RST +GPIO_52_TO_2G +GPIO_52_3G_USB_RESUME +GPIO_52_KCOL0 +GPIO_52_REC_SW +GPIO_52_WD +GPIO_52_USB_SW2 +GPIO_52_TO_3G +GPIO_52_PWR_KEY +GPIO_52_USB_SW1 +GPIO_EXT_BUCK_EN_A_PIN +GPIO_EXT_BUCK_EN_B_PIN +GPIO_EXT_BUCK_IC_EN_PIN +GPIO_EXT_BUCK_OC_EINT_PIN +GPIO_EXT_MD_RST +GPIO_EXT_MD_PWR_KEY +GPIO_EXT_MD_DL_KEY +GPIO_EXT_MD_WD +GPIO_EXT_MD_EXP +GPIO_EXT_MD_WK_AP +GPIO_EXT_MD_META +GPIO_EXT_AP_WK_MD +GPIO_EXT_USB_SW1 +GPIO_EXT_USB_SW2 +GPIO_EXT_USB_RESUME +GPIO_EXT_SSW_S1 +GPIO_EXT_SSW_S2 +GPIO_EXT_SSW_EN +GPIO_EXT_MD_DUMP +GPIO_EXT_SPKAMP_EN_PIN +GPIO_6280_USB_SW1 +GPIO_6280_USB_SW2 +GPIO_6280_KCOL0 +GPIO_6280_USB_WAKEUP_EINT +GPIO_6280_WD +GPIO_6280_RST +GPIO_VIA_MDM_RST +GPIO_VIA_MDM_RST_IND +GPIO_VIA_MDM_PWR_EN +GPIO_VIA_MDM_PWR_ON +GPIO_VIA_CP_BOOT_SEL +GPIO_VIA_AP_WAKE_MDM +GPIO_VIA_MDM_RDY +GPIO_VIA_MDM_WAKE_AP +GPIO_VIA_AP_RDY +GPIO_VIA_SDIO_ACK +GPIO_VIA_FLOW_CTRL +GPIO_VIA_ETS_SEL +GPIO_MSDC0_DAT0 +GPIO_MSDC0_DAT1 +GPIO_MSDC0_DAT2 +GPIO_MSDC0_DAT3 +GPIO_MSDC0_DAT4 +GPIO_MSDC0_DAT5 +GPIO_MSDC0_DAT6 +GPIO_MSDC0_DAT7 +GPIO_MSDC0_CMD +GPIO_MSDC0_CLK +GPIO_MSDC0_RSTB +GPIO_MSDC0_DSL +GPIO_MSDC1_DAT0 +GPIO_MSDC1_DAT1 +GPIO_MSDC1_DAT2 +GPIO_MSDC1_DAT3 +GPIO_MSDC1_CMD +GPIO_MSDC1_CLK +GPIO_MSDC1_INSI +GPIO_MSDC1_SDWPI +GPIO_MSDC2_DAT0 +GPIO_MSDC2_DAT1 +GPIO_MSDC2_DAT2 +GPIO_MSDC2_DAT3 +GPIO_MSDC2_CMD +GPIO_MSDC2_CLK +GPIO_MSDC2_INSI +GPIO_MSDC2_SDWPI +GPIO_MSDC3_DAT0 +GPIO_MSDC3_DAT1 +GPIO_MSDC3_DAT2 +GPIO_MSDC3_DAT3 +GPIO_MSDC3_CMD +GPIO_MSDC3_CLK +GPIO_MSDC4_DAT0 +GPIO_MSDC4_DAT1 +GPIO_MSDC4_DAT2 +GPIO_MSDC4_DAT3 +GPIO_MSDC4_DAT4 +GPIO_MSDC4_DAT5 +GPIO_MSDC4_DAT6 +GPIO_MSDC4_DAT7 +GPIO_MSDC4_CMD +GPIO_MSDC4_CLK +GPIO_MSDC4_RSTB +GPIO_SIM1_HOT_PLUG +GPIO_SIM2_HOT_PLUG +GPIO_FSA8049_PIN +GPIO_ANT_SW_PIN +GPIO_EINT_CHG_STAT_PIN +GPIO_MHL_EINT_PIN +GPIO_MHL_I2S_OUT_CK_PIN +GPIO_MHL_I2S_OUT_WS_PIN +GPIO_MHL_I2S_OUT_DAT_PIN +GPIO_MHL_I2C_SCL +GPIO_MHL_I2C_SDA +GPIO_MHL_RST_B_PIN +GPIO_MHL_POWER_CTRL_PIN +GPIO_EXT_DISP_DPI0_PIN +GPIO_TD_HIF_DCX_PIN +GPIO_TD_HIF_WR_PIN +GPIO_TD_HIF_RD_PIN +GPIO_CAMERA_2_CMPDN_PIN +GPIO_CAMERA_2_CMRST_PIN +GPIO_CAMERA_2_CMMCLK_PIN +GPIO_CAMERA_2_CMRST_PIN +GPIO_CAMERA_2_CMPDN_PIN +GPIO_CHR_PSEL_PIN +GPIO_CHR_CE_PIN +GPIO_CHR_SPM_PIN +GPIO_CAMERA_FLASH_EXT1_PIN +GPIO_CAMERA_FLASH_EXT2_PIN +GPIO_GPS_EN_MT3332 +GPIO_GPS_FRAM_SYNC_MT3332 +GPIO_GPS_TXIND_MT3332 +GPIO_GPS_LNA_MT3332 +GPIO_EXTMD_PCM_CLK_PIN +GPIO_EXTMD_PCM_PCMOUT_PIN +GPIO_EXTMD_PCM_PCMIN_PIN +GPIO_EXTMD_PCM_SYNC_PIN +GPIO_MRG_I2S_PCM_CLK_PIN +GPIO_MRG_I2S_PCM_SYNC_PIN +GPIO_MRG_I2S_PCM_RX_PIN +GPIO_MRG_I2S_PCM_TX_PIN +GPIO_DAIBT_PCM_CLK_PIN +GPIO_DAIBT_PCM_WS_PIN +GPIO_DAIBT_PCM_DI_PIN +GPIO_DAIBT_PCM_DO_PIN +GPIO_DAC_I2S_CLK_PIN +GPIO_DAC_I2S_WS_PIN +GPIO_DAC_I2S_DAT_OUT_PIN +GPIO_DAC_I2S_MCLK_PIN +GPIO_ADC_I2S_CLK_PIN +GPIO_ADC_I2S_WS_PIN +GPIO_ADC_I2S_DAT_IN_PIN +GPIO_ADC_I2S_MCLK_PIN +GPIO_I2S_CLK_PIN +GPIO_I2S_WS_PIN +GPIO_I2S_DAT_OUT_PIN +GPIO_I2S_DAT_IN_PIN +GPIO_AUD_CLK_MOSI_PIN +GPIO_AUD_DAT_MOSI_PIN +GPIO_AUD_DAT_MISO_PIN +GPIO_AUD_EXTHP_EN_PIN +GPIO_AUD_EXTHP_GAIN_PIN +GPIO_AUD_EXTDAC_PWREN_PIN +GPIO_AUD_EXTDAC_RST_PIN +GPIO_AUD_EXTPLL_S0_PIN +GPIO_AUD_EXTPLL_S1_PIN +GPIO_AUD_EXTHPBUF_SDB_PIN +GPIO_AUD_EXTHPBUF_HI_Z_PIN +GPIO_AUD_EXTHPBUF_GAIN_PIN +GPIO_SIM_SWITCH_CLK_PIN +GPIO_SIM_SWITCH_DAT_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_2ND_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_3RD_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_4TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_5TH_PIN +GPIO_FDD_BAND_SUPPORT_DETECT_6TH_PIN +GPIO_SIM1_SCLK +GPIO_SIM1_SRST +GPIO_SIM1_SIO +GPIO_SIM2_SCLK +GPIO_SIM2_SRST +GPIO_SIM2_SIO +GPIO_SWITCH1_1V8_PIN +GPIO_USB_MHL_SW_SEL1 +GPIO_USB_MHL_SW_SEL2 +GPIO_LCM_LED_EN +GPIO_LCM_MIPI2LVDS_EN +GPIO_LCM_MIPI2LVDS_PWR_EN +GPIO_LCM_LVDS_PWR_EN +GPIO_LCM_LVDS_EN +GPIO_LCM_PWR +GPIO_LCM_PWR_EN +GPIO_LCM_PWR2_EN +GPIO_LCM_RST +GPIO_LCM_STB +GPIO_LCM_BL_EN +GPIO_LCM_LVL_SHIFT_EN +GPIO_LCM_BRIDGE_EN +GPIO_SSW_EN_PIN +GPIO_SSW_CH_SWAP_PIN +GPIO_LCD_BIAS_ENP_PIN +GPIO_LCD_BIAS_ENN_PIN +GPIO_LCD_DRV_EN_PIN +GPIO_LCDBL_EN_PIN +GPIO_LCD_ENN +GPIO_LCD_ENP +GPIO_CMCSK +GPIO_CMDAT0 +GPIO_CMDAT1 +GPIO_CMDAT2 +GPIO_CMDAT3 +GPIO_CMDAT4 +GPIO_CMDAT5 +GPIO_CMDAT6 +GPIO_CMDAT7 +GPIO_CMDAT8 +GPIO_CMDAT9 +GPIO_CMHSYNC +GPIO_CMMCLK +GPIO_CMPCLK +GPIO_CMVSYNC +GPIO_COMPASS_RST_PIN +GPIO_EXT_BUCK_EN_PIN +GPIO_EXT_BUCK_VSEL_PIN +GPIO_LTE_SDIO_EINT_PIN +GPIO_LTE_WDT_EINT_PIN +GPIO_LTE_POWER_PIN +GPIO_LTE_RESET_PIN +GPIO_LTE_WK_MD_PIN +GPIO_SWITCH1_1V8_PIN +GPIO_CAMERA_MAIN_DVDD_ENADBLE_PIN +GPIO_HIFI_LDO1V8_EN_PIN +GPIO_SMARTPA_RST_PIN +GPIO_EARPHONE_DETECT_PIN +GPIO_LCD_ENP_PIN +GPIO_HIFI_LDO3V3_EN_PIN +GPIO_CAMERA_MCLK_EN_PIN +GPIO_LCD_ENN_PIN +GPIO_NXPSPA_I2S_DATAOUT_PIN +GPIO_NXPSPA_I2S_DATAIN_PIN +GPIO_NXPSPA_I2S_LRCK_PIN +GPIO_NXPSPA_I2S_BCK_PIN +GPIO_STROBE_LED_TPS61311_STRB0 +GPIO_STROBE_LED_TPS61311_STRB1 +GPIO_STROBE_LED_TPS61311_TXMASK +GPIO_STROBE_LED_TPS61311_NRESET +GPIO_EDP_EINT_PIN +GPIO_EDP_ENPSR_PIN +GPIO_EDP_SYSRSTN_PIN +GPIO_EDP_STANDBY_PIN +GPIO_DSI_TE_PIN +GPIO_EXT_BUCK_OC_EINT_PIN +GPIO_VOW_CLK_MISO_PIN +GPIO_G2_TXEN_PIN +GPIO_G2_TXD3_PIN +GPIO_G2_TXD2_PIN +GPIO_G2_TXD1_PIN +GPIO_G2_TXD0_PIN +GPIO_G2_TXC_PIN +GPIO_G2_RXC_PIN +GPIO_G2_RXD0_PIN +GPIO_G2_RXD1_PIN +GPIO_G2_RXD2_PIN +GPIO_G2_RXD3_PIN +GPIO_ESW_INT_PIN +GPIO_G2_RXDV_PIN +GPIO_MDC_PIN +GPIO_MDIO_PIN +GPIO_ESW_RST_PIN +GPIO_IRRX_PIN +GPIO_HDMI_RX_SDA_PIN +GPIO_HDMI_RX_SCL_PIN +GPIO_MAIN_CAM_ID_PIN +GPIO_SUB_CAM_ID_PIN +GPIO_LCD_MAKER_ID +GPIO_AUDIO_SEL +GPIO_DSV_EN +GPIO_TOUCH_MAKER_ID +GPIO_BAT_ID +GPIO_BATT_ID_PULLUP +GPIO_SENSOR0_I2C_SDA +GPIO_SENSOR0_I2C_SCL +GPIO_COMMON_I2C_SCL +GPIO_COMMON_I2C_SDA +GPIO_LCD_BL_EN +GPIO_DSV_AVEE_EN +GPIO_DSV_AVDD_EN +GPIO_NFC_MODE +GPIO_HP_AMP_EN +GPIO_SPK_AMP_EN +GPIO_SMARTPA_I2S_WS_PIN +GPIO_SMARTPA_I2S_DOUT_PIN +GPIO_SMARTPA_I2S_DIN_PIN +GPIO_SMARTPA_I2S_BCK_PIN +GPIO_SMARTPA_RST_PIN +GPIO_SMARTPA_EINT_PIN +GPIO_SMARTPA_LDO_EN_PIN +GPIO_EXT_SPKAMP2_EN_PIN +GPIO_RCV_SPK_SWITCH_PIN +GPIO_FLASH_LED_EN +GPIO_TORCH_EN +GPIO_LTE_VSRAM_EXT_POWER_EN_PIN +GPIO_CAMERA_KEY1_PIN +GPIO_CAMERA_KEY2_PIN +GPIO_CODEC_SPI_CLK_PIN +GPIO_CODEC_SPI_MISO_PIN +GPIO_CODEC_SPI_MOSI_PIN +GPIO_CODEC_SPI_CS_PIN +GPIO_DTV_SPI_SCK_PIN +GPIO_DTV_SPI_MISO_PIN +GPIO_DTV_SPI_MOSI_PIN +GPIO_DTV_SPI_CS_PIN +GPIO_LCM_RST2_PIN +GPIO_IRTX_OUT_PIN +GPIO_PWRAP_SPI0_MI_PIN +GPIO_PWRAP_SPI0_MO_PIN +GPIO_PWRAP_SPI0_CK_PIN +GPIO_PWRAP_SPI0_CSN_PIN +GPIO_LCD_ID_PIN +GPIO_HALL_SWITH_EINT_PIN +GPIO_MUIC_EINT_PIN +GPIO_MT8193_BUS_SWITCH_PIN + +[GPIO_MODE] +GPIO = _M_GPIO +CLK = _M_CLK +EINT = _M_EINT +IRQ = _M_IRQ +KROW = _M_KROW +KCOL = _M_KCOL +PWM = _M_PWM + +[GPIO_FREQ] +GPIO_BT_CLK_PIN = CLK_SRC_F32K +GPIO_GPS_CLK_PIN = CLK_SRC_F32K +GPIO_WIFI_CLK_PIN = CLK_SRC_F32K +GPIO_FM_CLK_PIN = CLK_SRC_F32K +GPIO_COMBO_RTCCLK_PIN = CLK_SRC_F32K + +[cust_gpio_boot.h_HEADER] +#ifndef __CUST_GPIO_BOOT_H__ +#define __CUST_GPIO_BOOT_H__ + +[cust_gpio_boot.h_TAILER] +#endif /* __CUST_GPIO_BOOT_H__ */ + + +[cust_gpio_usage.h_HEADER] +#ifndef __CUST_GPIO_USAGE_H__ +#define __CUST_GPIO_USAGE_H__ + +[cust_gpio_usage.h_TAILER] +#endif /* __CUST_GPIO_USAGE_H__ */ + +[cust_gpio_sleep.h_HEADER] +#ifndef __CUST_GPIO_SLEEP_H__ +#define __CUST_GPIO_SLEEP_H__ + +[cust_gpio_sleep.h_TAILER] +#endif /* __CUST_GPIO_SLEEP_H__ */ + diff --git a/tools/dct/GPIO_protect.cmp b/tools/dct/GPIO_protect.cmp new file mode 100755 index 000000000..7f97f2c70 --- /dev/null +++ b/tools/dct/GPIO_protect.cmp @@ -0,0 +1,25 @@ +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 +[PROTECT] +;GPS +PROTECT_0 = gpio_wifi_enable_pin 0 0 1 0 1 0 0 +PROTECT_1 = gpio_wifi_32k_pin 0 0 1 0 1 0 0 +PROTECT_2 = gpio_wifi_ext_rst_pin 0 0 1 0 1 0 1 +;BT +PROTECT_3 = gpio_bt_power_pin 0 0 1 0 1 0 0 +PROTECT_4 = gpio_bt_wakeup_pin 0 0 1 0 1 0 0 +PROTECT_5 = gpio_bt_32k_pin 0 0 1 0 1 0 0 +PROTECT_6 = gpio_bt_utxd3_pin 0 0 1 0 1 0 0 +PROTECT_7 = gpio_bt_urxd3_pin 1 1 0 1 1 0 0 +PROTECT_8 = gpio_bt_ucts3_pin 0 0 1 0 1 0 0 +PROTECT_9 = gpio_bt_urts3_pin 0 0 1 0 1 0 0 +PROTECT_10 = gpio_bt_pcmclk_pin 0 0 1 0 1 0 0 +PROTECT_11 = gpio_bt_pcmsync_pin 0 0 1 0 1 0 0 +PROTECT_12 = gpio_bt_pcmin_pin 1 0 0 1 1 0 0 +PROTECT_13 = gpio_bt_pcmout_pin 0 0 1 0 1 0 0 +PROTECT_14 = gpio_bt_reset_pin 0 0 1 0 1 0 0 +;WIFI +PROTECT_15 = gpio_gps_power_pin 1 0 1 0 1 0 0 +PROTECT_16 = gpio_gps_urxd_pin 0 0 1 0 1 0 0 +PROTECT_17 = gpio_gps_utxd_pin 0 0 1 0 1 0 0 + diff --git a/tools/dct/I2C_YuSu.cmp b/tools/dct/I2C_YuSu.cmp new file mode 100755 index 000000000..bd10a4b6c --- /dev/null +++ b/tools/dct/I2C_YuSu.cmp @@ -0,0 +1,31 @@ +[SLAVE_DEVICE] +CAMERA_MAIN +CAMERA_SUB +CAMERA_MAIN_AF +CAMERA_SUB_AF +EXT_BUCK +EXT_VBAT_BOOST +SWITHING_CHARGER +CAP_TOUCH +MSENSOR +MHL +GSENSOR +PRESSURE +ALSPS +GYRO +TEMPER +STROBE_MAIN +STROBE_MAIN_2 +STROBE_SUB +STROBE_SUB_2 +NFC +EXT_SPEAKER_AMP +EXT_DISP +I2C_LCD_BIAS + +[cust_i2c.h_HEADER] +#ifndef _CUST_I2C_H +#define _CUST_I2C_H + +[cust_i2c.h_TAILER] +#endif /* _CUST_I2C_H */
\ No newline at end of file diff --git a/tools/dct/Keypad_YuSu.cmp b/tools/dct/Keypad_YuSu.cmp new file mode 100755 index 000000000..a1128f63b --- /dev/null +++ b/tools/dct/Keypad_YuSu.cmp @@ -0,0 +1,271 @@ +[Key_definition] +KEY_NONE +KEY_HOME +KEY_BACK +KEY_CALL +KEY_ENDCALL +KEY_VOLUMEDOWN +KEY_VOLUMEUP +KEY_MUTE +KEY_MENU +KEY_UP +KEY_DOWN +KEY_LEFT +KEY_RIGHT +KEY_OK +KEY_FOCUS +KEY_CAMERA +KEY_POWER +KEY_AT +KEY_POUND +KEY_STAR +KEY_DEL +KEY_TAB +KEY_ENTER +KEY_LEFTSHIFT +KEY_COMMA +KEY_DOT +KEY_SLASH +KEY_LEFTALT +KEY_RIGHTALT +KEY_SPACE +KEY_SEARCH +KEY_SYM +KEY_0 +KEY_1 +KEY_2 +KEY_3 +KEY_4 +KEY_5 +KEY_6 +KEY_7 +KEY_8 +KEY_9 +KEY_A +KEY_B +KEY_C +KEY_D +KEY_E +KEY_F +KEY_G +KEY_H +KEY_I +KEY_J +KEY_K +KEY_L +KEY_M +KEY_N +KEY_O +KEY_P +KEY_Q +KEY_R +KEY_S +KEY_T +KEY_U +KEY_V +KEY_W +KEY_X +KEY_Y +KEY_Z + +[Key_code] +0 +228 +158 +231 +107 +212 +51 +111 +52 +108 +107 +42 +528 +102 +105 +42 +139 +113 +352 +228 +116 +106 +100 +217 +53 +57 +227 +127 +15 +103 +114 +115 +11 +2 +3 +4 +5 +6 +7 +8 +9 +10 +30 +48 +46 +32 +18 +33 +34 +35 +23 +36 +37 +38 +50 +49 +24 +25 +16 +19 +31 +20 +22 +47 +17 +45 +21 +44 + + +[Key_code_linux] +0 +102 +158 +231 +107 +114 +115 +113 +139 +103 +108 +105 +106 +352 +528 +212 +116 +215 +228 +227 +111 +15 +28 +42 +51 +52 +53 +56 +100 +57 +217 +127 +11 +2 +3 +4 +5 +6 +7 +8 +9 +10 +30 +48 +46 +32 +18 +33 +34 +35 +23 +36 +37 +38 +50 +49 +24 +25 +16 +19 +31 +20 +22 +47 +17 +45 +21 +44 + +[Power_Key_definition] +KEY_POWER +KEY_ENDCALL + + +[cust_kpd.h_HEADER] +#ifndef _CUST_KPD_H_ +#define _CUST_KPD_H_ +#include <linux/input.h> +#include <cust_eint.h> + +#define KPD_YES 1 +#define KPD_NO 0 + +/* available keys (Linux keycodes) */ +#define KEY_CALL KEY_SEND +#define KEY_ENDCALL KEY_END +#undef KEY_OK +#define KEY_OK KEY_REPLY /* DPAD_CENTER */ +#define KEY_FOCUS KEY_HP +#define KEY_AT KEY_EMAIL +#define KEY_POUND 228 //KEY_KBDILLUMTOGGLE +#define KEY_STAR 227 //KEY_SWITCHVIDEOMODE +#define KEY_DEL KEY_BACKSPACE +#define KEY_SYM KEY_COMPOSE +/* KEY_HOME */ +/* KEY_BACK */ +/* KEY_VOLUMEDOWN */ +/* KEY_VOLUMEUP */ +/* KEY_MUTE */ +/* KEY_MENU */ +/* KEY_UP */ +/* KEY_DOWN */ +/* KEY_LEFT */ +/* KEY_RIGHT */ +/* KEY_CAMERA */ +/* KEY_POWER */ +/* KEY_TAB */ +/* KEY_ENTER */ +/* KEY_LEFTSHIFT */ +/* KEY_COMMA */ +/* KEY_DOT */ /* PERIOD */ +/* KEY_SLASH */ +/* KEY_LEFTALT */ +/* KEY_RIGHTALT */ +/* KEY_SPACE */ +/* KEY_SEARCH */ +/* KEY_0 ~ KEY_9 */ +/* KEY_A ~ KEY_Z */ + +/* + * Power key's HW keycodes are 8, 17, 26, 35, 44, 53, 62, 71. Only [8] works + * for Power key in Keypad driver, so we set KEY_ENDCALL in [8] because + * EndCall key is Power key in Android. If KPD_PWRKEY_USE_EINT is YES, these + * eight keycodes will not work for Power key. + */ + +[cust_kpd.h_TAILER] +#endif + diff --git a/tools/dct/MT6574.fig b/tools/dct/MT6574.fig new file mode 100644 index 000000000..47fcf54e6 --- /dev/null +++ b/tools/dct/MT6574.fig @@ -0,0 +1,249 @@ +[Chip Type] +Chip = MT6574 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +PMIC_ON_OFF_CONFIG =1 +EINT_MD1_Config = 1 +POWER_Config = 1 +POWER_COUNT = 3 +GPIO_ModeNum = 8 +AndroidPhone = 1 +SpecialKey_Config = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(PWM1) MODE2(DPI_D4) MODE3() MODE4() MODE5(CONN_DSP_JDO) MODE6(DSPJTD) MODE7() PD +GPIO1 = MODE0(GPIO1) MODE1(PWM2) MODE2(DPI_D5) MODE3(MD_EINT1) MODE4(TDD_TDO) MODE5(CONN_MCU_TDO) MODE6() MODE7() PD +GPIO2 = MODE0(GPIO2) MODE1(CLKM0) MODE2(DPI_D6) MODE3(MD_EINT2) MODE4() MODE5(CONN_MCU_DBGACK_N) MODE6(KCOL4) MODE7() PD +GPIO3 = MODE0(GPIO3) MODE1(CLKM1) MODE2(DPI_D7) MODE3(SPI_MI) MODE4(MD_EINT3) MODE5(CONN_MCU_DBGI_N) MODE6(KCOL5) MODE7() PD +GPIO4 = MODE0(GPIO4) MODE1(CLKM2) MODE2(DPI_D8) MODE3(SPI_MO) MODE4(TDD_TCK) MODE5(CONN_MCU_TCK0) MODE6(CONN_MCU_AICE_JCKC) MODE7() PD +GPIO5 = MODE0(GPIO5) MODE1(UCTS2) MODE2(DPI_D9) MODE3(SPI_CS) MODE4(TDD_TDI) MODE5(CONN_MCU_TDI) MODE6(KCOL6) MODE7() PD +GPIO6 = MODE0(GPIO6) MODE1(URTS2) MODE2(DPI_D10) MODE3(SPI_CK) MODE4(TDD_TRSTN) MODE5(CONN_MCU_TRST_B) MODE6(KCOL7) MODE7() PD +GPIO7 = MODE0(GPIO7) MODE1(UCTS3) MODE2(DPI_D11) MODE3(SDA1) MODE4(TDD_TMS) MODE5(CONN_MCU_TMS) MODE6(CONN_MCU_AICE_JMSC) MODE7() PD +GPIO8 = MODE0(GPIO8) MODE1(URTS3) MODE2(CLKM3) MODE3(SCL1) MODE4(NLD9) MODE5(MD_EINT1) MODE6() MODE7() PD +GPIO9 = MODE0(GPIO9) MODE1(CLKM4) MODE2(SDA2) MODE3(EXT_FRAME_SYNC) MODE4(NWEB) MODE5(MD_EINT2) MODE6() MODE7() PD +GPIO10 = MODE0(GPIO10) MODE1(CLKM5) MODE2(SCL2) MODE3(EXT_FRAME_SYNC) MODE4(NCEB0) MODE5(MD_EINT3) MODE6() MODE7() PD +GPIO11 = MODE0(GPIO11) MODE1(CLKM4) MODE2(PWM2) MODE3(KROW3) MODE4(NLD12) MODE5() MODE6() MODE7() PD +GPIO12 = MODE0(GPIO12) MODE1(CLKM5) MODE2(PWM0) MODE3(KCOL3) MODE4(NLD13) MODE5() MODE6() MODE7(DBG_MON_B[6]) PD +GPIO13 = MODE0(GPIO13) MODE1() MODE2(GPS_FRAME_SYNC) MODE3() MODE4(MD_EINT1) MODE5() MODE6() MODE7(DBG_MON_B[7]) PD +GPIO14 = MODE0(GPIO14) MODE1() MODE2(DAC_DAT_OUT) MODE3(ANT_SEL3) MODE4(MD_EINT2) MODE5(CONN_MCU_DBGACK_N) MODE6() MODE7(DBG_MON_B[8]) PD +GPIO15 = MODE0(GPIO15) MODE1() MODE2(DAC_WS) MODE3(ANT_SEL4) MODE4(MD_EINT3) MODE5(CONN_MCU_DBGI_N) MODE6() MODE7(DBG_MON_B[9]) PD +GPIO16 = MODE0(GPIO16) MODE1() MODE2(DAC_CK) MODE3(ANT_SEL5) MODE4(NLD15) MODE5(CONN_MCU_TRST_B) MODE6() MODE7(DBG_MON_B[10]) PD +GPIO17 = MODE0(GPIO17) MODE1(UCTS0) MODE2(BSI_B_CLK) MODE3(CLKM0) MODE4(IDDIG) MODE5() MODE6() MODE7(DBG_MON_B[11]) PD +GPIO18 = MODE0(GPIO18) MODE1(URTS0) MODE2(BSI_B_DATA0) MODE3(I2SOUT_LRCK) MODE4(DRV_VBUS) MODE5() MODE6() MODE7(DBG_MON_B[12]) PD +GPIO19 = MODE0(GPIO19) MODE1(UCTS1) MODE2(BSI_B_EN) MODE3(I2SOUT_BCK) MODE4(CLKM1) MODE5() MODE6() MODE7(DBG_MON_B[13]) PD +GPIO20 = MODE0(GPIO20) MODE1(URTS1) MODE2(PCM_TX) MODE3(I2SOUT_DATA_OUT) MODE4(CLKM2) MODE5() MODE6() MODE7(DBG_MON_B[14]) PD +GPIO21 = MODE0(GPIO21) MODE1(PWRAP_SPIDO) MODE2(PWRAP_SPIDI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO22 = MODE0(GPIO22) MODE1(PWRAP_SPIDI) MODE2(PWRAP_SPIDO) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO23 = MODE0(GPIO23) MODE1(PWRAP_SPICK_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO24 = MODE0(GPIO24) MODE1(PWRAP_SPICS_B_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO25 = MODE0(GPIO25) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO26 = MODE0(GPIO26) MODE1(AUD_CLK) MODE2(ADC_CK) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO27 = MODE0(GPIO27) MODE1(AUD_MISO) MODE2(ADC_DAT_IN) MODE3(AUD_MOSI) MODE4() MODE5() MODE6() MODE7() PD +GPIO28 = MODE0(GPIO28) MODE1(AUD_MOSI) MODE2(ADC_WS) MODE3(AUD_MISO) MODE4() MODE5() MODE6() MODE7() PD +GPIO29 = MODE0(GPIO29) MODE1(MD1_SIM1_SCLK) MODE2(MD1_SIM2_SCLK) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO30 = MODE0(GPIO30) MODE1(MD1_SIM1_SRST) MODE2(MD1_SIM2_SRST) MODE3(PWM3) MODE4() MODE5() MODE6() MODE7() PD +GPIO31 = MODE0(GPIO31) MODE1(MD1_SIM1_SDAT) MODE2(MD1_SIM2_SDAT) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO32 = MODE0(GPIO32) MODE1(MD1_SIM2_SCLK) MODE2(MD1_SIM1_SCLK) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO33 = MODE0(GPIO33) MODE1(MD1_SIM2_SRST) MODE2(MD1_SIM1_SRST) MODE3(PWM4) MODE4() MODE5() MODE6() MODE7() PD +GPIO34 = MODE0(GPIO34) MODE1(MD1_SIM2_SDAT) MODE2(MD1_SIM1_SDAT) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[0]) PU +GPIO35 = MODE0(GPIO35) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO36 = MODE0(GPIO36) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO37 = MODE0(GPIO37) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO38 = MODE0(GPIO38) MODE1(SRCLKENAI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO39 = MODE0(GPIO39) MODE1(URXD2) MODE2(DPI_HSYNC) MODE3(UTXD2) MODE4(MD_URXD) MODE5(SRCCLKENAI2) MODE6(KROW4) MODE7() PD +GPIO40 = MODE0(GPIO40) MODE1(UTXD2) MODE2(DPI_VSYNC) MODE3(URXD2) MODE4(MD_UTXD) MODE5(TDD_TXD) MODE6(KROW5) MODE7() PD +GPIO41 = MODE0(GPIO41) MODE1(URXD3) MODE2(DPI_CK) MODE3(UTXD3) MODE4(UCTS2) MODE5(PWM3) MODE6(KROW6) MODE7() PD +GPIO42 = MODE0(GPIO42) MODE1(UTXD3) MODE2(DPI_DE) MODE3(URXD3) MODE4(URTS2) MODE5(PWM4) MODE6(KROW7) MODE7() PD +GPIO43 = MODE0(GPIO43) MODE1(PCM_CLK0) MODE2(DPI_D0) MODE3(I2SIN1_BCK0) MODE4(I2SOUT_BCK) MODE5(CONN_DSP_JCK) MODE6(DSPJTCK) MODE7() PD +GPIO44 = MODE0(GPIO44) MODE1(PCM_SYNC) MODE2(DPI_D1) MODE3(I2SIN1_LRCK) MODE4(I2SOUT_LRCK) MODE5(CONN_DSP_JINTP) MODE6() MODE7(DBG_MON_B[3]) PD +GPIO45 = MODE0(GPIO45) MODE1(PCM_RX) MODE2(DPI_D2) MODE3(I2SIN1_DATA_IN) MODE4(PCM_TX) MODE5(CONN_DSP_JDI) MODE6() MODE7(DBG_MON_B[4]) PD +GPIO46 = MODE0(GPIO46) MODE1(PCM_TX) MODE2(DPI_D3) MODE3(I2SOUT_DATA_OUT) MODE4(PCM_RX) MODE5(CONN_DSP_JMS) MODE6(DSPJTMS) MODE7(DBG_MON_B[5]) PD +GPIO47 = MODE0(GPIO47) MODE1(ANT_SEL0) MODE2(PWM0) MODE3(CONN_MCU_DBGACK_N) MODE4() MODE5() MODE6() MODE7(DBG_MON_A[0]) PD +GPIO48 = MODE0(GPIO48) MODE1(ANT_SEL1) MODE2(PWM1) MODE3(CONN_MCU_DBGI_N) MODE4() MODE5() MODE6() MODE7(DBG_MON_A[1]) PD +GPIO49 = MODE0(GPIO49) MODE1(ANT_SEL2) MODE2(PWM2) MODE3(CONN_MCU_TRST_B) MODE4() MODE5() MODE6() MODE7(DBG_MON_A[2]) PD +GPIO50 = MODE0(GPIO50) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[3]) PD +GPIO51 = MODE0(GPIO51) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[4]) PD +GPIO52 = MODE0(GPIO52) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[5]) PD +GPIO53 = MODE0(GPIO53) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[6]) PD +GPIO54 = MODE0(GPIO54) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[7]) PD +GPIO55 = MODE0(GPIO55) MODE1(BPI_BUS5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[8]) PD +GPIO56 = MODE0(GPIO56) MODE1(BPI_BUS6) MODE2(CLKM0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[9]) PD +GPIO57 = MODE0(GPIO57) MODE1(BPI_BUS14) MODE2(CLKM1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[10]) PD +GPIO58 = MODE0(GPIO58) MODE1(BPI_BUS15) MODE2(WB_PA_EN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[11]) PD +GPIO59 = MODE0(GPIO59) MODE1(BPI_BUS7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[12]) PD +GPIO60 = MODE0(GPIO60) MODE1(BPI_BUS8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[13]) PD +GPIO61 = MODE0(GPIO61) MODE1(BPI_BUS9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[14]) PD +GPIO62 = MODE0(GPIO62) MODE1(BPI_BUS10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[15]) PD +GPIO63 = MODE0(GPIO63) MODE1(BPI_BUS11) MODE2(WB_PA_EN) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[16]) PD +GPIO64 = MODE0(GPIO64) MODE1(BPI_BUS12) MODE2(BSI_C_CLK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[17]) PD +GPIO65 = MODE0(GPIO65) MODE1(BPI_BUS13) MODE2(BSI_C_DATA0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[18]) PD +GPIO66 = MODE0(GPIO66) MODE1(BSI_A_EN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[19]) PD +GPIO67 = MODE0(GPIO67) MODE1(BSI_A_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[20]) PD +GPIO68 = MODE0(GPIO68) MODE1(BSI_A_DATA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[21]) PD +GPIO69 = MODE0(GPIO69) MODE1(BSI_A_DATA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[22]) PD +GPIO70 = MODE0(GPIO70) MODE1(BSI_A_DATA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[23]) PD +GPIO71 = MODE0(GPIO71) MODE1(TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[24]) PD +GPIO72 = MODE0(GPIO72) MODE1(VM0) MODE2(CLKM2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[25]) PD +GPIO73 = MODE0(GPIO73) MODE1(VM1) MODE2(CLKM3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[26]) PD +GPIO74 = MODE0(GPIO74) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO75 = MODE0(GPIO75) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO76 = MODE0(GPIO76) MODE1(JTMS) MODE2(CONN_MCU_TMS) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO77 = MODE0(GPIO77) MODE1(JTCK) MODE2(CONN_MCU_TCK1) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO78 = MODE0(GPIO78) MODE1(JTDI) MODE2(CONN_MCU_TDI) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO79 = MODE0(GPIO79) MODE1(JTDO) MODE2(CONN_MCU_TDO) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO80 = MODE0(GPIO80) MODE1(SPI_CS) MODE2() MODE3(I2SIN1_DATA_IN) MODE4() MODE5() MODE6() MODE7(DBG_MON_B[15]) PD +GPIO81 = MODE0(GPIO81) MODE1(SPI_CK) MODE2() MODE3(I2SIN1_LRCK) MODE4() MODE5() MODE6() MODE7(DBG_MON_B[16]) PD +GPIO82 = MODE0(GPIO82) MODE1(SPI_MI) MODE2(SPI_MO) MODE3(I2SIN1_BCK1) MODE4() MODE5() MODE6() MODE7(DBG_MON_B[17]) PD +GPIO83 = MODE0(GPIO83) MODE1(SPI_MO) MODE2(SPI_MI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO84 = MODE0(GPIO84) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO85 = MODE0(GPIO85) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO86 = MODE0(GPIO86) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO87 = MODE0(GPIO87) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO88 = MODE0(GPIO88) MODE1(SDA2) MODE2(PWM1) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO89 = MODE0(GPIO89) MODE1(SCL2) MODE2(PWM2) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO90 = MODE0(GPIO90) MODE1(DISP_PWM) MODE2(PWM1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO91 = MODE0(GPIO91) MODE1(WB_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[27]) PD +GPIO92 = MODE0(GPIO92) MODE1(KROW1) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[28]) PD +GPIO93 = MODE0(GPIO93) MODE1(KROW2) MODE2(DRV_VBUS) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[29]) PD +GPIO94 = MODE0(GPIO94) MODE1(F2W_DATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[30]) PD +GPIO95 = MODE0(GPIO95) MODE1(F2W_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[31]) PD +GPIO96 = MODE0(GPIO96) MODE1(WB_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[32]) PD +GPIO97 = MODE0(GPIO97) MODE1(WB_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO98 = MODE0(GPIO98) MODE1(WB_SEN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO99 = MODE0(GPIO99) MODE1(WB_CRTL0) MODE2(DFD_NTRST_XI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO100 = MODE0(GPIO100) MODE1(WB_CRTL1) MODE2(DFD_TMS_XI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO101 = MODE0(GPIO101) MODE1(WB_CRTL2) MODE2(DFD_TCK_XI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO102 = MODE0(GPIO102) MODE1(WB_CRTL3) MODE2(DFD_TDI_XI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO103 = MODE0(GPIO103) MODE1(WB_CRTL4) MODE2(DFD_TDO) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO104 = MODE0(GPIO104) MODE1(WB_CRTL5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO105 = MODE0(GPIO105) MODE1(I2SIN1_DATA_IN) MODE2(PCM_RX) MODE3(I2SOUT_DATA_OUT) MODE4(DAC_DAT_OUT) MODE5(PWM0) MODE6() MODE7(DBG_MON_B[18]) PD +GPIO106 = MODE0(GPIO106) MODE1(I2SIN1_LRCK) MODE2(PCM_SYNC) MODE3(I2SOUT_LRCK) MODE4(DAC_WS) MODE5(PWM3) MODE6() MODE7(DBG_MON_B[19]) PD +GPIO107 = MODE0(GPIO107) MODE1(I2SIN1_BCK2) MODE2(PCM_CLK1) MODE3(I2SOUT_BCK) MODE4(DAC_CK) MODE5(PWM4) MODE6() MODE7(DBG_MON_B[20]) PD +GPIO108 = MODE0(GPIO108) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD) MODE4() MODE5() MODE6() MODE7(DBG_MON_B[21]) PU +GPIO109 = MODE0(GPIO109) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5() MODE6() MODE7(DBG_MON_B[22]) PU +GPIO110 = MODE0(GPIO110) MODE1(URXD1) MODE2(UTXD1) MODE3(MD_URXD) MODE4() MODE5() MODE6() MODE7(DBG_MON_B[23]) PD +GPIO111 = MODE0(GPIO111) MODE1(UTXD1) MODE2(URXD1) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5() MODE6() MODE7(DBG_MON_B[24]) PD +GPIO112 = MODE0(GPIO112) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[25]) PD +GPIO113 = MODE0(GPIO113) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[26]) PD +GPIO114 = MODE0(GPIO114) MODE1(MSDC2_CMD) MODE2(SDA1) MODE3() MODE4(NLD6) MODE5() MODE6() MODE7(DBG_MON_B[27]) PD +GPIO115 = MODE0(GPIO115) MODE1(MSDC2_CLK) MODE2(SCL1) MODE3() MODE4(NLD8) MODE5() MODE6() MODE7(DBG_MON_B[28]) PD +GPIO116 = MODE0(GPIO116) MODE1(MSDC2_DAT0) MODE2() MODE3() MODE4(NLD0) MODE5(UTXD0) MODE6() MODE7(DBG_MON_B[29]) PD +GPIO117 = MODE0(GPIO117) MODE1(MSDC2_DAT1) MODE2(ANT_SEL3) MODE3(PWM0) MODE4(NLD1) MODE5(URXD0) MODE6() MODE7(DBG_MON_B[30]) PD +GPIO118 = MODE0(GPIO118) MODE1(MSDC2_DAT2) MODE2(ANT_SEL4) MODE3(SDA2) MODE4(NLD2) MODE5(UTXD1) MODE6() MODE7(DBG_MON_B[31]) PD +GPIO119 = MODE0(GPIO119) MODE1(MSDC2_DAT3) MODE2(ANT_SEL5) MODE3(SCL2) MODE4(NLD3) MODE5(URXD1) MODE6() MODE7(DBG_MON_B[32]) PD +GPIO120 = MODE0(GPIO120) MODE1(CMDAT0) MODE2(CMCSD0) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO121 = MODE0(GPIO121) MODE1(CMDAT1) MODE2(CMCSD1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO122 = MODE0(GPIO122) MODE1(CMMCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO123 = MODE0(GPIO123) MODE1(CMPCLK) MODE2(CMCSK) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO124 = MODE0(GPIO124) MODE1(MSDC1_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO125 = MODE0(GPIO125) MODE1(MSDC1_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO126 = MODE0(GPIO126) MODE1(MSDC1_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO127 = MODE0(GPIO127) MODE1(MSDC1_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO128 = MODE0(GPIO128) MODE1(MSDC1_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO129 = MODE0(GPIO129) MODE1(MSDC1_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO130 = MODE0(GPIO130) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4(NALE) MODE5() MODE6() MODE7() PU +GPIO131 = MODE0(GPIO131) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4(NCLE) MODE5() MODE6() MODE7() PU +GPIO132 = MODE0(GPIO132) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4(NLD4) MODE5() MODE6() MODE7() PU +GPIO133 = MODE0(GPIO133) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4(NLD5) MODE5() MODE6() MODE7() PU +GPIO134 = MODE0(GPIO134) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4(NLD10) MODE5() MODE6() MODE7() PU +GPIO135 = MODE0(GPIO135) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4(NRNB) MODE5() MODE6() MODE7() PU +GPIO136 = MODE0(GPIO136) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4(NREB) MODE5() MODE6() MODE7() PD +GPIO137 = MODE0(GPIO137) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4(NLD7) MODE5() MODE6() MODE7(DBG_MON_B[1]) PU +GPIO138 = MODE0(GPIO138) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4(NLD14) MODE5() MODE6() MODE7() PU +GPIO139 = MODE0(GPIO139) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4(NLD11) MODE5() MODE6() MODE7(DBG_MON_B[2]) PU +GPIO140 = MODE0(GPIO140) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4(WATCHDOG) MODE5() MODE6() MODE7() PU +GPIO141 = MODE0(GPIO141) MODE1(RDP0_A) MODE2(CMVSYNC) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO142 = MODE0(GPIO142) MODE1(RDN0_A) MODE2(CMHSYNC) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO143 = MODE0(GPIO143) MODE1(RDP1_A) MODE2(CMDAT3) MODE3(CMCSD3) MODE4() MODE5() MODE6() MODE7() -- +GPIO144 = MODE0(GPIO144) MODE1(RDN1_A) MODE2(CMDAT2) MODE3(CMCSD2) MODE4() MODE5() MODE6() MODE7() -- +GPIO145 = MODE0(GPIO145) MODE1(RCP_A) MODE2(CMDAT7) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO146 = MODE0(GPIO146) MODE1(RCN_A) MODE2(CMDAT6) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO147 = MODE0(GPIO147) MODE1(RDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO148 = MODE0(GPIO148) MODE1(RDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO149 = MODE0(GPIO149) MODE1(RDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO150 = MODE0(GPIO150) MODE1(RDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO151 = MODE0(GPIO151) MODE1(RCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO152 = MODE0(GPIO152) MODE1(RCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO153 = MODE0(GPIO153) MODE1(RDP2) MODE2(CMDAT9) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO154 = MODE0(GPIO154) MODE1(RDN2) MODE2(CMDAT8) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO155 = MODE0(GPIO155) MODE1(RDP3) MODE2(CMDAT5) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO156 = MODE0(GPIO156) MODE1(RDN3) MODE2(CMDAT4) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO157 = MODE0(GPIO157) MODE1(TDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO158 = MODE0(GPIO158) MODE1(TDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO159 = MODE0(GPIO159) MODE1(TDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO160 = MODE0(GPIO160) MODE1(TDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO161 = MODE0(GPIO161) MODE1(TCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO162 = MODE0(GPIO162) MODE1(TCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO163 = MODE0(GPIO163) MODE1(TDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO164 = MODE0(GPIO164) MODE1(TDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO165 = MODE0(GPIO165) MODE1(TDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO166 = MODE0(GPIO166) MODE1(TDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO167 = MODE0(GPIO167) MODE1(KCOL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO168 = MODE0(GPIO168) MODE1(KCOL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD + +[GPO] + +[EINT] +EINT_COUNT = 169 +EINT_DEBOUNCE_TIME_COUNT = 12 + + +[EINT_MD1] +EINT_MD1_COUNT = 3 + +[ADC] +ADC_COUNT = 10 + +[ADC_EX_PIN] +0 +1 +2 +3 +4 +5 +12 +13 +14 +15 + + +[POWER] +DVDD28_MSDC1 +DVDD28_MSDC2 +DVDD28_BPI + +[DVDD28_MSDC1] +VMC +VIO18 +VIO28 + +[DVDD28_MSDC2] +VIO18 +VIO28 +VGP1 + +[DVDD28_BPI] +VIO18 +VIO28 + + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + + +[SPROUT_LICENSE_HEADER] +/* +* Copyright (C) 2011-2014 MediaTek Inc. +* +* This program is free software: you can redistribute it and/or modify it under the terms of the +* GNU General Public License version 2 as published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; +* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +* See the GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License along with this program. +* If not, see <http://www.gnu.org/licenses/>. +*/ + diff --git a/tools/dct/MT6735.fig b/tools/dct/MT6735.fig new file mode 100755 index 000000000..537754235 --- /dev/null +++ b/tools/dct/MT6735.fig @@ -0,0 +1,333 @@ +[Chip Type] +Chip = MT6735 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +PMIC_ON_OFF_CONFIG = 1 +GPIO_ModeNum = 8 +EINT_MD1_Config = 1 +EINT_MD1_SRC_PIN = 1 +POWER_Config = 1 +POWER_COUNT = 4 +SpecialKey_Config = 1 +I2C_Config = 1 +CLOCK_BUFFER_CONFIG = 1 +Extend_Key_Config=1 +Reset_Key_Config = 1 +PMIC_APP_Ver = 2 +PMIC_APP_COUNT = 6 +MD1_EINT_SRC_PIN_CFG = 1 +AndroidPhone = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(IDDIG) MODE2(DPI_D4) MODE3(CLKM4) MODE4(EXT_FRAME_SYNC) MODE5(PWM3) MODE6(KCOL2) MODE7(C2K_ARM_EINT0) PD SMT_GROUP(1) +GPIO1 = MODE0(GPIO1) MODE1(PWM2) MODE2(DPI_D5) MODE3(MD_EINT0) MODE4(TDD_TDO) MODE5(CONN_MCU_TDO) MODE6(PTA_RXD) MODE7(C2K_ARM_EINT1) PD SMT_GROUP(1) +GPIO2 = MODE0(GPIO2) MODE1(CLKM0) MODE2(DPI_D6) MODE3(MD_EINT0) MODE4(USB_DRVVBUS) MODE5(CONN_MCU_DBGACK_N) MODE6(PTA_TXD) MODE7(C2K_ARM_EINT2) PD SMT_GROUP(1) +GPIO3 = MODE0(GPIO3) MODE1(CLKM1) MODE2(DPI_D7) MODE3(SPI_MIB) MODE4(MD_EINT0) MODE5(CONN_MCU_DBGI_N) MODE6(CONN_MCU_AICE_TMSC) MODE7(C2K_ARM_EINT3) PD SMT_GROUP(1) +GPIO4 = MODE0(GPIO4) MODE1(CLKM2) MODE2(DPI_D8) MODE3(SPI_MOB) MODE4(TDD_TCK) MODE5(CONN_MCU_TCK[0]) MODE6(CONN_MCU_AICE_TCKC) MODE7(C2K_DM_EINT0) PD SMT_GROUP(1) +GPIO5 = MODE0(GPIO5) MODE1(UCTS2) MODE2(DPI_D9) MODE3(SPI_CSB) MODE4(TDD_TDI) MODE5(CONN_MCU_TDI) MODE6(I2S1_DO) MODE7(MD_URXD) PD SMT_GROUP(2) +GPIO6 = MODE0(GPIO6) MODE1(URTS2) MODE2(DPI_D10) MODE3(SPI_CKB) MODE4(TDD_TRSTN) MODE5(CONN_MCU_TRST_B) MODE6(I2S1_LRCK) MODE7(MD_UTXD) PD SMT_GROUP(2) +GPIO7 = MODE0(GPIO7) MODE1(UCTS3) MODE2(DPI_D11) MODE3(SDA1) MODE4(TDD_TMS) MODE5(CONN_MCU_TMS) MODE6(I2S1_BCK) MODE7(TDD_TXD) PD SMT_GROUP(2) +GPIO8 = MODE0(GPIO8) MODE1(URTS3) MODE2(C2K_UIM0_HOT_PLUG_IN) MODE3(SCL1) MODE4(PCM1_DO1) MODE5(MD_EINT1) MODE6(KCOL4) MODE7(UTXD0) PD SMT_GROUP(2) +GPIO9 = MODE0(GPIO9) MODE1(C2K_UIM1_HOT_PLUG_IN) MODE2(PCM1_DO0) MODE3(I2S3_MCK) MODE4(MD_EINT2) MODE5(CLKM2) MODE6(I2S1_MCK) MODE7(DBG_MON_A29) PD SMT_GROUP(3) +GPIO10 = MODE0(GPIO10) MODE1(PWM1) MODE2(CLKM1) MODE3(KROW2) MODE4(MD_EINT0) MODE5(I2S1_MCK) MODE6(SDA3) MODE7(DBG_MON_A30) PD SMT_GROUP(3) +GPIO11 = MODE0(GPIO11) MODE1(MD_EINT1) MODE2(IRTX_OUT) MODE3(C2K_UIM0_HOT_PLUG_IN) MODE4(CLKM0) MODE5(I2S2_MCK) MODE6(SCL3) MODE7(URXD0) PD SMT_GROUP(3) +GPIO12 = MODE0(GPIO12) MODE1(I2S0_MCK) MODE2(C2K_UIM1_HOT_PLUG_IN) MODE3(KCOL2) MODE4(MD_EINT2) MODE5(IRTX_OUT) MODE6(SRCLKENAI2) MODE7(PCM1_DO1) PD SMT_GROUP(3) +GPIO13 = MODE0(GPIO13) MODE1(WB_CTRL0) MODE2() MODE3(C2K_ARM_EINT0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) PD SMT_GROUP(4) +GPIO14 = MODE0(GPIO14) MODE1(WB_CTRL1) MODE2() MODE3(C2K_ARM_EINT1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) PD SMT_GROUP(4) +GPIO15 = MODE0(GPIO15) MODE1(WB_CTRL2) MODE2() MODE3(C2K_ARM_EINT2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) PD SMT_GROUP(4) +GPIO16 = MODE0(GPIO16) MODE1(WB_CTRL3) MODE2() MODE3(C2K_ARM_EINT3) MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) PD SMT_GROUP(4) +GPIO17 = MODE0(GPIO17) MODE1(WB_CTRL4) MODE2() MODE3(C2K_DM_EINT0) MODE4(WATCHDOG) MODE5() MODE6() MODE7(DBG_MON_A4) PD SMT_GROUP(4) +GPIO18 = MODE0(GPIO18) MODE1(WB_CTRL5) MODE2() MODE3(C2K_DM_EINT1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) PD SMT_GROUP(4) +GPIO19 = MODE0(GPIO19) MODE1(ANT_SEL0) MODE2(IRTX_OUT) MODE3(IRDA_TX) MODE4(C2K_UART0_TXD) MODE5(GPS_FRAME_SYNC) MODE6(LTE_UTXD) MODE7(DBG_MON_A6) PD SMT_GROUP(5) +GPIO20 = MODE0(GPIO20) MODE1(ANT_SEL1) MODE2(C2K_UIM1_HOT_PLUG_IN) MODE3(IRDA_RX) MODE4(C2K_UART0_RXD) MODE5(MD_EINT2) MODE6(LTE_URXD) MODE7(DBG_MON_A7) PD SMT_GROUP(5) +GPIO21 = MODE0(GPIO21) MODE1(ANT_SEL2) MODE2(PWM2) MODE3(IRDA_PDN) MODE4(CORESONIC_SWCK) MODE5(MD_EINT1) MODE6(C2K_UIM0_HOT_PLUG_IN) MODE7(DBG_MON_A8) PD SMT_GROUP(5) +GPIO22 = MODE0(GPIO22) MODE1(RDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO23 = MODE0(GPIO23) MODE1(RDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO24 = MODE0(GPIO24) MODE1(RDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO25 = MODE0(GPIO25) MODE1(RDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO26 = MODE0(GPIO26) MODE1(RCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO27 = MODE0(GPIO27) MODE1(RCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO28 = MODE0(GPIO28) MODE1(RDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO29 = MODE0(GPIO29) MODE1(RDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO30 = MODE0(GPIO30) MODE1(RDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO31 = MODE0(GPIO31) MODE1(RDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO32 = MODE0(GPIO32) MODE1(RDN0_A) MODE2(CMHSYNC) MODE3(CMCSD0) MODE4() MODE5() MODE6() MODE7() -- +GPIO33 = MODE0(GPIO33) MODE1(RDP0_A) MODE2(CMVSYNC) MODE3(CMCSD1) MODE4() MODE5() MODE6() MODE7() -- +GPIO34 = MODE0(GPIO34) MODE1(RDN1_A) MODE2(CMDAT9) MODE3(CMCSD2) MODE4() MODE5() MODE6() MODE7() -- +GPIO35 = MODE0(GPIO35) MODE1(RDP1_A) MODE2(CMDAT8) MODE3(CMCSD3) MODE4() MODE5() MODE6() MODE7() -- +GPIO36 = MODE0(GPIO36) MODE1(RCN_A) MODE2(CMDAT7) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO37 = MODE0(GPIO37) MODE1(RCP_A) MODE2(CMDAT6) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO38 = MODE0(GPIO38) MODE1(RDN2_A) MODE2(CMDAT5) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO39 = MODE0(GPIO39) MODE1(RDP2_A) MODE2(CMDAT4) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO40 = MODE0(GPIO40) MODE1(RDN3_A) MODE2(CMDAT3) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO41 = MODE0(GPIO41) MODE1(RDP3_A) MODE2(CMDAT2) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO42 = MODE0(GPIO42) MODE1(CMDAT0) MODE2(CMCSD0) MODE3(CMMCLK1) MODE4() MODE5(ANT_SEL5) MODE6(CLKM5) MODE7(DBG_MON_A9) PD SMT_GROUP(6) +GPIO43 = MODE0(GPIO43) MODE1(CMDAT1) MODE2(CMCSD1) MODE3(CMFLASH) MODE4(MD_EINT0) MODE5(CMMCLK1) MODE6(CLKM4) MODE7(DBG_MON_A10) PD SMT_GROUP(6) +GPIO44 = MODE0(GPIO44) MODE1(CMPCLK) MODE2(CMCSK) MODE3(CMCSD2) MODE4(KCOL3) MODE5(SRCLKENAI2) MODE6(PWM0) MODE7(DBG_MON_A11) PD SMT_GROUP(6) +GPIO45 = MODE0(GPIO45) MODE1(CMMCLK0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A12) PD SMT_GROUP(7) +GPIO46 = MODE0(GPIO46) MODE1(CMMCLK1) MODE2(IDDIG) MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(DM_JTINTP) MODE6(KCOL6) MODE7(DBG_MON_A13) PD SMT_GROUP(7) +GPIO47 = MODE0(GPIO47) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(8) +GPIO48 = MODE0(GPIO48) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(8) +GPIO49 = MODE0(GPIO49) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(9) +GPIO50 = MODE0(GPIO50) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(9) +GPIO51 = MODE0(GPIO51) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(10) +GPIO52 = MODE0(GPIO52) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(10) +GPIO53 = MODE0(GPIO53) MODE1(SDA3) MODE2() MODE3(IDDIG) MODE4() MODE5(MD_EINT2) MODE6(C2K_UIM1_HOT_PLUG_IN) MODE7() PU SMT_GROUP(11) +GPIO54 = MODE0(GPIO54) MODE1(SCL3) MODE2() MODE3(IDDIG) MODE4() MODE5(MD_EINT1) MODE6(C2K_UIM0_HOT_PLUG_IN) MODE7() PU SMT_GROUP(11) +GPIO55 = MODE0(GPIO55) MODE1(SRCLKENAI0) MODE2(PWM2) MODE3(CLKM5) MODE4(CORESONIC_SWD) MODE5(ANT_SEL6) MODE6(KROW5) MODE7(DISP_PWM) PD SMT_GROUP(12) +GPIO56 = MODE0(GPIO56) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(13) +GPIO57 = MODE0(GPIO57) MODE1(URXD2) MODE2(DPI_HSYNC0) MODE3(UTXD2) MODE4(MD_URXD) MODE5(SRCLKENAI1) MODE6(KROW4) MODE7(DBG_MON_A14) PD SMT_GROUP(14) +GPIO58 = MODE0(GPIO58) MODE1(UTXD2) MODE2(DPI_VSYNC0) MODE3(URXD2) MODE4(MD_UTXD) MODE5(TDD_TXD) MODE6(KROW5) MODE7(DBG_MON_A15) PD SMT_GROUP(14) +GPIO59 = MODE0(GPIO59) MODE1(URXD3) MODE2(DPI_CK0) MODE3(UTXD3) MODE4(UCTS2) MODE5(PWM3) MODE6(KROW6) MODE7(DBG_MON_A16) PD SMT_GROUP(14) +GPIO60 = MODE0(GPIO60) MODE1(UTXD3) MODE2(DPI_DE0) MODE3(URXD3) MODE4(URTS2) MODE5(PWM4) MODE6(KROW7) MODE7(DBG_MON_A17) PD SMT_GROUP(14) +GPIO61 = MODE0(GPIO61) MODE1(PCM1_CLK[0]) MODE2(DPI_D0) MODE3(I2S0_BCK) MODE4(KROW4) MODE5(ANT_SEL3) MODE6(IRTX_OUT) MODE7(DBG_MON_A18) PD SMT_GROUP(15) +GPIO62 = MODE0(GPIO62) MODE1(PCM1_SYNC) MODE2(DPI_D1) MODE3(I2S0_LRCK) MODE4(KCOL7) MODE5(CLKM3) MODE6(CMFLASH) MODE7(DBG_MON_A19) PD SMT_GROUP(15) +GPIO63 = MODE0(GPIO63) MODE1(PCM1_DI) MODE2(DPI_D2) MODE3(I2S0_DI) MODE4(PCM1_DO0) MODE5(CLKM5) MODE6(KROW3) MODE7(DBG_MON_A20) PD SMT_GROUP(15) +GPIO64 = MODE0(GPIO64) MODE1(PCM1_DO0) MODE2(DPI_D3) MODE3(I2S0_MCK) MODE4(PCM1_DI) MODE5(SRCLKENAI2) MODE6(KCOL5) MODE7(DBG_MON_A21) PD SMT_GROUP(15) +GPIO65 = MODE0(GPIO65) MODE1(SPI_CSA) MODE2(EXT_FRAME_SYNC) MODE3(I2S3_MCK) MODE4(KROW2) MODE5(GPS_FRAME_SYNC) MODE6(PTA_RXD) MODE7(DBG_MON_A22) PD SMT_GROUP(16) +GPIO66 = MODE0(GPIO66) MODE1(SPI_CKA) MODE2(USB_DRVVBUS) MODE3(I2S3_BCK) MODE4(KCOL2) MODE5() MODE6(PTA_TXD) MODE7(DBG_MON_A23) PD SMT_GROUP(16) +GPIO67 = MODE0(GPIO67) MODE1(SPI_MIA) MODE2(SPI_MOA) MODE3(I2S3_DO) MODE4(PTA_RXD) MODE5(IDDIG) MODE6(UCTS1) MODE7(DBG_MON_A24) PD SMT_GROUP(16) +GPIO68 = MODE0(GPIO68) MODE1(SPI_MOA) MODE2(SPI_MIA) MODE3(I2S3_LRCK) MODE4(PTA_TXD) MODE5(ANT_SEL4) MODE6(URTS1) MODE7(DBG_MON_A25) PD SMT_GROUP(16) +GPIO69 = MODE0(GPIO69) MODE1(DISP_PWM) MODE2(PWM1) MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(ANT_SEL7) MODE6(DM_JTINTP) MODE7() PD SMT_GROUP(17) +GPIO70 = MODE0(GPIO70) MODE1(JTMS) MODE2(CONN_MCU_TMS) MODE3(LTE_MD32_JTAG_TMS) MODE4(TDD_TMS) MODE5(CORESONIC_SWD) MODE6(DM_OTMS) MODE7(DFD_TMS) PU SMT_GROUP(18) +GPIO71 = MODE0(GPIO71) MODE1(JTCK) MODE2(CONN_MCU_TCK[1]) MODE3(LTE_MD32_JTAG_TCK) MODE4(TDD_TCK) MODE5(CORESONIC_SWCK) MODE6(DM_OTCK) MODE7(DFD_TCK_XI) PU SMT_GROUP(18) +GPIO72 = MODE0(GPIO72) MODE1(JTDI) MODE2(CONN_MCU_TDI) MODE3(LTE_MD32_JTAG_TDI) MODE4(TDD_TDI) MODE5() MODE6(DM_OTDI) MODE7(DFD_TDI) PU SMT_GROUP(18) +GPIO73 = MODE0(GPIO73) MODE1(JTDO) MODE2(CONN_MCU_TDO) MODE3(LTE_MD32_JTAG_TDO) MODE4(TDD_TDO) MODE5() MODE6(DM_OTDO) MODE7(DFD_TDO) PU SMT_GROUP(18) +GPIO74 = MODE0(GPIO74) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD) MODE4(SDA3) MODE5(C2K_UART0_RXD) MODE6(LTE_URXD) MODE7(AUXIF_ST) PU SMT_GROUP(19) +GPIO75 = MODE0(GPIO75) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5(C2K_UART0_TXD) MODE6(LTE_UTXD) MODE7() PU SMT_GROUP(19) +GPIO76 = MODE0(GPIO76) MODE1(URXD1) MODE2(UTXD1) MODE3(MD_URXD) MODE4(SCL3) MODE5(LTE_URXD) MODE6(C2K_UART0_RXD) MODE7(AUXIF_CLK) PD SMT_GROUP(19) +GPIO77 = MODE0(GPIO77) MODE1(UTXD1) MODE2(URXD1) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5(LTE_UTXD) MODE6(C2K_UART0_TXD) MODE7() PD SMT_GROUP(19) +GPIO78 = MODE0(GPIO78) MODE1(I2S0_DI) MODE2(PCM1_DI) MODE3(I2S3_DO) MODE4(I2S1_DO) MODE5(PWM0) MODE6(I2S2_DI) MODE7(DBG_MON_A26) PD SMT_GROUP(20) +GPIO79 = MODE0(GPIO79) MODE1(I2S0_LRCK) MODE2(PCM1_SYNC) MODE3(I2S3_LRCK) MODE4(I2S1_LRCK) MODE5(PWM3) MODE6(I2S2_LRCK) MODE7(DBG_MON_A27) PD SMT_GROUP(20) +GPIO80 = MODE0(GPIO80) MODE1(I2S0_BCK) MODE2(PCM1_CLK[1]) MODE3(I2S3_BCK) MODE4(I2S1_BCK) MODE5(PWM4) MODE6(I2S2_BCK) MODE7(DBG_MON_A28) PD SMT_GROUP(20) +GPIO81 = MODE0(GPIO81) MODE1(KROW0) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(CORESONIC_SWCK) MODE5(C2K_TCK) MODE6() MODE7(C2K_DM_EINT1) PD SMT_GROUP(21) +GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3(CONN_MCU_TRST_B) MODE4(CORESONIC_SWD) MODE5(C2K_NTRST) MODE6(USB_DRVVBUS) MODE7(C2K_DM_EINT2) PD SMT_GROUP(21) +GPIO83 = MODE0(GPIO83) MODE1(KROW2) MODE2(USB_DRVVBUS) MODE3() MODE4() MODE5(C2K_TDI) MODE6() MODE7(C2K_DM_EINT3) PD SMT_GROUP(21) +GPIO84 = MODE0(GPIO84) MODE1(KCOL0) MODE2(URTS0) MODE3(CONN_MCU_DBGACK_N) MODE4(SCL2) MODE5(C2K_TDO) MODE6(AUXIF_CLK) MODE7() PU SMT_GROUP(21) +GPIO85 = MODE0(GPIO85) MODE1(KCOL1) MODE2(UCTS0) MODE3(UCTS1) MODE4(SDA2) MODE5(C2K_TMS) MODE6(AUXIF_ST) MODE7(DBG_MON_A31) PD SMT_GROUP(21) +GPIO86 = MODE0(GPIO86) MODE1(KCOL2) MODE2() MODE3(URTS1) MODE4() MODE5(C2K_RTCK) MODE6() MODE7(DBG_MON_A32) PD SMT_GROUP(21) +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS5) MODE2(LTE_C2K_BPI_BUS5) MODE3() MODE4() MODE5(C2K_BPI_BUS5) MODE6() MODE7(DBG_MON_B0) PD SMT_GROUP(22) +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS6) MODE2(LTE_C2K_BPI_BUS6) MODE3() MODE4() MODE5(C2K_BPI_BUS6) MODE6() MODE7(DBG_MON_B1) PD SMT_GROUP(22) +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS7) MODE2(LTE_C2K_BPI_BUS7) MODE3(CLKM0) MODE4() MODE5(C2K_BPI_BUS7) MODE6() MODE7(DBG_MON_B2) PD SMT_GROUP(22) +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS8) MODE2(LTE_C2K_BPI_BUS8) MODE3(CLKM1) MODE4() MODE5(C2K_BPI_BUS8) MODE6() MODE7(DBG_MON_B3) PD SMT_GROUP(22) +GPIO91 = MODE0(GPIO91) MODE1(BPI_BUS9) MODE2(LTE_C2K_BPI_BUS9) MODE3(CLKM2) MODE4() MODE5(C2K_BPI_BUS9) MODE6() MODE7(DBG_MON_B4) PD SMT_GROUP(22) +GPIO92 = MODE0(GPIO92) MODE1(BPI_BUS10) MODE2(LTE_C2K_BPI_BUS10) MODE3(CLKM3) MODE4() MODE5(C2K_BPI_BUS10) MODE6() MODE7(DBG_MON_B5) PD SMT_GROUP(22) +GPIO93 = MODE0(GPIO93) MODE1(BPI_BUS11) MODE2(LTE_C2K_BPI_BUS11) MODE3() MODE4() MODE5(C2K_BPI_BUS11) MODE6() MODE7(DBG_MON_B6) PD SMT_GROUP(22) +GPIO94 = MODE0(GPIO94) MODE1(BPI_BUS12) MODE2(LTE_C2K_BPI_BUS12) MODE3() MODE4() MODE5(C2K_BPI_BUS12) MODE6() MODE7(DBG_MON_B7) PD SMT_GROUP(22) +GPIO95 = MODE0(GPIO95) MODE1(BPI_BUS13) MODE2(LTE_C2K_BPI_BUS13) MODE3() MODE4() MODE5(C2K_BPI_BUS13) MODE6() MODE7(DBG_MON_B8) PD SMT_GROUP(22) +GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS14) MODE2(LTE_C2K_BPI_BUS14) MODE3() MODE4() MODE5(C2K_BPI_BUS14) MODE6() MODE7(DBG_MON_B9) PD SMT_GROUP(22) +GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS15) MODE2(LTE_C2K_BPI_BUS15) MODE3() MODE4() MODE5(C2K_BPI_BUS15) MODE6() MODE7(DBG_MON_B10) PD SMT_GROUP(22) +GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS16) MODE2(LTE_C2K_BPI_BUS16) MODE3() MODE4() MODE5(C2K_BPI_BUS16) MODE6() MODE7(DBG_MON_B11) PD SMT_GROUP(22) +GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS17) MODE2(LTE_C2K_BPI_BUS17) MODE3() MODE4() MODE5(C2K_BPI_BUS17) MODE6() MODE7(DBG_MON_B12) PD SMT_GROUP(22) +GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS18) MODE2(LTE_C2K_BPI_BUS18) MODE3() MODE4() MODE5(C2K_BPI_BUS18) MODE6() MODE7(DBG_MON_B13) PD SMT_GROUP(22) +GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS19) MODE2(LTE_C2K_BPI_BUS19) MODE3() MODE4() MODE5(C2K_BPI_BUS19) MODE6() MODE7(DBG_MON_B14) PD SMT_GROUP(22) +GPIO102 = MODE0(GPIO102) MODE1(BPI_BUS20) MODE2(LTE_C2K_BPI_BUS20) MODE3() MODE4() MODE5(C2K_BPI_BUS20) MODE6() MODE7(DBG_MON_B15) PD SMT_GROUP(22) +GPIO103 = MODE0(GPIO103) MODE1(C2K_TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) PD SMT_GROUP(22) +GPIO104 = MODE0(GPIO104) MODE1(RFIC1_BSI_EN) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_EN) MODE6() MODE7(DBG_MON_B17) PD SMT_GROUP(23) +GPIO105 = MODE0(GPIO105) MODE1(RFIC1_BSI_CK) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_CLK) MODE6() MODE7(DBG_MON_B18) PD SMT_GROUP(23) +GPIO106 = MODE0(GPIO106) MODE1(RFIC1_BSI_D0) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_DATA) MODE6() MODE7(DBG_MON_B19) PD SMT_GROUP(23) +GPIO107 = MODE0(GPIO107) MODE1(RFIC1_BSI_D1) MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_EN) MODE6() MODE7(DBG_MON_B20) PD SMT_GROUP(23) +GPIO108 = MODE0(GPIO108) MODE1(RFIC1_BSI_D2) MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_CLK) MODE6() MODE7(DBG_MON_B21) PD SMT_GROUP(23) +GPIO109 = MODE0(GPIO109) MODE1() MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_DATA) MODE6() MODE7(DBG_MON_B22) PD SMT_GROUP(23) +GPIO110 = MODE0(GPIO110) MODE1(RFIC0_BSI_EN) MODE2() MODE3() MODE4(SPM_BSI_EN) MODE5() MODE6() MODE7(DBG_MON_B23) PD SMT_GROUP(23) +GPIO111 = MODE0(GPIO111) MODE1(RFIC0_BSI_CK) MODE2() MODE3() MODE4(SPM_BSI_CLK) MODE5() MODE6() MODE7(DBG_MON_B24) PD SMT_GROUP(23) +GPIO112 = MODE0(GPIO112) MODE1(RFIC0_BSI_D2) MODE2() MODE3() MODE4(SPM_BSI_D2) MODE5() MODE6() MODE7(DBG_MON_B25) PD SMT_GROUP(23) +GPIO113 = MODE0(GPIO113) MODE1(RFIC0_BSI_D1) MODE2() MODE3() MODE4(SPM_BSI_D1) MODE5() MODE6() MODE7(DBG_MON_B26) PD SMT_GROUP(23) +GPIO114 = MODE0(GPIO114) MODE1(RFIC0_BSI_D0) MODE2() MODE3() MODE4(SPM_BSI_D0) MODE5() MODE6() MODE7(DBG_MON_B27) PD SMT_GROUP(23) +GPIO115 = MODE0(GPIO115) MODE1(AUXIN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO116 = MODE0(GPIO116) MODE1(AUXIN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO117 = MODE0(GPIO117) MODE1(AUXIN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO118 = MODE0(GPIO118) MODE1(TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO119 = MODE0(GPIO119) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B28) PD SMT_GROUP(24) +GPIO120 = MODE0(GPIO120) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B29) PD SMT_GROUP(24) +GPIO121 = MODE0(GPIO121) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B30) PD SMT_GROUP(24) +GPIO122 = MODE0(GPIO122) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) PD SMT_GROUP(24) +GPIO123 = MODE0(GPIO123) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B32) PD SMT_GROUP(24) +GPIO124 = MODE0(GPIO124) MODE1(BPI_BUS21) MODE2() MODE3() MODE4() MODE5(DPI_HSYNC1) MODE6(KCOL2) MODE7(TDD_TXD) PD SMT_GROUP(24) +GPIO125 = MODE0(GPIO125) MODE1(BPI_BUS22) MODE2() MODE3() MODE4() MODE5(DPI_VSYNC1) MODE6(KROW2) MODE7(MD_URXD) PD SMT_GROUP(24) +GPIO126 = MODE0(GPIO126) MODE1(BPI_BUS23) MODE2() MODE3() MODE4() MODE5(DPI_CK1) MODE6(I2S2_MCK) MODE7(MD_UTXD) PD SMT_GROUP(24) +GPIO127 = MODE0(GPIO127) MODE1(BPI_BUS24) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(EXT_FRAME_SYNC) MODE5(DPI_DE1) MODE6(SRCLKENAI1) MODE7(URXD0) PD SMT_GROUP(24) +GPIO128 = MODE0(GPIO128) MODE1(BPI_BUS25) MODE2() MODE3(GPS_FRAME_SYNC) MODE4() MODE5(I2S2_DI) MODE6(PTA_RXD) MODE7(UTXD0) PD SMT_GROUP(24) +GPIO129 = MODE0(GPIO129) MODE1(BPI_BUS26) MODE2(DISP_PWM) MODE3() MODE4() MODE5(I2S2_LRCK) MODE6(PTA_TXD) MODE7(LTE_URXD) PD SMT_GROUP(24) +GPIO130 = MODE0(GPIO130) MODE1(BPI_BUS27) MODE2() MODE3() MODE4() MODE5(I2S2_BCK) MODE6(IRTX_OUT) MODE7(LTE_UTXD) PD SMT_GROUP(24) +GPIO131 = MODE0(GPIO131) MODE1(LTE_PAVM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO132 = MODE0(GPIO132) MODE1(LTE_PAVM1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO133 = MODE0(GPIO133) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO134 = MODE0(GPIO134) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO135 = MODE0(GPIO135) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO136 = MODE0(GPIO136) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO137 = MODE0(GPIO137) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(25) +GPIO138 = MODE0(GPIO138) MODE1(PWRAP_SPIDO) MODE2(PWRAP_SPIDI) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO139 = MODE0(GPIO139) MODE1(PWRAP_SPIDI) MODE2(PWRAP_SPIDO) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO140 = MODE0(GPIO140) MODE1() MODE2() MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(DM_JTINTP) MODE6() MODE7() PD SMT_GROUP(26) +GPIO141 = MODE0(GPIO141) MODE1(PWRAP_SPICK_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO142 = MODE0(GPIO142) MODE1(PWRAP_SPICS_B_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(26) +GPIO143 = MODE0(GPIO143) MODE1(AUD_CLK_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO144 = MODE0(GPIO144) MODE1(AUD_DAT_MISO) MODE2() MODE3(AUD_DAT_MOSI) MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO145 = MODE0(GPIO145) MODE1(AUD_DAT_MOSI) MODE2() MODE3(AUD_DAT_MISO) MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO146 = MODE0(GPIO146) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(28) +GPIO147 = MODE0(GPIO147) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(28) +GPIO148 = MODE0(GPIO148) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(29) +GPIO149 = MODE0(GPIO149) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(25) +GPIO150 = MODE0(GPIO150) MODE1(TDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO151 = MODE0(GPIO151) MODE1(TDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO152 = MODE0(GPIO152) MODE1(TDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO153 = MODE0(GPIO153) MODE1(TDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO154 = MODE0(GPIO154) MODE1(TCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO155 = MODE0(GPIO155) MODE1(TCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO156 = MODE0(GPIO156) MODE1(TDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO157 = MODE0(GPIO157) MODE1(TDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO158 = MODE0(GPIO158) MODE1(TDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO159 = MODE0(GPIO159) MODE1(TDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO160 = MODE0(GPIO160) MODE1(MD_SIM2_SCLK) MODE2(MD_SIM1_SCLK) MODE3(UIM0_CLK) MODE4(UIM1_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO161 = MODE0(GPIO161) MODE1(MD_SIM2_SRST) MODE2(MD_SIM1_SRST) MODE3(UIM0_RST) MODE4(UIM1_RST) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO162 = MODE0(GPIO162) MODE1(MD_SIM2_SDAT) MODE2(MD_SIM1_SDAT) MODE3(UIM0_IO) MODE4(UIM1_IO) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO163 = MODE0(GPIO163) MODE1(MD_SIM1_SCLK) MODE2(MD_SIM2_SCLK) MODE3(UIM1_CLK) MODE4(UIM0_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO164 = MODE0(GPIO164) MODE1(MD_SIM1_SRST) MODE2(MD_SIM2_SRST) MODE3(UIM1_RST) MODE4(UIM0_RST) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO165 = MODE0(GPIO165) MODE1(MD_SIM1_SDAT) MODE2(MD_SIM2_SDAT) MODE3(UIM1_IO) MODE4(UIM0_IO) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO166 = MODE0(GPIO166) MODE1(MSDC1_CMD) MODE2(LTE_MD32_JTAG_TMS) MODE3(C2K_TMS) MODE4(TDD_TMS) MODE5(CONN_DSP_JMS) MODE6(JTMS) MODE7(CONN_MCU_AICE_TMSC) PU SMT_GROUP(32) +GPIO167 = MODE0(GPIO167) MODE1(MSDC1_CLK) MODE2(LTE_MD32_JTAG_TCK) MODE3(C2K_TCK) MODE4(TDD_TCK) MODE5(CONN_DSP_JCK) MODE6(JTCK) MODE7(CONN_MCU_AICE_TCKC) PD SMT_GROUP(33) +GPIO168 = MODE0(GPIO168) MODE1(MSDC1_DAT0) MODE2(LTE_MD32_JTAG_TDI) MODE3(C2K_TDI) MODE4(TDD_TDI) MODE5(CONN_DSP_JDI) MODE6(JTDI) MODE7() PU SMT_GROUP(34) +GPIO169 = MODE0(GPIO169) MODE1(MSDC1_DAT1) MODE2(LTE_MD32_JTAG_TDO) MODE3(C2K_TDO) MODE4(TDD_TDO) MODE5(CONN_DSP_JDO) MODE6(JTDO) MODE7() PU SMT_GROUP(34) +GPIO170 = MODE0(GPIO170) MODE1(MSDC1_DAT2) MODE2(LTE_MD32_JTAG_TRST) MODE3(C2K_NTRST) MODE4(TDD_TRSTN) MODE5(CONN_DSP_JINTP) MODE6(DM_JTINTP) MODE7() PU SMT_GROUP(34) +GPIO171 = MODE0(GPIO171) MODE1(MSDC1_DAT3) MODE2() MODE3(C2K_RTCK) MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(34) +GPIO172 = MODE0(GPIO172) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(35) +GPIO173 = MODE0(GPIO173) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(36) +GPIO174 = MODE0(GPIO174) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(37) +GPIO175 = MODE0(GPIO175) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO176 = MODE0(GPIO176) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO177 = MODE0(GPIO177) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO179 = MODE0(GPIO179) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO180 = MODE0(GPIO180) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO181 = MODE0(GPIO181) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO182 = MODE0(GPIO182) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO183 = MODE0(GPIO183) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(39) +GPIO184 = MODE0(GPIO184) MODE1(F2W_DATA) MODE2(MRG_CLK) MODE3(C2K_DM_EINT2) MODE4(PCM0_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(40) +GPIO185 = MODE0(GPIO185) MODE1(F2W_CK) MODE2(MRG_DI) MODE3(C2K_DM_EINT3) MODE4(PCM0_DI) MODE5() MODE6() MODE7() PD SMT_GROUP(40) +GPIO186 = MODE0(GPIO186) MODE1(WB_RSTB) MODE2() MODE3() MODE4(URXD3) MODE5(UTXD3) MODE6() MODE7() PD SMT_GROUP(41) +GPIO187 = MODE0(GPIO187) MODE1(WB_SCLK) MODE2(MRG_DO) MODE3() MODE4(PCM0_DO) MODE5() MODE6() MODE7() PD SMT_GROUP(41) +GPIO188 = MODE0(GPIO188) MODE1(WB_SDATA) MODE2(MRG_SYNC) MODE3() MODE4(PCM0_SYNC) MODE5() MODE6() MODE7() PD SMT_GROUP(41) +GPIO189 = MODE0(GPIO189) MODE1(WB_SEN) MODE2() MODE3() MODE4(UTXD3) MODE5(URXD3) MODE6() MODE7() PD SMT_GROUP(41) +GPIO190 = MODE0(GPIO190) MODE1(GPS_RXQN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO191 = MODE0(GPIO191) MODE1(GPS_RXQP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO192 = MODE0(GPIO192) MODE1(GPS_RXIN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO193 = MODE0(GPIO193) MODE1(GPS_RXIP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO194 = MODE0(GPIO194) MODE1(WB_RXQN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO195 = MODE0(GPIO195) MODE1(WB_RXQP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO196 = MODE0(GPIO196) MODE1(WB_RXIN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO197 = MODE0(GPIO197) MODE1(WB_RXIP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO198 = MODE0(GPIO198) MODE1(MSDC2_CMD) MODE2(SDA1) MODE3(C2K_UART0_RXD) MODE4(C2K_TMS) MODE5(ANT_SEL6) MODE6() MODE7(DM_OTMS) PD SMT_GROUP(42) +GPIO199 = MODE0(GPIO199) MODE1(MSDC2_CLK) MODE2(SCL1) MODE3(C2K_UART0_TXD) MODE4(C2K_TCK) MODE5(ANT_SEL7) MODE6(TDD_TXD) MODE7(DM_OTCK) PD SMT_GROUP(43) +GPIO200 = MODE0(GPIO200) MODE1(MSDC2_DAT0) MODE2(ANT_SEL6) MODE3(GPS_FRAME_SYNC) MODE4(C2K_TDI) MODE5(UTXD0) MODE6() MODE7(DM_OTDI) PD SMT_GROUP(44) +GPIO201 = MODE0(GPIO201) MODE1(MSDC2_DAT1) MODE2(ANT_SEL3) MODE3(PWM0) MODE4(C2K_TDO) MODE5(URXD0) MODE6() MODE7(DM_OTDO) PD SMT_GROUP(44) +GPIO202 = MODE0(GPIO202) MODE1(MSDC2_DAT2) MODE2(ANT_SEL4) MODE3(SDA2) MODE4(C2K_NTRST) MODE5(UTXD1) MODE6(KCOL3) MODE7(DM_JTINTP) PD SMT_GROUP(44) +GPIO203 = MODE0(GPIO203) MODE1(MSDC2_DAT3) MODE2(ANT_SEL5) MODE3(SCL2) MODE4(C2K_RTCK) MODE5(URXD1) MODE6(KCOL6) MODE7() PD SMT_GROUP(44) + +[GPO] + +[EINT] +EINT_COUNT = 213 +EINT_DEBOUNCE_TIME_COUNT = 12 + +[WAKE_UP_SRC] +ACCDET +MSDC1_INS +MSDC2_INS +CHR_STAT +IRQ_NFC +COMBO_BGF +WIFI +TOUCH_PANEL +ALS +MHL +EXT_BUCK_OC + +[EINT_MD1] +EINT_MD1_COUNT = 4 + +[ADC] +ADC_COUNT = 6 + +[ADC_EX_PIN] +0 +1 +12 +13 +14 +15 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 6 +KEY_DESIGN_NOTICES = "Please notice that the circuit design are different between single and double keypad, and DO NOT add 1K ohm resistor on double keypad" + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 4 + +[CLK_BUF] +CLK_BUF_COUNT = 4 + +[POWER] +DVDD28_SIM1 +DVDD28_SIM2 +DVDD28_MC1 +DVDD28_MC2 + +[DVDD28_SIM1] +VIO18 +VIO28 + +[DVDD28_SIM2] +VIO18 +VIO28 + +[DVDD28_MC1] +VIO18 +VIO28 + +[DVDD28_MC2] +VIO18 +VIO28 + +[MSDC_POWER_MC1] +MSDC_VIO18_MC1 +MSDC_VIO28_MC1 +MSDC_VMC + + +[SRC_PIN] +PAD_ANT_SEL1 +PAD_ANT_SEL2 +PAD_CMDAT1 +PAD_EINT1 +PAD_EINT2 +PAD_EINT3 +PAD_EINT8 +PAD_EINT9 +PAD_EINT10 +PAD_EINT11 +PAD_EINT12 +PAD_SCL3 +PAD_SDA3 + +[SRC_PIN_INDEX] +2 +1 +0 +0 +0 +0 +1 +2 +0 +1 +2 +1 +2 + diff --git a/tools/dct/MT6735M.fig b/tools/dct/MT6735M.fig new file mode 100755 index 000000000..bdcf66e27 --- /dev/null +++ b/tools/dct/MT6735M.fig @@ -0,0 +1,327 @@ +[Chip Type] +Chip = MT6735 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +PMIC_ON_OFF_CONFIG = 1 +GPIO_ModeNum = 8 +EINT_MD1_Config = 1 +EINT_MD1_SRC_PIN = 1 +POWER_Config = 1 +POWER_COUNT = 4 +SpecialKey_Config = 1 +I2C_Config = 1 +CLOCK_BUFFER_CONFIG = 1 +Extend_Key_Config=1 +Reset_Key_Config = 1 +PMIC_APP_Ver = 2 +PMIC_APP_COUNT = 6 +MD1_EINT_SRC_PIN_CFG = 1 +AndroidPhone = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(IDDIG) MODE2(DPI_D4) MODE3(CLKM4) MODE4(EXT_FRAME_SYNC) MODE5(PWM3) MODE6(KCOL2) MODE7(C2K_ARM_EINT0) PD SMT_GROUP(1) +GPIO1 = MODE0(GPIO1) MODE1(PWM2) MODE2(DPI_D5) MODE3(MD_EINT0) MODE4(TDD_TDO) MODE5(CONN_MCU_TDO) MODE6(PTA_RXD) MODE7(C2K_ARM_EINT1) PD SMT_GROUP(1) +GPIO2 = MODE0(GPIO2) MODE1(CLKM0) MODE2(DPI_D6) MODE3(MD_EINT0) MODE4(USB_DRVVBUS) MODE5(CONN_MCU_DBGACK_N) MODE6(PTA_TXD) MODE7(C2K_ARM_EINT2) PD SMT_GROUP(1) +GPIO3 = MODE0(GPIO3) MODE1(CLKM1) MODE2(DPI_D7) MODE3(SPI_MIB) MODE4(MD_EINT0) MODE5(CONN_MCU_DBGI_N) MODE6(CONN_MCU_AICE_TMSC) MODE7(C2K_ARM_EINT3) PD SMT_GROUP(1) +GPIO4 = MODE0(GPIO4) MODE1(CLKM2) MODE2(DPI_D8) MODE3(SPI_MOB) MODE4(TDD_TCK) MODE5(CONN_MCU_TCK[0]) MODE6(CONN_MCU_AICE_TCKC) MODE7(C2K_DM_EINT0) PD SMT_GROUP(1) +GPIO5 = MODE0(GPIO5) MODE1(UCTS2) MODE2(DPI_D9) MODE3(SPI_CSB) MODE4(TDD_TDI) MODE5(CONN_MCU_TDI) MODE6(I2S1_DO) MODE7(MD_URXD) PD SMT_GROUP(2) +GPIO6 = MODE0(GPIO6) MODE1(URTS2) MODE2(DPI_D10) MODE3(SPI_CKB) MODE4(TDD_TRSTN) MODE5(CONN_MCU_TRST_B) MODE6(I2S1_LRCK) MODE7(MD_UTXD) PD SMT_GROUP(2) +GPIO7 = MODE0(GPIO7) MODE1(UCTS3) MODE2(DPI_D11) MODE3(SDA1) MODE4(TDD_TMS) MODE5(CONN_MCU_TMS) MODE6(I2S1_BCK) MODE7(TDD_TXD) PD SMT_GROUP(2) +GPIO8 = MODE0(GPIO8) MODE1(URTS3) MODE2(C2K_UIM0_HOT_PLUG_IN) MODE3(SCL1) MODE4(PCM1_DO1) MODE5(MD_EINT1) MODE6(KCOL4) MODE7(UTXD0) PD SMT_GROUP(2) +GPIO9 = MODE0(GPIO9) MODE1(C2K_UIM1_HOT_PLUG_IN) MODE2(PCM1_DO0) MODE3(I2S3_MCK) MODE4(MD_EINT2) MODE5(CLKM2) MODE6(I2S1_MCK) MODE7(DBG_MON_A29) PD SMT_GROUP(3) +GPIO10 = MODE0(GPIO10) MODE1(PWM1) MODE2(CLKM1) MODE3(KROW2) MODE4(MD_EINT0) MODE5(I2S1_MCK) MODE6(SDA3) MODE7(DBG_MON_A30) PD SMT_GROUP(3) +GPIO11 = MODE0(GPIO11) MODE1(MD_EINT1) MODE2(IRTX_OUT) MODE3(C2K_UIM0_HOT_PLUG_IN) MODE4(CLKM0) MODE5(I2S2_MCK) MODE6(SCL3) MODE7(URXD0) PD SMT_GROUP(3) +GPIO12 = MODE0(GPIO12) MODE1(I2S0_MCK) MODE2(C2K_UIM1_HOT_PLUG_IN) MODE3(KCOL2) MODE4(MD_EINT2) MODE5(IRTX_OUT) MODE6(SRCLKENAI2) MODE7(PCM1_DO1) PD SMT_GROUP(3) +GPIO13 = MODE0(GPIO13) MODE1(WB_CTRL0) MODE2() MODE3(C2K_ARM_EINT0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) PD SMT_GROUP(4) +GPIO14 = MODE0(GPIO14) MODE1(WB_CTRL1) MODE2() MODE3(C2K_ARM_EINT1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) PD SMT_GROUP(4) +GPIO15 = MODE0(GPIO15) MODE1(WB_CTRL2) MODE2() MODE3(C2K_ARM_EINT2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) PD SMT_GROUP(4) +GPIO16 = MODE0(GPIO16) MODE1(WB_CTRL3) MODE2() MODE3(C2K_ARM_EINT3) MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) PD SMT_GROUP(4) +GPIO17 = MODE0(GPIO17) MODE1(WB_CTRL4) MODE2() MODE3(C2K_DM_EINT0) MODE4(WATCHDOG) MODE5() MODE6() MODE7(DBG_MON_A4) PD SMT_GROUP(4) +GPIO18 = MODE0(GPIO18) MODE1(WB_CTRL5) MODE2() MODE3(C2K_DM_EINT1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) PD SMT_GROUP(4) +GPIO19 = MODE0(GPIO19) MODE1(ANT_SEL0) MODE2(IRTX_OUT) MODE3(IRDA_TX) MODE4(C2K_UART0_TXD) MODE5(GPS_FRAME_SYNC) MODE6(LTE_UTXD) MODE7(DBG_MON_A6) PD SMT_GROUP(5) +GPIO20 = MODE0(GPIO20) MODE1(ANT_SEL1) MODE2(C2K_UIM1_HOT_PLUG_IN) MODE3(IRDA_RX) MODE4(C2K_UART0_RXD) MODE5(MD_EINT2) MODE6(LTE_URXD) MODE7(DBG_MON_A7) PD SMT_GROUP(5) +GPIO21 = MODE0(GPIO21) MODE1(ANT_SEL2) MODE2(PWM2) MODE3(IRDA_PDN) MODE4(CORESONIC_SWCK) MODE5(MD_EINT1) MODE6(C2K_UIM0_HOT_PLUG_IN) MODE7(DBG_MON_A8) PD SMT_GROUP(5) +GPIO22 = MODE0(GPIO22) MODE1(RDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO23 = MODE0(GPIO23) MODE1(RDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO24 = MODE0(GPIO24) MODE1(RDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO25 = MODE0(GPIO25) MODE1(RDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO26 = MODE0(GPIO26) MODE1(RCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO27 = MODE0(GPIO27) MODE1(RCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO28 = MODE0(GPIO28) MODE1(RDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO29 = MODE0(GPIO29) MODE1(RDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO30 = MODE0(GPIO30) MODE1(RDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO31 = MODE0(GPIO31) MODE1(RDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO32 = MODE0(GPIO32) MODE1(RDN0_A) MODE2(CMHSYNC) MODE3(CMCSD0) MODE4() MODE5() MODE6() MODE7() -- +GPIO33 = MODE0(GPIO33) MODE1(RDP0_A) MODE2(CMVSYNC) MODE3(CMCSD1) MODE4() MODE5() MODE6() MODE7() -- +GPIO34 = MODE0(GPIO34) MODE1(RDN1_A) MODE2(CMDAT9) MODE3(CMCSD2) MODE4() MODE5() MODE6() MODE7() -- +GPIO35 = MODE0(GPIO35) MODE1(RDP1_A) MODE2(CMDAT8) MODE3(CMCSD3) MODE4() MODE5() MODE6() MODE7() -- +GPIO36 = MODE0(GPIO36) MODE1(RCN_A) MODE2(CMDAT7) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO37 = MODE0(GPIO37) MODE1(RCP_A) MODE2(CMDAT6) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO38 = MODE0(GPIO38) MODE1(RDN2_A) MODE2(CMDAT5) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO39 = MODE0(GPIO39) MODE1(RDP2_A) MODE2(CMDAT4) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO40 = MODE0(GPIO40) MODE1(RDN3_A) MODE2(CMDAT3) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO41 = MODE0(GPIO41) MODE1(RDP3_A) MODE2(CMDAT2) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO42 = MODE0(GPIO42) MODE1(CMDAT0) MODE2(CMCSD0) MODE3(CMMCLK1) MODE4() MODE5(ANT_SEL5) MODE6(CLKM5) MODE7(DBG_MON_A9) PD SMT_GROUP(6) +GPIO43 = MODE0(GPIO43) MODE1(CMDAT1) MODE2(CMCSD1) MODE3(CMFLASH) MODE4(MD_EINT0) MODE5(CMMCLK1) MODE6(CLKM4) MODE7(DBG_MON_A10) PD SMT_GROUP(6) +GPIO44 = MODE0(GPIO44) MODE1(CMPCLK) MODE2(CMCSK) MODE3(CMCSD2) MODE4(KCOL3) MODE5(SRCLKENAI2) MODE6(PWM0) MODE7(DBG_MON_A11) PD SMT_GROUP(6) +GPIO45 = MODE0(GPIO45) MODE1(CMMCLK0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A12) PD SMT_GROUP(7) +GPIO46 = MODE0(GPIO46) MODE1(CMMCLK1) MODE2(IDDIG) MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(DM_JTINTP) MODE6(KCOL6) MODE7(DBG_MON_A13) PD SMT_GROUP(7) +GPIO47 = MODE0(GPIO47) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(8) +GPIO48 = MODE0(GPIO48) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(8) +GPIO49 = MODE0(GPIO49) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(9) +GPIO50 = MODE0(GPIO50) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(9) +GPIO51 = MODE0(GPIO51) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(10) +GPIO52 = MODE0(GPIO52) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(10) +GPIO53 = MODE0(GPIO53) MODE1(SDA3) MODE2() MODE3(IDDIG) MODE4() MODE5(MD_EINT2) MODE6(C2K_UIM1_HOT_PLUG_IN) MODE7() PU SMT_GROUP(11) +GPIO54 = MODE0(GPIO54) MODE1(SCL3) MODE2() MODE3(IDDIG) MODE4() MODE5(MD_EINT1) MODE6(C2K_UIM0_HOT_PLUG_IN) MODE7() PU SMT_GROUP(11) +GPIO55 = MODE0(GPIO55) MODE1(SRCLKENAI0) MODE2(PWM2) MODE3(CLKM5) MODE4(CORESONIC_SWD) MODE5(ANT_SEL6) MODE6(KROW5) MODE7(DISP_PWM) PD SMT_GROUP(12) +GPIO56 = MODE0(GPIO56) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(13) +GPIO57 = MODE0(GPIO57) MODE1(URXD2) MODE2(DPI_HSYNC0) MODE3(UTXD2) MODE4(MD_URXD) MODE5(SRCLKENAI1) MODE6(KROW4) MODE7(DBG_MON_A14) PD SMT_GROUP(14) +GPIO58 = MODE0(GPIO58) MODE1(UTXD2) MODE2(DPI_VSYNC0) MODE3(URXD2) MODE4(MD_UTXD) MODE5(TDD_TXD) MODE6(KROW5) MODE7(DBG_MON_A15) PD SMT_GROUP(14) +GPIO59 = MODE0(GPIO59) MODE1(URXD3) MODE2(DPI_CK0) MODE3(UTXD3) MODE4(UCTS2) MODE5(PWM3) MODE6(KROW6) MODE7(DBG_MON_A16) PD SMT_GROUP(14) +GPIO60 = MODE0(GPIO60) MODE1(UTXD3) MODE2(DPI_DE0) MODE3(URXD3) MODE4(URTS2) MODE5(PWM4) MODE6(KROW7) MODE7(DBG_MON_A17) PD SMT_GROUP(14) +GPIO61 = MODE0(GPIO61) MODE1(PCM1_CLK[0]) MODE2(DPI_D0) MODE3(I2S0_BCK) MODE4(KROW4) MODE5(ANT_SEL3) MODE6(IRTX_OUT) MODE7(DBG_MON_A18) PD SMT_GROUP(15) +GPIO62 = MODE0(GPIO62) MODE1(PCM1_SYNC) MODE2(DPI_D1) MODE3(I2S0_LRCK) MODE4(KCOL7) MODE5(CLKM3) MODE6(CMFLASH) MODE7(DBG_MON_A19) PD SMT_GROUP(15) +GPIO63 = MODE0(GPIO63) MODE1(PCM1_DI) MODE2(DPI_D2) MODE3(I2S0_DI) MODE4(PCM1_DO0) MODE5(CLKM5) MODE6(KROW3) MODE7(DBG_MON_A20) PD SMT_GROUP(15) +GPIO64 = MODE0(GPIO64) MODE1(PCM1_DO0) MODE2(DPI_D3) MODE3(I2S0_MCK) MODE4(PCM1_DI) MODE5(SRCLKENAI2) MODE6(KCOL5) MODE7(DBG_MON_A21) PD SMT_GROUP(15) +GPIO65 = MODE0(GPIO65) MODE1(SPI_CSA) MODE2(EXT_FRAME_SYNC) MODE3(I2S3_MCK) MODE4(KROW2) MODE5(GPS_FRAME_SYNC) MODE6(PTA_RXD) MODE7(DBG_MON_A22) PD SMT_GROUP(16) +GPIO66 = MODE0(GPIO66) MODE1(SPI_CKA) MODE2(USB_DRVVBUS) MODE3(I2S3_BCK) MODE4(KCOL2) MODE5() MODE6(PTA_TXD) MODE7(DBG_MON_A23) PD SMT_GROUP(16) +GPIO67 = MODE0(GPIO67) MODE1(SPI_MIA) MODE2(SPI_MOA) MODE3(I2S3_DO) MODE4(PTA_RXD) MODE5(IDDIG) MODE6(UCTS1) MODE7(DBG_MON_A24) PD SMT_GROUP(16) +GPIO68 = MODE0(GPIO68) MODE1(SPI_MOA) MODE2(SPI_MIA) MODE3(I2S3_LRCK) MODE4(PTA_TXD) MODE5(ANT_SEL4) MODE6(URTS1) MODE7(DBG_MON_A25) PD SMT_GROUP(16) +GPIO69 = MODE0(GPIO69) MODE1(DISP_PWM) MODE2(PWM1) MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(ANT_SEL7) MODE6(DM_JTINTP) MODE7() PD SMT_GROUP(17) +GPIO70 = MODE0(GPIO70) MODE1(JTMS) MODE2(CONN_MCU_TMS) MODE3(LTE_MD32_JTAG_TMS) MODE4(TDD_TMS) MODE5(CORESONIC_SWD) MODE6(DM_OTMS) MODE7(DFD_TMS) PU SMT_GROUP(18) +GPIO71 = MODE0(GPIO71) MODE1(JTCK) MODE2(CONN_MCU_TCK[1]) MODE3(LTE_MD32_JTAG_TCK) MODE4(TDD_TCK) MODE5(CORESONIC_SWCK) MODE6(DM_OTCK) MODE7(DFD_TCK_XI) PU SMT_GROUP(18) +GPIO72 = MODE0(GPIO72) MODE1(JTDI) MODE2(CONN_MCU_TDI) MODE3(LTE_MD32_JTAG_TDI) MODE4(TDD_TDI) MODE5() MODE6(DM_OTDI) MODE7(DFD_TDI) PU SMT_GROUP(18) +GPIO73 = MODE0(GPIO73) MODE1(JTDO) MODE2(CONN_MCU_TDO) MODE3(LTE_MD32_JTAG_TDO) MODE4(TDD_TDO) MODE5() MODE6(DM_OTDO) MODE7(DFD_TDO) PU SMT_GROUP(18) +GPIO74 = MODE0(GPIO74) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD) MODE4(SDA3) MODE5(C2K_UART0_RXD) MODE6(LTE_URXD) MODE7(AUXIF_ST) PU SMT_GROUP(19) +GPIO75 = MODE0(GPIO75) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5(C2K_UART0_TXD) MODE6(LTE_UTXD) MODE7() PU SMT_GROUP(19) +GPIO76 = MODE0(GPIO76) MODE1(URXD1) MODE2(UTXD1) MODE3(MD_URXD) MODE4(SCL3) MODE5(LTE_URXD) MODE6(C2K_UART0_RXD) MODE7(AUXIF_CLK) PD SMT_GROUP(19) +GPIO77 = MODE0(GPIO77) MODE1(UTXD1) MODE2(URXD1) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5(LTE_UTXD) MODE6(C2K_UART0_TXD) MODE7() PD SMT_GROUP(19) +GPIO78 = MODE0(GPIO78) MODE1(I2S0_DI) MODE2(PCM1_DI) MODE3(I2S3_DO) MODE4(I2S1_DO) MODE5(PWM0) MODE6(I2S2_DI) MODE7(DBG_MON_A26) PD SMT_GROUP(20) +GPIO79 = MODE0(GPIO79) MODE1(I2S0_LRCK) MODE2(PCM1_SYNC) MODE3(I2S3_LRCK) MODE4(I2S1_LRCK) MODE5(PWM3) MODE6(I2S2_LRCK) MODE7(DBG_MON_A27) PD SMT_GROUP(20) +GPIO80 = MODE0(GPIO80) MODE1(I2S0_BCK) MODE2(PCM1_CLK[1]) MODE3(I2S3_BCK) MODE4(I2S1_BCK) MODE5(PWM4) MODE6(I2S2_BCK) MODE7(DBG_MON_A28) PD SMT_GROUP(20) +GPIO81 = MODE0(GPIO81) MODE1(KROW0) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(CORESONIC_SWCK) MODE5(C2K_TCK) MODE6() MODE7(C2K_DM_EINT1) PD SMT_GROUP(21) +GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3(CONN_MCU_TRST_B) MODE4(CORESONIC_SWD) MODE5(C2K_NTRST) MODE6(USB_DRVVBUS) MODE7(C2K_DM_EINT2) PD SMT_GROUP(21) +GPIO83 = MODE0(GPIO83) MODE1(KROW2) MODE2(USB_DRVVBUS) MODE3() MODE4() MODE5(C2K_TDI) MODE6() MODE7(C2K_DM_EINT3) PD SMT_GROUP(21) +GPIO84 = MODE0(GPIO84) MODE1(KCOL0) MODE2(URTS0) MODE3(CONN_MCU_DBGACK_N) MODE4(SCL2) MODE5(C2K_TDO) MODE6(AUXIF_CLK) MODE7() PU SMT_GROUP(21) +GPIO85 = MODE0(GPIO85) MODE1(KCOL1) MODE2(UCTS0) MODE3(UCTS1) MODE4(SDA2) MODE5(C2K_TMS) MODE6(AUXIF_ST) MODE7(DBG_MON_A31) PD SMT_GROUP(21) +GPIO86 = MODE0(GPIO86) MODE1(KCOL2) MODE2() MODE3(URTS1) MODE4() MODE5(C2K_RTCK) MODE6() MODE7(DBG_MON_A32) PD SMT_GROUP(21) +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS5) MODE2(LTE_C2K_BPI_BUS5) MODE3() MODE4() MODE5(C2K_BPI_BUS5) MODE6() MODE7(DBG_MON_B0) PD SMT_GROUP(22) +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS6) MODE2(LTE_C2K_BPI_BUS6) MODE3() MODE4() MODE5(C2K_BPI_BUS6) MODE6() MODE7(DBG_MON_B1) PD SMT_GROUP(22) +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS7) MODE2(LTE_C2K_BPI_BUS7) MODE3(CLKM0) MODE4() MODE5(C2K_BPI_BUS7) MODE6() MODE7(DBG_MON_B2) PD SMT_GROUP(22) +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS8) MODE2(LTE_C2K_BPI_BUS8) MODE3(CLKM1) MODE4() MODE5(C2K_BPI_BUS8) MODE6() MODE7(DBG_MON_B3) PD SMT_GROUP(22) +GPIO91 = MODE0(GPIO91) MODE1(BPI_BUS9) MODE2(LTE_C2K_BPI_BUS9) MODE3(CLKM2) MODE4() MODE5(C2K_BPI_BUS9) MODE6() MODE7(DBG_MON_B4) PD SMT_GROUP(22) +GPIO92 = MODE0(GPIO92) MODE1(BPI_BUS10) MODE2(LTE_C2K_BPI_BUS10) MODE3(CLKM3) MODE4() MODE5(C2K_BPI_BUS10) MODE6() MODE7(DBG_MON_B5) PD SMT_GROUP(22) +GPIO93 = MODE0(GPIO93) MODE1(BPI_BUS11) MODE2(LTE_C2K_BPI_BUS11) MODE3() MODE4() MODE5(C2K_BPI_BUS11) MODE6() MODE7(DBG_MON_B6) PD SMT_GROUP(22) +GPIO94 = MODE0(GPIO94) MODE1(BPI_BUS12) MODE2(LTE_C2K_BPI_BUS12) MODE3() MODE4() MODE5(C2K_BPI_BUS12) MODE6() MODE7(DBG_MON_B7) PD SMT_GROUP(22) +GPIO95 = MODE0(GPIO95) MODE1(BPI_BUS13) MODE2(LTE_C2K_BPI_BUS13) MODE3() MODE4() MODE5(C2K_BPI_BUS13) MODE6() MODE7(DBG_MON_B8) PD SMT_GROUP(22) +GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS14) MODE2(LTE_C2K_BPI_BUS14) MODE3() MODE4() MODE5(C2K_BPI_BUS14) MODE6() MODE7(DBG_MON_B9) PD SMT_GROUP(22) +GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS15) MODE2(LTE_C2K_BPI_BUS15) MODE3() MODE4() MODE5(C2K_BPI_BUS15) MODE6() MODE7(DBG_MON_B10) PD SMT_GROUP(22) +GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS16) MODE2(LTE_C2K_BPI_BUS16) MODE3() MODE4() MODE5(C2K_BPI_BUS16) MODE6() MODE7(DBG_MON_B11) PD SMT_GROUP(22) +GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS17) MODE2(LTE_C2K_BPI_BUS17) MODE3() MODE4() MODE5(C2K_BPI_BUS17) MODE6() MODE7(DBG_MON_B12) PD SMT_GROUP(22) +GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS18) MODE2(LTE_C2K_BPI_BUS18) MODE3() MODE4() MODE5(C2K_BPI_BUS18) MODE6() MODE7(DBG_MON_B13) PD SMT_GROUP(22) +GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS19) MODE2(LTE_C2K_BPI_BUS19) MODE3() MODE4() MODE5(C2K_BPI_BUS19) MODE6() MODE7(DBG_MON_B14) PD SMT_GROUP(22) +GPIO102 = MODE0(GPIO102) MODE1(BPI_BUS20) MODE2(LTE_C2K_BPI_BUS20) MODE3() MODE4() MODE5(C2K_BPI_BUS20) MODE6() MODE7(DBG_MON_B15) PD SMT_GROUP(22) +GPIO103 = MODE0(GPIO103) MODE1(C2K_TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) PD SMT_GROUP(22) +GPIO104 = MODE0(GPIO104) MODE1(RFIC1_BSI_EN) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_EN) MODE6() MODE7(DBG_MON_B17) PD SMT_GROUP(23) +GPIO105 = MODE0(GPIO105) MODE1(RFIC1_BSI_CK) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_CLK) MODE6() MODE7(DBG_MON_B18) PD SMT_GROUP(23) +GPIO106 = MODE0(GPIO106) MODE1(RFIC1_BSI_D0) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_DATA) MODE6() MODE7(DBG_MON_B19) PD SMT_GROUP(23) +GPIO107 = MODE0(GPIO107) MODE1(RFIC1_BSI_D1) MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_EN) MODE6() MODE7(DBG_MON_B20) PD SMT_GROUP(23) +GPIO108 = MODE0(GPIO108) MODE1(RFIC1_BSI_D2) MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_CLK) MODE6() MODE7(DBG_MON_B21) PD SMT_GROUP(23) +GPIO109 = MODE0(GPIO109) MODE1() MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_DATA) MODE6() MODE7(DBG_MON_B22) PD SMT_GROUP(23) +GPIO110 = MODE0(GPIO110) MODE1(RFIC0_BSI_EN) MODE2() MODE3() MODE4(SPM_BSI_EN) MODE5() MODE6() MODE7(DBG_MON_B23) PD SMT_GROUP(23) +GPIO111 = MODE0(GPIO111) MODE1(RFIC0_BSI_CK) MODE2() MODE3() MODE4(SPM_BSI_CLK) MODE5() MODE6() MODE7(DBG_MON_B24) PD SMT_GROUP(23) +GPIO112 = MODE0(GPIO112) MODE1(RFIC0_BSI_D2) MODE2() MODE3() MODE4(SPM_BSI_D2) MODE5() MODE6() MODE7(DBG_MON_B25) PD SMT_GROUP(23) +GPIO113 = MODE0(GPIO113) MODE1(RFIC0_BSI_D1) MODE2() MODE3() MODE4(SPM_BSI_D1) MODE5() MODE6() MODE7(DBG_MON_B26) PD SMT_GROUP(23) +GPIO114 = MODE0(GPIO114) MODE1(RFIC0_BSI_D0) MODE2() MODE3() MODE4(SPM_BSI_D0) MODE5() MODE6() MODE7(DBG_MON_B27) PD SMT_GROUP(23) +GPIO115 = MODE0(GPIO115) MODE1(AUXIN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO116 = MODE0(GPIO116) MODE1(AUXIN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO117 = MODE0(GPIO117) MODE1(AUXIN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO118 = MODE0(GPIO118) MODE1(TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO119 = MODE0(GPIO119) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B28) PD SMT_GROUP(24) +GPIO120 = MODE0(GPIO120) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B29) PD SMT_GROUP(24) +GPIO121 = MODE0(GPIO121) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B30) PD SMT_GROUP(24) +GPIO122 = MODE0(GPIO122) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) PD SMT_GROUP(24) +GPIO123 = MODE0(GPIO123) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B32) PD SMT_GROUP(24) +GPIO124 = MODE0(GPIO124) MODE1(BPI_BUS21) MODE2() MODE3() MODE4() MODE5(DPI_HSYNC1) MODE6(KCOL2) MODE7(TDD_TXD) PD SMT_GROUP(24) +GPIO125 = MODE0(GPIO125) MODE1(BPI_BUS22) MODE2() MODE3() MODE4() MODE5(DPI_VSYNC1) MODE6(KROW2) MODE7(MD_URXD) PD SMT_GROUP(24) +GPIO126 = MODE0(GPIO126) MODE1(BPI_BUS23) MODE2() MODE3() MODE4() MODE5(DPI_CK1) MODE6(I2S2_MCK) MODE7(MD_UTXD) PD SMT_GROUP(24) +GPIO127 = MODE0(GPIO127) MODE1(BPI_BUS24) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(EXT_FRAME_SYNC) MODE5(DPI_DE1) MODE6(SRCLKENAI1) MODE7(URXD0) PD SMT_GROUP(24) +GPIO128 = MODE0(GPIO128) MODE1(BPI_BUS25) MODE2(SDA3) MODE3(GPS_FRAME_SYNC) MODE4() MODE5(I2S2_DI) MODE6(PTA_RXD) MODE7(UTXD0) PD SMT_GROUP(24) +GPIO129 = MODE0(GPIO129) MODE1(BPI_BUS26) MODE2(DISP_PWM) MODE3(SCL3) MODE4() MODE5(I2S2_LRCK) MODE6(PTA_TXD) MODE7(LTE_URXD) PD SMT_GROUP(24) +GPIO130 = MODE0(GPIO130) MODE1(BPI_BUS27) MODE2() MODE3() MODE4() MODE5(I2S2_BCK) MODE6(IRTX_OUT) MODE7(LTE_UTXD) PD SMT_GROUP(24) +GPIO131 = MODE0(GPIO131) MODE1(LTE_PAVM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO132 = MODE0(GPIO132) MODE1(LTE_PAVM1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO133 = MODE0(GPIO133) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO134 = MODE0(GPIO134) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO135 = MODE0(GPIO135) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO136 = MODE0(GPIO136) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO137 = MODE0(GPIO137) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(25) +GPIO138 = MODE0(GPIO138) MODE1(PWRAP_SPIDO) MODE2(PWRAP_SPIDI) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO139 = MODE0(GPIO139) MODE1(PWRAP_SPIDI) MODE2(PWRAP_SPIDO) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO140 = MODE0(GPIO140) MODE1() MODE2() MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(DM_JTINTP) MODE6() MODE7() PD SMT_GROUP(26) +GPIO141 = MODE0(GPIO141) MODE1(PWRAP_SPICK_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO142 = MODE0(GPIO142) MODE1(PWRAP_SPICS_B_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(26) +GPIO143 = MODE0(GPIO143) MODE1(AUD_CLK_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO144 = MODE0(GPIO144) MODE1(AUD_DAT_MISO) MODE2() MODE3(AUD_DAT_MOSI) MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO145 = MODE0(GPIO145) MODE1(AUD_DAT_MOSI) MODE2() MODE3(AUD_DAT_MISO) MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO146 = MODE0(GPIO146) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(28) +GPIO147 = MODE0(GPIO147) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(28) +GPIO148 = MODE0(GPIO148) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(29) +GPIO149 = MODE0(GPIO149) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(25) +GPIO150 = MODE0(GPIO150) MODE1(TDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO151 = MODE0(GPIO151) MODE1(TDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO152 = MODE0(GPIO152) MODE1(TDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO153 = MODE0(GPIO153) MODE1(TDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO154 = MODE0(GPIO154) MODE1(TCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO155 = MODE0(GPIO155) MODE1(TCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO156 = MODE0(GPIO156) MODE1(TDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO157 = MODE0(GPIO157) MODE1(TDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO158 = MODE0(GPIO158) MODE1(TDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO159 = MODE0(GPIO159) MODE1(TDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO160 = MODE0(GPIO160) MODE1(MD_SIM2_SCLK) MODE2(MD_SIM1_SCLK) MODE3(UIM0_CLK) MODE4(UIM1_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO161 = MODE0(GPIO161) MODE1(MD_SIM2_SRST) MODE2(MD_SIM1_SRST) MODE3(UIM0_RST) MODE4(UIM1_RST) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO162 = MODE0(GPIO162) MODE1(MD_SIM2_SDAT) MODE2(MD_SIM1_SDAT) MODE3(UIM0_IO) MODE4(UIM1_IO) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO163 = MODE0(GPIO163) MODE1(MD_SIM1_SCLK) MODE2(MD_SIM2_SCLK) MODE3(UIM1_CLK) MODE4(UIM0_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO164 = MODE0(GPIO164) MODE1(MD_SIM1_SRST) MODE2(MD_SIM2_SRST) MODE3(UIM1_RST) MODE4(UIM0_RST) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO165 = MODE0(GPIO165) MODE1(MD_SIM1_SDAT) MODE2(MD_SIM2_SDAT) MODE3(UIM1_IO) MODE4(UIM0_IO) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO166 = MODE0(GPIO166) MODE1(MSDC1_CMD) MODE2(LTE_MD32_JTAG_TMS) MODE3(C2K_TMS) MODE4(TDD_TMS) MODE5(CONN_DSP_JMS) MODE6(JTMS) MODE7(CONN_MCU_AICE_TMSC) PU SMT_GROUP(32) +GPIO167 = MODE0(GPIO167) MODE1(MSDC1_CLK) MODE2(LTE_MD32_JTAG_TCK) MODE3(C2K_TCK) MODE4(TDD_TCK) MODE5(CONN_DSP_JCK) MODE6(JTCK) MODE7(CONN_MCU_AICE_TCKC) PD SMT_GROUP(33) +GPIO168 = MODE0(GPIO168) MODE1(MSDC1_DAT0) MODE2(LTE_MD32_JTAG_TDI) MODE3(C2K_TDI) MODE4(TDD_TDI) MODE5(CONN_DSP_JDI) MODE6(JTDI) MODE7() PU SMT_GROUP(34) +GPIO169 = MODE0(GPIO169) MODE1(MSDC1_DAT1) MODE2(LTE_MD32_JTAG_TDO) MODE3(C2K_TDO) MODE4(TDD_TDO) MODE5(CONN_DSP_JDO) MODE6(JTDO) MODE7() PU SMT_GROUP(34) +GPIO170 = MODE0(GPIO170) MODE1(MSDC1_DAT2) MODE2(LTE_MD32_JTAG_TRST) MODE3(C2K_NTRST) MODE4(TDD_TRSTN) MODE5(CONN_DSP_JINTP) MODE6(DM_JTINTP) MODE7() PU SMT_GROUP(34) +GPIO171 = MODE0(GPIO171) MODE1(MSDC1_DAT3) MODE2() MODE3(C2K_RTCK) MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(34) +GPIO172 = MODE0(GPIO172) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(35) +GPIO173 = MODE0(GPIO173) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(36) +GPIO174 = MODE0(GPIO174) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(37) +GPIO175 = MODE0(GPIO175) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO176 = MODE0(GPIO176) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO177 = MODE0(GPIO177) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO179 = MODE0(GPIO179) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO180 = MODE0(GPIO180) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO181 = MODE0(GPIO181) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO182 = MODE0(GPIO182) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO183 = MODE0(GPIO183) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(39) +GPIO184 = MODE0(GPIO184) MODE1(F2W_DATA) MODE2(MRG_CLK) MODE3(C2K_DM_EINT2) MODE4(PCM0_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(40) +GPIO185 = MODE0(GPIO185) MODE1(F2W_CK) MODE2(MRG_DI) MODE3(C2K_DM_EINT3) MODE4(PCM0_DI) MODE5() MODE6() MODE7() PD SMT_GROUP(40) +GPIO186 = MODE0(GPIO186) MODE1(WB_RSTB) MODE2() MODE3() MODE4(URXD3) MODE5(UTXD3) MODE6() MODE7() PD SMT_GROUP(41) +GPIO187 = MODE0(GPIO187) MODE1(WB_SCLK) MODE2(MRG_DO) MODE3() MODE4(PCM0_DO) MODE5() MODE6() MODE7() PD SMT_GROUP(41) +GPIO188 = MODE0(GPIO188) MODE1(WB_SDATA) MODE2(MRG_SYNC) MODE3() MODE4(PCM0_SYNC) MODE5() MODE6() MODE7() PD SMT_GROUP(41) +GPIO189 = MODE0(GPIO189) MODE1(WB_SEN) MODE2() MODE3() MODE4(UTXD3) MODE5(URXD3) MODE6() MODE7() PD SMT_GROUP(41) +GPIO190 = MODE0(GPIO190) MODE1(GPS_RXQN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO191 = MODE0(GPIO191) MODE1(GPS_RXQP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO192 = MODE0(GPIO192) MODE1(GPS_RXIN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO193 = MODE0(GPIO193) MODE1(GPS_RXIP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO194 = MODE0(GPIO194) MODE1(WB_RXQN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO195 = MODE0(GPIO195) MODE1(WB_RXQP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO196 = MODE0(GPIO196) MODE1(WB_RXIN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO197 = MODE0(GPIO197) MODE1(WB_RXIP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- + +[GPO] + +[EINT] +EINT_COUNT = 213 +EINT_DEBOUNCE_TIME_COUNT = 12 + +[WAKE_UP_SRC] +ACCDET +MSDC1_INS +MSDC2_INS +CHR_STAT +IRQ_NFC +COMBO_BGF +WIFI +TOUCH_PANEL +ALS +MHL +EXT_BUCK_OC + +[EINT_MD1] +EINT_MD1_COUNT = 4 + +[ADC] +ADC_COUNT = 6 + +[ADC_EX_PIN] +0 +1 +12 +13 +14 +15 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 6 +KEY_DESIGN_NOTICES = "Please notice that the circuit design are different between single and double keypad, and DO NOT add 1K ohm resistor on double keypad" + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 4 + +[CLK_BUF] +CLK_BUF_COUNT = 4 + +[POWER] +DVDD28_SIM1 +DVDD28_SIM2 +DVDD28_MC1 +DVDD28_MC2 + +[DVDD28_SIM1] +VIO18 +VIO28 + +[DVDD28_SIM2] +VIO18 +VIO28 + +[DVDD28_MC1] +VIO18 +VIO28 + +[DVDD28_MC2] +VIO18 +VIO28 + +[MSDC_POWER_MC1] +MSDC_VIO18_MC1 +MSDC_VIO28_MC1 +MSDC_VMC + + +[SRC_PIN] +PAD_ANT_SEL1 +PAD_ANT_SEL2 +PAD_CMDAT1 +PAD_EINT1 +PAD_EINT2 +PAD_EINT3 +PAD_EINT8 +PAD_EINT9 +PAD_EINT10 +PAD_EINT11 +PAD_EINT12 +PAD_SCL3 +PAD_SDA3 + +[SRC_PIN_INDEX] +2 +1 +0 +0 +0 +0 +1 +2 +0 +1 +2 +1 +2 + diff --git a/tools/dct/MT6753.fig b/tools/dct/MT6753.fig new file mode 100755 index 000000000..f5d554ce8 --- /dev/null +++ b/tools/dct/MT6753.fig @@ -0,0 +1,333 @@ +[Chip Type] +Chip = MT6753 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +PMIC_ON_OFF_CONFIG = 1 +GPIO_ModeNum = 8 +EINT_MD1_Config = 1 +EINT_MD1_SRC_PIN = 1 +POWER_Config = 1 +POWER_COUNT = 4 +SpecialKey_Config = 1 +I2C_Config = 1 +CLOCK_BUFFER_CONFIG = 1 +Extend_Key_Config=1 +Reset_Key_Config = 1 +PMIC_APP_Ver = 2 +PMIC_APP_COUNT = 6 +MD1_EINT_SRC_PIN_CFG = 1 +AndroidPhone = 1 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(IDDIG) MODE2(DPI_D4) MODE3(CLKM4) MODE4(EXT_FRAME_SYNC) MODE5(PWM3) MODE6(KCOL2) MODE7(C2K_ARM_EINT0) PD SMT_GROUP(1) +GPIO1 = MODE0(GPIO1) MODE1(PWM2) MODE2(DPI_D5) MODE3(MD_EINT0) MODE4(TDD_TDO) MODE5(CONN_MCU_TDO) MODE6(PTA_RXD) MODE7(C2K_ARM_EINT1) PD SMT_GROUP(1) +GPIO2 = MODE0(GPIO2) MODE1(CLKM0) MODE2(DPI_D6) MODE3(MD_EINT0) MODE4(USB_DRVVBUS) MODE5(CONN_MCU_DBGACK_N) MODE6(PTA_TXD) MODE7(C2K_ARM_EINT2) PD SMT_GROUP(1) +GPIO3 = MODE0(GPIO3) MODE1(CLKM1) MODE2(DPI_D7) MODE3(SPI_MIB) MODE4(MD_EINT0) MODE5(CONN_MCU_DBGI_N) MODE6(CONN_MCU_AICE_TMSC) MODE7(C2K_ARM_EINT3) PD SMT_GROUP(1) +GPIO4 = MODE0(GPIO4) MODE1(CLKM2) MODE2(DPI_D8) MODE3(SPI_MOB) MODE4(TDD_TCK) MODE5(CONN_MCU_TCK[0]) MODE6(CONN_MCU_AICE_TCKC) MODE7(C2K_DM_EINT0) PD SMT_GROUP(1) +GPIO5 = MODE0(GPIO5) MODE1(UCTS2) MODE2(DPI_D9) MODE3(SPI_CSB) MODE4(TDD_TDI) MODE5(CONN_MCU_TDI) MODE6(I2S1_DO) MODE7(MD_URXD) PD SMT_GROUP(2) +GPIO6 = MODE0(GPIO6) MODE1(URTS2) MODE2(DPI_D10) MODE3(SPI_CKB) MODE4(TDD_TRSTN) MODE5(CONN_MCU_TRST_B) MODE6(I2S1_LRCK) MODE7(MD_UTXD) PD SMT_GROUP(2) +GPIO7 = MODE0(GPIO7) MODE1(UCTS3) MODE2(DPI_D11) MODE3(SDA1) MODE4(TDD_TMS) MODE5(CONN_MCU_TMS) MODE6(I2S1_BCK) MODE7(TDD_TXD) PD SMT_GROUP(2) +GPIO8 = MODE0(GPIO8) MODE1(URTS3) MODE2(C2K_UIM0_HOT_PLUG_IN) MODE3(SCL1) MODE4(PCM1_DO1) MODE5(MD_EINT1) MODE6(KCOL4) MODE7(UTXD0) PD SMT_GROUP(2) +GPIO9 = MODE0(GPIO9) MODE1(C2K_UIM1_HOT_PLUG_IN) MODE2(PCM1_DO0) MODE3(I2S3_MCK) MODE4(MD_EINT2) MODE5(CLKM2) MODE6(I2S1_MCK) MODE7(DBG_MON_A29) PD SMT_GROUP(3) +GPIO10 = MODE0(GPIO10) MODE1(PWM1) MODE2(CLKM1) MODE3(KROW2) MODE4(MD_EINT0) MODE5(I2S1_MCK) MODE6(SDA3) MODE7(DBG_MON_A30) PD SMT_GROUP(3) +GPIO11 = MODE0(GPIO11) MODE1(MD_EINT1) MODE2(IRTX_OUT) MODE3(C2K_UIM0_HOT_PLUG_IN) MODE4(CLKM0) MODE5(I2S2_MCK) MODE6(SCL3) MODE7(URXD0) PD SMT_GROUP(3) +GPIO12 = MODE0(GPIO12) MODE1(I2S0_MCK) MODE2(C2K_UIM1_HOT_PLUG_IN) MODE3(KCOL2) MODE4(MD_EINT2) MODE5(IRTX_OUT) MODE6(SRCLKENAI2) MODE7(PCM1_DO1) PD SMT_GROUP(3) +GPIO13 = MODE0(GPIO13) MODE1(WB_CTRL0) MODE2() MODE3(C2K_ARM_EINT0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A0) PD SMT_GROUP(4) +GPIO14 = MODE0(GPIO14) MODE1(WB_CTRL1) MODE2() MODE3(C2K_ARM_EINT1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A1) PD SMT_GROUP(4) +GPIO15 = MODE0(GPIO15) MODE1(WB_CTRL2) MODE2() MODE3(C2K_ARM_EINT2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A2) PD SMT_GROUP(4) +GPIO16 = MODE0(GPIO16) MODE1(WB_CTRL3) MODE2() MODE3(C2K_ARM_EINT3) MODE4() MODE5() MODE6() MODE7(DBG_MON_A3) PD SMT_GROUP(4) +GPIO17 = MODE0(GPIO17) MODE1(WB_CTRL4) MODE2() MODE3(C2K_DM_EINT0) MODE4(WATCHDOG) MODE5() MODE6() MODE7(DBG_MON_A4) PD SMT_GROUP(4) +GPIO18 = MODE0(GPIO18) MODE1(WB_CTRL5) MODE2() MODE3(C2K_DM_EINT1) MODE4() MODE5() MODE6() MODE7(DBG_MON_A5) PD SMT_GROUP(4) +GPIO19 = MODE0(GPIO19) MODE1(ANT_SEL0) MODE2(IRTX_OUT) MODE3(IRDA_TX) MODE4(C2K_UART0_TXD) MODE5(GPS_FRAME_SYNC) MODE6(LTE_UTXD) MODE7(DBG_MON_A6) PD SMT_GROUP(5) +GPIO20 = MODE0(GPIO20) MODE1(ANT_SEL1) MODE2(C2K_UIM1_HOT_PLUG_IN) MODE3(IRDA_RX) MODE4(C2K_UART0_RXD) MODE5(MD_EINT2) MODE6(LTE_URXD) MODE7(DBG_MON_A7) PD SMT_GROUP(5) +GPIO21 = MODE0(GPIO21) MODE1(ANT_SEL2) MODE2(PWM2) MODE3(IRDA_PDN) MODE4(CORESONIC_SWCK) MODE5(MD_EINT1) MODE6(C2K_UIM0_HOT_PLUG_IN) MODE7(DBG_MON_A8) PD SMT_GROUP(5) +GPIO22 = MODE0(GPIO22) MODE1(RDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO23 = MODE0(GPIO23) MODE1(RDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO24 = MODE0(GPIO24) MODE1(RDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO25 = MODE0(GPIO25) MODE1(RDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO26 = MODE0(GPIO26) MODE1(RCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO27 = MODE0(GPIO27) MODE1(RCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO28 = MODE0(GPIO28) MODE1(RDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO29 = MODE0(GPIO29) MODE1(RDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO30 = MODE0(GPIO30) MODE1(RDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO31 = MODE0(GPIO31) MODE1(RDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO32 = MODE0(GPIO32) MODE1(RDN0_A) MODE2(CMHSYNC) MODE3(CMCSD0) MODE4() MODE5() MODE6() MODE7() -- +GPIO33 = MODE0(GPIO33) MODE1(RDP0_A) MODE2(CMVSYNC) MODE3(CMCSD1) MODE4() MODE5() MODE6() MODE7() -- +GPIO34 = MODE0(GPIO34) MODE1(RDN1_A) MODE2(CMDAT9) MODE3(CMCSD2) MODE4() MODE5() MODE6() MODE7() -- +GPIO35 = MODE0(GPIO35) MODE1(RDP1_A) MODE2(CMDAT8) MODE3(CMCSD3) MODE4() MODE5() MODE6() MODE7() -- +GPIO36 = MODE0(GPIO36) MODE1(RCN_A) MODE2(CMDAT7) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO37 = MODE0(GPIO37) MODE1(RCP_A) MODE2(CMDAT6) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO38 = MODE0(GPIO38) MODE1(RDN2_A) MODE2(CMDAT5) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO39 = MODE0(GPIO39) MODE1(RDP2_A) MODE2(CMDAT4) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO40 = MODE0(GPIO40) MODE1(RDN3_A) MODE2(CMDAT3) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO41 = MODE0(GPIO41) MODE1(RDP3_A) MODE2(CMDAT2) MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO42 = MODE0(GPIO42) MODE1(CMDAT0) MODE2(CMCSD0) MODE3(CMMCLK1) MODE4() MODE5(ANT_SEL5) MODE6(CLKM5) MODE7(DBG_MON_A9) PD SMT_GROUP(6) +GPIO43 = MODE0(GPIO43) MODE1(CMDAT1) MODE2(CMCSD1) MODE3(CMFLASH) MODE4(MD_EINT0) MODE5(CMMCLK1) MODE6(CLKM4) MODE7(DBG_MON_A10) PD SMT_GROUP(6) +GPIO44 = MODE0(GPIO44) MODE1(CMPCLK) MODE2(CMCSK) MODE3(CMCSD2) MODE4(KCOL3) MODE5(SRCLKENAI2) MODE6(PWM0) MODE7(DBG_MON_A11) PD SMT_GROUP(6) +GPIO45 = MODE0(GPIO45) MODE1(CMMCLK0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A12) PD SMT_GROUP(7) +GPIO46 = MODE0(GPIO46) MODE1(CMMCLK1) MODE2(IDDIG) MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(DM_JTINTP) MODE6(KCOL6) MODE7(DBG_MON_A13) PD SMT_GROUP(7) +GPIO47 = MODE0(GPIO47) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(8) +GPIO48 = MODE0(GPIO48) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(8) +GPIO49 = MODE0(GPIO49) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(9) +GPIO50 = MODE0(GPIO50) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(9) +GPIO51 = MODE0(GPIO51) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(10) +GPIO52 = MODE0(GPIO52) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(10) +GPIO53 = MODE0(GPIO53) MODE1(SDA3) MODE2() MODE3(IDDIG) MODE4() MODE5(MD_EINT2) MODE6(C2K_UIM1_HOT_PLUG_IN) MODE7() PU SMT_GROUP(11) +GPIO54 = MODE0(GPIO54) MODE1(SCL3) MODE2() MODE3(IDDIG) MODE4() MODE5(MD_EINT1) MODE6(C2K_UIM0_HOT_PLUG_IN) MODE7() PU SMT_GROUP(11) +GPIO55 = MODE0(GPIO55) MODE1(SRCLKENAI0) MODE2(PWM2) MODE3(CLKM5) MODE4(CORESONIC_SWD) MODE5(ANT_SEL6) MODE6(KROW5) MODE7(DISP_PWM) PD SMT_GROUP(12) +GPIO56 = MODE0(GPIO56) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(13) +GPIO57 = MODE0(GPIO57) MODE1(URXD2) MODE2(DPI_HSYNC0) MODE3(UTXD2) MODE4(MD_URXD) MODE5(SRCLKENAI1) MODE6(KROW4) MODE7(DBG_MON_A14) PD SMT_GROUP(14) +GPIO58 = MODE0(GPIO58) MODE1(UTXD2) MODE2(DPI_VSYNC0) MODE3(URXD2) MODE4(MD_UTXD) MODE5(TDD_TXD) MODE6(KROW5) MODE7(DBG_MON_A15) PD SMT_GROUP(14) +GPIO59 = MODE0(GPIO59) MODE1(URXD3) MODE2(DPI_CK0) MODE3(UTXD3) MODE4(UCTS2) MODE5(PWM3) MODE6(KROW6) MODE7(DBG_MON_A16) PD SMT_GROUP(14) +GPIO60 = MODE0(GPIO60) MODE1(UTXD3) MODE2(DPI_DE0) MODE3(URXD3) MODE4(URTS2) MODE5(PWM4) MODE6(KROW7) MODE7(DBG_MON_A17) PD SMT_GROUP(14) +GPIO61 = MODE0(GPIO61) MODE1(PCM1_CLK[0]) MODE2(DPI_D0) MODE3(I2S0_BCK) MODE4(KROW4) MODE5(ANT_SEL3) MODE6(IRTX_OUT) MODE7(DBG_MON_A18) PD SMT_GROUP(15) +GPIO62 = MODE0(GPIO62) MODE1(PCM1_SYNC) MODE2(DPI_D1) MODE3(I2S0_LRCK) MODE4(KCOL7) MODE5(CLKM3) MODE6(CMFLASH) MODE7(DBG_MON_A19) PD SMT_GROUP(15) +GPIO63 = MODE0(GPIO63) MODE1(PCM1_DI) MODE2(DPI_D2) MODE3(I2S0_DI) MODE4(PCM1_DO0) MODE5(CLKM5) MODE6(KROW3) MODE7(DBG_MON_A20) PD SMT_GROUP(15) +GPIO64 = MODE0(GPIO64) MODE1(PCM1_DO0) MODE2(DPI_D3) MODE3(I2S0_MCK) MODE4(PCM1_DI) MODE5(SRCLKENAI2) MODE6(KCOL5) MODE7(DBG_MON_A21) PD SMT_GROUP(15) +GPIO65 = MODE0(GPIO65) MODE1(SPI_CSA) MODE2(EXT_FRAME_SYNC) MODE3(I2S3_MCK) MODE4(KROW2) MODE5(GPS_FRAME_SYNC) MODE6(PTA_RXD) MODE7(DBG_MON_A22) PD SMT_GROUP(16) +GPIO66 = MODE0(GPIO66) MODE1(SPI_CKA) MODE2(USB_DRVVBUS) MODE3(I2S3_BCK) MODE4(KCOL2) MODE5() MODE6(PTA_TXD) MODE7(DBG_MON_A23) PD SMT_GROUP(16) +GPIO67 = MODE0(GPIO67) MODE1(SPI_MIA) MODE2(SPI_MOA) MODE3(I2S3_DO) MODE4(PTA_RXD) MODE5(IDDIG) MODE6(UCTS1) MODE7(DBG_MON_A24) PD SMT_GROUP(16) +GPIO68 = MODE0(GPIO68) MODE1(SPI_MOA) MODE2(SPI_MIA) MODE3(I2S3_LRCK) MODE4(PTA_TXD) MODE5(ANT_SEL4) MODE6(URTS1) MODE7(DBG_MON_A25) PD SMT_GROUP(16) +GPIO69 = MODE0(GPIO69) MODE1(DISP_PWM) MODE2(PWM1) MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(ANT_SEL7) MODE6(DM_JTINTP) MODE7() PD SMT_GROUP(17) +GPIO70 = MODE0(GPIO70) MODE1(JTMS) MODE2(CONN_MCU_TMS) MODE3(LTE_MD32_JTAG_TMS) MODE4(TDD_TMS) MODE5(CORESONIC_SWD) MODE6(DM_OTMS) MODE7(DFD_TMS) PU SMT_GROUP(18) +GPIO71 = MODE0(GPIO71) MODE1(JTCK) MODE2(CONN_MCU_TCK[1]) MODE3(LTE_MD32_JTAG_TCK) MODE4(TDD_TCK) MODE5(CORESONIC_SWCK) MODE6(DM_OTCK) MODE7(DFD_TCK_XI) PU SMT_GROUP(18) +GPIO72 = MODE0(GPIO72) MODE1(JTDI) MODE2(CONN_MCU_TDI) MODE3(LTE_MD32_JTAG_TDI) MODE4(TDD_TDI) MODE5() MODE6(DM_OTDI) MODE7(DFD_TDI) PU SMT_GROUP(18) +GPIO73 = MODE0(GPIO73) MODE1(JTDO) MODE2(CONN_MCU_TDO) MODE3(LTE_MD32_JTAG_TDO) MODE4(TDD_TDO) MODE5() MODE6(DM_OTDO) MODE7(DFD_TDO) PU SMT_GROUP(18) +GPIO74 = MODE0(GPIO74) MODE1(URXD0) MODE2(UTXD0) MODE3(MD_URXD) MODE4(SDA3) MODE5(C2K_UART0_RXD) MODE6(LTE_URXD) MODE7(AUXIF_ST) PU SMT_GROUP(19) +GPIO75 = MODE0(GPIO75) MODE1(UTXD0) MODE2(URXD0) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5(C2K_UART0_TXD) MODE6(LTE_UTXD) MODE7() PU SMT_GROUP(19) +GPIO76 = MODE0(GPIO76) MODE1(URXD1) MODE2(UTXD1) MODE3(MD_URXD) MODE4(SCL3) MODE5(LTE_URXD) MODE6(C2K_UART0_RXD) MODE7(AUXIF_CLK) PD SMT_GROUP(19) +GPIO77 = MODE0(GPIO77) MODE1(UTXD1) MODE2(URXD1) MODE3(MD_UTXD) MODE4(TDD_TXD) MODE5(LTE_UTXD) MODE6(C2K_UART0_TXD) MODE7() PD SMT_GROUP(19) +GPIO78 = MODE0(GPIO78) MODE1(I2S0_DI) MODE2(PCM1_DI) MODE3(I2S3_DO) MODE4(I2S1_DO) MODE5(PWM0) MODE6(I2S2_DI) MODE7(DBG_MON_A26) PD SMT_GROUP(20) +GPIO79 = MODE0(GPIO79) MODE1(I2S0_LRCK) MODE2(PCM1_SYNC) MODE3(I2S3_LRCK) MODE4(I2S1_LRCK) MODE5(PWM3) MODE6(I2S2_LRCK) MODE7(DBG_MON_A27) PD SMT_GROUP(20) +GPIO80 = MODE0(GPIO80) MODE1(I2S0_BCK) MODE2(PCM1_CLK[1]) MODE3(I2S3_BCK) MODE4(I2S1_BCK) MODE5(PWM4) MODE6(I2S2_BCK) MODE7(DBG_MON_A28) PD SMT_GROUP(20) +GPIO81 = MODE0(GPIO81) MODE1(KROW0) MODE2() MODE3(CONN_MCU_DBGI_N) MODE4(CORESONIC_SWCK) MODE5(C2K_TCK) MODE6() MODE7(C2K_DM_EINT1) PD SMT_GROUP(21) +GPIO82 = MODE0(GPIO82) MODE1(KROW1) MODE2() MODE3(CONN_MCU_TRST_B) MODE4(CORESONIC_SWD) MODE5(C2K_NTRST) MODE6(USB_DRVVBUS) MODE7(C2K_DM_EINT2) PD SMT_GROUP(21) +GPIO83 = MODE0(GPIO83) MODE1(KROW2) MODE2(USB_DRVVBUS) MODE3() MODE4() MODE5(C2K_TDI) MODE6() MODE7(C2K_DM_EINT3) PD SMT_GROUP(21) +GPIO84 = MODE0(GPIO84) MODE1(KCOL0) MODE2(URTS0) MODE3(CONN_MCU_DBGACK_N) MODE4(SCL2) MODE5(C2K_TDO) MODE6(AUXIF_CLK) MODE7() PU SMT_GROUP(21) +GPIO85 = MODE0(GPIO85) MODE1(KCOL1) MODE2(UCTS0) MODE3(UCTS1) MODE4(SDA2) MODE5(C2K_TMS) MODE6(AUXIF_ST) MODE7(DBG_MON_A31) PD SMT_GROUP(21) +GPIO86 = MODE0(GPIO86) MODE1(KCOL2) MODE2() MODE3(URTS1) MODE4() MODE5(C2K_RTCK) MODE6() MODE7(DBG_MON_A32) PD SMT_GROUP(21) +GPIO87 = MODE0(GPIO87) MODE1(BPI_BUS5) MODE2(LTE_C2K_BPI_BUS5) MODE3() MODE4() MODE5(C2K_BPI_BUS5) MODE6() MODE7(DBG_MON_B0) PD SMT_GROUP(22) +GPIO88 = MODE0(GPIO88) MODE1(BPI_BUS6) MODE2(LTE_C2K_BPI_BUS6) MODE3() MODE4() MODE5(C2K_BPI_BUS6) MODE6() MODE7(DBG_MON_B1) PD SMT_GROUP(22) +GPIO89 = MODE0(GPIO89) MODE1(BPI_BUS7) MODE2(LTE_C2K_BPI_BUS7) MODE3(CLKM0) MODE4() MODE5(C2K_BPI_BUS7) MODE6() MODE7(DBG_MON_B2) PD SMT_GROUP(22) +GPIO90 = MODE0(GPIO90) MODE1(BPI_BUS8) MODE2(LTE_C2K_BPI_BUS8) MODE3(CLKM1) MODE4() MODE5(C2K_BPI_BUS8) MODE6() MODE7(DBG_MON_B3) PD SMT_GROUP(22) +GPIO91 = MODE0(GPIO91) MODE1(BPI_BUS9) MODE2(LTE_C2K_BPI_BUS9) MODE3(CLKM2) MODE4() MODE5(C2K_BPI_BUS9) MODE6() MODE7(DBG_MON_B4) PD SMT_GROUP(22) +GPIO92 = MODE0(GPIO92) MODE1(BPI_BUS10) MODE2(LTE_C2K_BPI_BUS10) MODE3(CLKM3) MODE4() MODE5(C2K_BPI_BUS10) MODE6() MODE7(DBG_MON_B5) PD SMT_GROUP(22) +GPIO93 = MODE0(GPIO93) MODE1(BPI_BUS11) MODE2(LTE_C2K_BPI_BUS11) MODE3() MODE4() MODE5(C2K_BPI_BUS11) MODE6() MODE7(DBG_MON_B6) PD SMT_GROUP(22) +GPIO94 = MODE0(GPIO94) MODE1(BPI_BUS12) MODE2(LTE_C2K_BPI_BUS12) MODE3() MODE4() MODE5(C2K_BPI_BUS12) MODE6() MODE7(DBG_MON_B7) PD SMT_GROUP(22) +GPIO95 = MODE0(GPIO95) MODE1(BPI_BUS13) MODE2(LTE_C2K_BPI_BUS13) MODE3() MODE4() MODE5(C2K_BPI_BUS13) MODE6() MODE7(DBG_MON_B8) PD SMT_GROUP(22) +GPIO96 = MODE0(GPIO96) MODE1(BPI_BUS14) MODE2(LTE_C2K_BPI_BUS14) MODE3() MODE4() MODE5(C2K_BPI_BUS14) MODE6() MODE7(DBG_MON_B9) PD SMT_GROUP(22) +GPIO97 = MODE0(GPIO97) MODE1(BPI_BUS15) MODE2(LTE_C2K_BPI_BUS15) MODE3() MODE4() MODE5(C2K_BPI_BUS15) MODE6() MODE7(DBG_MON_B10) PD SMT_GROUP(22) +GPIO98 = MODE0(GPIO98) MODE1(BPI_BUS16) MODE2(LTE_C2K_BPI_BUS16) MODE3() MODE4() MODE5(C2K_BPI_BUS16) MODE6() MODE7(DBG_MON_B11) PD SMT_GROUP(22) +GPIO99 = MODE0(GPIO99) MODE1(BPI_BUS17) MODE2(LTE_C2K_BPI_BUS17) MODE3() MODE4(I2S0_DI) MODE5(C2K_BPI_BUS17) MODE6() MODE7(DBG_MON_B12) PD SMT_GROUP(22) +GPIO100 = MODE0(GPIO100) MODE1(BPI_BUS18) MODE2(LTE_C2K_BPI_BUS18) MODE3() MODE4() MODE5(C2K_BPI_BUS18) MODE6() MODE7(DBG_MON_B13) PD SMT_GROUP(22) +GPIO101 = MODE0(GPIO101) MODE1(BPI_BUS19) MODE2(LTE_C2K_BPI_BUS19) MODE3() MODE4() MODE5(C2K_BPI_BUS19) MODE6() MODE7(DBG_MON_B14) PD SMT_GROUP(22) +GPIO102 = MODE0(GPIO102) MODE1(BPI_BUS20) MODE2(LTE_C2K_BPI_BUS20) MODE3() MODE4() MODE5(C2K_BPI_BUS20) MODE6() MODE7(DBG_MON_B15) PD SMT_GROUP(22) +GPIO103 = MODE0(GPIO103) MODE1(C2K_TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B16) PD SMT_GROUP(22) +GPIO104 = MODE0(GPIO104) MODE1(RFIC1_BSI_EN) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_EN) MODE6() MODE7(DBG_MON_B17) PD SMT_GROUP(23) +GPIO105 = MODE0(GPIO105) MODE1(RFIC1_BSI_CK) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_CLK) MODE6() MODE7(DBG_MON_B18) PD SMT_GROUP(23) +GPIO106 = MODE0(GPIO106) MODE1(RFIC1_BSI_D0) MODE2() MODE3() MODE4() MODE5(C2K_RX_BSI_DATA) MODE6() MODE7(DBG_MON_B19) PD SMT_GROUP(23) +GPIO107 = MODE0(GPIO107) MODE1(RFIC1_BSI_D1) MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_EN) MODE6() MODE7(DBG_MON_B20) PD SMT_GROUP(23) +GPIO108 = MODE0(GPIO108) MODE1(RFIC1_BSI_D2) MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_CLK) MODE6() MODE7(DBG_MON_B21) PD SMT_GROUP(23) +GPIO109 = MODE0(GPIO109) MODE1() MODE2() MODE3() MODE4() MODE5(C2K_TX_BSI_DATA) MODE6() MODE7(DBG_MON_B22) PD SMT_GROUP(23) +GPIO110 = MODE0(GPIO110) MODE1(RFIC0_BSI_EN) MODE2() MODE3() MODE4(SPM_BSI_EN) MODE5() MODE6() MODE7(DBG_MON_B23) PD SMT_GROUP(23) +GPIO111 = MODE0(GPIO111) MODE1(RFIC0_BSI_CK) MODE2() MODE3() MODE4(SPM_BSI_CLK) MODE5() MODE6() MODE7(DBG_MON_B24) PD SMT_GROUP(23) +GPIO112 = MODE0(GPIO112) MODE1(RFIC0_BSI_D2) MODE2() MODE3() MODE4(SPM_BSI_D2) MODE5() MODE6() MODE7(DBG_MON_B25) PD SMT_GROUP(23) +GPIO113 = MODE0(GPIO113) MODE1(RFIC0_BSI_D1) MODE2() MODE3() MODE4(SPM_BSI_D1) MODE5() MODE6() MODE7(DBG_MON_B26) PD SMT_GROUP(23) +GPIO114 = MODE0(GPIO114) MODE1(RFIC0_BSI_D0) MODE2() MODE3() MODE4(SPM_BSI_D0) MODE5() MODE6() MODE7(DBG_MON_B27) PD SMT_GROUP(23) +GPIO115 = MODE0(GPIO115) MODE1(AUXIN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO116 = MODE0(GPIO116) MODE1(AUXIN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO117 = MODE0(GPIO117) MODE1(AUXIN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO118 = MODE0(GPIO118) MODE1(TXBPI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO119 = MODE0(GPIO119) MODE1(BPI_BUS0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B28) PD SMT_GROUP(24) +GPIO120 = MODE0(GPIO120) MODE1(BPI_BUS1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B29) PD SMT_GROUP(24) +GPIO121 = MODE0(GPIO121) MODE1(BPI_BUS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B30) PD SMT_GROUP(24) +GPIO122 = MODE0(GPIO122) MODE1(BPI_BUS3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B31) PD SMT_GROUP(24) +GPIO123 = MODE0(GPIO123) MODE1(BPI_BUS4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B32) PD SMT_GROUP(24) +GPIO124 = MODE0(GPIO124) MODE1(BPI_BUS21) MODE2(SDA_EXTB) MODE3() MODE4() MODE5(DPI_HSYNC1) MODE6(KCOL2) MODE7(TDD_TXD) PD SMT_GROUP(24) +GPIO125 = MODE0(GPIO125) MODE1(BPI_BUS22) MODE2(SCL_EXTB) MODE3() MODE4() MODE5(DPI_VSYNC1) MODE6(KROW2) MODE7(MD_URXD) PD SMT_GROUP(24) +GPIO126 = MODE0(GPIO126) MODE1(BPI_BUS23) MODE2(SDA_EXTB) MODE3() MODE4() MODE5(DPI_CK1) MODE6(I2S2_MCK) MODE7(MD_UTXD) PD SMT_GROUP(24) +GPIO127 = MODE0(GPIO127) MODE1(BPI_BUS24) MODE2(SCL_EXTB) MODE3(CONN_MCU_DBGI_N) MODE4(EXT_FRAME_SYNC) MODE5(DPI_DE1) MODE6(SRCLKENAI1) MODE7(URXD0) PD SMT_GROUP(24) +GPIO128 = MODE0(GPIO128) MODE1(BPI_BUS25) MODE2() MODE3(GPS_FRAME_SYNC) MODE4(SDA_EXTB) MODE5(I2S2_DI) MODE6(PTA_RXD) MODE7(UTXD0) PD SMT_GROUP(24) +GPIO129 = MODE0(GPIO129) MODE1(BPI_BUS26) MODE2(DISP_PWM) MODE3() MODE4(SCL_EXTB) MODE5(I2S2_LRCK) MODE6(PTA_TXD) MODE7(LTE_URXD) PD SMT_GROUP(24) +GPIO130 = MODE0(GPIO130) MODE1(BPI_BUS27) MODE2() MODE3() MODE4() MODE5(I2S2_BCK) MODE6(IRTX_OUT) MODE7(LTE_UTXD) PD SMT_GROUP(24) +GPIO131 = MODE0(GPIO131) MODE1(LTE_PAVM0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO132 = MODE0(GPIO132) MODE1(LTE_PAVM1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO133 = MODE0(GPIO133) MODE1(MIPI1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO134 = MODE0(GPIO134) MODE1(MIPI1_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO135 = MODE0(GPIO135) MODE1(MIPI0_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO136 = MODE0(GPIO136) MODE1(MIPI0_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(24) +GPIO137 = MODE0(GPIO137) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(25) +GPIO138 = MODE0(GPIO138) MODE1(PWRAP_SPIDO) MODE2(PWRAP_SPIDI) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO139 = MODE0(GPIO139) MODE1(PWRAP_SPIDI) MODE2(PWRAP_SPIDO) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO140 = MODE0(GPIO140) MODE1() MODE2() MODE3(LTE_MD32_JTAG_TRST) MODE4(TDD_TRSTN) MODE5(DM_JTINTP) MODE6() MODE7() PD SMT_GROUP(26) +GPIO141 = MODE0(GPIO141) MODE1(PWRAP_SPICK_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(26) +GPIO142 = MODE0(GPIO142) MODE1(PWRAP_SPICS_B_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(26) +GPIO143 = MODE0(GPIO143) MODE1(AUD_CLK_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO144 = MODE0(GPIO144) MODE1(AUD_DAT_MISO) MODE2() MODE3(AUD_DAT_MOSI) MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO145 = MODE0(GPIO145) MODE1(AUD_DAT_MOSI) MODE2() MODE3(AUD_DAT_MISO) MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(27) +GPIO146 = MODE0(GPIO146) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(28) +GPIO147 = MODE0(GPIO147) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(28) +GPIO148 = MODE0(GPIO148) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(29) +GPIO149 = MODE0(GPIO149) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(25) +GPIO150 = MODE0(GPIO150) MODE1(TDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO151 = MODE0(GPIO151) MODE1(TDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO152 = MODE0(GPIO152) MODE1(TDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO153 = MODE0(GPIO153) MODE1(TDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO154 = MODE0(GPIO154) MODE1(TCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO155 = MODE0(GPIO155) MODE1(TCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO156 = MODE0(GPIO156) MODE1(TDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO157 = MODE0(GPIO157) MODE1(TDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO158 = MODE0(GPIO158) MODE1(TDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO159 = MODE0(GPIO159) MODE1(TDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO160 = MODE0(GPIO160) MODE1(MD_SIM2_SCLK) MODE2(MD_SIM1_SCLK) MODE3(UIM0_CLK) MODE4(UIM1_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO161 = MODE0(GPIO161) MODE1(MD_SIM2_SRST) MODE2(MD_SIM1_SRST) MODE3(UIM0_RST) MODE4(UIM1_RST) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO162 = MODE0(GPIO162) MODE1(MD_SIM2_SDAT) MODE2(MD_SIM1_SDAT) MODE3(UIM0_IO) MODE4(UIM1_IO) MODE5() MODE6() MODE7() PD SMT_GROUP(30) +GPIO163 = MODE0(GPIO163) MODE1(MD_SIM1_SCLK) MODE2(MD_SIM2_SCLK) MODE3(UIM1_CLK) MODE4(UIM0_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO164 = MODE0(GPIO164) MODE1(MD_SIM1_SRST) MODE2(MD_SIM2_SRST) MODE3(UIM1_RST) MODE4(UIM0_RST) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO165 = MODE0(GPIO165) MODE1(MD_SIM1_SDAT) MODE2(MD_SIM2_SDAT) MODE3(UIM1_IO) MODE4(UIM0_IO) MODE5() MODE6() MODE7() PD SMT_GROUP(31) +GPIO166 = MODE0(GPIO166) MODE1(MSDC1_CMD) MODE2(LTE_MD32_JTAG_TMS) MODE3(C2K_TMS) MODE4(TDD_TMS) MODE5(CONN_DSP_JMS) MODE6(JTMS) MODE7(CONN_MCU_AICE_TMSC) PU SMT_GROUP(32) +GPIO167 = MODE0(GPIO167) MODE1(MSDC1_CLK) MODE2(LTE_MD32_JTAG_TCK) MODE3(C2K_TCK) MODE4(TDD_TCK) MODE5(CONN_DSP_JCK) MODE6(JTCK) MODE7(CONN_MCU_AICE_TCKC) PD SMT_GROUP(33) +GPIO168 = MODE0(GPIO168) MODE1(MSDC1_DAT0) MODE2(LTE_MD32_JTAG_TDI) MODE3(C2K_TDI) MODE4(TDD_TDI) MODE5(CONN_DSP_JDI) MODE6(JTDI) MODE7() PU SMT_GROUP(34) +GPIO169 = MODE0(GPIO169) MODE1(MSDC1_DAT1) MODE2(LTE_MD32_JTAG_TDO) MODE3(C2K_TDO) MODE4(TDD_TDO) MODE5(CONN_DSP_JDO) MODE6(JTDO) MODE7() PU SMT_GROUP(34) +GPIO170 = MODE0(GPIO170) MODE1(MSDC1_DAT2) MODE2(LTE_MD32_JTAG_TRST) MODE3(C2K_NTRST) MODE4(TDD_TRSTN) MODE5(CONN_DSP_JINTP) MODE6(DM_JTINTP) MODE7() PU SMT_GROUP(34) +GPIO171 = MODE0(GPIO171) MODE1(MSDC1_DAT3) MODE2() MODE3(C2K_RTCK) MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(34) +GPIO172 = MODE0(GPIO172) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(35) +GPIO173 = MODE0(GPIO173) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(36) +GPIO174 = MODE0(GPIO174) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(37) +GPIO175 = MODE0(GPIO175) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO176 = MODE0(GPIO176) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO177 = MODE0(GPIO177) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO178 = MODE0(GPIO178) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO179 = MODE0(GPIO179) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO180 = MODE0(GPIO180) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO181 = MODE0(GPIO181) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO182 = MODE0(GPIO182) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(38) +GPIO183 = MODE0(GPIO183) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(39) +GPIO184 = MODE0(GPIO184) MODE1(F2W_DATA) MODE2(MRG_CLK) MODE3(C2K_DM_EINT2) MODE4(PCM0_CLK) MODE5() MODE6() MODE7() PD SMT_GROUP(40) +GPIO185 = MODE0(GPIO185) MODE1(F2W_CK) MODE2(MRG_DI) MODE3(C2K_DM_EINT3) MODE4(PCM0_DI) MODE5() MODE6() MODE7() PD SMT_GROUP(40) +GPIO186 = MODE0(GPIO186) MODE1(WB_RSTB) MODE2() MODE3() MODE4(URXD3) MODE5(UTXD3) MODE6() MODE7() PD SMT_GROUP(41) +GPIO187 = MODE0(GPIO187) MODE1(WB_SCLK) MODE2(MRG_DO) MODE3() MODE4(PCM0_DO) MODE5() MODE6() MODE7() PD SMT_GROUP(41) +GPIO188 = MODE0(GPIO188) MODE1(WB_SDATA) MODE2(MRG_SYNC) MODE3() MODE4(PCM0_SYNC) MODE5() MODE6() MODE7() PD SMT_GROUP(41) +GPIO189 = MODE0(GPIO189) MODE1(WB_SEN) MODE2() MODE3() MODE4(UTXD3) MODE5(URXD3) MODE6() MODE7() PD SMT_GROUP(41) +GPIO190 = MODE0(GPIO190) MODE1(GPS_RXQN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO191 = MODE0(GPIO191) MODE1(GPS_RXQP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO192 = MODE0(GPIO192) MODE1(GPS_RXIN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO193 = MODE0(GPIO193) MODE1(GPS_RXIP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO194 = MODE0(GPIO194) MODE1(WB_RXQN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO195 = MODE0(GPIO195) MODE1(WB_RXQP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO196 = MODE0(GPIO196) MODE1(WB_RXIN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO197 = MODE0(GPIO197) MODE1(WB_RXIP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO198 = MODE0(GPIO198) MODE1(MSDC2_CMD) MODE2(SDA1) MODE3(C2K_UART0_RXD) MODE4(C2K_TMS) MODE5(ANT_SEL6) MODE6() MODE7(DM_OTMS) PD SMT_GROUP(42) +GPIO199 = MODE0(GPIO199) MODE1(MSDC2_CLK) MODE2(SCL1) MODE3(C2K_UART0_TXD) MODE4(C2K_TCK) MODE5(ANT_SEL7) MODE6(TDD_TXD) MODE7(DM_OTCK) PD SMT_GROUP(43) +GPIO200 = MODE0(GPIO200) MODE1(MSDC2_DAT0) MODE2(ANT_SEL6) MODE3(GPS_FRAME_SYNC) MODE4(C2K_TDI) MODE5(UTXD0) MODE6() MODE7(DM_OTDI) PD SMT_GROUP(44) +GPIO201 = MODE0(GPIO201) MODE1(MSDC2_DAT1) MODE2(ANT_SEL3) MODE3(PWM0) MODE4(C2K_TDO) MODE5(URXD0) MODE6() MODE7(DM_OTDO) PD SMT_GROUP(44) +GPIO202 = MODE0(GPIO202) MODE1(MSDC2_DAT2) MODE2(ANT_SEL4) MODE3(SDA2) MODE4(C2K_NTRST) MODE5(UTXD1) MODE6(KCOL3) MODE7(DM_JTINTP) PD SMT_GROUP(44) +GPIO203 = MODE0(GPIO203) MODE1(MSDC2_DAT3) MODE2(ANT_SEL5) MODE3(SCL2) MODE4(C2K_RTCK) MODE5(URXD1) MODE6(KCOL6) MODE7() PD SMT_GROUP(44) + +[GPO] + +[EINT] +EINT_COUNT = 213 +EINT_DEBOUNCE_TIME_COUNT = 12 + +[WAKE_UP_SRC] +ACCDET +MSDC1_INS +MSDC2_INS +CHR_STAT +IRQ_NFC +COMBO_BGF +WIFI +TOUCH_PANEL +ALS +MHL +EXT_BUCK_OC + +[EINT_MD1] +EINT_MD1_COUNT = 4 + +[ADC] +ADC_COUNT = 6 + +[ADC_EX_PIN] +0 +1 +12 +13 +14 +15 + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[KEYPAD_EXTEND_TYPE] +KEY_ROW = 3 +KEY_COLUMN = 6 +KEY_DESIGN_NOTICES = "Please notice that the circuit design are different between single and double keypad, and DO NOT add 1K ohm resistor on double keypad" + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 5 + +[CLK_BUF] +CLK_BUF_COUNT = 4 + +[POWER] +DVDD28_SIM1 +DVDD28_SIM2 +DVDD28_MC1 +DVDD28_MC2 + +[DVDD28_SIM1] +VIO18 +VIO28 + +[DVDD28_SIM2] +VIO18 +VIO28 + +[DVDD28_MC1] +VIO18 +VIO28 + +[DVDD28_MC2] +VIO18 +VIO28 + +[MSDC_POWER_MC1] +MSDC_VIO18_MC1 +MSDC_VIO28_MC1 +MSDC_VMC + + +[SRC_PIN] +PAD_ANT_SEL1 +PAD_ANT_SEL2 +PAD_CMDAT1 +PAD_EINT1 +PAD_EINT2 +PAD_EINT3 +PAD_EINT8 +PAD_EINT9 +PAD_EINT10 +PAD_EINT11 +PAD_EINT12 +PAD_SCL3 +PAD_SDA3 + +[SRC_PIN_INDEX] +2 +1 +0 +0 +0 +0 +1 +2 +0 +1 +2 +1 +2 + diff --git a/tools/dct/MT8173.fig b/tools/dct/MT8173.fig new file mode 100644 index 000000000..b25e276ff --- /dev/null +++ b/tools/dct/MT8173.fig @@ -0,0 +1,453 @@ +[Chip Type] +Chip = MT8173 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +PMIC_GPIO_Config = 1 +PMIC_ON_OFF_CONFIG = 1 +EINT_EXT_Config = 1 +POWER_Config = 1 +POWER_COUNT = 55 +GPIO_ModeNum = 8 +AndroidPhone = 1 +SpecialKey_Config = 1 +I2C_Config = 1 +CLOCK_BUFFER_CONFIG = 1 +PMIC_APP_Ver = 2 +PMIC_APP_COUNT = 6 + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(IRDA_PDN) MODE2(I2S1_WS) MODE3(AUD_SPDIF) MODE4(UTXD0) MODE5() MODE6() MODE7(DBG_MON_A_20_) PD SMT_GROUP(1) - +GPIO1 = MODE0(GPIO1) MODE1(IRDA_RXD) MODE2(I2S1_BCK) MODE3(SDA5) MODE4(URXD0) MODE5() MODE6() MODE7(DBG_MON_A_21_) PD SMT_GROUP(1) - +GPIO2 = MODE0(GPIO2) MODE1(IRDA_TXD) MODE2(I2S1_MCK) MODE3(SCL5) MODE4(UTXD3) MODE5() MODE6() MODE7(DBG_MON_A_22_) PD SMT_GROUP(1) - +GPIO3 = MODE0(GPIO3) MODE1(DSI1_TE) MODE2(I2S1_DO_1) MODE3(SDA3) MODE4(URXD3) MODE5() MODE6() MODE7(DBG_MON_A_23_) PD SMT_GROUP(1) - +GPIO4 = MODE0(GPIO4) MODE1(DISP_PWM1) MODE2(I2S1_DO_2) MODE3(SCL3) MODE4(UCTS3) MODE5() MODE6(SFWP_B) MODE7() PD SMT_GROUP(1) - +GPIO5 = MODE0(GPIO5) MODE1(PCM1_CLK) MODE2(I2S2_WS) MODE3(SPI_CK_3_) MODE4(URTS3) MODE5(AP_MD32_JTAG_TMS) MODE6(SFOUT) MODE7() PD SMT_GROUP(2) - +GPIO6 = MODE0(GPIO6) MODE1(PCM1_SYNC) MODE2(I2S2_BCK) MODE3(SPI_MI_3_) MODE4() MODE5(AP_MD32_JTAG_TCK) MODE6(SFCS0) MODE7() PU SMT_GROUP(2) - +GPIO7 = MODE0(GPIO7) MODE1(PCM1_DI) MODE2(I2S2_DI_1) MODE3(SPI_MO_3_) MODE4() MODE5(AP_MD32_JTAG_TDI) MODE6(SFHOLD) MODE7() PD SMT_GROUP(2) - +GPIO8 = MODE0(GPIO8) MODE1(PCM1_DO) MODE2(I2S2_DI_2) MODE3(SPI_CS_3_) MODE4(AUD_SPDIF) MODE5(AP_MD32_JTAG_TDO) MODE6(SFIN) MODE7() PD SMT_GROUP(2) - +GPIO9 = MODE0(GPIO9) MODE1(USB_DRVVBUS_P0) MODE2(I2S2_MCK) MODE3() MODE4(USB_DRVVBUS_P1) MODE5(AP_MD32_JTAG_TRST) MODE6(SFCK) MODE7() PD SMT_GROUP(2) - +GPIO10 = MODE0(GPIO10) MODE1(CLKM0) MODE2(DSI1_TE) MODE3(DISP_PWM1) MODE4(PWM4) MODE5(IRDA_RXD) MODE6() MODE7() PD SMT_GROUP(10) - +GPIO11 = MODE0(GPIO11) MODE1(CLKM1) MODE2(I2S3_WS) MODE3(USB_DRVVBUS_P0) MODE4(PWM5) MODE5(IRDA_TXD) MODE6(USB_DRVVBUS_P1) MODE7(DBG_MON_B_30_) PD SMT_GROUP(10) - +GPIO12 = MODE0(GPIO12) MODE1(CLKM2) MODE2(I2S3_BCK) MODE3(SRCLKENA0) MODE4() MODE5(I2S2_WS) MODE6() MODE7(DBG_MON_B_32_) PD SMT_GROUP(10) - +GPIO13 = MODE0(GPIO13) MODE1(CLKM3) MODE2(I2S3_MCK) MODE3(SRCLKENA0) MODE4() MODE5(I2S2_BCK) MODE6() MODE7(DBG_MON_A_32_) PD SMT_GROUP(10) - +GPIO14 = MODE0(GPIO14) MODE1(CMDAT0) MODE2(CMCSD0) MODE3() MODE4(CLKM2) MODE5() MODE6() MODE7(DBG_MON_B_6_) PD SMT_GROUP(26) - +GPIO15 = MODE0(GPIO15) MODE1(CMDAT1) MODE2(CMCSD1) MODE3(CMFLASH) MODE4(CLKM3) MODE5() MODE6() MODE7(DBG_MON_B_29_) PD SMT_GROUP(26) - +GPIO16 = MODE0(GPIO16) MODE1(IDDIG) MODE2(CMFLASH) MODE3() MODE4(PWM5) MODE5() MODE6() MODE7() PU SMT_GROUP(0) - +GPIO17 = MODE0(GPIO17) MODE1(WATCHDOG_AO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(34) - +GPIO18 = MODE0(GPIO18) MODE1(CEC) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(19) open-drain +GPIO19 = MODE0(GPIO19) MODE1(HDMISCK) MODE2(HDCP_SCL) MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(19) open-drain +GPIO20 = MODE0(GPIO20) MODE1(HDMISD) MODE2(HDCP_SDA) MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(19) open-drain +GPIO21 = MODE0(GPIO21) MODE1(HTPLG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(19) open-drain +GPIO22 = MODE0(GPIO22) MODE1(MSDC3_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU msdc3da_smt - +GPIO23 = MODE0(GPIO23) MODE1(MSDC3_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU msdc3da_smt - +GPIO24 = MODE0(GPIO24) MODE1(MSDC3_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU msdc3da_smt - +GPIO25 = MODE0(GPIO25) MODE1(MSDC3_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU msdc3da_smt - +GPIO26 = MODE0(GPIO26) MODE1(MSDC3_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD msdc3ck_smt - +GPIO27 = MODE0(GPIO27) MODE1(MSDC3_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU msdc3cm_smt - +GPIO28 = MODE0(GPIO28) MODE1(MSDC3_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD msdc3ds_smt - +GPIO29 = MODE0(GPIO29) MODE1(UCTS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(3) - +GPIO30 = MODE0(GPIO30) MODE1(URTS2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(3) - +GPIO31 = MODE0(GPIO31) MODE1(URXD2) MODE2(UTXD2) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(3) - +GPIO32 = MODE0(GPIO32) MODE1(UTXD2) MODE2(URXD2) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(3) - +GPIO33 = MODE0(GPIO33) MODE1(MRG_CLK) MODE2(PCM0_CLK) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(4) - +GPIO34 = MODE0(GPIO34) MODE1(MRG_DI) MODE2(PCM0_DI) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(5) - +GPIO35 = MODE0(GPIO35) MODE1(MRG_DO) MODE2(PCM0_DO) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(5) - +GPIO36 = MODE0(GPIO36) MODE1(MRG_SYNC) MODE2(PCM0_SYNC) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(5) - +GPIO37 = MODE0(GPIO37) MODE1(USB_DRVVBUS_P0) MODE2(USB_DRVVBUS_P1) MODE3(PWM0) MODE4(PWM1) MODE5(PWM2) MODE6(CLKM0) MODE7() PD SMT_GROUP(6) - +GPIO38 = MODE0(GPIO38) MODE1(USB_DRVVBUS_P0) MODE2(USB_DRVVBUS_P1) MODE3() MODE4() MODE5() MODE6(CLKM1) MODE7() PD SMT_GROUP(6) - +GPIO39 = MODE0(GPIO39) MODE1(CM2MCLK) MODE2(CMCSD0) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_17_) PD SMT_GROUP(7) - +GPIO40 = MODE0(GPIO40) MODE1(CMPCLK) MODE2(CMCSK) MODE3(CMCSD2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A_18_) PD SMT_GROUP(9) - +GPIO41 = MODE0(GPIO41) MODE1(CMMCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_19_) PD SMT_GROUP(9) - +GPIO42 = MODE0(GPIO42) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(16) - +GPIO43 = MODE0(GPIO43) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(11) open-drain +GPIO44 = MODE0(GPIO44) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(11) open-drain +GPIO45 = MODE0(GPIO45) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(12) open-drain +GPIO46 = MODE0(GPIO46) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(12) open-drain +GPIO47 = MODE0(GPIO47) MODE1(CMDAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO48 = MODE0(GPIO48) MODE1(CMDAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO49 = MODE0(GPIO49) MODE1(CMDAT4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO50 = MODE0(GPIO50) MODE1(CMDAT5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO51 = MODE0(GPIO51) MODE1(CMDAT6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO52 = MODE0(GPIO52) MODE1(CMDAT7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO53 = MODE0(GPIO53) MODE1(CMDAT8) MODE2(CMCSD3) MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO54 = MODE0(GPIO54) MODE1(CMDAT9) MODE2(CMCSD2) MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO55 = MODE0(GPIO55) MODE1(CMHSYNC) MODE2(CMCSD1) MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO56 = MODE0(GPIO56) MODE1(CMVSYNC) MODE2(CMCSD0) MODE3() MODE4() MODE5() MODE6() MODE7() - - - +GPIO57 = MODE0(GPIO57) MODE1(MSDC0_DAT0) MODE2(I2S1_WS) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_7_) PU msdc0da_smt - +GPIO58 = MODE0(GPIO58) MODE1(MSDC0_DAT1) MODE2(I2S1_BCK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_8_) PU msdc0da_smt - +GPIO59 = MODE0(GPIO59) MODE1(MSDC0_DAT2) MODE2(I2S1_MCK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_9_) PU msdc0da_smt - +GPIO60 = MODE0(GPIO60) MODE1(MSDC0_DAT3) MODE2(I2S1_DO_1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_10_) PU msdc0da_smt - +GPIO61 = MODE0(GPIO61) MODE1(MSDC0_DAT4) MODE2(I2S1_DO_2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_11_) PU msdc0da_smt - +GPIO62 = MODE0(GPIO62) MODE1(MSDC0_DAT5) MODE2(I2S2_WS) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_12_) PU msdc0da_smt - +GPIO63 = MODE0(GPIO63) MODE1(MSDC0_DAT6) MODE2(I2S2_BCK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_13_) PU msdc0da_smt - +GPIO64 = MODE0(GPIO64) MODE1(MSDC0_DAT7) MODE2(I2S2_DI_1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_14_) PU msdc0da_smt - +GPIO65 = MODE0(GPIO65) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_16_) PD msdc0ck_smt - +GPIO66 = MODE0(GPIO66) MODE1(MSDC0_CMD) MODE2(I2S2_DI_2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_15_) PU msdc0cm_smt - +GPIO67 = MODE0(GPIO67) MODE1(MSDC0_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_17_) PD msdc0ds_smt - +GPIO68 = MODE0(GPIO68) MODE1(MSDC0_RSTB) MODE2(I2S2_MCK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_18_) PU msdc0rs_smt - +GPIO69 = MODE0(GPIO69) MODE1(SPI_CK_0_) MODE2(I2S3_DO_1) MODE3(PWM0) MODE4(PWM5) MODE5(I2S2_MCK) MODE6() MODE7(DBG_MON_B_19_) PD SMT_GROUP(30) - +GPIO70 = MODE0(GPIO70) MODE1(SPI_MI_0_) MODE2(I2S3_DO_2) MODE3(PWM1) MODE4(SPI_MO_0_) MODE5(I2S2_DI_1) MODE6(DSI1_TE) MODE7(DBG_MON_B_20_) PD SMT_GROUP(30) - +GPIO71 = MODE0(GPIO71) MODE1(SPI_MO_0_) MODE2(I2S3_DO_3) MODE3(PWM2) MODE4(SPI_MI_0_) MODE5(I2S2_DI_2) MODE6() MODE7(DBG_MON_B_21_) PD SMT_GROUP(30) - +GPIO72 = MODE0(GPIO72) MODE1(SPI_CS_0_) MODE2(I2S3_DO_4) MODE3(PWM3) MODE4(PWM6) MODE5(DISP_PWM1) MODE6() MODE7(DBG_MON_B_22_) PD SMT_GROUP(30) - +GPIO73 = MODE0(GPIO73) MODE1(MSDC1_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_24_) PU msdc1da_smt - +GPIO74 = MODE0(GPIO74) MODE1(MSDC1_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_25_) PU msdc1da_smt - +GPIO75 = MODE0(GPIO75) MODE1(MSDC1_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_26_) PU msdc1da_smt - +GPIO76 = MODE0(GPIO76) MODE1(MSDC1_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_27_) PU msdc1da_smt - +GPIO77 = MODE0(GPIO77) MODE1(MSDC1_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_28_) PD msdc1ck_smt - +GPIO78 = MODE0(GPIO78) MODE1(MSDC1_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_23_) PU msdc1cm_smt - +GPIO79 = MODE0(GPIO79) MODE1(PWRAP_SPIMI) MODE2(PWRAP_SPIMO) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(31) - +GPIO80 = MODE0(GPIO80) MODE1(PWRAP_SPIMO) MODE2(PWRAP_SPIMI) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(31) - +GPIO81 = MODE0(GPIO81) MODE1(PWRAP_SPICK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(31) - +GPIO82 = MODE0(GPIO82) MODE1(PWRAP_SPICS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(31) - +GPIO83 = MODE0(GPIO83) MODE1(AUD_CLK_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(32) - +GPIO84 = MODE0(GPIO84) MODE1(AUD_DAT_MISO) MODE2(AUD_DAT_MOSI) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(33) - +GPIO85 = MODE0(GPIO85) MODE1(AUD_DAT_MOSI) MODE2(AUD_DAT_MISO) MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(33) - +GPIO86 = MODE0(GPIO86) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(34) - +GPIO87 = MODE0(GPIO87) MODE1(DISP_PWM0) MODE2(DISP_PWM1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B_31_) PD SMT_GROUP(34) - +GPIO88 = MODE0(GPIO88) MODE1(SRCLKENAI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(34) - +GPIO89 = MODE0(GPIO89) MODE1(SRCLKENAI2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(34) - +GPIO90 = MODE0(GPIO90) MODE1(SRCLKENA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(34) - +GPIO91 = MODE0(GPIO91) MODE1(SRCLKENA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(34) - +GPIO92 = MODE0(GPIO92) MODE1(PCM1_CLK) MODE2(I2S0_BCK) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_24_) PD SMT_GROUP(13) - +GPIO93 = MODE0(GPIO93) MODE1(PCM1_SYNC) MODE2(I2S0_WS) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_25_) PD SMT_GROUP(14) - +GPIO94 = MODE0(GPIO94) MODE1(PCM1_DI) MODE2(I2S0_DI) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_26_) PD SMT_GROUP(14) - +GPIO95 = MODE0(GPIO95) MODE1(PCM1_DO) MODE2(I2S0_DO) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_27_) PD SMT_GROUP(14) - +GPIO96 = MODE0(GPIO96) MODE1(URXD1) MODE2(UTXD1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_28_) PD SMT_GROUP(15) - +GPIO97 = MODE0(GPIO97) MODE1(UTXD1) MODE2(URXD1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_29_) PU SMT_GROUP(15) - +GPIO98 = MODE0(GPIO98) MODE1(URTS1) MODE2(UCTS1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_30_) PD SMT_GROUP(15) - +GPIO99 = MODE0(GPIO99) MODE1(UCTS1) MODE2(URTS1) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_31_) PD SMT_GROUP(15) - +GPIO100 = MODE0(GPIO100) MODE1(MSDC2_DAT0) MODE2() MODE3(USB_DRVVBUS_P0) MODE4(SDA5) MODE5(USB_DRVVBUS_P1) MODE6() MODE7(DBG_MON_B_0_) PD msdc2da_smt - +GPIO101 = MODE0(GPIO101) MODE1(MSDC2_DAT1) MODE2() MODE3(AUD_SPDIF) MODE4(SCL5) MODE5() MODE6() MODE7(DBG_MON_B_1_) PD msdc2da_smt - +GPIO102 = MODE0(GPIO102) MODE1(MSDC2_DAT2) MODE2() MODE3(UTXD0) MODE4() MODE5(PWM0) MODE6(SPI_CK_1_) MODE7(DBG_MON_B_2_) PD msdc2da_smt - +GPIO103 = MODE0(GPIO103) MODE1(MSDC2_DAT3) MODE2() MODE3(URXD0) MODE4() MODE5(PWM1) MODE6(SPI_MI_1_) MODE7(DBG_MON_B_3_) PD msdc2da_smt - +GPIO104 = MODE0(GPIO104) MODE1(MSDC2_CLK) MODE2() MODE3(UTXD3) MODE4(SDA3) MODE5(PWM2) MODE6(SPI_MO_1_) MODE7(DBG_MON_B_4_) PD msdc2ck_smt - +GPIO105 = MODE0(GPIO105) MODE1(MSDC2_CMD) MODE2() MODE3(URXD3) MODE4(SCL3) MODE5(PWM3) MODE6(SPI_CS_1_) MODE7(DBG_MON_B_5_) PD msdc2cm_smt - +GPIO106 = MODE0(GPIO106) MODE1(SDA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(20) open-drain +GPIO107 = MODE0(GPIO107) MODE1(SCL3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(20) open-drain +GPIO108 = MODE0(GPIO108) MODE1(JTMS) MODE2(MFG_JTAG_TMS) MODE3() MODE4() MODE5(AP_MD32_JTAG_TMS) MODE6(DFD_TMS) MODE7() PU SMT_GROUP(17) - +GPIO109 = MODE0(GPIO109) MODE1(JTCK) MODE2(MFG_JTAG_TCK) MODE3() MODE4() MODE5(AP_MD32_JTAG_TCK) MODE6(DFD_TCK) MODE7() PU SMT_GROUP(17) - +GPIO110 = MODE0(GPIO110) MODE1(JTDI) MODE2(MFG_JTAG_TDI) MODE3() MODE4() MODE5(AP_MD32_JTAG_TDI) MODE6(DFD_TDI) MODE7() PU SMT_GROUP(17) - +GPIO111 = MODE0(GPIO111) MODE1(JTDO) MODE2(MFG_JTAG_TDO) MODE3() MODE4() MODE5(AP_MD32_JTAG_TDO) MODE6(DFD_TDO) MODE7() PU SMT_GROUP(17) - +GPIO112 = MODE0(GPIO112) MODE1(JTRST_B) MODE2(MFG_JTAG_TRSTN) MODE3() MODE4() MODE5(AP_MD32_JTAG_TRST) MODE6(DFD_NTRST) MODE7() PD SMT_GROUP(17) - +GPIO113 = MODE0(GPIO113) MODE1(URXD0) MODE2(UTXD0) MODE3() MODE4() MODE5() MODE6(I2S2_WS) MODE7(DBG_MON_A_0_) PU SMT_GROUP(18) - +GPIO114 = MODE0(GPIO114) MODE1(UTXD0) MODE2(URXD0) MODE3() MODE4() MODE5() MODE6(I2S2_BCK) MODE7(DBG_MON_A_1_) PU SMT_GROUP(18) - +GPIO115 = MODE0(GPIO115) MODE1(URTS0) MODE2(UCTS0) MODE3() MODE4() MODE5() MODE6(I2S2_MCK) MODE7(DBG_MON_A_2_) PD SMT_GROUP(18) - +GPIO116 = MODE0(GPIO116) MODE1(UCTS0) MODE2(URTS0) MODE3() MODE4() MODE5() MODE6(I2S2_DI_1) MODE7(DBG_MON_A_3_) PD SMT_GROUP(18) - +GPIO117 = MODE0(GPIO117) MODE1(URXD3) MODE2(UTXD3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_9_) PD SMT_GROUP(21) - +GPIO118 = MODE0(GPIO118) MODE1(UTXD3) MODE2(URXD3) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_10_) PD SMT_GROUP(21) - +GPIO119 = MODE0(GPIO119) MODE1(KROW0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_11_) PD SMT_GROUP(22) - +GPIO120 = MODE0(GPIO120) MODE1(KROW1) MODE2() MODE3(PWM6) MODE4() MODE5() MODE6() MODE7(DBG_MON_A_12_) PD SMT_GROUP(22) - +GPIO121 = MODE0(GPIO121) MODE1(KROW2) MODE2(IRDA_PDN) MODE3(USB_DRVVBUS_P0) MODE4(PWM4) MODE5(USB_DRVVBUS_P1) MODE6() MODE7(DBG_MON_A_13_) PD SMT_GROUP(22) - +GPIO122 = MODE0(GPIO122) MODE1(KCOL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A_14_) PU SMT_GROUP(22) - +GPIO123 = MODE0(GPIO123) MODE1(KCOL1) MODE2(IRDA_RXD) MODE3(PWM5) MODE4() MODE5() MODE6() MODE7(DBG_MON_A_15_) PD SMT_GROUP(22) - +GPIO124 = MODE0(GPIO124) MODE1(KCOL2) MODE2(IRDA_TXD) MODE3(USB_DRVVBUS_P0) MODE4(PWM3) MODE5(USB_DRVVBUS_P1) MODE6() MODE7(DBG_MON_A_16_) PD SMT_GROUP(22) - +GPIO125 = MODE0(GPIO125) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(23) - +GPIO126 = MODE0(GPIO126) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(23) - +GPIO127 = MODE0(GPIO127) MODE1(LCM_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD SMT_GROUP(16) - +GPIO128 = MODE0(GPIO128) MODE1(I2S0_WS) MODE2(I2S1_WS) MODE3(I2S2_WS) MODE4() MODE5(SPI_CK_2_) MODE6() MODE7(DBG_MON_A_4_) PU SMT_GROUP(40) - +GPIO129 = MODE0(GPIO129) MODE1(I2S0_BCK) MODE2(I2S1_BCK) MODE3(I2S2_BCK) MODE4() MODE5(SPI_MI_2_) MODE6() MODE7(DBG_MON_A_5_) PD SMT_GROUP(41) - +GPIO130 = MODE0(GPIO130) MODE1(I2S0_MCK) MODE2(I2S1_MCK) MODE3(I2S2_MCK) MODE4() MODE5(SPI_MO_2_) MODE6() MODE7(DBG_MON_A_6_) PD SMT_GROUP(41) - +GPIO131 = MODE0(GPIO131) MODE1(I2S0_DO) MODE2(I2S1_DO_1) MODE3(I2S2_DI_1) MODE4() MODE5(SPI_CS_2_) MODE6() MODE7(DBG_MON_A_7_) PD SMT_GROUP(40) - +GPIO132 = MODE0(GPIO132) MODE1(I2S0_DI) MODE2(I2S1_DO_2) MODE3(I2S2_DI_2) MODE4() MODE5() MODE6() MODE7(DBG_MON_A_8_) PD SMT_GROUP(40) - +GPIO133 = MODE0(GPIO133) MODE1(SDA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(24) - +GPIO134 = MODE0(GPIO134) MODE1(SCL4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU SMT_GROUP(24) - + +[GPIOEXT] +GPIOEXT0 = MODE0(GPIO0) MODE1(INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIOEXT1 = MODE0(GPIO1) MODE1(SRCVOLTEN) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_CK1) MODE7() PD +GPIOEXT2 = MODE0(GPIO2) MODE1(SRCLKEN_PERI) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_CK2) MODE7() PD +GPIOEXT3 = MODE0(GPIO3) MODE1(RTC_32K1V8) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_CK3) MODE7() PU/PD +GPIOEXT4 = MODE0(GPIO4) MODE1(WRAP_EVENT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIOEXT5 = MODE0(GPIO5) MODE1(SPI_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIOEXT6 = MODE0(GPIO6) MODE1(SPI_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIOEXT7 = MODE0(GPIO7) MODE1(SPI_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIOEXT8 = MODE0(GPIO8) MODE1(SPI_MISO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIOEXT9 = MODE0(GPIO9) MODE1(AUD_CLK) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN0) MODE7(TEST_IN0) PD +GPIOEXT10 = MODE0(GPIO10) MODE1(AUD_MISO) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN1) MODE7(TEST_OUT1) PD +GPIOEXT11 = MODE0(GPIO11) MODE1(AUD_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN2) MODE7(TSET_OUT2) PD +GPIOEXT12 = MODE0(GPIO12) MODE1(COL0_USBDL) MODE2(EINT10_1X) MODE3(PWM1_3X) MODE4() MODE5() MODE6(TEST_IN3) MODE7(TEST_OUT3) PU +GPIOEXT13 = MODE0(GPIO13) MODE1(COL1) MODE2(EINT11_1X) MODE3(SCL0_2X) MODE4() MODE5() MODE6(TEST_IN4) MODE7(TEST_OUT4) PD +GPIOEXT14 = MODE0(GPIO14) MODE1(COL2) MODE2(EINT12_1X) MODE3(SDA0_2X) MODE4() MODE5() MODE6(TEST_IN5) MODE7(TEST_OUT5) PD +GPIOEXT15 = MODE0(GPIO15) MODE1(COL3) MODE2(EINT13_1X) MODE3(SCL1_2X) MODE4() MODE5() MODE6(TEST_IN6) MODE7(TEST_OUT6) PD +GPIOEXT16 = MODE0(GPIO16) MODE1(COL4) MODE2(EINT14_1X) MODE3(SDA1_2X) MODE4() MODE5() MODE6(TEST_IN7) MODE7(TEST_OUT7) PD +GPIOEXT17 = MODE0(GPIO17) MODE1(COL5) MODE2(EINT15_1X) MODE3(SCL2_2X) MODE4() MODE5() MODE6(TEST_IN8) MODE7(TEST_OUT8) PD +GPIOEXT18 = MODE0(GPIO18) MODE1(COL6) MODE2(EINT16_1X) MODE3(SDA2_2X) MODE4(GPIO32K_0) MODE5(GPIO26M_0) MODE6(TEST_IN9) MODE7(TEST_OUT9) PD +GPIOEXT19 = MODE0(GPIO19) MODE1(COL7) MODE2(EINT17_1X) MODE3(PWM2_3X) MODE4(GPIO32K_1) MODE5(GPIO26M_1) MODE6(TEST_IN10) MODE7(TEST_OUT10) PD +GPIOEXT20 = MODE0(GPIO20) MODE1(ROW0) MODE2(EINT18_1X) MODE3(SCL0_3X) MODE4() MODE5() MODE6(TEST_IN11) MODE7(TEST_OUT11) PD +GPIOEXT21 = MODE0(GPIO21) MODE1(ROW1) MODE2(EINT19_1X) MODE3(SDA0_3X) MODE4(AUD_TSTCK) MODE5() MODE6(TEST_IN12) MODE7(TEST_OUT12) PD +GPIOEXT22 = MODE0(GPIO22) MODE1(ROW2) MODE2(EINT20_1X) MODE3(SCL1_3X) MODE4() MODE5() MODE6(TEST_IN13) MODE7(TEST_OUT13) PD +GPIOEXT23 = MODE0(GPIO23) MODE1(ROW3) MODE2(EINT21_1X) MODE3(SDA1_3X) MODE4() MODE5() MODE6(TEST_IN14) MODE7(TEST_OUT14) PD +GPIOEXT24 = MODE0(GPIO24) MODE1(ROW4) MODE2(EINT22_1X) MODE3(SCL2_3X) MODE4() MODE5() MODE6(TEST_IN15) MODE7(TEST_OUT15) PD +GPIOEXT25 = MODE0(GPIO25) MODE1(ROW5) MODE2(EINT23_1X) MODE3(SDA2_3X) MODE4() MODE5() MODE6(TEST_IN16) MODE7(TEST_OUT16) PD +GPIOEXT26 = MODE0(GPIO26) MODE1(ROW6) MODE2(EINT24_1X) MODE3(PWM3_3X) MODE4(GPIO32K_2) MODE5(GPIO26M_2) MODE6(TEST_IN17) MODE7(TEST_OUT17) PD +GPIOEXT27 = MODE0(GPIO27) MODE1(ROW7) MODE2(EINT3_1X) MODE3(CBUS) MODE4(GPIO32K_3) MODE5(GPIO26M_3) MODE6(TEST_IN18) MODE7(TEST_OUT18) PD +GPIOEXT28 = MODE0(GPIO28) MODE1(PWM1) MODE2(EINT4_1X) MODE3() MODE4(GPIO32K_4) MODE5(GPIO26M_4) MODE6(TEST_IN19) MODE7(TEST_OUT19) PD +GPIOEXT29 = MODE0(GPIO29) MODE1(PWM2) MODE2(EINT5_1X) MODE3() MODE4(GPIO32K_5) MODE5(GPIO26M_5) MODE6(TEST_IN20) MODE7(TEST_OUT20) PD +GPIOEXT30 = MODE0(GPIO30) MODE1(PWM3) MODE2(EINT6_1X) MODE3(COL0) MODE4(GPIO32K_6) MODE5(GPIO26M_6) MODE6(TEST_IN21) MODE7(TEST_OUT21) PD +GPIOEXT31 = MODE0(GPIO31) MODE1(SCL0) MODE2(EINT7_1X) MODE3(PWM1_2X) MODE4() MODE5() MODE6(TEST_IN22) MODE7(TEST_OUT22) PU +GPIOEXT32 = MODE0(GPIO32) MODE1(SDA0) MODE2(EINT8_1X) MODE3() MODE4() MODE5() MODE6(TEST_IN23) MODE7(TEST_OUT23) PU +GPIOEXT33 = MODE0(GPIO33) MODE1(SCL1) MODE2(EINT9_1X) MODE3(PWM2_2X) MODE4() MODE5() MODE6(TEST_IN24) MODE7(TEST_OUT24) PU +GPIOEXT34 = MODE0(GPIO34) MODE1(SDA1) MODE2(EINT0_1X) MODE3() MODE4() MODE5() MODE6(TEST_IN25) MODE7(TEST_OUT25) PU +GPIOEXT35 = MODE0(GPIO35) MODE1(SCL2) MODE2(EINT1_1X) MODE3(PWM3_2X) MODE4() MODE5() MODE6(TEST_IN26) MODE7(TEST_OUT26) PU +GPIOEXT36 = MODE0(GPIO36) MODE1(SDA2) MODE2(EINT2_1X) MODE3() MODE4() MODE5() MODE6(TEST_IN27) MODE7(TEST_OUT27) PU +GPIOEXT37 = MODE0(GPIO37) MODE1(HDMISD) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN28) MODE7(TEST_OUT28) PU/PD +GPIOEXT38 = MODE0(GPIO38) MODE1(HDMISCK) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN29) MODE7(TEST_OUT29) PU/PD +GPIOEXT39 = MODE0(GPIO39) MODE1(HTPLG) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN30) MODE7(TEST_OUT30) PU/PD +GPIOEXT40 = MODE0(GPIO40) MODE1(CEC) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN31) MODE7(TEST_OUT31) PU/PD + +[GPO] + +[EINT] +EINT_COUNT = 133 +EINT_DEBOUNCE_TIME_COUNT = 12 + +[EINT_EXT] +EINT_EXT_COUNT = 25 +EINT_EXT_DEBOUNCE_TIME_COUNT = 12 + +[ADC] +ADC_COUNT = 6 + +[ADC_EX_PIN] +0 +1 +12 +13 +14 +15 + +[ADC_EX_PIN] + +[KEYPAD] +KEY_ROW = 8 +KEY_COLUMN = 9 + +[I2C] +I2C_COUNT = 32 +CHANNEL_COUNT = 6 + +[CLK_BUF] +CLK_BUF_COUNT = 4 + +[POWER] +AVDD10_SSUSB +AVDD18_AP +AVDD18_ARMPLL +AVDD18_HDMITX +AVDD18_MEMPLL_A +AVDD18_MEMPLL_B +AVDD18_MIPIRX0 +AVDD18_MIPIRX1 +AVDD18_MIPITX1 +AVDD18_MIPITX2 +AVDD18_PLLGP +AVDD18_SSUSB +AVDD18_USB_P0 +AVDD18_USB_P1 +AVDD33_USB_P0 +AVDD33_USB_P1 +DDRV_A_1 +DDRV_A_2 +DDRV_A_3 +DDRV_A_4 +DDRV_B_1 +DDRV_B_2 +DDRV_B_3 +DDRV_B_4 +DVDD_CORE +DVDD_CORE_1 +DVDD_CORE_2 +DVDD_CORE_3 +DVDD_CORE_4 +DVDD_CORE_5 +DVDD_CORE_6 +DVDD_CORE_7 +DVDD_CORE_8 +DVDD_CORE_9 +DVDD_DVFS1 +DVDD_DVFS2 +DVDD_GPU +DVDD_SRAM1 +DVDD_SRAM2 +DVDD18_EFUSE +VCC12IO_HSIC +VCC18IO_0 +VCC18IO_0_CONN +VCC18IO_0_MSDC3 +VCC18IO_2 +VCC18IO_4 +VCC18IO_5 +VCC18IO_6 +VCC18IO_8 +VCC18IO_EINT +VCC18IO_MC1 +VCC18IO_MC2 +VCC33IO_MC1 +VCC33IO_MC2 +VCC33IO_NAND + +[AVDD10_SSUSB] +VCC1V0 + +[AVDD18_AP] +VIO18 + +[AVDD18_ARMPLL] +VIO18 + +[AVDD18_HDMITX] +VIO18 + +[AVDD18_MEMPLL_A] +VIO18 + +[AVDD18_MEMPLL_B] +VIO18 + +[AVDD18_MIPIRX0] +VIO18 + +[AVDD18_MIPIRX1] +VIO18 + +[AVDD18_MIPITX1] +VIO18 + +[AVDD18_MIPITX2] +VIO18 + +[AVDD18_PLLGP] +VIO18 + +[AVDD18_SSUSB] +VIO18 + +[AVDD18_USB_P0] +VIO18 + +[AVDD18_USB_P1] +VIO18 + +[AVDD33_USB_P0] +VUSB + +[AVDD33_USB_P1] +VUSB + +[DDRV_A_1] +VM + +[DDRV_A_2] +VM + +[DDRV_A_3] +VM + +[DDRV_A_4] +VM + +[DDRV_B_1] +VM + +[DDRV_B_2] +VM + +[DDRV_B_3] +VM + +[DDRV_B_4] +VM + +[DVDD_CORE] +VCORE + +[DVDD_CORE_1] +VCORE + +[DVDD_CORE_2] +VCORE + +[DVDD_CORE_3] +VCORE + +[DVDD_CORE_4] +VCORE + +[DVDD_CORE_5] +VCORE + +[DVDD_CORE_6] +VCORE + +[DVDD_CORE_7] +VCORE + +[DVDD_CORE_8] +VCORE + +[DVDD_CORE_9] +VCORE + +[DVDD_DVFS1] +VDVFS1 + +[DVDD_DVFS2] +VDVFS2 + +[DVDD_GPU] +VGPU + +[DVDD_SRAM1] +VSRAMCA15 + +[DVDD_SRAM2] +VSRAMCA7 + +[DVDD18_EFUSE] +VIO18 + +[VCC12IO_HSIC] +VGP4 + +[VCC18IO_0] +VIO18 + +[VCC18IO_0_CONN] +VIO18 + +[VCC18IO_0_MSDC3] +VIO18 + +[VCC18IO_2] +VIO18 + +[VCC18IO_4] +VIO18 + +[VCC18IO_5] +VIO18 + +[VCC18IO_6] +VIO18 + +[VCC18IO_8] +VIO18 + +[VCC18IO_EINT] +VIO18 + +[VCC18IO_MC1] +VIO18 + +[VCC18IO_MC2] +VIO18 + +[VCC33IO_MC1] +VMC + +[VCC33IO_MC2] +VMC + +[VCC33IO_NAND] +VMC + diff --git a/tools/dct/MT8590.fig b/tools/dct/MT8590.fig new file mode 100755 index 000000000..c8b78a871 --- /dev/null +++ b/tools/dct/MT8590.fig @@ -0,0 +1,445 @@ +[Chip Type] +Chip = MT8590 +GPIO_Pull_Sel = 1 +PMIC_Config = 1 +PMIC_GPIO_Config = 0 +EINT_EXT_Config = 0 +POWER_Config = 1 +POWER_COUNT = 32 +GPIO_ModeNum = 8 +AndroidPhone = 1 +SpecialKey_Config = 1 + + +[GPIO] +GPIO0 = MODE0(GPIO0) MODE1(PWRAP_SPIDO) MODE2(PWRAP_SPIDI) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO1 = MODE0(GPIO1) MODE1(PWRAP_SPIDI) MODE2(PWRAP_SPIDO) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO2 = MODE0(GPIO2) MODE1(PWRAP_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO3 = MODE0(GPIO3) MODE1(PWRAP_SPICK_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO4 = MODE0(GPIO4) MODE1(PWRAP_SPICS_B_I) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO5 = MODE0(GPIO5) MODE1(PWRAP_SPICK2_I) MODE2() MODE3() MODE4() MODE5(ANT_SEL1) MODE6() MODE7() PD +GPIO6 = MODE0(GPIO6) MODE1(PWRAP_SPICS2_B_I) MODE2() MODE3() MODE4() MODE5(ANT_SEL0) MODE6() MODE7(DBG_MON_A[0]) PU +GPIO7 = MODE0(GPIO7) MODE1(SPI1_CS) MODE2() MODE3() MODE4(KCOL0) MODE5() MODE6() MODE7(DBG_MON_B[12]) PD +GPIO8 = MODE0(GPIO8) MODE1(SPI1_MI) MODE2(SPI1_MO) MODE3() MODE4(KCOL1) MODE5() MODE6() MODE7(DBG_MON_B[13]) PD +GPIO9 = MODE0(GPIO9) MODE1(SPI1_MO) MODE2(SPI1_MI) MODE3(EXT_FRAME_SYNC) MODE4(KCOL2) MODE5() MODE6() MODE7(DBG_MON_B[14]) PD +GPIO10 = MODE0(GPIO10) MODE1(RTC32K_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO11 = MODE0(GPIO11) MODE1(WATCHDOG) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO12 = MODE0(GPIO12) MODE1(SRCLKENA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO13 = MODE0(GPIO13) MODE1(SRCLKENAI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO14 = MODE0(GPIO14) MODE1(URXD2) MODE2(UTXD2) MODE3() MODE4() MODE5(SRCCLKENAI2) MODE6() MODE7(DBG_MON_B[30]) PD +GPIO15 = MODE0(GPIO15) MODE1(UTXD2) MODE2(URXD2) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[31]) PD +GPIO16 = MODE0(GPIO16) MODE1(I2S5_DATA_IN) MODE2() MODE3(PCM_RX) MODE4(ANT_SEL4) MODE5() MODE6() MODE7() PD +GPIO17 = MODE0(GPIO17) MODE1(I2S5_BCK) MODE2() MODE3(PCM_CLK0) MODE4(ANT_SEL2) MODE5() MODE6() MODE7() PD +GPIO18 = MODE0(GPIO18) MODE1(PCM_CLK0) MODE2(MRG_CLK) MODE3() MODE4(MM_TEST_CK) MODE5(CONN_DSP_JCK) MODE6(WCN_PCM_CLKO) MODE7(DBG_MON_A[3]) PD +GPIO19 = MODE0(GPIO19) MODE1(PCM_SYNC) MODE2(MRG_SYNC) MODE3() MODE4() MODE5(CONN_DSP_JINTP) MODE6(WCN_PCM_SYNC) MODE7(DBG_MON_A[5]) PD +GPIO20 = MODE0(GPIO20) MODE1(PCM_RX) MODE2(MRG_RX) MODE3(MRG_TX) MODE4(PCM_TX) MODE5(CONN_DSP_JDI) MODE6(WCN_PCM_RX) MODE7(DBG_MON_A[4]) PD +GPIO21 = MODE0(GPIO21) MODE1(PCM_TX) MODE2(MRG_TX) MODE3(MRG_RX) MODE4(PCM_RX) MODE5(CONN_DSP_JMS) MODE6(WCN_PCM_TX) MODE7(DBG_MON_A[2]) PD +GPIO22 = MODE0(GPIO22) MODE1(UCTS0) MODE2(PCIE0_PERST_N) MODE3(KCOL3) MODE4(CONN_DSP_JDO) MODE5(EXT_FRAME_SYNC) MODE6() MODE7(DBG_MON_A[30]) PD +GPIO23 = MODE0(GPIO23) MODE1(URTS0) MODE2(PCIE1_PERST_N) MODE3(KCOL2) MODE4(CONN_MCU_TDO) MODE5(EXT_FRAME_SYNC) MODE6() MODE7(DBG_MON_A[29]) PD +GPIO24 = MODE0(GPIO24) MODE1(UCTS1) MODE2(PCIE2_PERST_N) MODE3(KCOL1) MODE4(CONN_MCU_DBGACK_N) MODE5() MODE6() MODE7(DBG_MON_A[28]) PD +GPIO25 = MODE0(GPIO25) MODE1(URTS1) MODE2() MODE3(KCOL0) MODE4(CONN_MCU_DBGI_N) MODE5() MODE6() MODE7(DBG_MON_A[27]) PD +GPIO26 = MODE0(GPIO26) MODE1(UCTS3) MODE2(DRV_VBUS_P1) MODE3(KROW3) MODE4(CONN_MCU_TCK0) MODE5(CONN_MCU_AICE_JCKC) MODE6(PCIE2_WAKE_N) MODE7(DBG_MON_A[26]) PD +GPIO27 = MODE0(GPIO27) MODE1(URTS3) MODE2(IDDIG_P1) MODE3(KROW2) MODE4(CONN_MCU_TDI) MODE5() MODE6(PCIE1_WAKE_N) MODE7(DBG_MON_A[25]) PD +GPIO28 = MODE0(GPIO28) MODE1(DRV_VBUS) MODE2() MODE3(KROW1) MODE4(CONN_MCU_TRST_B) MODE5() MODE6(PCIE0_WAKE_N) MODE7(DBG_MON_A[24]) PD +GPIO29 = MODE0(GPIO29) MODE1(IDDIG) MODE2(MSDC1_WP) MODE3(KROW0) MODE4(CONN_MCU_TMS) MODE5(CONN_MCU_AICE_JMSC) MODE6(PCIE2_PERST_N) MODE7(DBG_MON_A[23]) PD +GPIO30 = MODE0(GPIO30) MODE1(I2S5_LRCK) MODE2() MODE3(PCM_SYNC) MODE4(ANT_SEL1) MODE5() MODE6() MODE7() PD +GPIO31 = MODE0(GPIO31) MODE1(I2S5_MCLK) MODE2() MODE3() MODE4(ANT_SEL0) MODE5() MODE6() MODE7() PD +GPIO32 = MODE0(GPIO32) MODE1(I2S5_DATA) MODE2(I2S5_DATA_BYPS) MODE3(PCM_TX) MODE4(ANT_SEL3) MODE5() MODE6() MODE7() PD +GPIO33 = MODE0(GPIO33) MODE1(I2S1_DATA) MODE2(I2S1_DATA_BYPS) MODE3(PCM_TX) MODE4(IMG_TEST_CK) MODE5(G1_RXD0) MODE6(WCN_PCM_TX) MODE7(DBG_MON_B[8]) PD +GPIO34 = MODE0(GPIO34) MODE1(I2S1_DATA_IN) MODE2() MODE3(PCM_RX) MODE4(VDEC_TEST_CK) MODE5(G1_RXD1) MODE6(WCN_PCM_RX) MODE7(DBG_MON_B[7]) PD +GPIO35 = MODE0(GPIO35) MODE1(I2S1_BCK) MODE2() MODE3(PCM_CLK0) MODE4() MODE5(G1_RXD2) MODE6(WCN_PCM_CLKO) MODE7(DBG_MON_B[9]) PD +GPIO36 = MODE0(GPIO36) MODE1(I2S1_LRCK) MODE2() MODE3(PCM_SYNC) MODE4() MODE5(G1_RXD3) MODE6(WCN_PCM_SYNC) MODE7(DBG_MON_B[10]) PD +GPIO37 = MODE0(GPIO37) MODE1(I2S1_MCLK) MODE2() MODE3() MODE4() MODE5(G1_RXDV) MODE6() MODE7(DBG_MON_B[11]) PD +GPIO38 = MODE0(GPIO38) MODE1(I2S2_DATA) MODE2(I2S2_DATA_BYPS) MODE3(PCM_TX) MODE4(DMIC_DAT0) MODE5() MODE6() MODE7() PD +GPIO39 = MODE0(GPIO39) MODE1(JTMS) MODE2(CONN_MCU_TMS) MODE3(CONN_MCU_AICE_JMSC) MODE4(DFD_TMS_XI) MODE5() MODE6() MODE7() PU +GPIO40 = MODE0(GPIO40) MODE1(JTCK) MODE2(CONN_MCU_TCK1) MODE3(CONN_MCU_AICE_JCKC) MODE4(DFD_TCK_XI) MODE5() MODE6() MODE7() PU +GPIO41 = MODE0(GPIO41) MODE1(JTDI) MODE2(CONN_MCU_TDI) MODE3() MODE4(DFD_TDI_XI) MODE5() MODE6() MODE7() PU +GPIO42 = MODE0(GPIO42) MODE1(JTDO) MODE2(CONN_MCU_TDO) MODE3() MODE4(DFD_TDO) MODE5() MODE6() MODE7() PU +GPIO43 = MODE0(GPIO43) MODE1(NCLE) MODE2(EXT_XCS2) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO44 = MODE0(GPIO44) MODE1(NCEB1) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO45 = MODE0(GPIO45) MODE1(NCEB0) MODE2(DRV_VBUS) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO46 = MODE0(GPIO46) MODE1(IR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO47 = MODE0(GPIO47) MODE1(NREB) MODE2(IDDIG_P1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO48 = MODE0(GPIO48) MODE1(NRNB) MODE2(DRV_VBUS_P1) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO49 = MODE0(GPIO49) MODE1(I2S0_DATA) MODE2(I2S0_DATA_BYPS) MODE3(PCM_TX) MODE4() MODE5() MODE6(WCN_I2S_DO) MODE7(DBG_MON_B[3]) PD +GPIO50 = MODE0(GPIO50) MODE1(I2S2_BCK) MODE2() MODE3(PCM_CLK0) MODE4(DMIC_SCK1) MODE5() MODE6() MODE7() PD +GPIO51 = MODE0(GPIO51) MODE1(I2S2_DATA_IN) MODE2() MODE3(PCM_RX) MODE4(DMIC_SCK0) MODE5() MODE6() MODE7() PD +GPIO52 = MODE0(GPIO52) MODE1(I2S2_LRCK) MODE2() MODE3(PCM_SYNC) MODE4(DMIC_DAT1) MODE5() MODE6() MODE7() PD +GPIO53 = MODE0(GPIO53) MODE1(SPI0_CS) MODE2() MODE3(SPDIF) MODE4(ADC_CK) MODE5(PWM1) MODE6() MODE7(DBG_MON_A[7]) PD +GPIO54 = MODE0(GPIO54) MODE1(SPI0_CK) MODE2() MODE3(SPDIF_IN1) MODE4(ADC_DAT_IN) MODE5() MODE6() MODE7(DBG_MON_A[10]) PD +GPIO55 = MODE0(GPIO55) MODE1(SPI0_MI) MODE2(SPI0_MO) MODE3(MSDC1_WP) MODE4(ADC_WS) MODE5(PWM2) MODE6() MODE7(DBG_MON_A[8]) PD +GPIO56 = MODE0(GPIO56) MODE1(SPI0_MO) MODE2(SPI0_MI) MODE3(SPDIF_IN0) MODE4() MODE5() MODE6() MODE7(DBG_MON_A[9]) PD +GPIO57 = MODE0(GPIO57) MODE1(SDA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO58 = MODE0(GPIO58) MODE1(SCL1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO59 = MODE0(GPIO59) MODE1(RAMBUF_I_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO60 = MODE0(GPIO60) MODE1(WB_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[11]) PD +GPIO61 = MODE0(GPIO61) MODE1(F2W_DATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[16]) PD +GPIO62 = MODE0(GPIO62) MODE1(F2W_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[15]) PD +GPIO63 = MODE0(GPIO63) MODE1(WB_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[13]) PD +GPIO64 = MODE0(GPIO64) MODE1(WB_SDATA) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[12]) PD +GPIO65 = MODE0(GPIO65) MODE1(WB_SEN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[14]) PD +GPIO66 = MODE0(GPIO66) MODE1(WB_CRTL0) MODE2() MODE3() MODE4() MODE5(DFD_NTRST_XI) MODE6() MODE7(DBG_MON_A[17]) PD +GPIO67 = MODE0(GPIO67) MODE1(WB_CRTL1) MODE2() MODE3() MODE4() MODE5(DFD_TMS_XI) MODE6() MODE7(DBG_MON_A[18]) PD +GPIO68 = MODE0(GPIO68) MODE1(WB_CRTL2) MODE2() MODE3() MODE4() MODE5(DFD_TCK_XI) MODE6() MODE7(DBG_MON_A[19]) PD +GPIO69 = MODE0(GPIO69) MODE1(WB_CRTL3) MODE2() MODE3() MODE4() MODE5(DFD_TDI_XI) MODE6() MODE7(DBG_MON_A[20]) PD +GPIO70 = MODE0(GPIO70) MODE1(WB_CRTL4) MODE2() MODE3() MODE4() MODE5(DFD_TDO) MODE6() MODE7(DBG_MON_A[2]) PD +GPIO71 = MODE0(GPIO71) MODE1(WB_CRTL5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[22]) PD +GPIO72 = MODE0(GPIO72) MODE1(I2S0_DATA_IN) MODE2() MODE3(PCM_RX) MODE4(PWM0) MODE5(DISP_PWM) MODE6(WCN_I2S_DI) MODE7(DBG_MON_B[2]) PD +GPIO73 = MODE0(GPIO73) MODE1(I2S0_LRCK) MODE2() MODE3(PCM_SYNC) MODE4() MODE5() MODE6(WCN_I2S_LRCK) MODE7(DBG_MON_B[5]) PD +GPIO74 = MODE0(GPIO74) MODE1(I2S0_BCK) MODE2() MODE3(PCM_CLK0) MODE4() MODE5() MODE6(WCN_I2S_BCK) MODE7(DBG_MON_B[4]) PD +GPIO75 = MODE0(GPIO75) MODE1(SDA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO76 = MODE0(GPIO76) MODE1(SCL0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO77 = MODE0(GPIO77) MODE1(SDA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO78 = MODE0(GPIO78) MODE1(SCL2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO79 = MODE0(GPIO79) MODE1(URXD0) MODE2(UTXD0) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO80 = MODE0(GPIO80) MODE1(UTXD0) MODE2(URXD0) MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO81 = MODE0(GPIO81) MODE1(URXD1) MODE2(UTXD1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO82 = MODE0(GPIO82) MODE1(UTXD1) MODE2(URXD1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO83 = MODE0(GPIO83) MODE1(LCM_RST) MODE2(VDAC_CK_XI) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[1]) PD +GPIO84 = MODE0(GPIO84) MODE1(DSI_TE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[0]) PD +GPIO85 = MODE0(GPIO85) MODE1(MSDC2_CMD) MODE2(ANT_SEL0) MODE3(SDA1) MODE4() MODE5() MODE6(I2SOUT_BCK) MODE7() PD +GPIO86 = MODE0(GPIO86) MODE1(MSDC2_CLK) MODE2(ANT_SEL1) MODE3(SCL1) MODE4() MODE5() MODE6(I2SOUT_LRCK) MODE7() PD +GPIO87 = MODE0(GPIO87) MODE1(MSDC2_DAT0) MODE2(ANT_SEL2) MODE3() MODE4() MODE5(UTXD0) MODE6(I2SOUT_DATA_OUT) MODE7() PD +GPIO88 = MODE0(GPIO88) MODE1(MSDC2_DAT1) MODE2(ANT_SEL3) MODE3(PWM0) MODE4() MODE5(URXD0) MODE6(PWM1) MODE7() PD +GPIO89 = MODE0(GPIO89) MODE1(MSDC2_DAT2) MODE2(ANT_SEL4) MODE3(SDA2) MODE4() MODE5(UTXD1) MODE6(PWM2) MODE7() PD +GPIO90 = MODE0(GPIO90) MODE1(MSDC2_DAT3) MODE2(ANT_SEL5) MODE3(SCL2) MODE4(EXT_FRAME_SYNC) MODE5(URXD1) MODE6(PWM3) MODE7() PD +GPIO91 = MODE0(GPIO91) MODE1(TDN3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO92 = MODE0(GPIO92) MODE1(TDP3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO93 = MODE0(GPIO93) MODE1(TDN2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO94 = MODE0(GPIO94) MODE1(TDP2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO95 = MODE0(GPIO95) MODE1(TCN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO96 = MODE0(GPIO96) MODE1(TCP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO97 = MODE0(GPIO97) MODE1(TDN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO98 = MODE0(GPIO98) MODE1(TDP1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO99 = MODE0(GPIO99) MODE1(TDN0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO100 = MODE0(GPIO100) MODE1(TDP0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO101 = MODE0(GPIO101) MODE1(SPI2_CS) MODE2() MODE3(SCL3) MODE4(KROW0) MODE5() MODE6() MODE7() PD +GPIO102 = MODE0(GPIO102) MODE1(SPI2_MI) MODE2(SPI2_MO) MODE3(SDA3) MODE4(KROW1) MODE5() MODE6() MODE7() PD +GPIO103 = MODE0(GPIO103) MODE1(SPI2_MO) MODE2(SPI2_MI) MODE3(SCL3) MODE4(KROW2) MODE5() MODE6() MODE7() PD +GPIO104 = MODE0(GPIO104) MODE1(SPI2_CK) MODE2() MODE3(SDA3) MODE4(KROW3) MODE5() MODE6() MODE7() PD +GPIO105 = MODE0(GPIO105) MODE1(MSDC1_CMD) MODE2(ANT_SEL0) MODE3(SDA1) MODE4() MODE5() MODE6(I2SOUT_BCK) MODE7(DBG_MON_B[27]) PU +GPIO106 = MODE0(GPIO106) MODE1(MSDC1_CLK) MODE2(ANT_SEL1) MODE3(SCL1) MODE4() MODE5() MODE6(I2SOUT_LRCK) MODE7(DBG_MON_B[28]) PD +GPIO107 = MODE0(GPIO107) MODE1(MSDC1_DAT0) MODE2(ANT_SEL2) MODE3() MODE4() MODE5(UTXD0) MODE6(I2SOUT_DATA_OUT) MODE7(DBG_MON_B[26]) PU +GPIO108 = MODE0(GPIO108) MODE1(MSDC1_DAT1) MODE2(ANT_SEL3) MODE3(PWM0) MODE4() MODE5(URXD0) MODE6(PWM1) MODE7(DBG_MON_B[25]) PU +GPIO109 = MODE0(GPIO109) MODE1(MSDC1_DAT2) MODE2(ANT_SEL4) MODE3(SDA2) MODE4() MODE5(UTXD1) MODE6(PWM2) MODE7(DBG_MON_B[24]) PU +GPIO110 = MODE0(GPIO110) MODE1(MSDC1_DAT3) MODE2(ANT_SEL5) MODE3(SCL2) MODE4(EXT_FRAME_SYNC) MODE5(URXD1) MODE6(PWM3) MODE7(DBG_MON_B[23]) PU +GPIO111 = MODE0(GPIO111) MODE1(MSDC0_DAT7) MODE2() MODE3() MODE4(NLD7) MODE5() MODE6() MODE7() PU +GPIO112 = MODE0(GPIO112) MODE1(MSDC0_DAT6) MODE2() MODE3() MODE4(NLD6) MODE5() MODE6() MODE7() PU +GPIO113 = MODE0(GPIO113) MODE1(MSDC0_DAT5) MODE2() MODE3() MODE4(NLD5) MODE5() MODE6() MODE7() PU +GPIO114 = MODE0(GPIO114) MODE1(MSDC0_DAT4) MODE2() MODE3() MODE4(NLD4) MODE5() MODE6() MODE7() PU +GPIO115 = MODE0(GPIO115) MODE1(MSDC0_RSTB) MODE2() MODE3() MODE4(NLD8) MODE5() MODE6() MODE7() PU +GPIO116 = MODE0(GPIO116) MODE1(MSDC0_CMD) MODE2() MODE3() MODE4(NALE) MODE5() MODE6() MODE7() PU +GPIO117 = MODE0(GPIO117) MODE1(MSDC0_CLK) MODE2() MODE3() MODE4(NWEB) MODE5() MODE6() MODE7() PD +GPIO118 = MODE0(GPIO118) MODE1(MSDC0_DAT3) MODE2() MODE3() MODE4(NLD3) MODE5() MODE6() MODE7() PU +GPIO119 = MODE0(GPIO119) MODE1(MSDC0_DAT2) MODE2() MODE3() MODE4(NLD2) MODE5() MODE6() MODE7() PU +GPIO120 = MODE0(GPIO120) MODE1(MSDC0_DAT1) MODE2() MODE3() MODE4(NLD1) MODE5() MODE6() MODE7() PU +GPIO121 = MODE0(GPIO121) MODE1(MSDC0_DAT0) MODE2() MODE3() MODE4(NLD0) MODE5(WATCHDOG) MODE6() MODE7() PU +GPIO122 = MODE0(GPIO122) MODE1(CEC) MODE2() MODE3() MODE4(SDA2) MODE5(URXD0) MODE6() MODE7() PU +GPIO123 = MODE0(GPIO123) MODE1(HTPLG) MODE2() MODE3() MODE4(SCL2) MODE5(UTXD0) MODE6() MODE7() PU +GPIO124 = MODE0(GPIO124) MODE1(HDMISCK) MODE2() MODE3() MODE4(SDA1) MODE5(PWM3) MODE6() MODE7() PU +GPIO125 = MODE0(GPIO125) MODE1(HDMISD) MODE2() MODE3() MODE4(SCL1) MODE5(PWM4) MODE6() MODE7() PU +GPIO126 = MODE0(GPIO126) MODE1(I2S0_MCLK) MODE2() MODE3() MODE4() MODE5() MODE6(WCN_I2S_MCLK) MODE7(DBG_MON_B[6]) PD +GPIO127 = MODE0(GPIO127) MODE1(RAMBUF_IDATA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO128 = MODE0(GPIO128) MODE1(RAMBUF_IDATA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO129 = MODE0(GPIO129) MODE1(RAMBUF_IDATA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO130 = MODE0(GPIO130) MODE1(RAMBUF_IDATA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO131 = MODE0(GPIO131) MODE1(RAMBUF_IDATA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO132 = MODE0(GPIO132) MODE1(RAMBUF_IDATA5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO133 = MODE0(GPIO133) MODE1(RAMBUF_IDATA6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO134 = MODE0(GPIO134) MODE1(RAMBUF_IDATA7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO135 = MODE0(GPIO135) MODE1(RAMBUF_IDATA8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO136 = MODE0(GPIO136) MODE1(RAMBUF_IDATA9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO137 = MODE0(GPIO137) MODE1(RAMBUF_IDATA10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO138 = MODE0(GPIO138) MODE1(RAMBUF_IDATA11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO139 = MODE0(GPIO139) MODE1(RAMBUF_IDATA12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO140 = MODE0(GPIO140) MODE1(RAMBUF_IDATA13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO141 = MODE0(GPIO141) MODE1(RAMBUF_IDATA14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO142 = MODE0(GPIO142) MODE1(RAMBUF_IDATA15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO143 = MODE0(GPIO143) MODE1(RAMBUF_ODATA0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO144 = MODE0(GPIO144) MODE1(RAMBUF_ODATA1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO145 = MODE0(GPIO145) MODE1(RAMBUF_ODATA2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO146 = MODE0(GPIO146) MODE1(RAMBUF_ODATA3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO147 = MODE0(GPIO147) MODE1(RAMBUF_ODATA4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO148 = MODE0(GPIO148) MODE1(RAMBUF_ODATA5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO149 = MODE0(GPIO149) MODE1(RAMBUF_ODATA6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO150 = MODE0(GPIO150) MODE1(RAMBUF_ODATA7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO151 = MODE0(GPIO151) MODE1(RAMBUF_ODATA8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO152 = MODE0(GPIO152) MODE1(RAMBUF_ODATA9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO153 = MODE0(GPIO153) MODE1(RAMBUF_ODATA10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO154 = MODE0(GPIO154) MODE1(RAMBUF_ODATA11) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO155 = MODE0(GPIO155) MODE1(RAMBUF_ODATA12) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO156 = MODE0(GPIO156) MODE1(RAMBUF_ODATA13) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO157 = MODE0(GPIO157) MODE1(RAMBUF_ODATA14) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO158 = MODE0(GPIO158) MODE1(RAMBUF_ODATA15) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO159 = MODE0(GPIO159) MODE1(RAMBUF_BE0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO160 = MODE0(GPIO160) MODE1(RAMBUF_BE1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO161 = MODE0(GPIO161) MODE1(AP2PT_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO162 = MODE0(GPIO162) MODE1(AP2PT_INT_CLR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO163 = MODE0(GPIO163) MODE1(PT2AP_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO164 = MODE0(GPIO164) MODE1(PT2AP_INT_CLR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO165 = MODE0(GPIO165) MODE1(AP2UP_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO166 = MODE0(GPIO166) MODE1(AP2UP_INT_CLR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO167 = MODE0(GPIO167) MODE1(UP2AP_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO168 = MODE0(GPIO168) MODE1(UP2AP_INT_CLR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO169 = MODE0(GPIO169) MODE1(RAMBUF_ADDR0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO170 = MODE0(GPIO170) MODE1(RAMBUF_ADDR1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO171 = MODE0(GPIO171) MODE1(RAMBUF_ADDR2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO172 = MODE0(GPIO172) MODE1(RAMBUF_ADDR3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO173 = MODE0(GPIO173) MODE1(RAMBUF_ADDR4) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO174 = MODE0(GPIO174) MODE1(RAMBUF_ADDR5) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO175 = MODE0(GPIO175) MODE1(RAMBUF_ADDR6) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO176 = MODE0(GPIO176) MODE1(RAMBUF_ADDR7) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO177 = MODE0(GPIO177) MODE1(RAMBUF_ADDR8) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO178 = MODE0(GPIO178) MODE1(RAMBUF_ADDR9) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO179 = MODE0(GPIO179) MODE1(RAMBUF_ADDR10) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO180 = MODE0(GPIO180) MODE1(RAMBUF_RW) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO181 = MODE0(GPIO181) MODE1(RAMBUF_LAST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO182 = MODE0(GPIO182) MODE1(RAMBUF_HP) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO183 = MODE0(GPIO183) MODE1(RAMBUF_REQ) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO184 = MODE0(GPIO184) MODE1(RAMBUF_ALE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO185 = MODE0(GPIO185) MODE1(RAMBUF_DLE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO186 = MODE0(GPIO186) MODE1(RAMBUF_WDLE) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO187 = MODE0(GPIO187) MODE1(RAMBUF_O_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO188 = MODE0(GPIO188) MODE1(I2S2_MCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO189 = MODE0(GPIO189) MODE1(I2S3_DATA) MODE2(I2S3_DATA_BYPS) MODE3(PCM_TX) MODE4() MODE5() MODE6() MODE7() PD +GPIO190 = MODE0(GPIO190) MODE1(I2S3_DATA_IN) MODE2() MODE3(PCM_RX) MODE4() MODE5() MODE6() MODE7() PD +GPIO191 = MODE0(GPIO191) MODE1(I2S3_BCK) MODE2() MODE3(PCM_CLK0) MODE4() MODE5() MODE6() MODE7() PD +GPIO192 = MODE0(GPIO192) MODE1(I2S3_LRCK) MODE2() MODE3(PCM_SYNC) MODE4() MODE5() MODE6() MODE7() PD +GPIO193 = MODE0(GPIO193) MODE1(I2S3_MCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO194 = MODE0(GPIO194) MODE1(I2S4_DATA) MODE2(I2S4_DATA_BYPS) MODE3(PCM_TX) MODE4() MODE5() MODE6() MODE7() PD +GPIO195 = MODE0(GPIO195) MODE1(I2S4_DATA_IN) MODE2() MODE3(PCM_RX) MODE4() MODE5() MODE6() MODE7() PD +GPIO196 = MODE0(GPIO196) MODE1(I2S4_BCK) MODE2() MODE3(PCM_CLK0) MODE4() MODE5() MODE6() MODE7() PD +GPIO197 = MODE0(GPIO197) MODE1(I2S4_LRCK) MODE2() MODE3(PCM_SYNC) MODE4() MODE5() MODE6() MODE7() PD +GPIO198 = MODE0(GPIO198) MODE1(I2S4_MCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO199 = MODE0(GPIO199) MODE1(SPI1_CK) MODE2() MODE3(EXT_FRAME_SYNC) MODE4(KCOL3) MODE5() MODE6() MODE7(DBG_MON_B[15]) PD +GPIO200 = MODE0(GPIO200) MODE1(SPDIF_OUT) MODE2() MODE3() MODE4() MODE5(G1_TXD3) MODE6(URXD2) MODE7(DBG_MON_B[16]) PD +GPIO201 = MODE0(GPIO201) MODE1(SPDIF_IN0) MODE2() MODE3() MODE4() MODE5(G1_TXEN) MODE6(UTXD2) MODE7(DBG_MON_B[17]) PD +GPIO202 = MODE0(GPIO202) MODE1(SPDIF_IN1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO203 = MODE0(GPIO203) MODE1(PWM0) MODE2(DISP_PWM) MODE3() MODE4() MODE5(G1_TXD2) MODE6() MODE7(DBG_MON_B[18]) PD +GPIO204 = MODE0(GPIO204) MODE1(PWM1) MODE2(CLKM3) MODE3() MODE4() MODE5(G1_TXD1) MODE6() MODE7(DBG_MON_B[19]) PD +GPIO205 = MODE0(GPIO205) MODE1(PWM2) MODE2(CLKM2) MODE3() MODE4() MODE5(G1_TXD0) MODE6() MODE7(DBG_MON_B[20]) PD +GPIO206 = MODE0(GPIO206) MODE1(PWM3) MODE2(CLKM1) MODE3(EXT_FRAME_SYNC) MODE4() MODE5(G1_TXC) MODE6() MODE7(DBG_MON_B[21]) PD +GPIO207 = MODE0(GPIO207) MODE1(PWM4) MODE2(CLKM0) MODE3(EXT_FRAME_SYNC) MODE4() MODE5(G1_RXC) MODE6() MODE7(DBG_MON_B[22]) PD +GPIO208 = MODE0(GPIO208) MODE1(AUD_EXT_CK1) MODE2(PWM0) MODE3(PCIE0_PERST_N) MODE4(ANT_SEL5) MODE5(DISP_PWM) MODE6() MODE7(DBG_MON_A[31]) PD +GPIO209 = MODE0(GPIO209) MODE1(AUD_EXT_CK2) MODE2(MSDC1_WP) MODE3(PCIE1_PERST_N) MODE4() MODE5(PWM1) MODE6() MODE7(DBG_MON_A[32]) PD +GPIO210 = MODE0(GPIO210) MODE1(AUD_CLOCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO211 = MODE0(GPIO211) MODE1(DVP_RESET) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO212 = MODE0(GPIO212) MODE1(DVP_CLOCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO213 = MODE0(GPIO213) MODE1(DVP_CS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO214 = MODE0(GPIO214) MODE1(DVP_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO215 = MODE0(GPIO215) MODE1(DVP_DI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO216 = MODE0(GPIO216) MODE1(DVP_DO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO217 = MODE0(GPIO217) MODE1(AP_CS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO218 = MODE0(GPIO218) MODE1(AP_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO219 = MODE0(GPIO219) MODE1(AP_DI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO220 = MODE0(GPIO220) MODE1(AP_DO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO221 = MODE0(GPIO221) MODE1(DVD_BCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO222 = MODE0(GPIO222) MODE1(T8032_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO223 = MODE0(GPIO223) MODE1(AP_BCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO224 = MODE0(GPIO224) MODE1(HOST_CS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO225 = MODE0(GPIO225) MODE1(HOST_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO226 = MODE0(GPIO226) MODE1(HOST_DO0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO227 = MODE0(GPIO227) MODE1(HOST_DO1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO228 = MODE0(GPIO228) MODE1(SLV_CS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO229 = MODE0(GPIO229) MODE1(SLV_CK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO230 = MODE0(GPIO230) MODE1(SLV_DI0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO231 = MODE0(GPIO231) MODE1(SLV_DI1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO232 = MODE0(GPIO232) MODE1(AP2DSP_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO233 = MODE0(GPIO233) MODE1(AP2DSP_INT_CLR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO234 = MODE0(GPIO234) MODE1(DSP2AP_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO235 = MODE0(GPIO235) MODE1(DSP2AP_INT_CLR) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO236 = MODE0(GPIO236) MODE1(EXT_SDIO3) MODE2(IDDIG) MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_A[1]) PD +GPIO237 = MODE0(GPIO237) MODE1(EXT_SDIO2) MODE2(DRV_VBUS) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO238 = MODE0(GPIO238) MODE1(EXT_SDIO1) MODE2(IDDIG_P1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO239 = MODE0(GPIO239) MODE1(EXT_SDIO0) MODE2(DRV_VBUS_P1) MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO240 = MODE0(GPIO240) MODE1(EXT_XCS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO241 = MODE0(GPIO241) MODE1(EXT_SCK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO242 = MODE0(GPIO242) MODE1(URTS2) MODE2(UTXD3) MODE3(URXD3) MODE4(SCL1) MODE5() MODE6() MODE7(DBG_MON_B[32]) PD +GPIO243 = MODE0(GPIO243) MODE1(UCTS2) MODE2(URXD3) MODE3(UTXD3) MODE4(SDA1) MODE5() MODE6() MODE7(DBG_MON_A[6]) PD +GPIO244 = MODE0(GPIO244) MODE1(HDMI_SDA_RX) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO245 = MODE0(GPIO245) MODE1(HDMI_SCL_RX) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO246 = MODE0(GPIO246) MODE1() MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO247 = MODE0(GPIO247) MODE1(HDMI_HPD_RX) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO248 = MODE0(GPIO248) MODE1(HDMI_TESTOUTP_RX) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO249 = MODE0(GPIO249) MODE1(MSDC0E_RSTB) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO250 = MODE0(GPIO250) MODE1(MSDC3_DAT7) MODE2() MODE3() MODE4() MODE5() MODE6(PCIE0_CLKREQ_N) MODE7() PU +GPIO251 = MODE0(GPIO251) MODE1(MSDC3_DAT6) MODE2() MODE3() MODE4() MODE5() MODE6(PCIE0_WAKE_N) MODE7() PU +GPIO252 = MODE0(GPIO252) MODE1(MSDC3_DAT5) MODE2() MODE3() MODE4() MODE5() MODE6(PCIE1_CLKREQ_N) MODE7() PU +GPIO253 = MODE0(GPIO253) MODE1(MSDC3_DAT4) MODE2() MODE3() MODE4() MODE5() MODE6(PCIE1_WAKE_N) MODE7() PU +GPIO254 = MODE0(GPIO254) MODE1(MSDC3_DAT3) MODE2() MODE3() MODE4() MODE5() MODE6(PCIE2_CLKREQ_N) MODE7() PU +GPIO255 = MODE0(GPIO255) MODE1(MSDC3_DAT2) MODE2() MODE3() MODE4() MODE5() MODE6(PCIE2_WAKE_N) MODE7() PU +GPIO256 = MODE0(GPIO256) MODE1(MSDC3_DAT1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO257 = MODE0(GPIO257) MODE1(MSDC3_DAT0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO258 = MODE0(GPIO258) MODE1(MSDC3_CMD) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO259 = MODE0(GPIO259) MODE1(MSDC3_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO260 = MODE0(GPIO260) MODE1(MSDC3_DSL) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO261 = MODE0(GPIO261) MODE1(MSDC1_INS) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7(DBG_MON_B[29]) PD +GPIO262 = MODE0(GPIO262) MODE1(G2_TXEN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO263 = MODE0(GPIO263) MODE1(G2_TXD3) MODE2() MODE3() MODE4() MODE5() MODE6(ANT_SEL5) MODE7() PD +GPIO264 = MODE0(GPIO264) MODE1(G2_TXD2) MODE2() MODE3() MODE4() MODE5() MODE6(ANT_SEL4) MODE7() PD +GPIO265 = MODE0(GPIO265) MODE1(G2_TXD1) MODE2() MODE3() MODE4() MODE5() MODE6(ANT_SEL3) MODE7() PD +GPIO266 = MODE0(GPIO266) MODE1(G2_TXD0) MODE2() MODE3() MODE4() MODE5() MODE6(ANT_SEL2) MODE7() PD +GPIO267 = MODE0(GPIO267) MODE1(G2_TXC) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO268 = MODE0(GPIO268) MODE1(G2_RXC) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO269 = MODE0(GPIO269) MODE1(G2_RXD0) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO270 = MODE0(GPIO270) MODE1(G2_RXD1) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO271 = MODE0(GPIO271) MODE1(G2_RXD2) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO272 = MODE0(GPIO272) MODE1(G2_RXD3) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO273 = MODE0(GPIO273) MODE1(ESW_INT) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO274 = MODE0(GPIO274) MODE1(G2_RXDV) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO275 = MODE0(GPIO275) MODE1(MDC) MODE2() MODE3() MODE4() MODE5() MODE6(ANT_SEL0) MODE7() PD +GPIO276 = MODE0(GPIO276) MODE1(MDIO) MODE2() MODE3() MODE4() MODE5() MODE6(ANT_SEL1) MODE7() PD +GPIO277 = MODE0(GPIO277) MODE1(ESW_RST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO278 = MODE0(GPIO278) MODE1(JTAG_RESET) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO279 = MODE0(GPIO279) MODE1(USB3_RES_BOND) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD + + +[GPIOEXT] +GPIO0 = MODE0(GPIO0) MODE1(INT) MODE2() MODE3() MODE4() MODE5(TEST_CK2) MODE6(TEST_IN5) MODE7(TEST_OUT5) PD +GPIO1 = MODE0(GPIO1) MODE1(SRCLKEN) MODE2() MODE3() MODE4() MODE5(TEST_CK0) MODE6(TEST_IN4) MODE7(TEST_OUT4) PD +GPIO2 = MODE0(GPIO2) MODE1(RTC_32K1V8) MODE2() MODE3() MODE4() MODE5(TEST_CK1) MODE6(TEST_IN3) MODE7(TEST_OUT3) -- +GPIO3 = MODE0(GPIO3) MODE1(SPI_CLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO4 = MODE0(GPIO4) MODE1(SPI_CSN) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PU +GPIO5 = MODE0(GPIO5) MODE1(SPI_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO6 = MODE0(GPIO6) MODE1(SPI_MISO) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() PD +GPIO7 = MODE0(GPIO7) MODE1(AUD_CLK) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN0) MODE7(TEST_OUT0) PD +GPIO8 = MODE0(GPIO8) MODE1(AUD_MOSI) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN1) MODE7(TEST_OUT1) PD +GPIO9 = MODE0(GPIO9) MODE1(AUD_MISO) MODE2() MODE3() MODE4() MODE5() MODE6(TEST_IN2) MODE7(TEST_OUT2) PD +GPIO10 = MODE0(GPIO10) MODE1(SIM1_AP_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO11 = MODE0(GPIO11) MODE1(SIM1_AP_SRST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO12 = MODE0(GPIO12) MODE1(SIM2_AP_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO13 = MODE0(GPIO13) MODE1(SIM2_AP_SRST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO14 = MODE0(GPIO14) MODE1(SIMLS1_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO15 = MODE0(GPIO15) MODE1(SIMLS1_SRST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO16 = MODE0(GPIO16) MODE1(SIMLS2_SCLK) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- +GPIO17 = MODE0(GPIO17) MODE1(SIMLS2_SRST) MODE2() MODE3() MODE4() MODE5() MODE6() MODE7() -- + + +[GPO] + +[EINT] +EINT_COUNT = 169 +EINT_DEBOUNCE_TIME_COUNT = 12 + + +[EINT_EX] +EINT_EXT_COUNT = 0 +EINT_EXT_DEBOUNCE_TIME_COUNT = 12 + + +[ADC] +ADC_COUNT = 6 + +[ADC_EX_PIN] + +[KEYPAD] +KEY_ROW = 4 +KEY_COLUMN = 4 + + +[POWER] +VDD_EMI +VDD1 +VCCK_VPROC +VCCK +DVDD28_SPDIF +DVDD28_NOR +DVDD28_MSDC2 +DVDD28_MSDC1 +DVDD28_MSDC0 +DVDD28_I2S +DVDD28_DPI +DVDD18_MIPITX +DVDD18_IO_WBCT +DVDD18_IO_SPDIF +DVDD18_IO_NOR +DVDD18_IO_MSDC2 +DVDD18_IO_MSDC1 +DVDD18_IO_MSDC0E +DVDD18_IO_MSDC0 +DVDD18_IO_I2S +DVDD18_IO_DPI +DVDD18_IO +AVDD33_USB +AVDD33_GLOBAL +AVDD18_USB +AVDD18_PLLGP +AVDD18_MEMPLL +AVDD18_HDMITX +AVDD18_GLOBAL +AVDD18_DAC +AVDD18_AP +AVDD12_GLOBAL + +[VDD_EMI] +VM +[VDD1] +VIO18 +[VCCK_VPROC] +VPROC +[VCCK] +VPROC +[DVDD28_SPDIF] +VMCH +VIO18 +[DVDD28_NOR] +VMCH +VIO18 +[DVDD28_MSDC2] +VMCH +VIO18 +[DVDD28_MSDC1] +VMCH +VIO18 +[DVDD28_MSDC0] +VEMC_3V3 +VIO18 +[DVDD28_I2S] +VMCH +VIO18 +[DVDD28_DPI] +VMCH +VIO18 +[DVDD18_MIPITX] +VIO18 +[DVDD18_IO_WBCT] +VIO18 +[DVDD18_IO_SPDIF] +VIO18 +[DVDD18_IO_NOR] +VIO18 +[DVDD18_IO_MSDC2] +VIO18 +[DVDD18_IO_MSDC1] +VIO18 +[DVDD18_IO_MSDC0E] +VIO18 +[DVDD18_IO_MSDC0] +VIO18 +[DVDD18_IO_I2S] +VIO18 +[DVDD18_IO_DPI] +VIO18 +[DVDD18_IO] +VIO18 +[AVDD33_USB] +VMC +VUSB +[AVDD33_GLOBAL] +VCAM_AF +[AVDD18_USB] +VIO18 +[AVDD18_PLLGP] +VIO18 +[AVDD18_MEMPLL] +VIO18 +[AVDD18_HDMITX] +VIO18 +[AVDD18_GLOBAL] +VCAMD_IO +[AVDD18_DAC] +VIO18 +[AVDD18_AP] +VIO18 +[AVDD12_GLOBAL] +VCAMD
\ No newline at end of file diff --git a/tools/dct/PMIC_MT6322+6333PMUMP.cmp b/tools/dct/PMIC_MT6322+6333PMUMP.cmp new file mode 100755 index 000000000..c1be85c96 --- /dev/null +++ b/tools/dct/PMIC_MT6322+6333PMUMP.cmp @@ -0,0 +1,263 @@ +[PMIC_TABLE] +NUM_LDO = 21 + + +[LDO_NAME1] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT6322_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT6322_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME1] +MT6322_POWER_LDO_VMC + +[LDO_NAME2] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT6322_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT6322_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME2] +MT6322_POWER_LDO_VMCH + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT6322_POWER_LDO_VEMC_3V3,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT6322_POWER_LDO_VEMC_3V3,KAL_FALSE); +[LDO_APPNAME3] +MT6322_POWER_LDO_VEMC_3V3 + +[LDO_NAME4] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT6322_POWER_LDO_VGP1,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT6322_POWER_LDO_VGP1,KAL_FALSE); +[LDO_APPNAME4] +MT6322_POWER_LDO_VGP1 + +[LDO_NAME5] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT6322_POWER_LDO_VGP2,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT6322_POWER_LDO_VGP2,KAL_FALSE); +[LDO_APPNAME5] +MT6322_POWER_LDO_VGP2 + +[LDO_NAME6] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT6322_POWER_LDO_VGP3,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT6322_POWER_LDO_VGP3,KAL_FALSE); +[LDO_APPNAME6] +MT6322_POWER_LDO_VGP3 + +[LDO_NAME7] +LDO_NAME=VCN_1V8 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT6322_POWER_LDO_VCN_1V8,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT6322_POWER_LDO_VCN_1V8,KAL_FALSE); +[LDO_APPNAME7] +MT6322_POWER_LDO_VCN_1V8 + +[LDO_NAME8] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM1,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM1,KAL_FALSE); +[LDO_APPNAME8] +MT6322_POWER_LDO_VSIM1 + +[LDO_NAME9] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM2,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM2,KAL_FALSE); +[LDO_APPNAME9] +MT6322_POWER_LDO_VSIM2 + +[LDO_NAME10] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_AF,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_AF,KAL_FALSE); +[LDO_APPNAME10] +MT6322_POWER_LDO_VCAM_AF + +[LDO_NAME11] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT6322_POWER_LDO_VIBR,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT6322_POWER_LDO_VIBR,KAL_FALSE); +[LDO_APPNAME11] +MT6322_POWER_LDO_VIBR + +[LDO_NAME12] +LDO_NAME=VM +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_ldo_enable(MT6322_POWER_LDO_VM,KAL_TRUE); +[LDO_ENABLE_OFF12] +pmic_ldo_enable(MT6322_POWER_LDO_VM,KAL_FALSE); +[LDO_APPNAME12] +MT6322_POWER_LDO_VM + +[LDO_NAME13] +LDO_NAME=VRF18 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_ldo_enable(MT6322_POWER_LDO_VRF18,KAL_TRUE); +[LDO_ENABLE_OFF13] +pmic_ldo_enable(MT6322_POWER_LDO_VRF18,KAL_FALSE); +[LDO_APPNAME13] +MT6322_POWER_LDO_VRF18 + +[LDO_NAME14] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF14] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME14] +MT6322_POWER_LDO_VCAMD + +[LDO_NAME15] +LDO_NAME=VCAN_IO +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_IO,KAL_TRUE); +[LDO_ENABLE_OFF15] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_IO,KAL_FALSE); +[LDO_APPNAME15] +MT6322_POWER_LDO_VCAM_IO + +[LDO_NAME16] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF16] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME16] +MT6322_POWER_LDO_VCAMA + +[LDO_NAME17] +LDO_NAME=VCN33 +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_ldo_enable(MT6322_POWER_LDO_VCN33_WIFI,KAL_TRUE); +[LDO_ENABLE_OFF17] +pmic_ldo_enable(MT6322_POWER_LDO_VCN33_WIFI,KAL_FALSE); +[LDO_APPNAME17] +MT6322_POWER_LDO_VCN33_WIFI + +[LDO_NAME18] +LDO_NAME=VCN28 +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_ldo_enable(MT6322_POWER_LDO_VCN28,KAL_TRUE); +[LDO_ENABLE_OFF18] +pmic_ldo_enable(MT6322_POWER_LDO_VCN28,KAL_FALSE); +[LDO_APPNAME18] +MT6322_POWER_LDO_VCN28 + +[LDO_NAME19] +LDO_NAME=MT6333_VCORE +[LDO_ENABLE_CONFIGURABLE19] +CONFIGURABLE = YES +[LDO_ENABLE_ON19] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vcore_en(1); +#endif +[LDO_ENABLE_OFF19] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vcore_en(0); +#endif +[LDO_APPNAME19] +MT6322_POWER_LDO_DEFAULT + +[LDO_NAME20] +LDO_NAME=MT6333_VMEM +[LDO_ENABLE_CONFIGURABLE20] +CONFIGURABLE = YES +[LDO_ENABLE_ON20] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vmem_en(1); +#endif +[LDO_ENABLE_OFF20] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vmem_en(0); +#endif +[LDO_APPNAME20] +MT6322_POWER_LDO_DEFAULT + +[LDO_NAME21] +LDO_NAME=MT6333_VRF18 +[LDO_ENABLE_CONFIGURABLE21] +CONFIGURABLE = YES +[LDO_ENABLE_ON21] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vrf18_en(1); +#endif +[LDO_ENABLE_OFF21] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vrf18_en(0); +#endif +[LDO_APPNAME21] +MT6322_POWER_LDO_DEFAULT + +[LDO_APPNAME_DEFAULT] +MT6322_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> +#ifdef MTK_MT6333_SUPPORT +#include <mach/mt6333.h> +#endif + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6322PMUMP.cmp b/tools/dct/PMIC_MT6322PMUMP.cmp new file mode 100755 index 000000000..3fe4e0beb --- /dev/null +++ b/tools/dct/PMIC_MT6322PMUMP.cmp @@ -0,0 +1,216 @@ +[PMIC_TABLE] +NUM_LDO = 18 + + +[LDO_NAME1] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT6322_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT6322_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME1] +MT6322_POWER_LDO_VMC + +[LDO_NAME2] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT6322_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT6322_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME2] +MT6322_POWER_LDO_VMCH + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT6322_POWER_LDO_VEMC_3V3,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT6322_POWER_LDO_VEMC_3V3,KAL_FALSE); +[LDO_APPNAME3] +MT6322_POWER_LDO_VEMC_3V3 + +[LDO_NAME4] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT6322_POWER_LDO_VGP1,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT6322_POWER_LDO_VGP1,KAL_FALSE); +[LDO_APPNAME4] +MT6322_POWER_LDO_VGP1 + +[LDO_NAME5] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT6322_POWER_LDO_VGP2,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT6322_POWER_LDO_VGP2,KAL_FALSE); +[LDO_APPNAME5] +MT6322_POWER_LDO_VGP2 + +[LDO_NAME6] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT6322_POWER_LDO_VGP3,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT6322_POWER_LDO_VGP3,KAL_FALSE); +[LDO_APPNAME6] +MT6322_POWER_LDO_VGP3 + +[LDO_NAME7] +LDO_NAME=VCN_1V8 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT6322_POWER_LDO_VCN_1V8,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT6322_POWER_LDO_VCN_1V8,KAL_FALSE); +[LDO_APPNAME7] +MT6322_POWER_LDO_VCN_1V8 + +[LDO_NAME8] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM1,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM1,KAL_FALSE); +[LDO_APPNAME8] +MT6322_POWER_LDO_VSIM1 + +[LDO_NAME9] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM2,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT6322_POWER_LDO_VSIM2,KAL_FALSE); +[LDO_APPNAME9] +MT6322_POWER_LDO_VSIM2 + +[LDO_NAME10] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_AF,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_AF,KAL_FALSE); +[LDO_APPNAME10] +MT6322_POWER_LDO_VCAM_AF + +[LDO_NAME11] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT6322_POWER_LDO_VIBR,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT6322_POWER_LDO_VIBR,KAL_FALSE); +[LDO_APPNAME11] +MT6322_POWER_LDO_VIBR + +[LDO_NAME12] +LDO_NAME=VM +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_ldo_enable(MT6322_POWER_LDO_VM,KAL_TRUE); +[LDO_ENABLE_OFF12] +pmic_ldo_enable(MT6322_POWER_LDO_VM,KAL_FALSE); +[LDO_APPNAME12] +MT6322_POWER_LDO_VM + +[LDO_NAME13] +LDO_NAME=VRF18 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_ldo_enable(MT6322_POWER_LDO_VRF18,KAL_TRUE); +[LDO_ENABLE_OFF13] +pmic_ldo_enable(MT6322_POWER_LDO_VRF18,KAL_FALSE); +[LDO_APPNAME13] +MT6322_POWER_LDO_VRF18 + +[LDO_NAME14] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF14] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME14] +MT6322_POWER_LDO_VCAMD + +[LDO_NAME15] +LDO_NAME=VCAN_IO +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_IO,KAL_TRUE); +[LDO_ENABLE_OFF15] +pmic_ldo_enable(MT6322_POWER_LDO_VCAM_IO,KAL_FALSE); +[LDO_APPNAME15] +MT6322_POWER_LDO_VCAM_IO + +[LDO_NAME16] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF16] +pmic_ldo_enable(MT6322_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME16] +MT6322_POWER_LDO_VCAMA + +[LDO_NAME17] +LDO_NAME=VCN33 +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_ldo_enable(MT6322_POWER_LDO_VCN33_WIFI,KAL_TRUE); +[LDO_ENABLE_OFF17] +pmic_ldo_enable(MT6322_POWER_LDO_VCN33_WIFI,KAL_FALSE); +[LDO_APPNAME17] +MT6322_POWER_LDO_VCN33_WIFI + +[LDO_NAME18] +LDO_NAME=VCN28 +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_ldo_enable(MT6322_POWER_LDO_VCN28,KAL_TRUE); +[LDO_ENABLE_OFF18] +pmic_ldo_enable(MT6322_POWER_LDO_VCN28,KAL_FALSE); +[LDO_APPNAME18] +MT6322_POWER_LDO_VCN28 + + +[LDO_APPNAME_DEFAULT] +MT6322_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6323+6333PMUMP.cmp b/tools/dct/PMIC_MT6323+6333PMUMP.cmp new file mode 100755 index 000000000..c8eb829ef --- /dev/null +++ b/tools/dct/PMIC_MT6323+6333PMUMP.cmp @@ -0,0 +1,263 @@ +[PMIC_TABLE] +NUM_LDO = 21 + + +[LDO_NAME1] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT6323_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT6323_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME1] +MT6323_POWER_LDO_VMC + +[LDO_NAME2] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT6323_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT6323_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME2] +MT6323_POWER_LDO_VMCH + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT6323_POWER_LDO_VEMC_3V3,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT6323_POWER_LDO_VEMC_3V3,KAL_FALSE); +[LDO_APPNAME3] +MT6323_POWER_LDO_VEMC_3V3 + +[LDO_NAME4] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT6323_POWER_LDO_VGP1,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT6323_POWER_LDO_VGP1,KAL_FALSE); +[LDO_APPNAME4] +MT6323_POWER_LDO_VGP1 + +[LDO_NAME5] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT6323_POWER_LDO_VGP2,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT6323_POWER_LDO_VGP2,KAL_FALSE); +[LDO_APPNAME5] +MT6323_POWER_LDO_VGP2 + +[LDO_NAME6] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT6323_POWER_LDO_VGP3,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT6323_POWER_LDO_VGP3,KAL_FALSE); +[LDO_APPNAME6] +MT6323_POWER_LDO_VGP3 + +[LDO_NAME7] +LDO_NAME=VCN_1V8 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT6323_POWER_LDO_VCN_1V8,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT6323_POWER_LDO_VCN_1V8,KAL_FALSE); +[LDO_APPNAME7] +MT6323_POWER_LDO_VCN_1V8 + +[LDO_NAME8] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM1,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM1,KAL_FALSE); +[LDO_APPNAME8] +MT6323_POWER_LDO_VSIM1 + +[LDO_NAME9] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM2,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM2,KAL_FALSE); +[LDO_APPNAME9] +MT6323_POWER_LDO_VSIM2 + +[LDO_NAME10] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_AF,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_AF,KAL_FALSE); +[LDO_APPNAME10] +MT6323_POWER_LDO_VCAM_AF + +[LDO_NAME11] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT6323_POWER_LDO_VIBR,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT6323_POWER_LDO_VIBR,KAL_FALSE); +[LDO_APPNAME11] +MT6323_POWER_LDO_VIBR + +[LDO_NAME12] +LDO_NAME=VM +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_ldo_enable(MT6323_POWER_LDO_VM,KAL_TRUE); +[LDO_ENABLE_OFF12] +pmic_ldo_enable(MT6323_POWER_LDO_VM,KAL_FALSE); +[LDO_APPNAME12] +MT6323_POWER_LDO_VM + +[LDO_NAME13] +LDO_NAME=VRF18 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_ldo_enable(MT6323_POWER_LDO_VRF18,KAL_TRUE); +[LDO_ENABLE_OFF13] +pmic_ldo_enable(MT6323_POWER_LDO_VRF18,KAL_FALSE); +[LDO_APPNAME13] +MT6323_POWER_LDO_VRF18 + +[LDO_NAME14] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF14] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME14] +MT6323_POWER_LDO_VCAMD + +[LDO_NAME15] +LDO_NAME=VCAN_IO +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_IO,KAL_TRUE); +[LDO_ENABLE_OFF15] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_IO,KAL_FALSE); +[LDO_APPNAME15] +MT6323_POWER_LDO_VCAM_IO + +[LDO_NAME16] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF16] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME16] +MT6323_POWER_LDO_VCAMA + +[LDO_NAME17] +LDO_NAME=VCN33 +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_ldo_enable(MT6323_POWER_LDO_VCN33_WIFI,KAL_TRUE); +[LDO_ENABLE_OFF17] +pmic_ldo_enable(MT6323_POWER_LDO_VCN33_WIFI,KAL_FALSE); +[LDO_APPNAME17] +MT6323_POWER_LDO_VCN33_WIFI + +[LDO_NAME18] +LDO_NAME=VCN28 +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_ldo_enable(MT6323_POWER_LDO_VCN28,KAL_TRUE); +[LDO_ENABLE_OFF18] +pmic_ldo_enable(MT6323_POWER_LDO_VCN28,KAL_FALSE); +[LDO_APPNAME18] +MT6323_POWER_LDO_VCN28 + +[LDO_NAME19] +LDO_NAME=MT6333_VCORE +[LDO_ENABLE_CONFIGURABLE19] +CONFIGURABLE = YES +[LDO_ENABLE_ON19] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vcore_en(1); +#endif +[LDO_ENABLE_OFF19] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vcore_en(0); +#endif +[LDO_APPNAME19] +MT6323_POWER_LDO_DEFAULT + +[LDO_NAME20] +LDO_NAME=MT6333_VMEM +[LDO_ENABLE_CONFIGURABLE20] +CONFIGURABLE = YES +[LDO_ENABLE_ON20] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vmem_en(1); +#endif +[LDO_ENABLE_OFF20] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vmem_en(0); +#endif +[LDO_APPNAME20] +MT6323_POWER_LDO_DEFAULT + +[LDO_NAME21] +LDO_NAME=MT6333_VRF18 +[LDO_ENABLE_CONFIGURABLE21] +CONFIGURABLE = YES +[LDO_ENABLE_ON21] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vrf18_en(1); +#endif +[LDO_ENABLE_OFF21] +#ifdef MTK_MT6333_SUPPORT +mt6333_set_vrf18_en(0); +#endif +[LDO_APPNAME21] +MT6323_POWER_LDO_DEFAULT + +[LDO_APPNAME_DEFAULT] +MT6323_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> +#ifdef MTK_MT6333_SUPPORT +#include <mach/mt6333.h> +#endif + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6323PMUMP.cmp b/tools/dct/PMIC_MT6323PMUMP.cmp new file mode 100755 index 000000000..e600e6df3 --- /dev/null +++ b/tools/dct/PMIC_MT6323PMUMP.cmp @@ -0,0 +1,216 @@ +[PMIC_TABLE] +NUM_LDO = 18 + + +[LDO_NAME1] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT6323_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT6323_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME1] +MT6323_POWER_LDO_VMC + +[LDO_NAME2] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT6323_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT6323_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME2] +MT6323_POWER_LDO_VMCH + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT6323_POWER_LDO_VEMC_3V3,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT6323_POWER_LDO_VEMC_3V3,KAL_FALSE); +[LDO_APPNAME3] +MT6323_POWER_LDO_VEMC_3V3 + +[LDO_NAME4] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT6323_POWER_LDO_VGP1,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT6323_POWER_LDO_VGP1,KAL_FALSE); +[LDO_APPNAME4] +MT6323_POWER_LDO_VGP1 + +[LDO_NAME5] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT6323_POWER_LDO_VGP2,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT6323_POWER_LDO_VGP2,KAL_FALSE); +[LDO_APPNAME5] +MT6323_POWER_LDO_VGP2 + +[LDO_NAME6] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT6323_POWER_LDO_VGP3,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT6323_POWER_LDO_VGP3,KAL_FALSE); +[LDO_APPNAME6] +MT6323_POWER_LDO_VGP3 + +[LDO_NAME7] +LDO_NAME=VCN_1V8 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT6323_POWER_LDO_VCN_1V8,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT6323_POWER_LDO_VCN_1V8,KAL_FALSE); +[LDO_APPNAME7] +MT6323_POWER_LDO_VCN_1V8 + +[LDO_NAME8] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM1,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM1,KAL_FALSE); +[LDO_APPNAME8] +MT6323_POWER_LDO_VSIM1 + +[LDO_NAME9] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM2,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT6323_POWER_LDO_VSIM2,KAL_FALSE); +[LDO_APPNAME9] +MT6323_POWER_LDO_VSIM2 + +[LDO_NAME10] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_AF,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_AF,KAL_FALSE); +[LDO_APPNAME10] +MT6323_POWER_LDO_VCAM_AF + +[LDO_NAME11] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT6323_POWER_LDO_VIBR,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT6323_POWER_LDO_VIBR,KAL_FALSE); +[LDO_APPNAME11] +MT6323_POWER_LDO_VIBR + +[LDO_NAME12] +LDO_NAME=VM +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_ldo_enable(MT6323_POWER_LDO_VM,KAL_TRUE); +[LDO_ENABLE_OFF12] +pmic_ldo_enable(MT6323_POWER_LDO_VM,KAL_FALSE); +[LDO_APPNAME12] +MT6323_POWER_LDO_VM + +[LDO_NAME13] +LDO_NAME=VRF18 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_ldo_enable(MT6323_POWER_LDO_VRF18,KAL_TRUE); +[LDO_ENABLE_OFF13] +pmic_ldo_enable(MT6323_POWER_LDO_VRF18,KAL_FALSE); +[LDO_APPNAME13] +MT6323_POWER_LDO_VRF18 + +[LDO_NAME14] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF14] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME14] +MT6323_POWER_LDO_VCAMD + +[LDO_NAME15] +LDO_NAME=VCAN_IO +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_IO,KAL_TRUE); +[LDO_ENABLE_OFF15] +pmic_ldo_enable(MT6323_POWER_LDO_VCAM_IO,KAL_FALSE); +[LDO_APPNAME15] +MT6323_POWER_LDO_VCAM_IO + +[LDO_NAME16] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF16] +pmic_ldo_enable(MT6323_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME16] +MT6323_POWER_LDO_VCAMA + +[LDO_NAME17] +LDO_NAME=VCN33 +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_ldo_enable(MT6323_POWER_LDO_VCN33_WIFI,KAL_TRUE); +[LDO_ENABLE_OFF17] +pmic_ldo_enable(MT6323_POWER_LDO_VCN33_WIFI,KAL_FALSE); +[LDO_APPNAME17] +MT6323_POWER_LDO_VCN33_WIFI + +[LDO_NAME18] +LDO_NAME=VCN28 +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_ldo_enable(MT6323_POWER_LDO_VCN28,KAL_TRUE); +[LDO_ENABLE_OFF18] +pmic_ldo_enable(MT6323_POWER_LDO_VCN28,KAL_FALSE); +[LDO_APPNAME18] +MT6323_POWER_LDO_VCN28 + + +[LDO_APPNAME_DEFAULT] +MT6323_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6325PMUMP.cmp b/tools/dct/PMIC_MT6325PMUMP.cmp new file mode 100755 index 000000000..3f7001205 --- /dev/null +++ b/tools/dct/PMIC_MT6325PMUMP.cmp @@ -0,0 +1,325 @@ +[PMIC_TABLE] +NUM_LDO = 28 + + +[LDO_NAME1] +LDO_NAME=VTCXO0 +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT6325_POWER_LDO_VTCXO0,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT6325_POWER_LDO_VTCXO0,KAL_FALSE); +[LDO_APPNAME1] +MT6325_POWER_LDO_VTCXO0 + +[LDO_NAME2] +LDO_NAME=VTCXO1 +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT6325_POWER_LDO_VTCXO1,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT6325_POWER_LDO_VTCXO1,KAL_FALSE); +[LDO_APPNAME2] +MT6325_POWER_LDO_VTCXO1 + +[LDO_NAME3] +LDO_NAME=VAUD28 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT6325_POWER_LDO_VAUD28,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT6325_POWER_LDO_VAUD28,KAL_FALSE); +[LDO_APPNAME3] +MT6325_POWER_LDO_VAUD28 + +[LDO_NAME4] +LDO_NAME=VAUXA28 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT6325_POWER_LDO_VAUXA28,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT6325_POWER_LDO_VAUXA28,KAL_FALSE); +[LDO_APPNAME4] +MT6325_POWER_LDO_VAUXA28 + +[LDO_NAME5] +LDO_NAME=VBIF28 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT6325_POWER_LDO_VBIF28,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT6325_POWER_LDO_VBIF28,KAL_FALSE); +[LDO_APPNAME5] +MT6325_POWER_LDO_VBIF28 + +[LDO_NAME6] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT6325_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT6325_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME6] +MT6325_POWER_LDO_VCAMA + +[LDO_NAME7] +LDO_NAME=VCN28 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT6325_POWER_LDO_VCN28,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT6325_POWER_LDO_VCN28,KAL_FALSE); +[LDO_APPNAME7] +MT6325_POWER_LDO_VCN28 + +[LDO_NAME8] +LDO_NAME=VCN33 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT6325_POWER_LDO_VCN33,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT6325_POWER_LDO_VCN33,KAL_FALSE); +[LDO_APPNAME8] +MT6325_POWER_LDO_VCN33 + +[LDO_NAME9] +LDO_NAME=VRF18_1 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT6325_POWER_LDO_VRF18_1,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT6325_POWER_LDO_VRF18_1,KAL_FALSE); +[LDO_APPNAME9] +MT6325_POWER_LDO_VRF18_1 + +[LDO_NAME10] +LDO_NAME=VUSB33 +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT6325_POWER_LDO_VUSB33,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT6325_POWER_LDO_VUSB33,KAL_FALSE); +[LDO_APPNAME10] +MT6325_POWER_LDO_VUSB33 + +[LDO_NAME11] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT6325_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT6325_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME11] +MT6325_POWER_LDO_VMCH + +[LDO_NAME12] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_ldo_enable(MT6325_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF12] +pmic_ldo_enable(MT6325_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME12] +MT6325_POWER_LDO_VMC + +[LDO_NAME13] +LDO_NAME=VEMC33 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_ldo_enable(MT6325_POWER_LDO_VEMC33,KAL_TRUE); +[LDO_ENABLE_OFF13] +pmic_ldo_enable(MT6325_POWER_LDO_VEMC33,KAL_FALSE); +[LDO_APPNAME13] +MT6325_POWER_LDO_VEMC33 + +[LDO_NAME14] +LDO_NAME=VIO28 +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_ldo_enable(MT6325_POWER_LDO_VIO28,KAL_TRUE); +[LDO_ENABLE_OFF14] +pmic_ldo_enable(MT6325_POWER_LDO_VIO28,KAL_FALSE); +[LDO_APPNAME14] +MT6325_POWER_LDO_VIO28 + +[LDO_NAME15] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_ldo_enable(MT6325_POWER_LDO_VCAM_AF,KAL_TRUE); +[LDO_ENABLE_OFF15] +pmic_ldo_enable(MT6325_POWER_LDO_VCAM_AF,KAL_FALSE); +[LDO_APPNAME15] +MT6325_POWER_LDO_VCAM_AF + +[LDO_NAME16] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_ldo_enable(MT6325_POWER_LDO_VGP1,KAL_TRUE); +[LDO_ENABLE_OFF16] +pmic_ldo_enable(MT6325_POWER_LDO_VGP1,KAL_FALSE); +[LDO_APPNAME16] +MT6325_POWER_LDO_VGP1 + +[LDO_NAME17] +LDO_NAME=VEFUSE +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_ldo_enable(MT6325_POWER_LDO_VEFUSE,KAL_TRUE); +[LDO_ENABLE_OFF17] +pmic_ldo_enable(MT6325_POWER_LDO_VEFUSE,KAL_FALSE); +[LDO_APPNAME17] +MT6325_POWER_LDO_VEFUSE + +[LDO_NAME18] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_ldo_enable(MT6325_POWER_LDO_VSIM1,KAL_TRUE); +[LDO_ENABLE_OFF18] +pmic_ldo_enable(MT6325_POWER_LDO_VSIM1,KAL_FALSE); +[LDO_APPNAME18] +MT6325_POWER_LDO_VSIM1 + +[LDO_NAME19] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE19] +CONFIGURABLE = YES +[LDO_ENABLE_ON19] +pmic_ldo_enable(MT6325_POWER_LDO_VSIM2,KAL_TRUE); +[LDO_ENABLE_OFF19] +pmic_ldo_enable(MT6325_POWER_LDO_VSIM2,KAL_FALSE); +[LDO_APPNAME19] +MT6325_POWER_LDO_VSIM2 + +[LDO_NAME20] +LDO_NAME=VMIPI +[LDO_ENABLE_CONFIGURABLE20] +CONFIGURABLE = YES +[LDO_ENABLE_ON20] +pmic_ldo_enable(MT6325_POWER_LDO_VMIPI,KAL_TRUE); +[LDO_ENABLE_OFF20] +pmic_ldo_enable(MT6325_POWER_LDO_VMIPI,KAL_FALSE); +[LDO_APPNAME20] +MT6325_POWER_LDO_VMIPI + +[LDO_NAME21] +LDO_NAME=VCN18 +[LDO_ENABLE_CONFIGURABLE21] +CONFIGURABLE = YES +[LDO_ENABLE_ON21] +pmic_ldo_enable(MT6325_POWER_LDO_VCN18,KAL_TRUE); +[LDO_ENABLE_OFF21] +pmic_ldo_enable(MT6325_POWER_LDO_VCN18,KAL_FALSE); +[LDO_APPNAME21] +MT6325_POWER_LDO_VCN18 + +[LDO_NAME22] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE22] +CONFIGURABLE = YES +[LDO_ENABLE_ON22] +pmic_ldo_enable(MT6325_POWER_LDO_VGP2,KAL_TRUE); +[LDO_ENABLE_OFF22] +pmic_ldo_enable(MT6325_POWER_LDO_VGP2,KAL_FALSE); +[LDO_APPNAME22] +MT6325_POWER_LDO_VGP2 + +[LDO_NAME23] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE23] +CONFIGURABLE = YES +[LDO_ENABLE_ON23] +pmic_ldo_enable(MT6325_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF23] +pmic_ldo_enable(MT6325_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME23] +MT6325_POWER_LDO_VCAMD + +[LDO_NAME24] +LDO_NAME=VCAM_IO +[LDO_ENABLE_CONFIGURABLE24] +CONFIGURABLE = YES +[LDO_ENABLE_ON24] +pmic_ldo_enable(MT6325_POWER_LDO_VCAM_IO,KAL_TRUE); +[LDO_ENABLE_OFF24] +pmic_ldo_enable(MT6325_POWER_LDO_VCAM_IO,KAL_FALSE); +[LDO_APPNAME24] +MT6325_POWER_LDO_VCAM_IO + +[LDO_NAME25] +LDO_NAME=VSRAM_DVFS1 +[LDO_ENABLE_CONFIGURABLE25] +CONFIGURABLE = YES +[LDO_ENABLE_ON25] +pmic_ldo_enable(MT6325_POWER_LDO_VSRAM_DVFS1,KAL_TRUE); +[LDO_ENABLE_OFF25] +pmic_ldo_enable(MT6325_POWER_LDO_VSRAM_DVFS1,KAL_FALSE); +[LDO_APPNAME25] +MT6325_POWER_LDO_VSRAM_DVFS1 + +[LDO_NAME26] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE26] +CONFIGURABLE = YES +[LDO_ENABLE_ON26] +pmic_ldo_enable(MT6325_POWER_LDO_VGP3,KAL_TRUE); +[LDO_ENABLE_OFF26] +pmic_ldo_enable(MT6325_POWER_LDO_VGP3,KAL_FALSE); +[LDO_APPNAME26] +MT6325_POWER_LDO_VGP3 + +[LDO_NAME27] +LDO_NAME=VBIASN +[LDO_ENABLE_CONFIGURABLE27] +CONFIGURABLE = YES +[LDO_ENABLE_ON27] +pmic_ldo_enable(MT6325_POWER_LDO_VBIASN,KAL_TRUE); +[LDO_ENABLE_OFF27] +pmic_ldo_enable(MT6325_POWER_LDO_VBIASN,KAL_FALSE); +[LDO_APPNAME27] +MT6325_POWER_LDO_VBIASN + +[LDO_NAME28] +LDO_NAME=VRTC +[LDO_ENABLE_CONFIGURABLE28] +CONFIGURABLE = YES +[LDO_ENABLE_ON28] +pmic_ldo_enable(MT6325_POWER_LDO_VRTC,KAL_TRUE); +[LDO_ENABLE_OFF28] +pmic_ldo_enable(MT6325_POWER_LDO_VRTC,KAL_FALSE); +[LDO_APPNAME28] +MT6325_POWER_LDO_VRTC + +[LDO_APPNAME_DEFAULT] +MT65XX_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6328PMUMP.cmp b/tools/dct/PMIC_MT6328PMUMP.cmp new file mode 100755 index 000000000..ee2a416cc --- /dev/null +++ b/tools/dct/PMIC_MT6328PMUMP.cmp @@ -0,0 +1,108 @@ +[PMIC_TABLE] +NUM_LDO = 8 + + +[LDO_NAME1] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_set_register_value(PMIC_RG_VCAMA_EN,1); +[LDO_ENABLE_OFF1] +pmic_set_register_value(PMIC_RG_VCAMA_EN,0); +[LDO_APPNAME1] +MT6328_POWER_LDO_VCAMA + +[LDO_NAME2] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_set_register_value(PMIC_RG_VTCXO_1_EN,1); +[LDO_ENABLE_OFF2] +pmic_set_register_value(PMIC_RG_VTCXO_1_EN,0); +[LDO_APPNAME2] +MT6328_POWER_LDO_VSIM1 + +[LDO_NAME3] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_set_register_value(PMIC_RG_VSIM2_EN,1); +[LDO_ENABLE_OFF3] +pmic_set_register_value(PMIC_RG_VSIM2_EN,0); +[LDO_APPNAME3] +MT6328_POWER_LDO_VSIM2 + +[LDO_NAME4] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_set_register_value(PMIC_RG_VCAMAF_EN,1); +[LDO_ENABLE_OFF4] +pmic_set_register_value(PMIC_RG_VCAMAF_EN,0); +[LDO_APPNAME4] +MT6328_POWER_LDO_VCAM_AF + +[LDO_NAME5] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_set_register_value(PMIC_RG_VGP1_EN,1); +[LDO_ENABLE_OFF5] +pmic_set_register_value(PMIC_RG_VGP1_EN,0); +[LDO_APPNAME5] +MT6328_POWER_LDO_VGP1 + +[LDO_NAME6] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_set_register_value(PMIC_RG_VIBR_EN,1); +[LDO_ENABLE_OFF6] +pmic_set_register_value(PMIC_RG_VIBR_EN,0); +[LDO_APPNAME6] +MT6328_POWER_LDO_VIBR + +[LDO_NAME7] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_set_register_value(PMIC_RG_VCAMD_EN,1); +[LDO_ENABLE_OFF7] +pmic_set_register_value(PMIC_RG_VCAMD_EN,0); +[LDO_APPNAME7] +MT6328_POWER_LDO_VCAMD + +[LDO_NAME8] +LDO_NAME=VCAM_IO +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_set_register_value(PMIC_RG_VCAMIO_EN,1); +[LDO_ENABLE_OFF8] +pmic_set_register_value(PMIC_RG_VCAMIO_EN,0); +[LDO_APPNAME8] +MT6328_POWER_LDO_VCAM_IO + + +[LDO_APPNAME_DEFAULT] +MT65XX_POWER_NONE + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/upmu_common.h> +#include <mach/upmu_hw.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6331+6332PMUMP.cmp b/tools/dct/PMIC_MT6331+6332PMUMP.cmp new file mode 100755 index 000000000..c4155955b --- /dev/null +++ b/tools/dct/PMIC_MT6331+6332PMUMP.cmp @@ -0,0 +1,358 @@ +[PMIC_TABLE] +NUM_LDO = 31 + + +[LDO_NAME1] +LDO_NAME=VTCXO1 +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT6331_POWER_LDO_VTCXO1,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT6331_POWER_LDO_VTCXO1,KAL_FALSE); +[LDO_APPNAME1] +MT6331_POWER_LDO_VTCXO1 + +[LDO_NAME2] +LDO_NAME=VTCXO2 +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT6331_POWER_LDO_VTCXO2,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT6331_POWER_LDO_VTCXO2,KAL_FALSE); +[LDO_APPNAME2] +MT6331_POWER_LDO_VTCXO2 + +[LDO_NAME3] +LDO_NAME=VAUD32 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT6331_POWER_LDO_VAUD32,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT6331_POWER_LDO_VAUD32,KAL_FALSE); +[LDO_APPNAME3] +MT6331_POWER_LDO_VAUD32 + +[LDO_NAME4] +LDO_NAME=VAUXA32 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT6331_POWER_LDO_VAUXA32,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT6331_POWER_LDO_VAUXA32,KAL_FALSE); +[LDO_APPNAME4] +MT6331_POWER_LDO_VAUXA32 + +[LDO_NAME5] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT6331_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT6331_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME5] +MT6331_POWER_LDO_VCAMA + +[LDO_NAME6] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT6331_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT6331_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME6] +MT6331_POWER_LDO_VMCH + +[LDO_NAME7] +LDO_NAME=VEMC33 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT6331_POWER_LDO_VEMC33,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT6331_POWER_LDO_VEMC33,KAL_FALSE); +[LDO_APPNAME7] +MT6331_POWER_LDO_VEMC33 + +[LDO_NAME8] +LDO_NAME=VIO28 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT6331_POWER_LDO_VIO28,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT6331_POWER_LDO_VIO28,KAL_FALSE); +[LDO_APPNAME8] +MT6331_POWER_LDO_VIO28 + +[LDO_NAME9] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT6331_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT6331_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME9] +MT6331_POWER_LDO_VMC + +[LDO_NAME10] +LDO_NAME=VCAM_AF +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT6331_POWER_LDO_VCAM_AF,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT6331_POWER_LDO_VCAM_AF,KAL_FALSE); +[LDO_APPNAME10] +MT6331_POWER_LDO_VCAM_AF + +[LDO_NAME11] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT6331_POWER_LDO_VGP1,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT6331_POWER_LDO_VGP1,KAL_FALSE); +[LDO_APPNAME11] +MT6331_POWER_LDO_VGP1 + +[LDO_NAME12] +LDO_NAME=VGP4 +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_ldo_enable(MT6331_POWER_LDO_VGP4,KAL_TRUE); +[LDO_ENABLE_OFF12] +pmic_ldo_enable(MT6331_POWER_LDO_VGP4,KAL_FALSE); +[LDO_APPNAME12] +MT6331_POWER_LDO_VGP4 + +[LDO_NAME13] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_ldo_enable(MT6331_POWER_LDO_VSIM1,KAL_TRUE); +[LDO_ENABLE_OFF13] +pmic_ldo_enable(MT6331_POWER_LDO_VSIM1,KAL_FALSE); +[LDO_APPNAME13] +MT6331_POWER_LDO_VSIM1 + +[LDO_NAME14] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_ldo_enable(MT6331_POWER_LDO_VSIM2,KAL_TRUE); +[LDO_ENABLE_OFF14] +pmic_ldo_enable(MT6331_POWER_LDO_VSIM2,KAL_FALSE); +[LDO_APPNAME14] +MT6331_POWER_LDO_VSIM2 + +[LDO_NAME15] +LDO_NAME=VFBB +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_ldo_enable(MT6331_POWER_LDO_VFBB,KAL_TRUE); +[LDO_ENABLE_OFF15] +pmic_ldo_enable(MT6331_POWER_LDO_VFBB,KAL_FALSE); +[LDO_APPNAME15] +MT6331_POWER_LDO_VFBB + +[LDO_NAME16] +LDO_NAME=VRTC +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_ldo_enable(MT6331_POWER_LDO_VRTC,KAL_TRUE); +[LDO_ENABLE_OFF16] +pmic_ldo_enable(MT6331_POWER_LDO_VRTC,KAL_FALSE); +[LDO_APPNAME16] +MT6331_POWER_LDO_VRTC + +[LDO_NAME17] +LDO_NAME=VMIPI +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_ldo_enable(MT6331_POWER_LDO_VMIPI,KAL_TRUE); +[LDO_ENABLE_OFF17] +pmic_ldo_enable(MT6331_POWER_LDO_VMIPI,KAL_FALSE); +[LDO_APPNAME17] +MT6331_POWER_LDO_VMIPI + +[LDO_NAME18] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_ldo_enable(MT6331_POWER_LDO_VIBR,KAL_TRUE); +[LDO_ENABLE_OFF18] +pmic_ldo_enable(MT6331_POWER_LDO_VIBR,KAL_FALSE); +[LDO_APPNAME18] +MT6331_POWER_LDO_VIBR + +[LDO_NAME19] +LDO_NAME=MT6331_VDIG18 +[LDO_ENABLE_CONFIGURABLE19] +CONFIGURABLE = YES +[LDO_ENABLE_ON19] +pmic_ldo_enable(MT6331_POWER_LDO_VDIG18,KAL_TRUE); +[LDO_ENABLE_OFF19] +pmic_ldo_enable(MT6331_POWER_LDO_VDIG18,KAL_FALSE); +[LDO_APPNAME19] +MT6331_POWER_LDO_VDIG18 + +[LDO_NAME20] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE20] +CONFIGURABLE = YES +[LDO_ENABLE_ON20] +pmic_ldo_enable(MT6331_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF20] +pmic_ldo_enable(MT6331_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME20] +MT6331_POWER_LDO_VCAMD + +[LDO_NAME21] +LDO_NAME=VUSB10 +[LDO_ENABLE_CONFIGURABLE21] +CONFIGURABLE = YES +[LDO_ENABLE_ON21] +pmic_ldo_enable(MT6331_POWER_LDO_VUSB10,KAL_TRUE); +[LDO_ENABLE_OFF21] +pmic_ldo_enable(MT6331_POWER_LDO_VUSB10,KAL_FALSE); +[LDO_APPNAME21] +MT6331_POWER_LDO_VUSB10 + +[LDO_NAME22] +LDO_NAME=VCAM_IO +[LDO_ENABLE_CONFIGURABLE22] +CONFIGURABLE = YES +[LDO_ENABLE_ON22] +pmic_ldo_enable(MT6331_POWER_LDO_VCAM_IO,KAL_TRUE); +[LDO_ENABLE_OFF22] +pmic_ldo_enable(MT6331_POWER_LDO_VCAM_IO,KAL_FALSE); +[LDO_APPNAME22] +MT6331_POWER_LDO_VCAM_IO + +[LDO_NAME23] +LDO_NAME=VSRAM_DVFS1 +[LDO_ENABLE_CONFIGURABLE23] +CONFIGURABLE = YES +[LDO_ENABLE_ON23] +pmic_ldo_enable(MT6331_POWER_LDO_VSRAM_DVFS1,KAL_TRUE); +[LDO_ENABLE_OFF23] +pmic_ldo_enable(MT6331_POWER_LDO_VSRAM_DVFS1,KAL_FALSE); +[LDO_APPNAME23] +MT6331_POWER_LDO_VSRAM_DVFS1 + +[LDO_NAME24] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE24] +CONFIGURABLE = YES +[LDO_ENABLE_ON24] +pmic_ldo_enable(MT6331_POWER_LDO_VGP2,KAL_TRUE); +[LDO_ENABLE_OFF24] +pmic_ldo_enable(MT6331_POWER_LDO_VGP2,KAL_FALSE); +[LDO_APPNAME24] +MT6331_POWER_LDO_VGP2 + +[LDO_NAME25] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE25] +CONFIGURABLE = YES +[LDO_ENABLE_ON25] +pmic_ldo_enable(MT6331_POWER_LDO_VGP3,KAL_TRUE); +[LDO_ENABLE_OFF25] +pmic_ldo_enable(MT6331_POWER_LDO_VGP3,KAL_FALSE); +[LDO_APPNAME25] +MT6331_POWER_LDO_VGP3 + +[LDO_NAME26] +LDO_NAME=VBIASN +[LDO_ENABLE_CONFIGURABLE26] +CONFIGURABLE = YES +[LDO_ENABLE_ON26] +pmic_ldo_enable(MT6331_POWER_LDO_VBIASN,KAL_TRUE); +[LDO_ENABLE_OFF26] +pmic_ldo_enable(MT6331_POWER_LDO_VBIASN,KAL_FALSE); +[LDO_APPNAME26] +MT6331_POWER_LDO_VBIASN + +[LDO_NAME27] +LDO_NAME=VBIF28 +[LDO_ENABLE_CONFIGURABLE27] +CONFIGURABLE = YES +[LDO_ENABLE_ON27] +pmic_ldo_enable(MT6332_POWER_LDO_VBIF28,KAL_TRUE); +[LDO_ENABLE_OFF27] +pmic_ldo_enable(MT6332_POWER_LDO_VBIF28,KAL_FALSE); +[LDO_APPNAME27] +MT6332_POWER_LDO_VBIF28 + +[LDO_NAME28] +LDO_NAME=VAUXB32 +[LDO_ENABLE_CONFIGURABLE28] +CONFIGURABLE = YES +[LDO_ENABLE_ON28] +pmic_ldo_enable(MT6332_POWER_LDO_VAUXB32,KAL_TRUE); +[LDO_ENABLE_OFF28] +pmic_ldo_enable(MT6332_POWER_LDO_VAUXB32,KAL_FALSE); +[LDO_APPNAME28] +MT6332_POWER_LDO_VAUXB32 + +[LDO_NAME29] +LDO_NAME=VUSB33 +[LDO_ENABLE_CONFIGURABLE29] +CONFIGURABLE = YES +[LDO_ENABLE_ON29] +pmic_ldo_enable(MT6332_POWER_LDO_VUSB33,KAL_TRUE); +[LDO_ENABLE_OFF29] +pmic_ldo_enable(MT6332_POWER_LDO_VUSB33,KAL_FALSE); +[LDO_APPNAME29] +MT6332_POWER_LDO_VUSB33 + +[LDO_NAME30] +LDO_NAME=MT6332_VDIG18 +[LDO_ENABLE_CONFIGURABLE30] +CONFIGURABLE = YES +[LDO_ENABLE_ON30] +pmic_ldo_enable(MT6332_POWER_LDO_VDIG18,KAL_TRUE); +[LDO_ENABLE_OFF30] +pmic_ldo_enable(MT6332_POWER_LDO_VDIG18,KAL_FALSE); +[LDO_APPNAME30] +MT6332_POWER_LDO_VDIG18 + +[LDO_NAME31] +LDO_NAME=VSRAM_DVFS2 +[LDO_ENABLE_CONFIGURABLE31] +CONFIGURABLE = YES +[LDO_ENABLE_ON31] +pmic_ldo_enable(MT6332_POWER_LDO_VSRAM_DVFS2,KAL_TRUE); +[LDO_ENABLE_OFF31] +pmic_ldo_enable(MT6332_POWER_LDO_VSRAM_DVFS2,KAL_FALSE); +[LDO_APPNAME31] +MT6332_POWER_LDO_VSRAM_DVFS2 + +[LDO_APPNAME_DEFAULT] +MT65XX_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6350PMUMP.cmp b/tools/dct/PMIC_MT6350PMUMP.cmp new file mode 100755 index 000000000..2229955f1 --- /dev/null +++ b/tools/dct/PMIC_MT6350PMUMP.cmp @@ -0,0 +1,218 @@ +[PMIC_TABLE] +NUM_LDO = 18 + + +[LDO_NAME1] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_set_register_value(PMIC_RG_VMC_EN,1); +[LDO_ENABLE_OFF1] +pmic_set_register_value(PMIC_RG_VMC_EN,0); +[LDO_APPNAME1] +"VMC" + +[LDO_NAME2] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_set_register_value(PMIC_RG_VMCH_EN,1); +[LDO_ENABLE_OFF2] +pmic_set_register_value(PMIC_RG_VMCH_EN,0); +[LDO_APPNAME2] +"VMCH" + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_set_register_value(PMIC_RG_VEMC_3V3_EN,1); +[LDO_ENABLE_OFF3] +pmic_set_register_value(PMIC_RG_VEMC_3V3_EN,0); +[LDO_APPNAME3] +"VEMC_3V3" + +[LDO_NAME4] +LDO_NAME=VGP1 +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_set_register_value(PMIC_RG_VGP1_EN,1); +[LDO_ENABLE_OFF4] +pmic_set_register_value(PMIC_RG_VGP1_EN,0); +[LDO_APPNAME4] +"VGP1" + +[LDO_NAME5] +LDO_NAME=VGP2 +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_set_register_value(PMIC_RG_VGP2_EN,1); +[LDO_ENABLE_OFF5] +pmic_set_register_value(PMIC_RG_VGP2_EN,0); +[LDO_APPNAME5] +"VGP2" + +[LDO_NAME6] +LDO_NAME=VGP3 +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_set_register_value(PMIC_RG_VGP3_EN,1); +[LDO_ENABLE_OFF6] +pmic_set_register_value(PMIC_RG_VGP3_EN,0); +[LDO_APPNAME6] +"VGP3" + +[LDO_NAME7] +LDO_NAME=VCN_1V8 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_set_register_value(PMIC_RG_VCN_1V8_EN,1); +[LDO_ENABLE_OFF7] +pmic_set_register_value(PMIC_RG_VCN_1V8_EN,0); +[LDO_APPNAME7] +"VCN_1V8" + +[LDO_NAME8] +LDO_NAME=VSIM1 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_set_register_value(PMIC_RG_VSIM1_EN,1); +[LDO_ENABLE_OFF8] +pmic_set_register_value(PMIC_RG_VSIM1_EN,0); +[LDO_APPNAME8] +"VSIM1" + +[LDO_NAME9] +LDO_NAME=VSIM2 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_set_register_value(PMIC_RG_VSIM2_EN,1); +[LDO_ENABLE_OFF9] +pmic_set_register_value(PMIC_RG_VSIM2_EN,0); +[LDO_APPNAME9] +"VSIM2" + +[LDO_NAME10] +LDO_NAME=VCAMAF +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_set_register_value(PMIC_RG_VCAM_AF_EN,1); +[LDO_ENABLE_OFF10] +pmic_set_register_value(PMIC_RG_VCAM_AF_EN,0); +[LDO_APPNAME10] +"VCAMAF" + +[LDO_NAME11] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_set_register_value(PMIC_RG_VIBR_EN,1); +[LDO_ENABLE_OFF11] +pmic_set_register_value(PMIC_RG_VIBR_EN,0); +[LDO_APPNAME11] +"VIBR" + +[LDO_NAME12] +LDO_NAME=VM +[LDO_ENABLE_CONFIGURABLE12] +CONFIGURABLE = YES +[LDO_ENABLE_ON12] +pmic_set_register_value(PMIC_RG_VM_EN,1); +[LDO_ENABLE_OFF12] +pmic_set_register_value(PMIC_RG_VM_EN,0); +[LDO_APPNAME12] +"VM" + +[LDO_NAME13] +LDO_NAME=VRF18 +[LDO_ENABLE_CONFIGURABLE13] +CONFIGURABLE = YES +[LDO_ENABLE_ON13] +pmic_set_register_value(PMIC_RG_VRF18_EN,1); +[LDO_ENABLE_OFF13] +pmic_set_register_value(PMIC_RG_VRF18_EN,0); +[LDO_APPNAME13] +"VRF18" + +[LDO_NAME14] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE14] +CONFIGURABLE = YES +[LDO_ENABLE_ON14] +pmic_set_register_value(PMIC_RG_VCAMD_EN,1); +[LDO_ENABLE_OFF14] +pmic_set_register_value(PMIC_RG_VCAMD_EN,0); +[LDO_APPNAME14] +"VCAMD" + +[LDO_NAME15] +LDO_NAME=VCANIO +[LDO_ENABLE_CONFIGURABLE15] +CONFIGURABLE = YES +[LDO_ENABLE_ON15] +pmic_set_register_value(PMIC_RG_VCAM_IO_EN,1); +[LDO_ENABLE_OFF15] +pmic_set_register_value(PMIC_RG_VCAM_IO_EN,0); +[LDO_APPNAME15] +"VCAMIO" + +[LDO_NAME16] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE16] +CONFIGURABLE = YES +[LDO_ENABLE_ON16] +pmic_set_register_value(PMIC_RG_VCAMA_EN,1); +[LDO_ENABLE_OFF16] +pmic_set_register_value(PMIC_RG_VCAMA_EN,0); +[LDO_APPNAME16] +"VCAMA" + +[LDO_NAME17] +LDO_NAME=VCN33 +[LDO_ENABLE_CONFIGURABLE17] +CONFIGURABLE = YES +[LDO_ENABLE_ON17] +pmic_set_register_value(PMIC_RG_VCN33_EN_WIFI,1); +[LDO_ENABLE_OFF17] +pmic_set_register_value(PMIC_RG_VCN33_EN_WIFI,0); +[LDO_APPNAME17] +"VCN33_WIFI" + +[LDO_NAME18] +LDO_NAME=VCN28 +[LDO_ENABLE_CONFIGURABLE18] +CONFIGURABLE = YES +[LDO_ENABLE_ON18] +pmic_set_register_value(PMIC_RG_VCN28_EN,1); +[LDO_ENABLE_OFF18] +pmic_set_register_value(PMIC_RG_VCN28_EN,0); +[LDO_APPNAME18] +"VCN28" + + +[LDO_APPNAME_DEFAULT] +"" + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/upmu_common.h> +#include <mach/upmu_hw.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_MT6397PMUMP.cmp b/tools/dct/PMIC_MT6397PMUMP.cmp new file mode 100755 index 000000000..c266108ac --- /dev/null +++ b/tools/dct/PMIC_MT6397PMUMP.cmp @@ -0,0 +1,137 @@ +[PMIC_TABLE] +NUM_LDO = 11 + +[LDO_NAME1] +LDO_NAME=VMC +[LDO_ENABLE_CONFIGURABLE1] +CONFIGURABLE = YES +[LDO_ENABLE_ON1] +pmic_ldo_enable(MT65XX_POWER_LDO_VMC,KAL_TRUE); +[LDO_ENABLE_OFF1] +pmic_ldo_enable(MT65XX_POWER_LDO_VMC,KAL_FALSE); +[LDO_APPNAME1] +MT65XX_POWER_LDO_VMC + +[LDO_NAME2] +LDO_NAME=VMCH +[LDO_ENABLE_CONFIGURABLE2] +CONFIGURABLE = YES +[LDO_ENABLE_ON2] +pmic_ldo_enable(MT65XX_POWER_LDO_VMCH,KAL_TRUE); +[LDO_ENABLE_OFF2] +pmic_ldo_enable(MT65XX_POWER_LDO_VMCH,KAL_FALSE); +[LDO_APPNAME2] +MT65XX_POWER_LDO_VMCH + +[LDO_NAME3] +LDO_NAME=VEMC_3V3 +[LDO_ENABLE_CONFIGURABLE3] +CONFIGURABLE = YES +[LDO_ENABLE_ON3] +pmic_ldo_enable(MT65XX_POWER_LDO_VEMC_3V3,KAL_TRUE); +[LDO_ENABLE_OFF3] +pmic_ldo_enable(MT65XX_POWER_LDO_VEMC_3V3,KAL_FALSE); +[LDO_APPNAME3] +MT65XX_POWER_LDO_VEMC_3V3 + +[LDO_NAME4] +LDO_NAME=VCAMD +[LDO_ENABLE_CONFIGURABLE4] +CONFIGURABLE = YES +[LDO_ENABLE_ON4] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMD,KAL_TRUE); +[LDO_ENABLE_OFF4] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMD,KAL_FALSE); +[LDO_APPNAME4] +MT65XX_POWER_LDO_VCAMD + +[LDO_NAME5] +LDO_NAME=VCAMIO +[LDO_ENABLE_CONFIGURABLE5] +CONFIGURABLE = YES +[LDO_ENABLE_ON5] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMIO,KAL_TRUE); +[LDO_ENABLE_OFF5] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMIO,KAL_FALSE); +[LDO_APPNAME5] +MT65XX_POWER_LDO_VCAMIO + +[LDO_NAME6] +LDO_NAME=VCAMAF +[LDO_ENABLE_CONFIGURABLE6] +CONFIGURABLE = YES +[LDO_ENABLE_ON6] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMAF,KAL_TRUE); +[LDO_ENABLE_OFF6] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMAF,KAL_FALSE); +[LDO_APPNAME6] +MT65XX_POWER_LDO_VCAMAF + +[LDO_NAME7] +LDO_NAME=VGP4 +[LDO_ENABLE_CONFIGURABLE7] +CONFIGURABLE = YES +[LDO_ENABLE_ON7] +pmic_ldo_enable(MT65XX_POWER_LDO_VGP4,KAL_TRUE); +[LDO_ENABLE_OFF7] +pmic_ldo_enable(MT65XX_POWER_LDO_VGP4,KAL_FALSE); +[LDO_APPNAME7] +MT65XX_POWER_LDO_VGP4 + +[LDO_NAME8] +LDO_NAME=VGP5 +[LDO_ENABLE_CONFIGURABLE8] +CONFIGURABLE = YES +[LDO_ENABLE_ON8] +pmic_ldo_enable(MT65XX_POWER_LDO_VGP5,KAL_TRUE); +[LDO_ENABLE_OFF8] +pmic_ldo_enable(MT65XX_POWER_LDO_VGP5,KAL_FALSE); +[LDO_APPNAME8] +MT65XX_POWER_LDO_VGP5 + +[LDO_NAME9] +LDO_NAME=VGP6 +[LDO_ENABLE_CONFIGURABLE9] +CONFIGURABLE = YES +[LDO_ENABLE_ON9] +pmic_ldo_enable(MT65XX_POWER_LDO_VGP6,KAL_TRUE); +[LDO_ENABLE_OFF9] +pmic_ldo_enable(MT65XX_POWER_LDO_VGP6,KAL_FALSE); +[LDO_APPNAME9] +MT65XX_POWER_LDO_VGP6 + +[LDO_NAME10] +LDO_NAME=VIBR +[LDO_ENABLE_CONFIGURABLE10] +CONFIGURABLE = YES +[LDO_ENABLE_ON10] +pmic_ldo_enable(MT65XX_POWER_LDO_VIBR,KAL_TRUE); +[LDO_ENABLE_OFF10] +pmic_ldo_enable(MT65XX_POWER_LDO_VIBR,KAL_FALSE); +[LDO_APPNAME10] +MT65XX_POWER_LDO_VIBR + +[LDO_NAME11] +LDO_NAME=VCAMA +[LDO_ENABLE_CONFIGURABLE11] +CONFIGURABLE = YES +[LDO_ENABLE_ON11] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMA,KAL_TRUE); +[LDO_ENABLE_OFF11] +pmic_ldo_enable(MT65XX_POWER_LDO_VCAMA,KAL_FALSE); +[LDO_APPNAME11] +MT65XX_POWER_LDO_VCAMA + +[LDO_APPNAME_DEFAULT] +MT65XX_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/PMIC_NCPMU.cmp b/tools/dct/PMIC_NCPMU.cmp new file mode 100755 index 000000000..7f27fa8b8 --- /dev/null +++ b/tools/dct/PMIC_NCPMU.cmp @@ -0,0 +1,17 @@ +[PMIC_TABLE] +NUM_LDO = 0 + + +[LDO_APPNAME_DEFAULT] +MT6323_POWER_LDO_DEFAULT + +[pmic_drv.h_HEADER] + +[pmic_drv.h_TAILER] + +[pmic_drv.c_HEADER] +#include <linux/types.h> +#include <mach/mt_typedefs.h> +#include <mach/mt_pm_ldo.h> + +[pmic_drv.c_TAILER] diff --git a/tools/dct/UEM.cmp b/tools/dct/UEM.cmp new file mode 100755 index 000000000..2859d7273 --- /dev/null +++ b/tools/dct/UEM.cmp @@ -0,0 +1,13 @@ +[UEM] +MAX_NETNAME_TEXT = 16 + +[uem_drv.c_HEADER] +#ifdef __CUST_NEW__ +#include "kal_release.h" +#include "gpio_drv.h" +#include "custom_em.h" +#include "custom_equipment.h" + + +[uem_drv.c_TAILER] +#endif /* __CUST_NEW__ */ diff --git a/tools/dct/Wizard/AST.cmp b/tools/dct/Wizard/AST.cmp new file mode 100755 index 000000000..39f438ebd --- /dev/null +++ b/tools/dct/Wizard/AST.cmp @@ -0,0 +1,29 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = AST +[INFO_0_CONTENT] +Enable +Disable + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Enable +[GPIO_NAME0] +GPIO_AST_RST_PIN +GPIO_AST_CS_PIN +GPIO_AST_CLK32K_PIN +GPIO_AST_WAKEUP_PIN +GPIO_AST_INTR_PIN +GPIO_AST_WAKEUP_INTR_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = Disable +[GPIO_NAME1] + +[EINT_NAME1] diff --git a/tools/dct/Wizard/Bluetooth.cmp b/tools/dct/Wizard/Bluetooth.cmp new file mode 100755 index 000000000..70319be26 --- /dev/null +++ b/tools/dct/Wizard/Bluetooth.cmp @@ -0,0 +1,44 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = BT Chip Type +[INFO_0_CONTENT] +MT6611/MT6612/MT6616 +MT6620 + + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = MT6611/MT6612/MT6616 +[GPIO_NAME0] +GPIO_BT_POWREN_PIN +GPIO_BT_RESET_PIN +GPIO_BT_EINT_PIN +GPIO_BT_CLK_PIN +GPIO_PCM_DAICLK_PIN +GPIO_PCM_DAIPCMOUT_PIN +GPIO_PCM_DAIPCMIN_PIN +GPIO_PCM_DAISYNC_PIN +[EINT_NAME0] +BT + +[TYPE1] +INFO_0 = MT6620 +[GPIO_NAME1] +GPIO_COMBO_6620_LDO_EN_PIN +GPIO_COMBO_PMU_EN_PIN +GPIO_COMBO_RST_PIN +GPIO_COMBO_RTCCLK_PIN +GPIO_COMBO_BGF_EINT_PIN +GPIO_COMBO_ALL_EINT_PIN +GPIO_PCM_DAICLK_PIN +GPIO_PCM_DAIPCMOUT_PIN +GPIO_PCM_DAIPCMIN_PIN +GPIO_PCM_DAISYNC_PIN +[EINT_NAME1] +COMBO_BGF +COMBO_ALL diff --git a/tools/dct/Wizard/CMMB.cmp b/tools/dct/Wizard/CMMB.cmp new file mode 100755 index 000000000..2f795be68 --- /dev/null +++ b/tools/dct/Wizard/CMMB.cmp @@ -0,0 +1,31 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = Power Source Select +[INFO_0_CONTENT] +Ext_LDO +Int_LDO + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + + +[TYPE0] +INFO_0 = Ext_LDO +[GPIO_NAME0] +GPIO_CMMB_EINT_PIN +GPIO_CMMB_LDO_EN_PIN +GPIO_CMMB_RST_PIN +[EINT_NAME0] +CMMB + +[TYPE1] +INFO_0 = Int_LDO +[GPIO_NAME1] +GPIO_CMMB_EINT_PIN +GPIO_CMMB_RST_PIN +[EINT_NAME1] +CMMB diff --git a/tools/dct/Wizard/Camera.cmp b/tools/dct/Wizard/Camera.cmp new file mode 100755 index 000000000..54b16d123 --- /dev/null +++ b/tools/dct/Wizard/Camera.cmp @@ -0,0 +1,127 @@ +[MODULE_INFO] +INFO_NUM = 3 + +[INFO_0_NAME] +INFO_NAME = Camera Power Source +[INFO_0_CONTENT] +Ext_LDO +Int_LDO + +[INFO_1_NAME] +INFO_NAME = AF Power Source +[INFO_1_CONTENT] +Ext_LDO +Int_LDO + +[INFO_2_NAME] +INFO_NAME = Flashlight Enable/Disable +[INFO_2_CONTENT] +Enable +Disable + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Ext_LDO +INFO_1 = Int_LDO +INFO_2 = Disable +[GPIO_NAME0] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_AF_EN_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = Ext_LDO +INFO_1 = Int_LDO +INFO_2 = Enable +[GPIO_NAME1] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_FLASH_EN_PIN +GPIO_CAMERA_FLASH_MODE_PIN +[EINT_NAME1] + +[TYPE2] +INFO_0 = Ext_LDO +INFO_1 = Ext_LDO +INFO_2 = Disable +[GPIO_NAME2] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +[EINT_NAME2] + +[TYPE3] +INFO_0 = Int_LDO +INFO_1 = Ext_LDO +INFO_2 = Disable +[GPIO_NAME3] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_LDO_EN_PIN +[EINT_NAME3] + +[TYPE4] +INFO_0 = Int_LDO +INFO_1 = Int_LDO +INFO_2 = Disable +[GPIO_NAME4] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_AF_EN_PIN +GPIO_CAMERA_LDO_EN_PIN +[EINT_NAME4] + +[TYPE5] +INFO_0 = Int_LDO +INFO_1 = Int_LDO +INFO_2 = Enable +[GPIO_NAME5] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_AF_EN_PIN +GPIO_CAMERA_LDO_EN_PIN +GPIO_CAMERA_FLASH_EN_PIN +GPIO_CAMERA_FLASH_MODE_PIN +[EINT_NAME5] + +[TYPE6] +INFO_0 = Int_LDO +INFO_1 = Ext_LDO +INFO_2 = Enable +[GPIO_NAME6] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_LDO_EN_PIN +GPIO_CAMERA_FLASH_EN_PIN +GPIO_CAMERA_FLASH_MODE_PIN +[EINT_NAME6] + +[TYPE7] +INFO_0 = Ext_LDO +INFO_1 = Ext_LDO +INFO_2 = Enable +[GPIO_NAME7] +GPIO_CAMERA_CMRST_PIN +GPIO_CAMERA_CMPDN_PIN +GPIO_CAMERA_CMRST1_PIN +GPIO_CAMERA_CMPDN1_PIN +GPIO_CAMERA_FLASH_EN_PIN +GPIO_CAMERA_FLASH_MODE_PIN +[EINT_NAME7]
\ No newline at end of file diff --git a/tools/dct/Wizard/FM.cmp b/tools/dct/Wizard/FM.cmp new file mode 100755 index 000000000..00a234196 --- /dev/null +++ b/tools/dct/Wizard/FM.cmp @@ -0,0 +1,29 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = FM Chip Select +[INFO_0_CONTENT] +AR1000 +MT6616 + +[INFO_0_PROPERTY] +MULTIPLE_CHECK = NO + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = AR1000 +[GPIO_NAME0] +GPIO_FM_CLK_PIN +[EINT_NAME0] + + +[TYPE1] +INFO_0 = MT6616 +[GPIO_NAME1] +GPIO_FM_RDS_PIN +[EINT_NAME1] +FM_RDS
\ No newline at end of file diff --git a/tools/dct/Wizard/GPS.cmp b/tools/dct/Wizard/GPS.cmp new file mode 100755 index 000000000..c222bd2a5 --- /dev/null +++ b/tools/dct/Wizard/GPS.cmp @@ -0,0 +1,42 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = GPS Chip Type +[INFO_0_CONTENT] +MT3326 +MT3320 + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = MT3326 +[GPIO_NAME0] +GPIO_GPS_PWREN_PIN +GPIO_GPS_SYNC_PIN +GPIO_GPS_CLK_PIN +GPIO_GPS_RST_PIN +[EINT_NAME0] +GPS + +[TYPE0] +INFO_0 = MT3320 +[GPIO_NAME0] +GPIO_GPS_SYNC_PIN +GPIO_COMBO_6620_LDO_EN_PIN +GPIO_COMBO_PMU_EN_PIN +GPIO_COMBO_RST_PIN +GPIO_COMBO_RTCCLK_PIN +GPIO_COMBO_BGF_EINT_PIN +GPIO_COMBO_ALL_EINT_PIN +GPIO_PCM_DAICLK_PIN +GPIO_PCM_DAIPCMOUT_PIN +GPIO_PCM_DAIPCMIN_PIN +GPIO_PCM_DAISYNC_PIN +[EINT_NAME0] +COMBO_BGF +COMBO_ALL + diff --git a/tools/dct/Wizard/HW_Module.cmp b/tools/dct/Wizard/HW_Module.cmp new file mode 100755 index 000000000..4d65ab792 --- /dev/null +++ b/tools/dct/Wizard/HW_Module.cmp @@ -0,0 +1,22 @@ +[Module_Name] +Bluetooth +GPS +WIFI +CMMB +FM +mATV +Camera +LCD +Sensors +Touch Panel +Keypad +Jogball and OFN +MISC +USB +AST +I2C +I2S +PWM +UART +SPI + diff --git a/tools/dct/Wizard/I2C.cmp b/tools/dct/Wizard/I2C.cmp new file mode 100755 index 000000000..6b3a00fd2 --- /dev/null +++ b/tools/dct/Wizard/I2C.cmp @@ -0,0 +1,38 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = I2C +[INFO_0_CONTENT] +I2C0 +I2C1 +I2C3 +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = I2C0 +[GPIO_NAME0] +GPIO_I2C0_SCA_PIN +GPIO_I2C0_SDA_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = I2C1 +[GPIO_NAME1] +GPIO_I2C1_SCA_PIN +GPIO_I2C1_SDA_PIN +[EINT_NAME1] + +[TYPE2] +INFO_0 = I2C2 +[GPIO_NAME2] +GPIO_I2C2_SCA_PIN +GPIO_I2C2_SDA_PIN +[EINT_NAME2] + diff --git a/tools/dct/Wizard/I2S.cmp b/tools/dct/Wizard/I2S.cmp new file mode 100755 index 000000000..00aa266a1 --- /dev/null +++ b/tools/dct/Wizard/I2S.cmp @@ -0,0 +1,31 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = I2S +[INFO_0_CONTENT] +I2S0 +I2S1 +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = I2S0 +[GPIO_NAME0] +GPIO_I2S0_CK_PIN +GPIO_I2S0_DAT_PIN +GPIO_I2S0_WS_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = I2S1 +[GPIO_NAME1] +GPIO_I2S1_CK_PIN +GPIO_I2S1_DAT_PIN +GPIO_I2S1_WS_PIN +[EINT_NAME1] diff --git a/tools/dct/Wizard/Jogball_and_OFN.cmp b/tools/dct/Wizard/Jogball_and_OFN.cmp new file mode 100755 index 000000000..66a26f898 --- /dev/null +++ b/tools/dct/Wizard/Jogball_and_OFN.cmp @@ -0,0 +1,83 @@ +[MODULE_INFO] +INFO_NUM = 2 + +[INFO_0_NAME] +INFO_NAME = Jogbal Enable/Disable +[INFO_0_CONTENT] +Enable +Disable + +[INFO_1_NAME] +INFO_NAME = OFN Enable/Disable +[INFO_1_CONTENT] +Enable +Disable + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Enable +INFO_1 = Enable +[GPIO_NAME0] +GPIO_JBD_INPUT_UP_PIN +GPIO_JBD_INPUT_LEFT_PIN +GPIO_JBD_INPUT_RIGHT_PIN +GPIO_JBD_INPUT_DOWN_PIN +GPIO_HALL_1_PIN +GPIO_HALL_2_PIN +GPIO_HALL_3_PIN +GPIO_HALL_4_PIN +GPIO_OFN_EINT_PIN +GPIO_OFN_DWN_PIN +GPIO_OFN_RST_PIN +[EINT_NAME0] +HALL_1 +HALL_2 +HALL_3 +HALL_4 +OFN + +[TYPE1] +INFO_0 = Enabel +INFO_1 = Disable +[GPIO_NAME1] +GPIO_JBD_INPUT_UP_PIN +GPIO_JBD_INPUT_LEFT_PIN +GPIO_JBD_INPUT_RIGHT_PIN +GPIO_JBD_INPUT_DOWN_PIN +GPIO_HALL_1_PIN +GPIO_HALL_2_PIN +GPIO_HALL_3_PIN +GPIO_HALL_4_PIN +[EINT_NAME1] +HALL_1 +HALL_2 +HALL_3 +HALL_4 + +[TYPE2] +INFO_0 = Disable +INFO_1 = Enable +[GPIO_NAME2] +GPIO_OFN_EINT_PIN +GPIO_OFN_DWN_PIN +GPIO_OFN_RST_PIN +[EINT_NAME2] +OFN + +[TYPE3] +INFO_0 = Disable +INFO_1 = Disable +[GPIO_NAME3] + +[EINT_NAME3] + + + + + + + + diff --git a/tools/dct/Wizard/JogballandOFN_old.cmp b/tools/dct/Wizard/JogballandOFN_old.cmp new file mode 100755 index 000000000..66a26f898 --- /dev/null +++ b/tools/dct/Wizard/JogballandOFN_old.cmp @@ -0,0 +1,83 @@ +[MODULE_INFO] +INFO_NUM = 2 + +[INFO_0_NAME] +INFO_NAME = Jogbal Enable/Disable +[INFO_0_CONTENT] +Enable +Disable + +[INFO_1_NAME] +INFO_NAME = OFN Enable/Disable +[INFO_1_CONTENT] +Enable +Disable + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Enable +INFO_1 = Enable +[GPIO_NAME0] +GPIO_JBD_INPUT_UP_PIN +GPIO_JBD_INPUT_LEFT_PIN +GPIO_JBD_INPUT_RIGHT_PIN +GPIO_JBD_INPUT_DOWN_PIN +GPIO_HALL_1_PIN +GPIO_HALL_2_PIN +GPIO_HALL_3_PIN +GPIO_HALL_4_PIN +GPIO_OFN_EINT_PIN +GPIO_OFN_DWN_PIN +GPIO_OFN_RST_PIN +[EINT_NAME0] +HALL_1 +HALL_2 +HALL_3 +HALL_4 +OFN + +[TYPE1] +INFO_0 = Enabel +INFO_1 = Disable +[GPIO_NAME1] +GPIO_JBD_INPUT_UP_PIN +GPIO_JBD_INPUT_LEFT_PIN +GPIO_JBD_INPUT_RIGHT_PIN +GPIO_JBD_INPUT_DOWN_PIN +GPIO_HALL_1_PIN +GPIO_HALL_2_PIN +GPIO_HALL_3_PIN +GPIO_HALL_4_PIN +[EINT_NAME1] +HALL_1 +HALL_2 +HALL_3 +HALL_4 + +[TYPE2] +INFO_0 = Disable +INFO_1 = Enable +[GPIO_NAME2] +GPIO_OFN_EINT_PIN +GPIO_OFN_DWN_PIN +GPIO_OFN_RST_PIN +[EINT_NAME2] +OFN + +[TYPE3] +INFO_0 = Disable +INFO_1 = Disable +[GPIO_NAME3] + +[EINT_NAME3] + + + + + + + + diff --git a/tools/dct/Wizard/Keypad.cmp b/tools/dct/Wizard/Keypad.cmp new file mode 100755 index 000000000..aa59e5094 --- /dev/null +++ b/tools/dct/Wizard/Keypad.cmp @@ -0,0 +1,121 @@ +[MODULE_INFO] +INFO_NUM = 2 + +[INFO_0_NAME] +INFO_NAME = Power Key Use EINT +[INFO_0_CONTENT] +Yes +No + +[INFO_0_PROPERTY] +MULTIPLE_CHECK = NO + +[INFO_1_NAME] +INFO_NAME = QWERTYSLIDE Keypad +[INFO_1_CONTENT] +Yes +No + +[INFO_1_PROPERTY] +MULTIPLE_CHECK = NO + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = Yes +INFO_1 = Yes +[GPIO_NAME0] +GPIO_QWERTYSLIDE_EINT_PIN +GPIO_PWR_BUTTON_PIN +GPIO_KPD_KCOL0_PIN +GPIO_KPD_KCOL1_PIN +GPIO_KPD_KCOL2_PIN +GPIO_KPD_KCOL3_PIN +GPIO_KPD_KCOL4_PIN +GPIO_KPD_KCOL5_PIN +GPIO_KPD_KCOL6_PIN +GPIO_KPD_KCOL7_PIN +GPIO_KPD_KROW0_PIN +GPIO_KPD_KROW1_PIN +GPIO_KPD_KROW2_PIN +GPIO_KPD_KROW3_PIN +GPIO_KPD_KROW4_PIN +GPIO_KPD_KROW5_PIN +GPIO_KPD_KROW6_PIN +GPIO_KPD_KROW7_PIN +[EINT_NAME0] +KPD_PWRKEY +KPD_SLIDE + +[TYPE1] +INFO_0 = Yes +INFO_1 = No +[GPIO_NAME1] +GPIO_PWR_BUTTON_PIN +GPIO_KPD_KCOL0_PIN +GPIO_KPD_KCOL1_PIN +GPIO_KPD_KCOL2_PIN +GPIO_KPD_KCOL3_PIN +GPIO_KPD_KCOL4_PIN +GPIO_KPD_KCOL5_PIN +GPIO_KPD_KCOL6_PIN +GPIO_KPD_KCOL7_PIN +GPIO_KPD_KROW0_PIN +GPIO_KPD_KROW1_PIN +GPIO_KPD_KROW2_PIN +GPIO_KPD_KROW3_PIN +GPIO_KPD_KROW4_PIN +GPIO_KPD_KROW5_PIN +GPIO_KPD_KROW6_PIN +GPIO_KPD_KROW7_PIN +[EINT_NAME1] +KPD_PWRKEY + +[TYPE2] +INFO_0 = No +INFO_1 = Yes +[GPIO_NAME2] +GPIO_QWERTYSLIDE_EINT_PIN +GPIO_KPD_KCOL0_PIN +GPIO_KPD_KCOL1_PIN +GPIO_KPD_KCOL2_PIN +GPIO_KPD_KCOL3_PIN +GPIO_KPD_KCOL4_PIN +GPIO_KPD_KCOL5_PIN +GPIO_KPD_KCOL6_PIN +GPIO_KPD_KCOL7_PIN +GPIO_KPD_KROW0_PIN +GPIO_KPD_KROW1_PIN +GPIO_KPD_KROW2_PIN +GPIO_KPD_KROW3_PIN +GPIO_KPD_KROW4_PIN +GPIO_KPD_KROW5_PIN +GPIO_KPD_KROW6_PIN +GPIO_KPD_KROW7_PIN +[EINT_NAME2] +KPD_SLIDE + +[TYPE3] +INFO_0 = No +INFO_1 = No +[GPIO_NAME2] +GPIO_KPD_KCOL0_PIN +GPIO_KPD_KCOL1_PIN +GPIO_KPD_KCOL2_PIN +GPIO_KPD_KCOL3_PIN +GPIO_KPD_KCOL4_PIN +GPIO_KPD_KCOL5_PIN +GPIO_KPD_KCOL6_PIN +GPIO_KPD_KCOL7_PIN +GPIO_KPD_KROW0_PIN +GPIO_KPD_KROW1_PIN +GPIO_KPD_KROW2_PIN +GPIO_KPD_KROW3_PIN +GPIO_KPD_KROW4_PIN +GPIO_KPD_KROW5_PIN +GPIO_KPD_KROW6_PIN +GPIO_KPD_KROW7_PIN +[EINT_NAME2]
\ No newline at end of file diff --git a/tools/dct/Wizard/LCD.cmp b/tools/dct/Wizard/LCD.cmp new file mode 100755 index 000000000..3e16e4dc3 --- /dev/null +++ b/tools/dct/Wizard/LCD.cmp @@ -0,0 +1,32 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = LCD Type +[INFO_0_CONTENT] +MCU +RGB +MIPI + +[INFO_0_PROPERTY] +MULTIPLE_CHECK = NO + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = RGB +[GPIO_NAME0] +GPIO_DISP_LSCK_PIN +GPIO_DISP_LSA0_PIN +GPIO_DISP_LSDA_PIN +GPIO_DISP_LSCE_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = MCU +[GPIO_NAME1] +[EINT_NAME1] + + diff --git a/tools/dct/Wizard/MISC.cmp b/tools/dct/Wizard/MISC.cmp new file mode 100755 index 000000000..64e88863f --- /dev/null +++ b/tools/dct/Wizard/MISC.cmp @@ -0,0 +1,30 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = Please Select Function To Set +[INFO_0_CONTENT] +PMIC +External Audio AMP + +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = PMIC +[GPIO_NAME0] +GPIO_PMIC_EINT_PIN +[EINT_NAME0] +MT6326_PMIC + +[TYPE1] +INFO_0 = External Audio AMP +[GPIO_NAME1] +GPIO_SPEAKER_EN_PIN +[EINT_NAME1] + + diff --git a/tools/dct/Wizard/MotionSensor.cmp b/tools/dct/Wizard/MotionSensor.cmp new file mode 100755 index 000000000..38ba47008 --- /dev/null +++ b/tools/dct/Wizard/MotionSensor.cmp @@ -0,0 +1,156 @@ +[MODULE_INFO] +INFO_NUM = 2 + +[INFO_0_NAME] +INFO_NAME = Motion Chip Type +[INFO_0_CONTENT] +6601 +6611 + +[INFO_1_NAME] +INFO_NAME = Motion 26MHz_Clock_Source +[INFO_1_CONTENT] +Co_Clock with RF:AD6548 +BT Soc:MT6236 + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 +PROTECT_0 = gpio_bt_power_pin 0 0 1 0 1 0 0 +PROTECT_1 = gpio_bt_32k_pin 0 0 1 0 1 0 0 +PROTECT_2 = gpio_bt_utxd3_pin 0 0 1 0 1 0 0 +PROTECT_3 = gpio_bt_urxd3_pin 1 1 0 1 1 0 0 +PROTECT_4 = gpio_bt_pcmclk_pin 0 0 1 0 1 0 0 +PROTECT_5 = gpio_bt_pcmsync_pin 0 0 1 0 1 0 0 +PROTECT_6 = gpio_bt_pcmin_pin 1 0 0 1 1 0 0 +PROTECT_7 = gpio_bt_pcmout_pin 0 0 1 0 1 0 0 +PROTECT_8 = gpio_bt_reset_pin 0 0 1 0 1 0 0 +PROTECT_9 = gpio_bt_co_clock_pin 1 0 1 0 1 0 0 + +;non co-clock +;6601 ,6611 only support non co-clock +[TYPE0] +INFO_0 = 6601 +INFO_1 = Dedicate Clock source +[GPIO_NAME0] +gpio_bt_power_pin +gpio_bt_32k_pin +gpio_bt_utxd3_pin +gpio_bt_urxd3_pin +gpio_bt_pcmclk_pin +gpio_bt_pcmsync_pin +gpio_bt_pcmin_pin +gpio_bt_pcmout_pin +gpio_bt_reset_pin +[EINT_NAME0] +BT_CO_CLOCK_EINT_NO + +;6612 6616 co-clock with MT6253 MT6268 +[TYPE1] +INFO_0 = 6611 +INFO_1 = Dedicate Clock source +[GPIO_NAME1] +gpio_bt_power_pin +gpio_bt_32k_pin +gpio_bt_utxd3_pin +gpio_bt_urxd3_pin +gpio_bt_pcmclk_pin +gpio_bt_pcmsync_pin +gpio_bt_pcmin_pin +gpio_bt_pcmout_pin +gpio_bt_reset_pin +[EINT_NAME1] +BT_CO_CLOCK_EINT_NO + +;6612 6616 +[TYPE2] +INFO_0 = 6612 +INFO_1 = MT6253,MT6268 +[GPIO_NAME2] +GPIO_BT_POWREN_PIN +GPIO_BT_RESET_PIN +GPIO_BT_EINT_PIN +GPIO_BT_CLK_PIN +;gpio_bt_power_pin +;gpio_bt_32k_pin +;gpio_bt_utxd3_pin +;gpio_bt_urxd3_pin +;gpio_bt_pcmclk_pin +;gpio_bt_pcmsync_pin +;gpio_bt_pcmin_pin +;gpio_bt_pcmout_pin +;gpio_bt_reset_pin +;gpio_bt_co_clock_pin +[EINT_NAME2] +BT_CO_CLOCK_EINT_NO + +;6612 6616 +[TYPE3] +INFO_0 = 6616 +INFO_1 = MT6253,MT6268 +[GPIO_NAME3] +GPIO_BT_POWREN_PIN +GPIO_BT_RESET_PIN +GPIO_BT_EINT_PIN +GPIO_BT_CLK_PIN +;gpio_bt_power_pin +;gpio_bt_32k_pin +;gpio_bt_utxd3_pin +;gpio_bt_urxd3_pin +;gpio_bt_pcmclk_pin +;gpio_bt_pcmsync_pin +;gpio_bt_pcmin_pin +;gpio_bt_pcmout_pin +;gpio_bt_reset_pin +;gpio_bt_co_clock_pin +[EINT_NAME3] +BT_CO_CLOCK_EINT_NO + +[TYPE4] +INFO_0 = 6612 +INFO_1 = Co_Clock with RF:AD6548 +[GPIO_NAME4] +gpio_bt_power_pin +gpio_bt_32k_pin +gpio_bt_utxd3_pin +gpio_bt_urxd3_pin +gpio_bt_pcmclk_pin +gpio_bt_pcmsync_pin +gpio_bt_pcmin_pin +gpio_bt_pcmout_pin +gpio_bt_reset_pin +gpio_bt_co_clock_pin +[EINT_NAME4] +BT_CO_CLOCK_EINT_NO + +[TYPE5] +INFO_0 = 6616 +INFO_1 = Co_Clock with RF:AD6548 +[GPIO_NAME5] +gpio_bt_power_pin +gpio_bt_32k_pin +gpio_bt_utxd3_pin +gpio_bt_urxd3_pin +gpio_bt_pcmclk_pin +gpio_bt_pcmsync_pin +gpio_bt_pcmin_pin +gpio_bt_pcmout_pin +gpio_bt_reset_pin +gpio_bt_co_clock_pin +[EINT_NAME5] +BT_CO_CLOCK_EINT_NO + +;MT6236 +;no gpio and eint pin setting +[TYPE6] +INFO_0 = MT6236 +INFO_1 = Dedicate Clock source +[GPIO_NAME6] +;no gpio and eint pin setting +[EINT_NAME6] +BT_CO_CLOCK_EINT_NO + + + + + diff --git a/tools/dct/Wizard/PWM.cmp b/tools/dct/Wizard/PWM.cmp new file mode 100755 index 000000000..0f6ef6bfb --- /dev/null +++ b/tools/dct/Wizard/PWM.cmp @@ -0,0 +1,62 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = PWM +[INFO_0_CONTENT] +PWM1 +PWM2 +PWM3 +PWM4 +PWM5 +PWM6 +PWM7 +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = PWM1 +[GPIO_NAME0] +GPIO_PWM_1_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = PWM2 +[GPIO_NAME1] +GPIO_PWM_2_PIN +[EINT_NAME1] + +[TYPE2] +INFO_0 = PWM3 +[GPIO_NAME2] +GPIO_PWM_3_PIN +[EINT_NAME2] + +[TYPE3] +INFO_0 = PWM4 +[GPIO_NAME3] +GPIO_PWM_4_PIN +[EINT_NAME3] + +[TYPE4] +INFO_0 = PWM5 +[GPIO_NAME4] +GPIO_PWM_5_PIN +[EINT_NAME4] + +[TYPE5] +INFO_0 = PWM6 +[GPIO_NAME5] +GPIO_PWM_6_PIN +[EINT_NAME5] + +[TYPE6] +INFO_0 = PWM7 +[GPIO_NAME6] +GPIO_PWM_7_PIN +[EINT_NAME6] diff --git a/tools/dct/Wizard/SPI.cmp b/tools/dct/Wizard/SPI.cmp new file mode 100755 index 000000000..4d28318c1 --- /dev/null +++ b/tools/dct/Wizard/SPI.cmp @@ -0,0 +1,30 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = SPI +[INFO_0_CONTENT] +Enable +Disable +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = Enable +[GPIO_NAME0] +GPIO_SPI_CS_PIN +GPIO_SPI_SCK_PIN +GPIO_SPI_MISO_PIN +GPIO_SPI_MOSI_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = Disable +[GPIO_NAME1] + +[EINT_NAME1] diff --git a/tools/dct/Wizard/Sensors.cmp b/tools/dct/Wizard/Sensors.cmp new file mode 100755 index 000000000..1612d7d5e --- /dev/null +++ b/tools/dct/Wizard/Sensors.cmp @@ -0,0 +1,66 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = Please Select Sensors EINT Pin +[INFO_0_CONTENT] +ALS +GSE_1 +GSE_2 +MSE +GYRO +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = ALS +[GPIO_NAME0] +GPIO_ALS_EINT_PIN +[EINT_NAME0] +ALS + +[TYPE1] +INFO_0 = GSE_1 +[GPIO_NAME1] +GPIO_GSE_1_EINT_PIN +[EINT_NAME1] +GSE_1 + +[TYPE2] +INFO_0 = GSE_2 +[GPIO_NAME2] +GPIO_GSE_2_EINT_PIN +[EINT_NAME2] +GSE_1 + +[TYPE3] +INFO_0 = MSE +[GPIO_NAME3] +GPIO_MSE_EINT_PIN +[EINT_NAME3] +MSE + +[TYPE4] +INFO_0 = GYRO +[GPIO_NAME4] +GPIO_GYRO_EINT_PIN +[EINT_NAME4] +GYRO + +[TYPE5] +INFO_0 = PWM6 +[GPIO_NAME5] +GPIO_PWM_6_PIN +[EINT_NAME5] + +[TYPE6] +INFO_0 = PWM7 +[GPIO_NAME6] +GPIO_PWM_7_PIN +[EINT_NAME6] + diff --git a/tools/dct/Wizard/TouchPanel.cmp b/tools/dct/Wizard/TouchPanel.cmp new file mode 100755 index 000000000..6d96f83d0 --- /dev/null +++ b/tools/dct/Wizard/TouchPanel.cmp @@ -0,0 +1,33 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = Touch Panel Type +[INFO_0_CONTENT] +R-touch +C-touch + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = R-touch +[GPIO_NAME0] + +[EINT_NAME0] + + +[TYPE1] +INFO_0 = C-touch +[GPIO_NAME1] +GPIO_CTP_EINT_PIN +GPIO_CTP_EN_PIN +GPIO_CTP_RST_PIN +[EINT_NAME1] +TOUCH_PANEL + + + + + diff --git a/tools/dct/Wizard/UART.cmp b/tools/dct/Wizard/UART.cmp new file mode 100755 index 000000000..e8e2154b0 --- /dev/null +++ b/tools/dct/Wizard/UART.cmp @@ -0,0 +1,53 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = UART +[INFO_0_CONTENT] +UART1 +UART2 +UART3 +UART4 +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = UART1 +[GPIO_NAME0] +GPIO_UART_URXD1_PIN +GPIO_UART_UTXD1_PIN +GPIO_UART_UCTS1_PIN +GPIO_UART_URTS1_PIN +[EINT_NAME0] + +[TYPE1] +INFO_0 = UART2 +[GPIO_NAME1] +GPIO_UART_URXD2_PIN +GPIO_UART_UTXD2_PIN +GPIO_UART_UCTS2_PIN +GPIO_UART_URTS2_PIN +[EINT_NAME1] + +[TYPE2] +INFO_0 = UART3 +[GPIO_NAME2] +GPIO_UART_URXD3_PIN +GPIO_UART_UTXD3_PIN +GPIO_UART_UCTS3_PIN +GPIO_UART_URTS3_PIN +[EINT_NAME2] + +[TYPE3] +INFO_0 = UART4 +[GPIO_NAME3] +GPIO_UART_URXD4_PIN +GPIO_UART_UTXD4_PIN +GPIO_UART_UCTS4_PIN +GPIO_UART_URTS4_PIN +[EINT_NAME3] diff --git a/tools/dct/Wizard/USB.cmp b/tools/dct/Wizard/USB.cmp new file mode 100755 index 000000000..8fcdd3daf --- /dev/null +++ b/tools/dct/Wizard/USB.cmp @@ -0,0 +1,29 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = USB OTG Enable/Disable +[INFO_0_CONTENT] +Enable +Disable + +[INFO_0_PROPERTY] +MULTIPLE_CHECK = NO + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Enable +[GPIO_NAME0] +GPIO_OTG_IDDIG_EINT_PIN +GPIO_OTG_DRVVBUS_PIN +[EINT_NAME0] +OTG_IDDIG + +[TYPE1] +INFO_0 = Disable +[GPIO_NAME1] + +[EINT_NAME1] diff --git a/tools/dct/Wizard/WIFI.cmp b/tools/dct/Wizard/WIFI.cmp new file mode 100755 index 000000000..d9a9e2c09 --- /dev/null +++ b/tools/dct/Wizard/WIFI.cmp @@ -0,0 +1,38 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = Wifi Chip Type +[INFO_0_CONTENT] +MT5921 +MT6620 + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = MT5921 +[GPIO_NAME0] +GPIO_WIFI_RST_PIN +GPIO_WIFI_CLK_PIN +GPIO_WIFI_EINT_PIN +[EINT_NAME0] +MT5921_WIFI + +[TYPE1] +INFO_0 = MT6620 +[GPIO_NAME1] +GPIO_COMBO_6620_LDO_EN_PIN +GPIO_COMBO_PMU_EN_PIN +GPIO_COMBO_RST_PIN +GPIO_COMBO_RTCCLK_PIN +GPIO_COMBO_BGF_EINT_PIN +GPIO_COMBO_ALL_EINT_PIN +[EINT_NAME1] +WIFI + + + + + diff --git a/tools/dct/Wizard/connectivity.cmp b/tools/dct/Wizard/connectivity.cmp new file mode 100755 index 000000000..19ea71afd --- /dev/null +++ b/tools/dct/Wizard/connectivity.cmp @@ -0,0 +1,37 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = I2C +[INFO_0_CONTENT] +I2C0 +I2C1 +I2C2 +[INFO_0_PROPERTY] +MULTIPLE_CHECK = YES + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + + +[TYPE0] +INFO_0 = I2C0 +[GPIO_NAME0] +GPIO_I2C_SCA_PIN +[EINT_NAME0] +MT7118_WIMAX + +[TYPE1] +INFO_0 = I2C1 +[GPIO_NAME1] +GPIO_I2C_SDA_PIN +[EINT_NAME1] + + +[TYPE2] +INFO_0 = I2C2 +[GPIO_NAME2] +GPIO_I2C3_SCA_PIN +[EINT_NAME2] +HALL_2 diff --git a/tools/dct/Wizard/mATV.cmp b/tools/dct/Wizard/mATV.cmp new file mode 100755 index 000000000..5a56baa0d --- /dev/null +++ b/tools/dct/Wizard/mATV.cmp @@ -0,0 +1,25 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = mATV +[INFO_0_CONTENT] +Enable +Disable + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Enable +[GPIO_NAME0] +GPIO_MATV_PWR_ENABLE +GPIO_MATV_N_RST +[EINT_NAME0] + +[TYPE1] +INFO_0 = Disable +[GPIO_NAME1] + +[EINT_NAME1] diff --git a/tools/dct/Wizard/mATV_old.cmp b/tools/dct/Wizard/mATV_old.cmp new file mode 100755 index 000000000..5a56baa0d --- /dev/null +++ b/tools/dct/Wizard/mATV_old.cmp @@ -0,0 +1,25 @@ +[MODULE_INFO] +INFO_NUM = 1 + +[INFO_0_NAME] +INFO_NAME = mATV +[INFO_0_CONTENT] +Enable +Disable + +[GPIO_PROTECT] +; Pull_en Pull_sel Def_dir In Out Inv Out_High +; dis:0 low:0 out:1 + +[TYPE0] +INFO_0 = Enable +[GPIO_NAME0] +GPIO_MATV_PWR_ENABLE +GPIO_MATV_N_RST +[EINT_NAME0] + +[TYPE1] +INFO_0 = Disable +[GPIO_NAME1] + +[EINT_NAME1] |