diff options
| author | Meizu OpenSource <patchwork@meizu.com> | 2016-08-15 10:19:42 +0800 |
|---|---|---|
| committer | Meizu OpenSource <patchwork@meizu.com> | 2016-08-15 10:19:42 +0800 |
| commit | d2e1446d81725c351dc73a03b397ce043fb18452 (patch) | |
| tree | 4dbc616b7f92aea39cd697a9084205ddb805e344 /include/mach | |
first commit
Diffstat (limited to 'include/mach')
43 files changed, 4145 insertions, 0 deletions
diff --git a/include/mach/battery_common.h b/include/mach/battery_common.h new file mode 100644 index 000000000..f8ee16540 --- /dev/null +++ b/include/mach/battery_common.h @@ -0,0 +1,259 @@ +#ifndef BATTERY_COMMON_H +#define BATTERY_COMMON_H + +#include <linux/ioctl.h> +#include <mach/mt_typedefs.h> +#include "charging.h" + + +/***************************************************************************** + * BATTERY VOLTAGE + ****************************************************************************/ +#define PRE_CHARGE_VOLTAGE 3200 +#ifdef MEIZU_M81 +#define SYSTEM_OFF_VOLTAGE 3350 +#else +#define SYSTEM_OFF_VOLTAGE 3400 +#endif +#define CONSTANT_CURRENT_CHARGE_VOLTAGE 4100 +#define CONSTANT_VOLTAGE_CHARGE_VOLTAGE 4200 +#define CV_DROPDOWN_VOLTAGE 4000 +#define CHARGER_THRESH_HOLD 4300 +#define BATTERY_UVLO_VOLTAGE 2700 +#ifndef SHUTDOWN_SYSTEM_VOLTAGE +#define SHUTDOWN_SYSTEM_VOLTAGE 3400 +#endif + +/***************************************************************************** + * BATTERY TIMER + ****************************************************************************/ +/* #define MAX_CHARGING_TIME 1*60*60 // 1hr */ +/* #define MAX_CHARGING_TIME 8*60*60 // 8hr */ +/* #define MAX_CHARGING_TIME 12*60*60 // 12hr */ +#define MAX_CHARGING_TIME 24*60*60 /* 24hr */ + +#define MAX_POSTFULL_SAFETY_TIME 1*30*60 /* 30mins */ +#define MAX_PreCC_CHARGING_TIME 1*30*60 /* 0.5hr */ + +/* #define MAX_CV_CHARGING_TIME 1*30*60 // 0.5hr */ +#define MAX_CV_CHARGING_TIME 3*60*60 /* 3hr */ + + +#define MUTEX_TIMEOUT 5000 +#define BAT_TASK_PERIOD 10 /* 10sec */ +#define g_free_bat_temp 1000 /* 1 s */ + +/***************************************************************************** + * BATTERY Protection + ****************************************************************************/ +#define Battery_Percent_100 100 +#define charger_OVER_VOL 1 +#define BATTERY_UNDER_VOL 2 +#define BATTERY_OVER_TEMP 3 +#define ADC_SAMPLE_TIMES 5 + +/***************************************************************************** + * Pulse Charging State + ****************************************************************************/ +#define CHR_PRE 0x1000 +#define CHR_CC 0x1001 +#define CHR_TOP_OFF 0x1002 +#define CHR_POST_FULL 0x1003 +#define CHR_BATFULL 0x1004 +#define CHR_ERROR 0x1005 +#define CHR_HOLD 0x1006 + +/***************************************************************************** + * CallState + ****************************************************************************/ +#define CALL_IDLE 0 +#define CALL_ACTIVE 1 + +/***************************************************************************** + * Enum + ****************************************************************************/ +typedef unsigned int WORD; + + +typedef enum { + PMU_STATUS_OK = 0, + PMU_STATUS_FAIL = 1, +} PMU_STATUS; + + +typedef enum { + USB_SUSPEND = 0, + USB_UNCONFIGURED, + USB_CONFIGURED +} usb_state_enum; + +typedef enum { + BATTERY_AVG_CURRENT = 0, + BATTERY_AVG_VOLT = 1, + BATTERY_AVG_TEMP = 2, + BATTERY_AVG_MAX +} BATTERY_AVG_ENUM; + +typedef enum { + BATTERY_THREAD_TIME = 0, + CAR_TIME, + SUSPEND_TIME, + DURATION_NUM +} BATTERY_TIME_ENUM; + +/***************************************************************************** +* JEITA battery temperature standard + charging info ,like temperatue, charging current, re-charging voltage, CV threshold would be reconfigurated. + Temperature hysteresis default 6C. + Reference table: + degree AC Current USB current CV threshold Recharge Vol hysteresis condition + > 60 no charging current, X X <54(Down) + 45~60 600mA 450mA 4.1V 4V <39(Down) >60(Up) + 10~45 600mA 450mA 4.2V 4.1V <10(Down) >45(Up) + 0~10 600mA 450mA 4.1V 4V <0(Down) >16(Up) + -10~0 200mA 200mA 4V 3.9V <-10(Down) >6(Up) + <-10 no charging current, X X >-10(Up) +****************************************************************************/ +typedef enum { + TEMP_BELOW_NEG_10 = 0, + TEMP_NEG_10_TO_POS_0, + TEMP_POS_0_TO_POS_10, + TEMP_POS_10_TO_POS_45, + TEMP_POS_45_TO_POS_60, + TEMP_ABOVE_POS_60 +} temp_state_enum; + + +#define TEMP_POS_60_THRESHOLD 50 +#define TEMP_POS_60_THRES_MINUS_X_DEGREE 47 + +#define TEMP_POS_45_THRESHOLD 45 +#define TEMP_POS_45_THRES_MINUS_X_DEGREE 39 + +#define TEMP_POS_10_THRESHOLD 10 +#define TEMP_POS_10_THRES_PLUS_X_DEGREE 16 + +#define TEMP_POS_0_THRESHOLD 0 +#define TEMP_POS_0_THRES_PLUS_X_DEGREE 6 + +#ifdef CONFIG_MTK_FAN5405_SUPPORT +#define TEMP_NEG_10_THRESHOLD 0 +#define TEMP_NEG_10_THRES_PLUS_X_DEGREE 0 +#elif defined(CONFIG_MTK_BQ24158_SUPPORT) +#define TEMP_NEG_10_THRESHOLD 0 +#define TEMP_NEG_10_THRES_PLUS_X_DEGREE 0 +#else +#define TEMP_NEG_10_THRESHOLD 0 +#define TEMP_NEG_10_THRES_PLUS_X_DEGREE 0 +#endif + +/***************************************************************************** + * Normal battery temperature state + ****************************************************************************/ +typedef enum { + TEMP_POS_LOW = 0, + TEMP_POS_NORMAL, +#ifdef MEIZU_M81 + TEMP_POS_MEDIUM, +#endif + TEMP_POS_HIGH +} batt_temp_state_enum; + +/***************************************************************************** + * structure + ****************************************************************************/ +typedef struct { + kal_bool bat_exist; + kal_bool bat_full; + INT32 bat_charging_state; + UINT32 bat_vol; + kal_bool bat_in_recharging_state; + kal_uint32 Vsense; + kal_bool charger_exist; + UINT32 charger_vol; + INT32 charger_protect_status; + INT32 ICharging; + INT32 IBattery; + INT32 temperature; + INT32 temperatureR; + INT32 temperatureV; + UINT32 total_charging_time; + UINT32 PRE_charging_time; + UINT32 CC_charging_time; + UINT32 TOPOFF_charging_time; + UINT32 POSTFULL_charging_time; + UINT32 charger_type; + INT32 SOC; + INT32 UI_SOC; + INT32 UI_SOC2; + UINT32 nPercent_ZCV; + UINT32 nPrecent_UI_SOC_check_point; + UINT32 ZCV; +} PMU_ChargerStruct; + +/***************************************************************************** + * Extern Variable + ****************************************************************************/ +extern PMU_ChargerStruct BMT_status; +extern CHARGING_CONTROL battery_charging_control; +extern kal_bool g_ftm_battery_flag; +extern int charging_level_data[1]; +extern kal_bool g_call_state; +extern kal_bool g_charging_full_reset_bat_meter; +#if defined(CONFIG_MTK_PUMP_EXPRESS_SUPPORT) || defined(CONFIG_MTK_PUMP_EXPRESS_PLUS_SUPPORT) +extern kal_bool ta_check_chr_type; +extern kal_bool ta_cable_out_occur; +extern kal_bool is_ta_connect; +extern struct wake_lock TA_charger_suspend_lock; +#endif + + +/***************************************************************************** + * Extern Function + ****************************************************************************/ +extern void charging_suspend_enable(void); +extern void charging_suspend_disable(void); +extern kal_bool bat_is_charger_exist(void); +extern kal_bool bat_is_charging_full(void); +extern kal_uint32 bat_get_ui_percentage(void); +extern kal_uint32 get_charging_setting_current(void); +extern kal_uint32 bat_is_recharging_phase(void); +extern void do_chrdet_int_task(void); +extern void set_usb_current_unlimited(bool enable); +extern bool get_usb_current_unlimited(void); +extern CHARGER_TYPE mt_get_charger_type(void); + +extern kal_uint32 mt_battery_get_duration_time(BATTERY_TIME_ENUM duration_type); +extern void mt_battery_update_time(struct timespec * pre_time, BATTERY_TIME_ENUM duration_type); +extern kal_uint32 mt_battery_shutdown_check(void); +extern kal_uint8 bat_is_kpoc(void); + +#ifdef CONFIG_MTK_SMART_BATTERY +extern void wake_up_bat(void); +extern void wake_up_bat2(void); +extern void wake_up_bat3(void); + +extern unsigned long BAT_Get_Battery_Voltage(int polling_mode); +extern void mt_battery_charging_algorithm(void); +#if defined(CONFIG_MTK_JEITA_STANDARD_SUPPORT) +extern PMU_STATUS do_jeita_state_machine(void); +#endif + +#else + +#define wake_up_bat() do {} while (0) +#define wake_up_bat2() do {} while (0) +#define wake_up_bat3() do {} while (0) + + +#define BAT_Get_Battery_Voltage(polling_mode) ({ 0; }) + +#endif + +#ifdef CONFIG_MTK_POWER_EXT_DETECT +extern kal_bool bat_is_ext_power(void); +#endif + + + +#endif /* #ifndef BATTERY_COMMON_H */ diff --git a/include/mach/battery_meter.h b/include/mach/battery_meter.h new file mode 100644 index 000000000..74501bd88 --- /dev/null +++ b/include/mach/battery_meter.h @@ -0,0 +1,147 @@ +#ifndef _BATTERY_METER_H +#define _BATTERY_METER_H + +#include <mach/mt_typedefs.h> +#include "cust_battery_meter.h" +/* ============================================================ */ +/* define */ +/* ============================================================ */ +#define FG_CURRENT_AVERAGE_SIZE 30 + +/* ============================================================ */ +/* ENUM */ +/* ============================================================ */ + +/* ============================================================ */ +/* structure */ +/* ============================================================ */ + +#define FGD_NL_MSG_T_HDR_LEN 12 +#define FGD_NL_MSG_MAX_LEN 9200 + +struct fgd_nl_msg_t{ + unsigned int fgd_cmd; + unsigned int fgd_data_len; + unsigned int fgd_ret_data_len; + char fgd_data[FGD_NL_MSG_MAX_LEN]; +}; + +enum { + FG_MAIN = 1, + FG_SUSPEND = 2, + FG_RESUME = 4, + FG_CHARGER = 8 +}; + +enum { + HW_FG, + SW_FG, + AUXADC +}; + + +/* ============================================================ */ +/* typedef */ +/* ============================================================ */ +typedef struct { + INT32 BatteryTemp; + INT32 TemperatureR; +} BATT_TEMPERATURE; + +typedef enum { + FG_DAEMON_CMD_GET_INIT_FLAG, + FG_DAEMON_CMD_GET_SOC, + FG_DAEMON_CMD_GET_DOD0, + FG_DAEMON_CMD_GET_DOD1, + FG_DAEMON_CMD_GET_HW_OCV, + FG_DAEMON_CMD_GET_HW_FG_INIT_CURRENT, + FG_DAEMON_CMD_GET_HW_FG_CURRENT, + FG_DAEMON_CMD_GET_HW_FG_INIT_CURRENT_SIGN, + FG_DAEMON_CMD_GET_HW_FG_CURRENT_SIGN, + FG_DAEMON_CMD_GET_HW_FG_CAR_ACT, + FG_DAEMON_CMD_GET_TEMPERTURE, + FG_DAEMON_CMD_DUMP_REGISTER, + FG_DAEMON_CMD_CHARGING_ENABLE, + FG_DAEMON_CMD_GET_BATTERY_INIT_VOLTAGE, + FG_DAEMON_CMD_GET_BATTERY_VOLTAGE, + FG_DAEMON_CMD_FGADC_RESET, + FG_DAEMON_CMD_GET_BATTERY_PLUG_STATUS, + FG_DAEMON_CMD_GET_RTC_SPARE_FG_VALUE, + FG_DAEMON_CMD_IS_CHARGER_EXIST, + FG_DAEMON_CMD_IS_BATTERY_FULL, //bat_is_battery_full, + FG_DAEMON_CMD_SET_BATTERY_FULL, //bat_set_battery_full, + FG_DAEMON_CMD_SET_RTC, //set RTC, + FG_DAEMON_CMD_SET_POWEROFF, //set Poweroff, + FG_DAEMON_CMD_IS_KPOC, //is KPOC, + FG_DAEMON_CMD_GET_BOOT_REASON, //g_boot_reason, + FG_DAEMON_CMD_GET_CHARGING_CURRENT, + FG_DAEMON_CMD_GET_CHARGER_VOLTAGE, + FG_DAEMON_CMD_GET_SHUTDOWN_COND, + FG_DAEMON_CMD_GET_CUSTOM_SETTING, + FG_DAEMON_CMD_GET_UI_SOC, + FG_DAEMON_CMD_GET_CV_VALUE, + FG_DAEMON_CMD_GET_DURATION_TIME, + FG_DAEMON_CMD_GET_TRACKING_TIME, + FG_DAEMON_CMD_GET_CURRENT_TH, + FG_DAEMON_CMD_GET_CHECK_TIME, + FG_DAEMON_CMD_GET_DIFFERENCE_VOLTAGE_UPDATE, + FG_DAEMON_CMD_GET_AGING1_LOAD_SOC, + FG_DAEMON_CMD_GET_AGING1_UPDATE_SOC, + FG_DAEMON_CMD_GET_SHUTDOWN_SYSTEM_VOLTAGE, + FG_DAEMON_CMD_GET_CHARGE_TRACKING_TIME, + FG_DAEMON_CMD_GET_DISCHARGE_TRACKING_TIME, + FG_DAEMON_CMD_GET_SHUTDOWN_GAUGE0, + FG_DAEMON_CMD_GET_SHUTDOWN_GAUGE1_XMINS, + FG_DAEMON_CMD_GET_SHUTDOWN_GAUGE1_MINS, + FG_DAEMON_CMD_SET_SUSPEND_TIME, + FG_DAEMON_CMD_SET_WAKEUP_SMOOTH_TIME, + FG_DAEMON_CMD_SET_IS_CHARGING, + FG_DAEMON_CMD_SET_RBAT, + FG_DAEMON_CMD_SET_SWOCV, + FG_DAEMON_CMD_SET_DOD0, + FG_DAEMON_CMD_SET_DOD1, + FG_DAEMON_CMD_SET_QMAX, + FG_DAEMON_CMD_SET_SOC, + FG_DAEMON_CMD_SET_UI_SOC, + FG_DAEMON_CMD_SET_UI_SOC2, + FG_DAEMON_CMD_SET_INIT_FLAG, + FG_DAEMON_CMD_SET_DAEMON_PID, + FG_DAEMON_CMD_NOTIFY_DAEMON, + + FG_DAEMON_CMD_FROM_USER_NUMBER +} FG_DAEMON_CTRL_CMD_FROM_USER; + + +/* ============================================================ */ +/* External Variables */ +/* ============================================================ */ + +/* ============================================================ */ +/* External function */ +/* ============================================================ */ +extern kal_int32 battery_meter_get_battery_voltage(kal_bool update); +extern kal_int32 battery_meter_get_charging_current_imm(void); +extern kal_int32 battery_meter_get_charging_current(void); +extern kal_int32 battery_meter_get_battery_current(void); +extern kal_bool battery_meter_get_battery_current_sign(void); +extern kal_int32 battery_meter_get_car(void); +extern kal_int32 battery_meter_get_battery_temperature(void); +extern kal_int32 battery_meter_get_charger_voltage(void); +extern kal_int32 battery_meter_get_battery_percentage(void); +extern kal_int32 battery_meter_initial(void); +extern kal_int32 battery_meter_reset(void); +extern kal_int32 battery_meter_sync(kal_int32 bat_i_sense_offset); + +extern kal_int32 battery_meter_get_battery_zcv(void); +extern kal_int32 battery_meter_get_battery_nPercent_zcv(void); /* 15% zcv, 15% can be customized */ +extern kal_int32 battery_meter_get_battery_nPercent_UI_SOC(void); /* tracking point */ + +extern kal_int32 battery_meter_get_tempR(kal_int32 dwVolt); +extern kal_int32 battery_meter_get_tempV(void); +extern kal_int32 battery_meter_get_VSense(void); /* isense voltage */ + +#ifdef MEIZU_M81 + extern kal_int32 battery_meter_get_battery_current_now(void); +#endif +extern int wakeup_fg_algo(int flow_state); +#endif /* #ifndef _BATTERY_METER_H */ diff --git a/include/mach/battery_meter_hal.h b/include/mach/battery_meter_hal.h new file mode 100644 index 000000000..f7a40a324 --- /dev/null +++ b/include/mach/battery_meter_hal.h @@ -0,0 +1,67 @@ +#ifndef _BATTERY_METER_HAL_H +#define _BATTERY_METER_HAL_H + +#include <mach/mt_typedefs.h> + +/* ============================================================ */ +/* define */ +/* ============================================================ */ +#define BM_LOG_CRTI 1 +#define BM_LOG_FULL 1 + +#define bm_print(num, fmt, args...) \ +do { \ + if (Enable_FGADC_LOG >= (int)num) { \ + pr_notice(fmt, ##args); \ + } \ +} while (0) + + +/* ============================================================ */ +/* ENUM */ +/* ============================================================ */ +typedef enum { + BATTERY_METER_CMD_HW_FG_INIT, + + BATTERY_METER_CMD_GET_HW_FG_CURRENT, /* fgauge_read_current */ + BATTERY_METER_CMD_GET_HW_FG_CURRENT_SIGN, /* */ + BATTERY_METER_CMD_GET_HW_FG_CAR, /* fgauge_read_columb */ + + BATTERY_METER_CMD_HW_RESET, /* FGADC_Reset_SW_Parameter */ + + BATTERY_METER_CMD_GET_ADC_V_BAT_SENSE, + BATTERY_METER_CMD_GET_ADC_V_I_SENSE, + BATTERY_METER_CMD_GET_ADC_V_BAT_TEMP, + BATTERY_METER_CMD_GET_ADC_V_CHARGER, + + BATTERY_METER_CMD_GET_HW_OCV, + + BATTERY_METER_CMD_DUMP_REGISTER, + BATTERY_METER_CMD_SET_COLUMB_INTERRUPT, + BATTERY_METER_CMD_GET_BATTERY_PLUG_STATUS, + BATTERY_METER_CMD_GET_HW_FG_CAR_ACT, /* fgauge_read_columb */ + + BATTERY_METER_CMD_NUMBER +} BATTERY_METER_CTRL_CMD; + +/* ============================================================ */ +/* structure */ +/* ============================================================ */ + +/* ============================================================ */ +/* typedef */ +/* ============================================================ */ +typedef kal_int32(*BATTERY_METER_CONTROL) (BATTERY_METER_CTRL_CMD cmd, void *data); + +/* ============================================================ */ +/* External Variables */ +/* ============================================================ */ +extern int Enable_FGADC_LOG; + +/* ============================================================ */ +/* External function */ +/* ============================================================ */ +extern kal_int32 bm_ctrl_cmd(BATTERY_METER_CTRL_CMD cmd, void *data); + + +#endif /* #ifndef _BATTERY_METER_HAL_H */ diff --git a/include/mach/charging.h b/include/mach/charging.h new file mode 100644 index 000000000..7adbfc3f6 --- /dev/null +++ b/include/mach/charging.h @@ -0,0 +1,499 @@ +/***************************************************************************** + * + * Filename: + * --------- + * charging.h + * + * Project: + * -------- + * Maui_Software + * + * Description: + * ------------ + * This Module defines bmt internal charger hw setting function. + * + * Author: + * ------- + * Oscar Liu + * + *============================================================================ + * HISTORY + * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!! + *------------------------------------------------------------------------------ + * $Revision: 1.0 $ + * $Modtime: 11 Aug 2005 10:28:16 $ + * $Log: //mtkvs01/vmdata/Maui_sw/archives/mcu/hal/peripheral/inc/bmt_chr_setting.h-arc $ + * + * 03 04 2015 wy.chuang + * [ALPS01921641] [L1_merge] for PMIC and charging + * . + *------------------------------------------------------------------------------ + * Upper this line, this part is controlled by PVCS VM. DO NOT MODIFY!! + *============================================================================ + ****************************************************************************/ +#ifndef CHARGING_H +#define CHARGING_H + +#include <mach/mt_typedefs.h> +#include <cust_charging.h> + +/* ============================================================ */ +/* define */ +/* ============================================================ */ +/***************************************************************************** + * Log + ****************************************************************************/ +#define BAT_LOG_CRTI 1 +#define BAT_LOG_FULL 2 + +#define MEIZU_M81 + +#define battery_xlog_printk(num, fmt, args...) \ + do { \ + if (Enable_BATDRV_LOG >= (int)num) { \ + pr_notice(fmt, ##args); \ + } \ + } while (0) + +#define battery_log(num, fmt, args...) \ + do { \ + if (Enable_BATDRV_LOG >= (int)num) { \ + pr_notice(fmt, ##args); \ + } \ + } while (0) + + +/* ============================================================ */ +/* ENUM */ +/* ============================================================ */ +typedef enum { + CHARGING_CMD_INIT, + CHARGING_CMD_DUMP_REGISTER, + CHARGING_CMD_ENABLE, + CHARGING_CMD_SET_CV_VOLTAGE, + CHARGING_CMD_GET_CURRENT, + CHARGING_CMD_SET_CURRENT, + CHARGING_CMD_SET_INPUT_CURRENT, + CHARGING_CMD_GET_CHARGING_STATUS, + CHARGING_CMD_RESET_WATCH_DOG_TIMER, + CHARGING_CMD_SET_HV_THRESHOLD, + CHARGING_CMD_GET_HV_STATUS, + CHARGING_CMD_GET_BATTERY_STATUS, + CHARGING_CMD_GET_CHARGER_DET_STATUS, + CHARGING_CMD_GET_CHARGER_TYPE, + CHARGING_CMD_GET_IS_PCM_TIMER_TRIGGER, + CHARGING_CMD_SET_PLATFORM_RESET, + CHARGING_CMD_GET_PLATFORM_BOOT_MODE, + CHARGING_CMD_SET_POWER_OFF, + CHARGING_CMD_GET_POWER_SOURCE, + CHARGING_CMD_GET_CSDAC_FALL_FLAG, + CHARGING_CMD_SET_TA_CURRENT_PATTERN, + CHARGING_CMD_SET_ERROR_STATE, + CHARGING_CMD_DISO_INIT, + CHARGING_CMD_GET_DISO_STATE, + CHARGING_CMD_NUMBER +} CHARGING_CTRL_CMD; + + +typedef enum { + CHARGER_UNKNOWN = 0, + STANDARD_HOST, // USB : 450mA + CHARGING_HOST, + NONSTANDARD_CHARGER, // AC : 450mA~1A +#ifdef MEIZU_M81 + MEIZU_2_0A_CHARGER, //MEIZU M75 charger,5V/2A + STANDARD_CHARGER, // AC : ~1A + APPLE_CHARGER, // apple charger + APPLE_1_0A_CHARGER, // 1.0A apple charger + APPLE_2_1A_CHARGER, // 2.1A apple charger + U200_CHARGER, + APPLE_0_5A_CHARGER, // 0.5A apple charger +#else + STANDARD_CHARGER, // AC : ~1A + APPLE_2_1A_CHARGER, // 2.1A apple charger + APPLE_1_0A_CHARGER, // 1A apple charger + APPLE_0_5A_CHARGER, // 0.5A apple charger +#endif + WIRELESS_CHARGER, +} CHARGER_TYPE; + + +/* Enum of Voltage List */ +typedef enum { + BATTERY_VOLT_00_000000_V = 0, + BATTERY_VOLT_00_100000_V = 100000, + BATTERY_VOLT_00_200000_V = 200000, + BATTERY_VOLT_00_300000_V = 300000, + BATTERY_VOLT_00_400000_V = 400000, + BATTERY_VOLT_00_500000_V = 500000, + BATTERY_VOLT_00_600000_V = 600000, + BATTERY_VOLT_00_700000_V = 700000, + BATTERY_VOLT_00_725000_V = 725000, + BATTERY_VOLT_00_750000_V = 750000, + BATTERY_VOLT_00_775000_V = 775000, + BATTERY_VOLT_00_800000_V = 800000, + BATTERY_VOLT_00_825000_V = 825000, + BATTERY_VOLT_00_850000_V = 850000, + BATTERY_VOLT_00_875000_V = 875000, + BATTERY_VOLT_00_900000_V = 900000, + BATTERY_VOLT_00_925000_V = 925000, + BATTERY_VOLT_00_950000_V = 950000, + BATTERY_VOLT_00_975000_V = 975000, + BATTERY_VOLT_01_000000_V = 1000000, + BATTERY_VOLT_01_025000_V = 1025000, + BATTERY_VOLT_01_050000_V = 1050000, + BATTERY_VOLT_01_075000_V = 1075000, + BATTERY_VOLT_01_100000_V = 1100000, + BATTERY_VOLT_01_125000_V = 1125000, + BATTERY_VOLT_01_150000_V = 1150000, + BATTERY_VOLT_01_175000_V = 1175000, + BATTERY_VOLT_01_200000_V = 1200000, + BATTERY_VOLT_01_225000_V = 1225000, + BATTERY_VOLT_01_250000_V = 1250000, + BATTERY_VOLT_01_275000_V = 1275000, + BATTERY_VOLT_01_300000_V = 1300000, + BATTERY_VOLT_01_325000_V = 1325000, + BATTERY_VOLT_01_350000_V = 1350000, + BATTERY_VOLT_01_375000_V = 1375000, + BATTERY_VOLT_01_400000_V = 1400000, + BATTERY_VOLT_01_425000_V = 1425000, + BATTERY_VOLT_01_450000_V = 1450000, + BATTERY_VOLT_01_475000_V = 1475000, + BATTERY_VOLT_01_500000_V = 1500000, + BATTERY_VOLT_01_520000_V = 1520000, + BATTERY_VOLT_01_525000_V = 1525000, + BATTERY_VOLT_01_540000_V = 1540000, + BATTERY_VOLT_01_550000_V = 1550000, + BATTERY_VOLT_01_560000_V = 1560000, + BATTERY_VOLT_01_575000_V = 1575000, + BATTERY_VOLT_01_580000_V = 1580000, + BATTERY_VOLT_01_600000_V = 1600000, + BATTERY_VOLT_01_620000_V = 1620000, + BATTERY_VOLT_01_625000_V = 1625000, + BATTERY_VOLT_01_640000_V = 1640000, + BATTERY_VOLT_01_650000_V = 1650000, + BATTERY_VOLT_01_660000_V = 1660000, + BATTERY_VOLT_01_675000_V = 1675000, + BATTERY_VOLT_01_680000_V = 1680000, + BATTERY_VOLT_01_700000_V = 1700000, + BATTERY_VOLT_01_720000_V = 1720000, + BATTERY_VOLT_01_725000_V = 1725000, + BATTERY_VOLT_01_740000_V = 1740000, + BATTERY_VOLT_01_750000_V = 1750000, + BATTERY_VOLT_01_760000_V = 1760000, + BATTERY_VOLT_01_775000_V = 1775000, + BATTERY_VOLT_01_780000_V = 1780000, + BATTERY_VOLT_01_800000_V = 1800000, + BATTERY_VOLT_01_820000_V = 1820000, + BATTERY_VOLT_01_825000_V = 1825000, + BATTERY_VOLT_01_840000_V = 1840000, + BATTERY_VOLT_01_850000_V = 1850000, + BATTERY_VOLT_01_860000_V = 1860000, + BATTERY_VOLT_01_875000_V = 1875000, + BATTERY_VOLT_01_880000_V = 1880000, + BATTERY_VOLT_01_900000_V = 1900000, + BATTERY_VOLT_01_920000_V = 1920000, + BATTERY_VOLT_01_925000_V = 1925000, + BATTERY_VOLT_01_940000_V = 1940000, + BATTERY_VOLT_01_950000_V = 1950000, + BATTERY_VOLT_01_960000_V = 1960000, + BATTERY_VOLT_01_975000_V = 1975000, + BATTERY_VOLT_01_980000_V = 1980000, + BATTERY_VOLT_02_000000_V = 2000000, + BATTERY_VOLT_02_020000_V = 2020000, + BATTERY_VOLT_02_040000_V = 2040000, + BATTERY_VOLT_02_050000_V = 2050000, + BATTERY_VOLT_02_060000_V = 2060000, + BATTERY_VOLT_02_080000_V = 2080000, + BATTERY_VOLT_02_100000_V = 2100000, + BATTERY_VOLT_02_120000_V = 2120000, + BATTERY_VOLT_02_125000_V = 2125000, + BATTERY_VOLT_02_140000_V = 2140000, + BATTERY_VOLT_02_200000_V = 2200000, + BATTERY_VOLT_02_275000_V = 2275000, + BATTERY_VOLT_02_300000_V = 2300000, + BATTERY_VOLT_02_350000_V = 2350000, + BATTERY_VOLT_02_425000_V = 2425000, + BATTERY_VOLT_02_400000_V = 2400000, + BATTERY_VOLT_02_500000_V = 2500000, + BATTERY_VOLT_02_575000_V = 2575000, + BATTERY_VOLT_02_600000_V = 2600000, + BATTERY_VOLT_02_650000_V = 2650000, + BATTERY_VOLT_02_700000_V = 2700000, + BATTERY_VOLT_02_725000_V = 2725000, + BATTERY_VOLT_02_750000_V = 2750000, + BATTERY_VOLT_02_800000_V = 2800000, + BATTERY_VOLT_02_850000_V = 2850000, + BATTERY_VOLT_02_875000_V = 2875000, + BATTERY_VOLT_02_900000_V = 2900000, + BATTERY_VOLT_02_950000_V = 2950000, + BATTERY_VOLT_03_000000_V = 3000000, + BATTERY_VOLT_03_025000_V = 3025000, + BATTERY_VOLT_03_100000_V = 3100000, + BATTERY_VOLT_03_175000_V = 3175000, + BATTERY_VOLT_03_200000_V = 3200000, + BATTERY_VOLT_03_250000_V = 3250000, + BATTERY_VOLT_03_275000_V = 3275000, + BATTERY_VOLT_03_300000_V = 3300000, + BATTERY_VOLT_03_325000_V = 3325000, + BATTERY_VOLT_03_350000_V = 3350000, + BATTERY_VOLT_03_400000_V = 3400000, + BATTERY_VOLT_03_450000_V = 3450000, + BATTERY_VOLT_03_500000_V = 3500000, + BATTERY_VOLT_03_520000_V = 3520000, + BATTERY_VOLT_03_540000_V = 3540000, + BATTERY_VOLT_03_550000_V = 3550000, + BATTERY_VOLT_03_560000_V = 3560000, + BATTERY_VOLT_03_580000_V = 3580000, + BATTERY_VOLT_03_600000_V = 3600000, + BATTERY_VOLT_03_620000_V = 3620000, + BATTERY_VOLT_03_640000_V = 3640000, + BATTERY_VOLT_03_650000_V = 3650000, + BATTERY_VOLT_03_660000_V = 3660000, + BATTERY_VOLT_03_680000_V = 3680000, + BATTERY_VOLT_03_700000_V = 3700000, + BATTERY_VOLT_03_720000_V = 3720000, + BATTERY_VOLT_03_740000_V = 3740000, + BATTERY_VOLT_03_750000_V = 3750000, + BATTERY_VOLT_03_760000_V = 3760000, + BATTERY_VOLT_03_775000_V = 3775000, + BATTERY_VOLT_03_780000_V = 3780000, + BATTERY_VOLT_03_800000_V = 3800000, + BATTERY_VOLT_03_820000_V = 3820000, + BATTERY_VOLT_03_825000_V = 3825000, + BATTERY_VOLT_03_840000_V = 3840000, + BATTERY_VOLT_03_850000_V = 3850000, + BATTERY_VOLT_03_860000_V = 3860000, + BATTERY_VOLT_03_880000_V = 3880000, + BATTERY_VOLT_03_900000_V = 3900000, + BATTERY_VOLT_03_920000_V = 3920000, + BATTERY_VOLT_03_940000_V = 3940000, + BATTERY_VOLT_03_950000_V = 3950000, + BATTERY_VOLT_03_960000_V = 3960000, + BATTERY_VOLT_03_975000_V = 3975000, + BATTERY_VOLT_03_980000_V = 3980000, + BATTERY_VOLT_04_000000_V = 4000000, + BATTERY_VOLT_04_012500_V = 4012500, + BATTERY_VOLT_04_020000_V = 4020000, + BATTERY_VOLT_04_025000_V = 4025000, + BATTERY_VOLT_04_037500_V = 4037500, + BATTERY_VOLT_04_040000_V = 4040000, + BATTERY_VOLT_04_050000_V = 4050000, + BATTERY_VOLT_04_060000_V = 4060000, + BATTERY_VOLT_04_062500_V = 4062500, + BATTERY_VOLT_04_067500_V = 4067500, + BATTERY_VOLT_04_075000_V = 4075000, + BATTERY_VOLT_04_080000_V = 4080000, + BATTERY_VOLT_04_087500_V = 4087500, + BATTERY_VOLT_04_100000_V = 4100000, + BATTERY_VOLT_04_112500_V = 4112500, + BATTERY_VOLT_04_115000_V = 4115000, + BATTERY_VOLT_04_116000_V = 4116000, + BATTERY_VOLT_04_120000_V = 4120000, + BATTERY_VOLT_04_125000_V = 4125000, + BATTERY_VOLT_04_137500_V = 4137500, + BATTERY_VOLT_04_140000_V = 4140000, + BATTERY_VOLT_04_150000_V = 4150000, + BATTERY_VOLT_04_160000_V = 4160000, + BATTERY_VOLT_04_162500_V = 4162500, + BATTERY_VOLT_04_175000_V = 4175000, + BATTERY_VOLT_04_180000_V = 4180000, + BATTERY_VOLT_04_187500_V = 4187500, + BATTERY_VOLT_04_200000_V = 4200000, + BATTERY_VOLT_04_212500_V = 4212500, + BATTERY_VOLT_04_220000_V = 4220000, + BATTERY_VOLT_04_225000_V = 4225000, + BATTERY_VOLT_04_237500_V = 4237500, + BATTERY_VOLT_04_240000_V = 4240000, + BATTERY_VOLT_04_250000_V = 4250000, + BATTERY_VOLT_04_260000_V = 4260000, + BATTERY_VOLT_04_262500_V = 4262500, + BATTERY_VOLT_04_275000_V = 4275000, + BATTERY_VOLT_04_280000_V = 4280000, + BATTERY_VOLT_04_287500_V = 4287500, + BATTERY_VOLT_04_300000_V = 4300000, + BATTERY_VOLT_04_312500_V = 4312500, + BATTERY_VOLT_04_320000_V = 4320000, + BATTERY_VOLT_04_325000_V = 4325000, + BATTERY_VOLT_04_337500_V = 4337500, + BATTERY_VOLT_04_340000_V = 4340000, + BATTERY_VOLT_04_350000_V = 4350000, + BATTERY_VOLT_04_360000_V = 4360000, + BATTERY_VOLT_04_362500_V = 4362500, + BATTERY_VOLT_04_375000_V = 4375000, + BATTERY_VOLT_04_380000_V = 4380000, + BATTERY_VOLT_04_387500_V = 4387500, + BATTERY_VOLT_04_400000_V = 4400000, + BATTERY_VOLT_04_411500_V = 4411500, + BATTERY_VOLT_04_412500_V = 4412500, + BATTERY_VOLT_04_420000_V = 4420000, + BATTERY_VOLT_04_425000_V = 4425000, + BATTERY_VOLT_04_437500_V = 4437500, + BATTERY_VOLT_04_440000_V = 4440000, + BATTERY_VOLT_04_450000_V = 4450000, + BATTERY_VOLT_04_460000_V = 4460000, + BATTERY_VOLT_04_462500_V = 4462500, + BATTERY_VOLT_04_475000_V = 4475000, + BATTERY_VOLT_04_480000_V = 4480000, + BATTERY_VOLT_04_487500_V = 4487500, + BATTERY_VOLT_04_500000_V = 4500000, + BATTERY_VOLT_04_520000_V = 4520000, + BATTERY_VOLT_04_540000_V = 4540000, + BATTERY_VOLT_04_550000_V = 4550000, + BATTERY_VOLT_04_560000_V = 4560000, + BATTERY_VOLT_04_580000_V = 4580000, + BATTERY_VOLT_04_600000_V = 4600000, + BATTERY_VOLT_04_620000_V = 4620000, + BATTERY_VOLT_04_640000_V = 4640000, + BATTERY_VOLT_04_660000_V = 4660000, + BATTERY_VOLT_04_680000_V = 4680000, + BATTERY_VOLT_04_700000_V = 4700000, + BATTERY_VOLT_04_720000_V = 4720000, + BATTERY_VOLT_04_740000_V = 4740000, + BATTERY_VOLT_04_760000_V = 4760000, + BATTERY_VOLT_04_780000_V = 4780000, + BATTERY_VOLT_04_800000_V = 4800000, + BATTERY_VOLT_04_850000_V = 4850000, + BATTERY_VOLT_04_950000_V = 4950000, + BATTERY_VOLT_05_000000_V = 5000000, + BATTERY_VOLT_05_150000_V = 5150000, + BATTERY_VOLT_05_250000_V = 5250000, + BATTERY_VOLT_05_300000_V = 5300000, + BATTERY_VOLT_05_450000_V = 5450000, + BATTERY_VOLT_06_000000_V = 6000000, + BATTERY_VOLT_06_500000_V = 6500000, + BATTERY_VOLT_06_750000_V = 6750000, + BATTERY_VOLT_07_000000_V = 7000000, + BATTERY_VOLT_07_250000_V = 7250000, + BATTERY_VOLT_07_500000_V = 7500000, + BATTERY_VOLT_08_000000_V = 8000000, + BATTERY_VOLT_08_500000_V = 8500000, + BATTERY_VOLT_09_000000_V = 9000000, + BATTERY_VOLT_09_500000_V = 9500000, + BATTERY_VOLT_10_000000_V = 10000000, + BATTERY_VOLT_10_500000_V = 10500000, + BATTERY_VOLT_MAX, + BATTERY_VOLT_INVALID +} BATTERY_VOLTAGE_ENUM; + + +/* Enum of charger current List */ +typedef enum { + CHARGE_CURRENT_0_00_MA = 0, + CHARGE_CURRENT_50_00_MA = 5000, + CHARGE_CURRENT_62_50_MA = 6250, + CHARGE_CURRENT_70_00_MA = 7000, + CHARGE_CURRENT_75_00_MA = 7500, + CHARGE_CURRENT_87_50_MA = 8750, + CHARGE_CURRENT_99_00_MA = 9900, + CHARGE_CURRENT_100_00_MA = 10000, + CHARGE_CURRENT_125_00_MA = 12500, + CHARGE_CURRENT_150_00_MA = 15000, + CHARGE_CURRENT_200_00_MA = 20000, + CHARGE_CURRENT_225_00_MA = 22500, + CHARGE_CURRENT_250_00_MA = 25000, + CHARGE_CURRENT_300_00_MA = 30000, + CHARGE_CURRENT_350_00_MA = 35000, + CHARGE_CURRENT_375_00_MA = 37500, + CHARGE_CURRENT_400_00_MA = 40000, + CHARGE_CURRENT_425_00_MA = 42500, + CHARGE_CURRENT_450_00_MA = 45000, + CHARGE_CURRENT_500_00_MA = 50000, + CHARGE_CURRENT_525_00_MA = 52500, + CHARGE_CURRENT_550_00_MA = 55000, + CHARGE_CURRENT_600_00_MA = 60000, + CHARGE_CURRENT_625_00_MA = 62500, + CHARGE_CURRENT_650_00_MA = 65000, + CHARGE_CURRENT_675_00_MA = 67500, + CHARGE_CURRENT_700_00_MA = 70000, + CHARGE_CURRENT_750_00_MA = 75000, + CHARGE_CURRENT_775_00_MA = 77500, + CHARGE_CURRENT_800_00_MA = 80000, + CHARGE_CURRENT_825_00_MA = 82500, + CHARGE_CURRENT_850_00_MA = 85000, + CHARGE_CURRENT_900_00_MA = 90000, + CHARGE_CURRENT_925_00_MA = 92500, + CHARGE_CURRENT_950_00_MA = 95000, + CHARGE_CURRENT_975_00_MA = 97500, + CHARGE_CURRENT_1000_00_MA = 100000, + CHARGE_CURRENT_1050_00_MA = 105000, + CHARGE_CURRENT_1075_00_MA = 107500, + CHARGE_CURRENT_1100_00_MA = 110000, + CHARGE_CURRENT_1125_00_MA = 112500, + CHARGE_CURRENT_1150_00_MA = 115000, + CHARGE_CURRENT_1200_00_MA = 120000, + CHARGE_CURRENT_1225_00_MA = 122500, + CHARGE_CURRENT_1250_00_MA = 125000, + CHARGE_CURRENT_1275_00_MA = 127500, + CHARGE_CURRENT_1300_00_MA = 130000, + CHARGE_CURRENT_1350_00_MA = 135000, + CHARGE_CURRENT_1375_00_MA = 137500, + CHARGE_CURRENT_1400_00_MA = 140000, + CHARGE_CURRENT_1425_00_MA = 142500, + CHARGE_CURRENT_1450_00_MA = 145000, + CHARGE_CURRENT_1500_00_MA = 150000, + CHARGE_CURRENT_1525_00_MA = 152500, + CHARGE_CURRENT_1575_00_MA = 157500, + CHARGE_CURRENT_1600_00_MA = 160000, + CHARGE_CURRENT_1650_00_MA = 165000, + CHARGE_CURRENT_1675_00_MA = 167500, + CHARGE_CURRENT_1700_00_MA = 170000, + CHARGE_CURRENT_1725_00_MA = 172500, + CHARGE_CURRENT_1750_00_MA = 175000, + CHARGE_CURRENT_1800_00_MA = 180000, + CHARGE_CURRENT_1825_00_MA = 182500, + CHARGE_CURRENT_1875_00_MA = 187500, + CHARGE_CURRENT_1900_00_MA = 190000, + CHARGE_CURRENT_1950_00_MA = 195000, + CHARGE_CURRENT_1975_00_MA = 197500, + CHARGE_CURRENT_2000_00_MA = 200000, + CHARGE_CURRENT_2025_00_MA = 202500, + CHARGE_CURRENT_2050_00_MA = 205000, + CHARGE_CURRENT_2100_00_MA = 210000, + CHARGE_CURRENT_2125_00_MA = 212500, + CHARGE_CURRENT_2175_00_MA = 217500, + CHARGE_CURRENT_2200_00_MA = 220000, + CHARGE_CURRENT_2300_00_MA = 230000, + CHARGE_CURRENT_2250_00_MA = 225000, + CHARGE_CURRENT_2275_00_MA = 227500, + CHARGE_CURRENT_2325_00_MA = 232500, + CHARGE_CURRENT_2350_00_MA = 235000, + CHARGE_CURRENT_2400_00_MA = 240000, + CHARGE_CURRENT_2425_00_MA = 242500, + CHARGE_CURRENT_2500_00_MA = 250000, + CHARGE_CURRENT_2575_00_MA = 257500, + CHARGE_CURRENT_2600_00_MA = 260000, + CHARGE_CURRENT_2650_00_MA = 265000, + CHARGE_CURRENT_2700_00_MA = 270000, + CHARGE_CURRENT_2725_00_MA = 272500, + CHARGE_CURRENT_2800_00_MA = 280000, + CHARGE_CURRENT_2875_00_MA = 287500, + CHARGE_CURRENT_2900_00_MA = 290000, + CHARGE_CURRENT_3000_00_MA = 300000, + CHARGE_CURRENT_3100_00_MA = 310000, + CHARGE_CURRENT_MAX +} CHR_CURRENT_ENUM; + +/* ============================================================ */ +/* structure */ +/* ============================================================ */ + + +/* ============================================================ */ +/* typedef */ +/* ============================================================ */ +typedef kal_int32(*CHARGING_CONTROL) (CHARGING_CTRL_CMD cmd, void *data); + + +/* ============================================================ */ +/* External Variables */ +/* ============================================================ */ +extern int Enable_BATDRV_LOG; +extern kal_bool chargin_hw_init_done; + + +/* ============================================================ */ +/* External function */ +/* ============================================================ */ +extern kal_int32 chr_control_interface(CHARGING_CTRL_CMD cmd, void *data); +#endif /* #ifndef _CHARGING_H */ diff --git a/include/mach/dbg_dump.h b/include/mach/dbg_dump.h new file mode 100644 index 000000000..b7ed8f269 --- /dev/null +++ b/include/mach/dbg_dump.h @@ -0,0 +1,8 @@ +#ifndef __DBG_DUMP_H +#define __DBG_DUMP_H + +struct reg_dump_driver_data { + u32 mcu_regs; +}; + +#endif diff --git a/include/mach/diso.h b/include/mach/diso.h new file mode 100644 index 000000000..cb0394184 --- /dev/null +++ b/include/mach/diso.h @@ -0,0 +1,101 @@ +#ifndef DISO_H +#define DISO_H + +#include <mach/mt_typedefs.h> +#include <linux/interrupt.h> + +/***************************************************************************** + * + ****************************************************************************/ +#define DISO_IRQ_DISABLE 0 +#define DISO_IRQ_ENABLE 1 +#define DISO_IRQ_FALLING 0 +#define DISO_IRQ_RISING 1 +#define DISO_ONLINE KAL_TRUE +#define DISO_OFFLINE KAL_FALSE + +/***************************************************************************** + * structure + ****************************************************************************/ +typedef enum { + IDLE = 0, + OTG_ONLY, + USB_ONLY, + USB_WITH_OTG, // not support + DC_ONLY, + DC_WITH_OTG, + DC_WITH_USB, + DC_USB_OTG,//not support +}DISO_STATE; + +typedef struct { + bool cur_otg_state :1; + bool cur_vusb_state :1; + bool cur_vdc_state :1; + bool pre_otg_state :1; + bool pre_vusb_state :1; + bool pre_vdc_state :1; +}DISO_state; + +typedef struct { + INT32 number; + INT32 period; + INT32 debounce; + INT32 falling_threshold; + INT32 rising_threshold; +}DISO_channel_data; + +typedef struct { + INT32 preVoltage; + INT32 curVoltage; + bool notify_irq_en; + bool notify_irq; + bool trigger_state; +}DISO_polling_channel; + +typedef struct +{ + DISO_channel_data vdc_measure_channel; + DISO_channel_data vusb_measure_channel; +}DISO_IRQ_Data; + +typedef struct +{ + bool reset_polling; + DISO_polling_channel vdc_polling_measure; + DISO_polling_channel vusb_polling_measure; +}DISO_Polling_Data; + +typedef struct +{ + UINT32 irq_line_number; + DISO_state diso_state; + UINT32 hv_voltage; + irq_handler_t irq_callback_func; + bool chr_get_diso_state; +}DISO_ChargerStruct; + +/***************************************************************************** + * Extern Variable + ****************************************************************************/ +extern DISO_ChargerStruct DISO_data; + + +/***************************************************************************** + * Extern Function + ****************************************************************************/ + +extern bool mt_usb_is_host(void); +extern void mt_irq_set_sens(unsigned int irq, unsigned int sens); +extern void mt_irq_set_polarity(unsigned int irq, unsigned int polarity); +extern void mt_auxadc_enableBackgroundDection(u16 channel, u16 volt, u16 period, u16 debounce, u16 tFlag); +extern void mt_auxadc_disableBackgroundDection(u16 channel); +extern u16 mt_auxadc_getCurrentChannel(void); +extern u16 mt_auxadc_getCurrentTrigger(void); +extern int IMM_GetOneChannelValue(int dwChannel, int data[4], int* rawdata); +extern int IMM_auxadc_GetOneChannelValue_Cali(int Channel, int*voltage); +extern int IMM_IsAdcInitReady(void); +extern void set_vdc_auxadc_irq(bool enable, bool flag); +extern void set_vusb_auxadc_irq(bool enable, bool flag); +extern void set_diso_otg(bool enable); +#endif //#ifndef DISO_H diff --git a/include/mach/dma.h b/include/mach/dma.h new file mode 100644 index 000000000..0ff2f71ff --- /dev/null +++ b/include/mach/dma.h @@ -0,0 +1,145 @@ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS (0xFFFFFFFF) +#define MAX_DMA_CHANNELS (0) + +#endif /* !__ASM_ARCH_DMA_H */ + +#ifndef __MT_DMA_H__ +#define __MT_DMA_H__ + +/* define DMA channels */ +enum { + G_DMA_1 = 0, G_DMA_2, + P_DMA_AP_HIF, P_DMA_MD_HIF, + P_DMA_SIM1, P_DMA_SIM2, + P_DMA_IRDA, + P_DMA_UART1_TX, P_DMA_UART1_RX, + P_DMA_UART2_TX, P_DMA_UART2_RX, + P_DMA_UART3_TX, P_DMA_UART3_RX, +}; + +/* define DMA error code */ +enum { + DMA_ERR_CH_BUSY = 1, + DMA_ERR_INVALID_CH = 2, + DMA_ERR_CH_FREE = 3, + DMA_ERR_NO_FREE_CH = 4, + DMA_ERR_INV_CONFIG = 5, +}; + +/* define DMA ISR callback function's prototype */ +typedef void (*DMA_ISR_CALLBACK)(void *); + +/* + * NoteXXX: Implementation below is obsolete and deprecated. + */ + +#include <linux/types.h> + +typedef u32 INFO; + +typedef enum +{ + DMA_FALSE = 0, + DMA_TRUE +} DMA_BOOL; + +typedef enum +{ + DMA_OK = 0, + DMA_FAIL +} DMA_STATUS; + +typedef enum +{ + REMAINING_LENGTH = 0, /* not valid for virtual FIFO */ + VF_READPTR, /* only valid for virtual FIFO */ + VF_WRITEPTR, /* only valid for virtual FIFO */ + VF_FFCNT, /* only valid for virtual FIFO */ + VF_ALERT, /* only valid for virtual FIFO */ + VF_EMPTY, /* only valid for virtual FIFO */ + VF_FULL, /* only valid for virtual FIFO */ + VF_PORT +} INFO_TYPE; + +typedef enum +{ + GDMA_1 = 0, + GDMA_2, + GDMA_ANY +} DMA_CHAN; + +typedef enum +{ + ALL = 0, + SRC, + DST, + SRC_AND_DST +} DMA_CONF_FLAG; + +/* define GDMA configurations */ +struct mt_gdma_conf +{ + unsigned int count; + int iten; + unsigned int burst; + int dfix; + int sfix; + unsigned int limiter; + dma_addr_t src; + dma_addr_t dst; + int wpen; + int wpsd; + unsigned int wplen; + unsigned int wpto; + //unsigned int cohen; + unsigned int sec; + unsigned int domain; + void (*isr_cb)(void *); + void *data; +}; + +/* burst */ +#define DMA_CON_BURST_SINGLE (0x00000000) +#define DMA_CON_BURST_2BEAT (0x00010000) +#define DMA_CON_BURST_3BEAT (0x00020000) +#define DMA_CON_BURST_4BEAT (0x00030000) +#define DMA_CON_BURST_5BEAT (0x00040000) +#define DMA_CON_BURST_6BEAT (0x00050000) +#define DMA_CON_BURST_7BEAT (0x00060000) +#define DMA_CON_BURST_8BEAT (0x00070000) + +/* size */ +/* keep for backward compatibility only */ +#define DMA_CON_SIZE_BYTE (0x00000000) +#define DMA_CON_SIZE_SHORT (0x00000001) +#define DMA_CON_SIZE_LONG (0x00000002) + +extern int mt65xx_free_gdma(int channel); +extern int mt65xx_req_gdma(DMA_ISR_CALLBACK cb, void *data); +extern int mt65xx_start_gdma(int channel); +extern int mt65xx_stop_gdma(int channel); +extern void mt_reset_dma(const unsigned int iChannel); +extern void mt65xx_dma_running_status(void); +extern void mt_reset_gdma_conf(const unsigned int iChannel); + +extern int mt_config_gdma(int channel, struct mt_gdma_conf *config, DMA_CONF_FLAG flag); +extern int mt_free_gdma(int channel); +extern int mt_req_gdma(DMA_CHAN chan); +extern int mt_start_gdma(int channel); +extern int mt_polling_gdma(int channel, unsigned long timeout); +extern int mt_stop_gdma(int channel); +extern int mt_dump_gdma(int channel); +extern int mt_warm_reset_gdma(int channel); +extern int mt_hard_reset_gdma(int channel); +extern int mt_reset_gdma(int channel); +extern void mt_dma_running_status(void); +/* This channel is used for APDMA Dummy READ. + in MT6592 this channel will be used by Frequency hopping all the time + .Owner: Chieh-Jay Liu + */ +#define DFS_APDMA_CHANNEL 0 + +#endif /* !__MT_DMA_H__ */ diff --git a/include/mach/eint_drv.h b/include/mach/eint_drv.h new file mode 100644 index 000000000..2dac7d774 --- /dev/null +++ b/include/mach/eint_drv.h @@ -0,0 +1,29 @@ +#ifndef __EINT_DRV_H +#define __EINT_DRV_H +#include <mach/eint.h> + +struct mt_eint_driver +{ + struct platform_driver driver; + int (*eint_max_channel)(void); + void (*enable)(unsigned int eint_num); + void (*disable)(unsigned int eint_num); + unsigned int (*is_disable)(unsigned int eint_num); + unsigned int (*get_sens)(unsigned int eint_num); + unsigned int (*set_sens)(unsigned int eint_num, unsigned int sens); + unsigned int (*get_polarity)(unsigned int eint_num); + void (*set_polarity)(unsigned int eint_num, unsigned int pol); + unsigned int (*get_debounce_cnt)(unsigned int eint_num); + void (*set_debounce_cnt)(unsigned int eint_num, unsigned int ms); + int (*is_debounce_en)(unsigned int eint_num); + void (*enable_debounce)(unsigned int eint_num); + void (*disable_debounce)(unsigned int eint_num); + unsigned int (*get_count)(unsigned int eint_num); +}; + +struct mt_eint_driver *get_mt_eint_drv(void); + +extern int eint_drv_get_max_channel(void); +extern unsigned int eint_drv_get_count(unsigned int eint_num); + +#endif diff --git a/include/mach/etm.h b/include/mach/etm.h new file mode 100644 index 000000000..b9da8db71 --- /dev/null +++ b/include/mach/etm.h @@ -0,0 +1,23 @@ +#ifndef __ETM_H +#define __ETM_H + +struct etm_driver_data { + void __iomem *etm_regs; + int is_ptm; + const int *pwr_down; +}; + +struct etb_driver_data { + void __iomem *etb_regs; + void __iomem *funnel_regs; + void __iomem *tpiu_regs; + void __iomem *dem_regs; + int use_etr; + u32 etr_len; + u32 etr_virt; + dma_addr_t etr_phys; +}; + +extern void trace_start_by_cpus(const struct cpumask *mask, int init_etb); + +#endif diff --git a/include/mach/ext_wd_drv.h b/include/mach/ext_wd_drv.h new file mode 100644 index 000000000..c855b2443 --- /dev/null +++ b/include/mach/ext_wd_drv.h @@ -0,0 +1,25 @@ +#ifndef __EXT_WD_DRV_H +#define __EXT_WD_DRV_H +#include <mach/mt_typedefs.h> +#include "wd_api.h" + +/* direct api */ +int mtk_wdt_request_mode_set(int mark_bit, WD_REQ_MODE mode); +int mtk_wdt_request_en_set(int mark_bit, WD_REQ_CTL en); +void wdt_arch_reset(char mode); +void mtk_wdt_restart(enum wd_restart_type type); +void mtk_wdt_mode_config(BOOL dual_mode_en, BOOL irq, BOOL ext_en, BOOL ext_pol, BOOL wdt_en); +void mtk_wdt_set_time_out_value(unsigned int value); +int mtk_wdt_confirm_hwreboot(void); +int mtk_wdt_enable(enum wk_wdt_en en); +void mtk_wd_resume(void); +void mtk_wd_suspend(void); +void wdt_dump_reg(void); +/* used for extend request */ +/* 0x10000000 for ddr reseved mode */ +/* 0x20000000 for 75 irq or reboot mode */ +int mtk_wdt_swsysret_config(int bit, int set_value); + +/* end */ + +#endif diff --git a/include/mach/fiq_smp_call.h b/include/mach/fiq_smp_call.h new file mode 100644 index 000000000..caf03290c --- /dev/null +++ b/include/mach/fiq_smp_call.h @@ -0,0 +1,8 @@ +#ifndef __FIQ_SMP_CALL_H +#define __FIQ_SMP_CALL_H + +typedef void (*fiq_smp_call_func_t) (void *info, void *regs, void *svc_sp); + +extern int fiq_smp_call_function(fiq_smp_call_func_t func, void *info, int wait); + +#endif /* !__FIQ_SMP_CALL_H */ diff --git a/include/mach/local_wd_drv.h b/include/mach/local_wd_drv.h new file mode 100644 index 000000000..155b9e077 --- /dev/null +++ b/include/mach/local_wd_drv.h @@ -0,0 +1,17 @@ +#ifndef __L_WD_DRV_H +#define __L_WD_DRV_H +#include <mach/mt_typedefs.h> +#include "wd_api.h" + + +/* direct api */ +int mpcore_wk_wdt_config(int reserved, int reserved2, int timeout_val); +int mpcore_wdt_restart(WD_RES_TYPE type); +void mtk_wd_resume(void); +void mtk_wd_suspend(void); +int local_wdt_enable(enum wk_wdt_en en); +/* used for extend request */ +int mtk_local_wdt_misc_config(int bit, int set_value, int *reserved); +void mpcore_wk_wdt_stop(void); + +#endif diff --git a/include/mach/md32_wdt.h b/include/mach/md32_wdt.h new file mode 100644 index 000000000..30532aea1 --- /dev/null +++ b/include/mach/md32_wdt.h @@ -0,0 +1,35 @@ + +#ifndef __MT6582_MD32INT_H__ +#define __MT6582_MD32INT_H__ + + + +#define MD32_MAX_USER 20 +#define MD2HOST_IPCR 0x1005001C + +/*Define MD32 IRQ Type*/ +#define MD32_IPC_INT 0x100 +#define WDT_INT 0x200 +#define PMEM_DISP_INT 0x400 +#define DMEM_DISP_INT 0x800 +/*Define Watchdog Register*/ +#define WDT_CON 0x10050084 +#define WDT_KICT 0x10050088 + +typedef struct { + void (*wdt_func[MD32_MAX_USER]) (void *); + void (*reset_func[MD32_MAX_USER]) (void *); + char MODULE_NAME[MD32_MAX_USER][100]; + void *private_data[MD32_MAX_USER]; + int in_use[MD32_MAX_USER]; +} md32_wdt_func; + +typedef struct { + void (*assert_func[MD32_MAX_USER]) (void *); + void (*reset_func[MD32_MAX_USER]) (void *); + char MODULE_NAME[MD32_MAX_USER][100]; + void *private_data[MD32_MAX_USER]; + int in_use[MD32_MAX_USER]; +} md32_assert_func; + +#endif diff --git a/include/mach/mt6605.h b/include/mach/mt6605.h new file mode 100644 index 000000000..8cf48e4f5 --- /dev/null +++ b/include/mach/mt6605.h @@ -0,0 +1,10 @@ +#ifndef _MT6605_H_ +#define _MT6605_H_ + +// return 0, success; return <0, fail +// md_id : modem id +// md_state : 0, on ; 1, off ; +// vsim_state : 0, on ; 1, off; +int inform_nfc_vsim_change(int md_id, int md_state, int vsim_state); + +#endif //_MT6605_H_
\ No newline at end of file diff --git a/include/mach/mt_board_type.h b/include/mach/mt_board_type.h new file mode 100644 index 000000000..76eb2b9dd --- /dev/null +++ b/include/mach/mt_board_type.h @@ -0,0 +1,15 @@ +#ifndef _MT_BOARD_TYPE_H +#define _MT_BOARD_TYPE_H + +#define GPIO_PHONE_EVB_DETECT (GPIO143|0x80000000) + +/* MTK_POWER_EXT_DETECT */ +enum mt_board_type { + MT_BOARD_NONE = 0, + MT_BOARD_EVB = 1, + MT_BOARD_PHONE = 2 +}; + +static DEFINE_SPINLOCK(mt_board_lock); + +#endif diff --git a/include/mach/mt_boot_common.h b/include/mach/mt_boot_common.h new file mode 100644 index 000000000..5793b826f --- /dev/null +++ b/include/mach/mt_boot_common.h @@ -0,0 +1,52 @@ + /* + * + * + * Copyright (C) 2008,2009 MediaTek <www.mediatek.com> + * Authors: Infinity Chen <infinity.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __MT_BOOT_COMMON_H__ +#define __MT_BOOT_COMMON_H__ + +/* boot type definitions */ +typedef enum { + NORMAL_BOOT = 0, + META_BOOT = 1, + RECOVERY_BOOT = 2, + SW_REBOOT = 3, + FACTORY_BOOT = 4, + ADVMETA_BOOT = 5, + ATE_FACTORY_BOOT = 6, + ALARM_BOOT = 7, +#if defined(CONFIG_MTK_KERNEL_POWER_OFF_CHARGING) + KERNEL_POWER_OFF_CHARGING_BOOT = 8, + LOW_POWER_OFF_CHARGING_BOOT = 9, +#endif + UNKNOWN_BOOT +} BOOTMODE; + +#define BOOT_DEV_NAME "BOOT" +#define BOOT_SYSFS "boot" +#define BOOT_SYSFS_ATTR "boot_mode" + +extern BOOTMODE g_boot_mode; +extern BOOTMODE get_boot_mode(void); +extern bool is_meta_mode(void); +extern bool is_advanced_meta_mode(void); +extern void set_boot_mode(BOOTMODE bm); + +#endif diff --git a/include/mach/mt_boot_reason.h b/include/mach/mt_boot_reason.h new file mode 100644 index 000000000..af69b9425 --- /dev/null +++ b/include/mach/mt_boot_reason.h @@ -0,0 +1,39 @@ + /* + * + * + * Copyright (C) 2008,2009 MediaTek <www.mediatek.com> + * Authors: Infinity Chen <infinity.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __MT_BOOT_REASON_H__ +#define __MT_BOOT_REASON_H__ + +typedef enum { + BR_POWER_KEY = 0, + BR_USB, + BR_RTC, + BR_WDT, + BR_WDT_BY_PASS_PWK, + BR_TOOL_BY_PASS_PWK, + BR_2SEC_REBOOT, + BR_UNKNOWN +} boot_reason_t; + +extern boot_reason_t g_boot_reason; +extern boot_reason_t get_boot_reason(void); + +#endif diff --git a/include/mach/mt_ccci_common.h b/include/mach/mt_ccci_common.h new file mode 100644 index 000000000..96a07a1de --- /dev/null +++ b/include/mach/mt_ccci_common.h @@ -0,0 +1,678 @@ +#ifndef __MT_CCCI_COMMON_H__ +#define __MT_CCCI_COMMON_H__ +#include <asm/io.h> +#include <asm/setup.h> + +/* + * all code owned by CCCI should use modem index starts from ZERO + */ +typedef enum { + MD_SYS1 = 0, // MD SYS name counts from 1, but internal index counts from 0 + MD_SYS2, + MD_SYS3, + MD_SYS4, + MD_SYS5 = 4, + MAX_MD_NUM +}MD_SYS; + +// Meta parsing section +#define MD1_EN (1<<0) +#define MD2_EN (1<<1) +#define MD3_EN (1<<2) +#define MD5_EN (1<<4) + +#define MD_2G_FLAG (1<<0) +#define MD_FDD_FLAG (1<<1) +#define MD_TDD_FLAG (1<<2) +#define MD_LTE_FLAG (1<<3) +#define MD_SGLTE_FLAG (1<<4) + +#define MD_WG_FLAG (MD_FDD_FLAG|MD_2G_FLAG) +#define MD_TG_FLAG (MD_TDD_FLAG|MD_2G_FLAG) +#define MD_LWG_FLAG (MD_LTE_FLAG|MD_FDD_FLAG|MD_2G_FLAG) +#define MD_LTG_FLAG (MD_LTE_FLAG|MD_TDD_FLAG|MD_2G_FLAG) + +#define CCCI_SMEM_DUMP_SIZE 4096// smem size we dump when EE +#define CCCI_SMEM_SIZE_EXCEPTION 0x200000//exception smem total size +#define CCCI_SMEM_OFFSET_EXREC 2048// where the exception record begain in smem +#define CCCC_SMEM_CCIF_SRAM_SIZE 16 +#define CCCI_SMEM_OFFSET_CCIF_SRAM (CCCI_SMEM_OFFSET_EXREC+1024-CCCC_SMEM_CCIF_SRAM_SIZE) +#define CCCI_SMEM_OFFSET_EPON 0xC64 +#define CCCI_SMEM_OFFSET_SEQERR 0x34 +#define CCCI_SMEM_OFFSET_CCCI_DEBUG 0 // where the MD CCCI debug info begain in smem +#define CCCI_SMEM_CCCI_DEBUG_SIZE 2048 // MD CCCI debug info size +#define CCCI_SMEM_OFFSET_MDSS_DEBUG 2048 // where the MD SS debug info begain in smem +#define CCCI_SMEM_MDSS_DEBUG_SIZE 2048 // MD SS debug info size + +// MD type defination +typedef enum { + md_type_invalid = 0, + modem_2g = 1, + modem_3g, + modem_wg, + modem_tg, + modem_lwg, + modem_ltg, + modem_sglte, + MAX_IMG_NUM = modem_sglte // this enum starts from 1 +} MD_LOAD_TYPE; + +// MD logger configure file +#define MD1_LOGGER_FILE_PATH "/data/mdlog/mdlog1_config" +#define MD2_LOGGER_FILE_PATH "/data/mdlog/mdlog2_config" + +// Image string and header +// image name/path +#define MOEDM_IMAGE_NAME "modem.img" +#define DSP_IMAGE_NAME "DSP_ROM" +#define CONFIG_MODEM_FIRMWARE_PATH "/etc/firmware/" +#define CONFIG_MODEM_FIRMWARE_CIP_PATH "/custom/etc/firmware/" +#define IMG_ERR_STR_LEN 64 + +// image header constants +#define MD_HEADER_MAGIC_NO "CHECK_HEADER" + +#define DEBUG_STR "Debug" +#define RELEASE_STR "Release" +#define INVALID_STR "INVALID" + +struct ccci_header{ + u32 data[2]; // do NOT assump data[1] is data length in Rx +//#ifdef FEATURE_SEQ_CHECK_EN + u16 channel:16; + u16 seq_num:15; + u16 assert_bit:1; +//#else +// u32 channel; +//#endif + u32 reserved; +} __attribute__ ((packed)); // not necessary, but it's a good gesture, :) + + +struct md_check_header { + unsigned char check_header[12]; /* magic number is "CHECK_HEADER"*/ + unsigned int header_verno; /* header structure version number */ + unsigned int product_ver; /* 0x0:invalid; 0x1:debug version; 0x2:release version */ + unsigned int image_type; /* 0x0:invalid; 0x1:2G modem; 0x2: 3G modem */ + unsigned char platform[16]; /* MT6573_S01 or MT6573_S02 */ + unsigned char build_time[64]; /* build time string */ + unsigned char build_ver[64]; /* project version, ex:11A_MD.W11.28 */ + + unsigned char bind_sys_id; /* bind to md sys id, MD SYS1: 1, MD SYS2: 2 */ + unsigned char ext_attr; /* no shrink: 0, shrink: 1*/ + unsigned char reserved[2]; /* for reserved */ + + unsigned int mem_size; /* md ROM/RAM image size requested by md */ + unsigned int md_img_size; /* md image size, exclude head size*/ + unsigned int reserved_info; /* for reserved */ + unsigned int size; /* the size of this structure */ +} __attribute__ ((packed)); + +struct md_check_header_v3 { + unsigned char check_header[12]; /* magic number is "CHECK_HEADER"*/ + unsigned int header_verno; /* header structure version number */ + unsigned int product_ver; /* 0x0:invalid; 0x1:debug version; 0x2:release version */ + unsigned int image_type; /* 0x0:invalid; 0x1:2G modem; 0x2: 3G modem */ + unsigned char platform[16]; /* MT6573_S01 or MT6573_S02 */ + unsigned char build_time[64]; /* build time string */ + unsigned char build_ver[64]; /* project version, ex:11A_MD.W11.28 */ + + unsigned char bind_sys_id; /* bind to md sys id, MD SYS1: 1, MD SYS2: 2, MD SYS5: 5 */ + unsigned char ext_attr; /* no shrink: 0, shrink: 1 */ + unsigned char reserved[2]; /* for reserved */ + + unsigned int mem_size; /* md ROM/RAM image size requested by md */ + unsigned int md_img_size; /* md image size, exclude head size */ + unsigned int rpc_sec_mem_addr; /* RPC secure memory address */ + + unsigned int dsp_img_offset; + unsigned int dsp_img_size; + unsigned char reserved2[88]; + + unsigned int size; /* the size of this structure */ +} __attribute__ ((packed)); + + +//================================================================================= +// IOCTL defination +//================================================================================= +// CCCI == EEMCS +#define CCCI_IOC_MAGIC 'C' +#define CCCI_IOC_MD_RESET _IO(CCCI_IOC_MAGIC, 0) // mdlogger // META // muxreport +#define CCCI_IOC_GET_MD_STATE _IOR(CCCI_IOC_MAGIC, 1, unsigned int) // audio +#define CCCI_IOC_PCM_BASE_ADDR _IOR(CCCI_IOC_MAGIC, 2, unsigned int) // audio +#define CCCI_IOC_PCM_LEN _IOR(CCCI_IOC_MAGIC, 3, unsigned int) // audio +#define CCCI_IOC_FORCE_MD_ASSERT _IO(CCCI_IOC_MAGIC, 4) // muxreport // mdlogger +#define CCCI_IOC_ALLOC_MD_LOG_MEM _IO(CCCI_IOC_MAGIC, 5) // mdlogger +#define CCCI_IOC_DO_MD_RST _IO(CCCI_IOC_MAGIC, 6) // md_init +#define CCCI_IOC_SEND_RUN_TIME_DATA _IO(CCCI_IOC_MAGIC, 7) // md_init +#define CCCI_IOC_GET_MD_INFO _IOR(CCCI_IOC_MAGIC, 8, unsigned int) // md_init +#define CCCI_IOC_GET_MD_EX_TYPE _IOR(CCCI_IOC_MAGIC, 9, unsigned int) // mdlogger +#define CCCI_IOC_SEND_STOP_MD_REQUEST _IO(CCCI_IOC_MAGIC, 10) // muxreport +#define CCCI_IOC_SEND_START_MD_REQUEST _IO(CCCI_IOC_MAGIC, 11) // muxreport +#define CCCI_IOC_DO_STOP_MD _IO(CCCI_IOC_MAGIC, 12) // md_init +#define CCCI_IOC_DO_START_MD _IO(CCCI_IOC_MAGIC, 13) // md_init +#define CCCI_IOC_ENTER_DEEP_FLIGHT _IO(CCCI_IOC_MAGIC, 14) // RILD // factory +#define CCCI_IOC_LEAVE_DEEP_FLIGHT _IO(CCCI_IOC_MAGIC, 15) // RILD // factory +#define CCCI_IOC_POWER_ON_MD _IO(CCCI_IOC_MAGIC, 16) // md_init +#define CCCI_IOC_POWER_OFF_MD _IO(CCCI_IOC_MAGIC, 17) // md_init +#define CCCI_IOC_POWER_ON_MD_REQUEST _IO(CCCI_IOC_MAGIC, 18) +#define CCCI_IOC_POWER_OFF_MD_REQUEST _IO(CCCI_IOC_MAGIC, 19) +#define CCCI_IOC_SIM_SWITCH _IOW(CCCI_IOC_MAGIC, 20, unsigned int) // RILD // factory +#define CCCI_IOC_SEND_BATTERY_INFO _IO(CCCI_IOC_MAGIC, 21) // md_init +#define CCCI_IOC_SIM_SWITCH_TYPE _IOR(CCCI_IOC_MAGIC, 22, unsigned int) // RILD +#define CCCI_IOC_STORE_SIM_MODE _IOW(CCCI_IOC_MAGIC, 23, unsigned int) // RILD +#define CCCI_IOC_GET_SIM_MODE _IOR(CCCI_IOC_MAGIC, 24, unsigned int) // RILD +#define CCCI_IOC_RELOAD_MD_TYPE _IO(CCCI_IOC_MAGIC, 25) // META // md_init // muxreport +#define CCCI_IOC_GET_SIM_TYPE _IOR(CCCI_IOC_MAGIC, 26, unsigned int) // terservice +#define CCCI_IOC_ENABLE_GET_SIM_TYPE _IOW(CCCI_IOC_MAGIC, 27, unsigned int) // terservice +#define CCCI_IOC_SEND_ICUSB_NOTIFY _IOW(CCCI_IOC_MAGIC, 28, unsigned int) // icusbd +#define CCCI_IOC_SET_MD_IMG_EXIST _IOW(CCCI_IOC_MAGIC, 29, unsigned int) // md_init +#define CCCI_IOC_GET_MD_IMG_EXIST _IOR(CCCI_IOC_MAGIC, 30, unsigned int) // META +#define CCCI_IOC_GET_MD_TYPE _IOR(CCCI_IOC_MAGIC, 31, unsigned int) // RILD +#define CCCI_IOC_STORE_MD_TYPE _IOW(CCCI_IOC_MAGIC, 32, unsigned int) // RILD +#define CCCI_IOC_GET_MD_TYPE_SAVING _IOR(CCCI_IOC_MAGIC, 33, unsigned int) // META +#define CCCI_IOC_GET_EXT_MD_POST_FIX _IOR(CCCI_IOC_MAGIC, 34, unsigned int) // char[32] eemcs_fsd // mdlogger +#define CCCI_IOC_FORCE_FD _IOW(CCCI_IOC_MAGIC, 35, unsigned int) // RILD(6577) +#define CCCI_IOC_AP_ENG_BUILD _IOW(CCCI_IOC_MAGIC, 36, unsigned int) // md_init(6577) +#define CCCI_IOC_GET_MD_MEM_SIZE _IOR(CCCI_IOC_MAGIC, 37, unsigned int) // md_init(6577) +#define CCCI_IOC_UPDATE_SIM_SLOT_CFG _IOW(CCCI_IOC_MAGIC, 38, unsigned int) // RILD +#define CCCI_IOC_GET_CFG_SETTING _IOW(CCCI_IOC_MAGIC, 39, unsigned int) // md_init + +#define CCCI_IOC_SET_MD_SBP_CFG _IOW(CCCI_IOC_MAGIC, 40, unsigned int) // md_init +#define CCCI_IOC_GET_MD_SBP_CFG _IOW(CCCI_IOC_MAGIC, 41, unsigned int) // md_init +#define CCCI_IOC_GET_MD_PROTOCOL_TYPE _IOR(CCCI_IOC_MAGIC, 42, char[16]) /*metal tool to get modem protocol type: AP_TST or DHL*/ +#define CCCI_IOC_SEND_SIGNAL_TO_USER _IOW(CCCI_IOC_MAGIC, 43, unsigned int) // md_init + + +#define CCCI_IOC_SET_HEADER _IO(CCCI_IOC_MAGIC, 112) // emcs_va +#define CCCI_IOC_CLR_HEADER _IO(CCCI_IOC_MAGIC, 113) // emcs_va +#define CCCI_IOC_DL_TRAFFIC_CONTROL _IOW(CCCI_IOC_MAGIC, 119, unsigned int) // mdlogger + +#define CCCI_IPC_MAGIC 'P' // only for IPC user +// CCCI == EEMCS +#define CCCI_IPC_RESET_RECV _IO(CCCI_IPC_MAGIC,0) +#define CCCI_IPC_RESET_SEND _IO(CCCI_IPC_MAGIC,1) +#define CCCI_IPC_WAIT_MD_READY _IO(CCCI_IPC_MAGIC,2) +#define CCCI_IPC_KERN_WRITE_TEST _IO(CCCI_IPC_MAGIC,3) +#define CCCI_IPC_UPDATE_TIME _IO(CCCI_IPC_MAGIC,4) +#define CCCI_IPC_WAIT_TIME_UPDATE _IO(CCCI_IPC_MAGIC,5) +#define CCCI_IPC_UPDATE_TIMEZONE _IO(CCCI_IPC_MAGIC,6) + +//================================================================================= +// CCCI Error number defination +//================================================================================= +// CCCI error number region +#define CCCI_ERR_MODULE_INIT_START_ID (0) +#define CCCI_ERR_COMMON_REGION_START_ID (100) +#define CCCI_ERR_CCIF_REGION_START_ID (200) +#define CCCI_ERR_CCCI_REGION_START_ID (300) +#define CCCI_ERR_LOAD_IMG_START_ID (400) + +// CCCI error number +#define CCCI_ERR_MODULE_INIT_OK (CCCI_ERR_MODULE_INIT_START_ID+0) +#define CCCI_ERR_INIT_DEV_NODE_FAIL (CCCI_ERR_MODULE_INIT_START_ID+1) +#define CCCI_ERR_INIT_PLATFORM_FAIL (CCCI_ERR_MODULE_INIT_START_ID+2) +#define CCCI_ERR_MK_DEV_NODE_FAIL (CCCI_ERR_MODULE_INIT_START_ID+3) +#define CCCI_ERR_INIT_LOGIC_LAYER_FAIL (CCCI_ERR_MODULE_INIT_START_ID+4) +#define CCCI_ERR_INIT_MD_CTRL_FAIL (CCCI_ERR_MODULE_INIT_START_ID+5) +#define CCCI_ERR_INIT_CHAR_DEV_FAIL (CCCI_ERR_MODULE_INIT_START_ID+6) +#define CCCI_ERR_INIT_TTY_FAIL (CCCI_ERR_MODULE_INIT_START_ID+7) +#define CCCI_ERR_INIT_IPC_FAIL (CCCI_ERR_MODULE_INIT_START_ID+8) +#define CCCI_ERR_INIT_RPC_FAIL (CCCI_ERR_MODULE_INIT_START_ID+9) +#define CCCI_ERR_INIT_FS_FAIL (CCCI_ERR_MODULE_INIT_START_ID+10) +#define CCCI_ERR_INIT_CCMNI_FAIL (CCCI_ERR_MODULE_INIT_START_ID+11) +#define CCCI_ERR_INIT_VIR_CHAR_FAIL (CCCI_ERR_MODULE_INIT_START_ID+12) + +// ---- Common +#define CCCI_ERR_FATAL_ERR (CCCI_ERR_COMMON_REGION_START_ID+0) +#define CCCI_ERR_ASSERT_ERR (CCCI_ERR_COMMON_REGION_START_ID+1) +#define CCCI_ERR_MD_IN_RESET (CCCI_ERR_COMMON_REGION_START_ID+2) +#define CCCI_ERR_RESET_NOT_READY (CCCI_ERR_COMMON_REGION_START_ID+3) +#define CCCI_ERR_GET_MEM_FAIL (CCCI_ERR_COMMON_REGION_START_ID+4) +#define CCCI_ERR_GET_SMEM_SETTING_FAIL (CCCI_ERR_COMMON_REGION_START_ID+5) +#define CCCI_ERR_INVALID_PARAM (CCCI_ERR_COMMON_REGION_START_ID+6) +#define CCCI_ERR_LARGE_THAN_BUF_SIZE (CCCI_ERR_COMMON_REGION_START_ID+7) +#define CCCI_ERR_GET_MEM_LAYOUT_FAIL (CCCI_ERR_COMMON_REGION_START_ID+8) +#define CCCI_ERR_MEM_CHECK_FAIL (CCCI_ERR_COMMON_REGION_START_ID+9) +#define CCCI_IPO_H_RESTORE_FAIL (CCCI_ERR_COMMON_REGION_START_ID+10) + +// ---- CCIF +#define CCCI_ERR_CCIF_NOT_READY (CCCI_ERR_CCIF_REGION_START_ID+0) +#define CCCI_ERR_CCIF_CALL_BACK_HAS_REGISTERED (CCCI_ERR_CCIF_REGION_START_ID+1) +#define CCCI_ERR_CCIF_GET_NULL_POINTER (CCCI_ERR_CCIF_REGION_START_ID+2) +#define CCCI_ERR_CCIF_UN_SUPPORT (CCCI_ERR_CCIF_REGION_START_ID+3) +#define CCCI_ERR_CCIF_NO_PHYSICAL_CHANNEL (CCCI_ERR_CCIF_REGION_START_ID+4) +#define CCCI_ERR_CCIF_INVALID_RUNTIME_LEN (CCCI_ERR_CCIF_REGION_START_ID+5) +#define CCCI_ERR_CCIF_INVALID_MD_SYS_ID (CCCI_ERR_CCIF_REGION_START_ID+6) +#define CCCI_ERR_CCIF_GET_HW_INFO_FAIL (CCCI_ERR_CCIF_REGION_START_ID+9) + +// ---- CCCI +#define CCCI_ERR_INVALID_LOGIC_CHANNEL_ID (CCCI_ERR_CCCI_REGION_START_ID+0) +#define CCCI_ERR_PUSH_RX_DATA_TO_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+1) +#define CCCI_ERR_REG_CALL_BACK_FOR_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+2) +#define CCCI_ERR_LOGIC_CH_HAS_REGISTERED (CCCI_ERR_CCCI_REGION_START_ID+3) +#define CCCI_ERR_MD_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+4) +#define CCCI_ERR_ALLOCATE_MEMORY_FAIL (CCCI_ERR_CCCI_REGION_START_ID+5) +#define CCCI_ERR_CREATE_CCIF_INSTANCE_FAIL (CCCI_ERR_CCCI_REGION_START_ID+6) +#define CCCI_ERR_REPEAT_CHANNEL_ID (CCCI_ERR_CCCI_REGION_START_ID+7) +#define CCCI_ERR_KFIFO_IS_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+8) +#define CCCI_ERR_GET_NULL_POINTER (CCCI_ERR_CCCI_REGION_START_ID+9) +#define CCCI_ERR_GET_RX_DATA_FROM_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+10) +#define CCCI_ERR_CHANNEL_NUM_MIS_MATCH (CCCI_ERR_CCCI_REGION_START_ID+11) +#define CCCI_ERR_START_ADDR_NOT_4BYTES_ALIGN (CCCI_ERR_CCCI_REGION_START_ID+12) +#define CCCI_ERR_NOT_DIVISIBLE_BY_4 (CCCI_ERR_CCCI_REGION_START_ID+13) +#define CCCI_ERR_MD_AT_EXCEPTION (CCCI_ERR_CCCI_REGION_START_ID+14) +#define CCCI_ERR_MD_CB_HAS_REGISTER (CCCI_ERR_CCCI_REGION_START_ID+15) +#define CCCI_ERR_MD_INDEX_NOT_FOUND (CCCI_ERR_CCCI_REGION_START_ID+16) +#define CCCI_ERR_DROP_PACKET (CCCI_ERR_CCCI_REGION_START_ID+17) +#define CCCI_ERR_PORT_RX_FULL (CCCI_ERR_CCCI_REGION_START_ID+18) +#define CCCI_ERR_SYSFS_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+19) +#define CCCI_ERR_IPC_ID_ERROR (CCCI_ERR_CCCI_REGION_START_ID+20) +#define CCCI_ERR_FUNC_ID_ERROR (CCCI_ERR_CCCI_REGION_START_ID+21) +#define CCCI_ERR_INVALID_QUEUE_INDEX (CCCI_ERR_CCCI_REGION_START_ID+21) +#define CCCI_ERR_HIF_NOT_POWER_ON (CCCI_ERR_CCCI_REGION_START_ID+22) + +// ---- Load image error +#define CCCI_ERR_LOAD_IMG_NOMEM (CCCI_ERR_LOAD_IMG_START_ID+0) +#define CCCI_ERR_LOAD_IMG_FILE_OPEN (CCCI_ERR_LOAD_IMG_START_ID+1) +#define CCCI_ERR_LOAD_IMG_FILE_READ (CCCI_ERR_LOAD_IMG_START_ID+2) +#define CCCI_ERR_LOAD_IMG_KERN_READ (CCCI_ERR_LOAD_IMG_START_ID+3) +#define CCCI_ERR_LOAD_IMG_NO_ADDR (CCCI_ERR_LOAD_IMG_START_ID+4) +#define CCCI_ERR_LOAD_IMG_NO_FIRST_BOOT (CCCI_ERR_LOAD_IMG_START_ID+5) +#define CCCI_ERR_LOAD_IMG_LOAD_FIRM (CCCI_ERR_LOAD_IMG_START_ID+6) +#define CCCI_ERR_LOAD_IMG_FIRM_NULL (CCCI_ERR_LOAD_IMG_START_ID+7) +#define CCCI_ERR_LOAD_IMG_CHECK_HEAD (CCCI_ERR_LOAD_IMG_START_ID+8) +#define CCCI_ERR_LOAD_IMG_SIGN_FAIL (CCCI_ERR_LOAD_IMG_START_ID+9) +#define CCCI_ERR_LOAD_IMG_CIPHER_FAIL (CCCI_ERR_LOAD_IMG_START_ID+10) +#define CCCI_ERR_LOAD_IMG_MD_CHECK (CCCI_ERR_LOAD_IMG_START_ID+11) +#define CCCI_ERR_LOAD_IMG_DSP_CHECK (CCCI_ERR_LOAD_IMG_START_ID+12) +#define CCCI_ERR_LOAD_IMG_ABNORAL_SIZE (CCCI_ERR_LOAD_IMG_START_ID+13) +#define CCCI_ERR_LOAD_IMG_NOT_FOUND (CCCI_ERR_LOAD_IMG_START_ID+13) + +//================================================================================= +// CCCI Channel ID and Message defination +//================================================================================= +typedef enum { + CCCI_CONTROL_RX = 0, + CCCI_CONTROL_TX = 1, + CCCI_SYSTEM_RX = 2, + CCCI_SYSTEM_TX = 3, + CCCI_PCM_RX = 4, + CCCI_PCM_TX = 5, + CCCI_UART1_RX = 6, // META + CCCI_UART1_RX_ACK = 7, + CCCI_UART1_TX = 8, + CCCI_UART1_TX_ACK = 9, + CCCI_UART2_RX = 10, // MUX + CCCI_UART2_RX_ACK = 11, + CCCI_UART2_TX = 12, + CCCI_UART2_TX_ACK = 13, + CCCI_FS_RX = 14, + CCCI_FS_TX = 15, + CCCI_PMIC_RX = 16, + CCCI_PMIC_TX = 17, + CCCI_UEM_RX = 18, + CCCI_UEM_TX = 19, + CCCI_CCMNI1_RX = 20, + CCCI_CCMNI1_RX_ACK = 21, + CCCI_CCMNI1_TX = 22, + CCCI_CCMNI1_TX_ACK = 23, + CCCI_CCMNI2_RX = 24, + CCCI_CCMNI2_RX_ACK = 25, + CCCI_CCMNI2_TX = 26, + CCCI_CCMNI2_TX_ACK = 27, + CCCI_CCMNI3_RX = 28, + CCCI_CCMNI3_RX_ACK = 29, + CCCI_CCMNI3_TX = 30, + CCCI_CCMNI3_TX_ACK = 31, + CCCI_RPC_RX = 32, + CCCI_RPC_TX = 33, + CCCI_IPC_RX = 34, + CCCI_IPC_RX_ACK = 35, + CCCI_IPC_TX = 36, + CCCI_IPC_TX_ACK = 37, + CCCI_IPC_UART_RX = 38, + CCCI_IPC_UART_RX_ACK = 39, + CCCI_IPC_UART_TX = 40, + CCCI_IPC_UART_TX_ACK = 41, + CCCI_MD_LOG_RX = 42, + CCCI_MD_LOG_TX = 43, + /* ch44~49 reserved for ARM7 */ + CCCI_IT_RX = 50, + CCCI_IT_TX = 51, + CCCI_IMSV_UL = 52, + CCCI_IMSV_DL = 53, + CCCI_IMSC_UL = 54, + CCCI_IMSC_DL = 55, + CCCI_IMSA_UL = 56, + CCCI_IMSA_DL = 57, + CCCI_IMSDC_UL = 58, + CCCI_IMSDC_DL = 59, + CCCI_ICUSB_RX = 60, + CCCI_ICUSB_TX = 61, + CCCI_LB_IT_RX = 62, + CCCI_LB_IT_TX = 63, + CCCI_CCMNI1_DL_ACK = 64, + CCCI_CCMNI2_DL_ACK = 65, + CCCI_CCMNI3_DL_ACK = 66, + CCCI_STATUS_RX = 67, + CCCI_STATUS_TX = 68, + + CCCI_MONITOR_CH, + CCCI_DUMMY_CH, + CCCI_MAX_CH_NUM, // RX channel ID should NOT be >= this!! + + CCCI_MONITOR_CH_ID = 0xf0000000, // for backward compatible + CCCI_FORCE_ASSERT_CH = 20090215, + CCCI_INVALID_CH_ID = 0xffffffff, +}CCCI_CH; + +/* AP->md_init messages on monitor channel */ +typedef enum { + CCCI_MD_MSG_BOOT_READY = 0xFAF50001, + CCCI_MD_MSG_BOOT_UP = 0xFAF50002, + CCCI_MD_MSG_EXCEPTION = 0xFAF50003, + CCCI_MD_MSG_RESET = 0xFAF50004, + CCCI_MD_MSG_RESET_RETRY = 0xFAF50005, + CCCI_MD_MSG_READY_TO_RESET = 0xFAF50006, + CCCI_MD_MSG_BOOT_TIMEOUT = 0xFAF50007, + CCCI_MD_MSG_STOP_MD_REQUEST = 0xFAF50008, + CCCI_MD_MSG_START_MD_REQUEST = 0xFAF50009, + CCCI_MD_MSG_ENTER_FLIGHT_MODE = 0xFAF5000A, + CCCI_MD_MSG_LEAVE_FLIGHT_MODE = 0xFAF5000B, + CCCI_MD_MSG_POWER_ON_REQUEST = 0xFAF5000C, + CCCI_MD_MSG_POWER_OFF_REQUEST = 0xFAF5000D, + CCCI_MD_MSG_SEND_BATTERY_INFO = 0xFAF5000E, + CCCI_MD_MSG_NOTIFY = 0xFAF5000F, + CCCI_MD_MSG_STORE_NVRAM_MD_TYPE = 0xFAF50010, + CCCI_MD_MSG_CFG_UPDATE = 0xFAF50011, +} CCCI_MD_MSG; + + +// export to other kernel modules, better not let other module include ECCCI header directly (except IPC...) +enum { + MD_STATE_INVALID = 0, + MD_STATE_BOOTING = 1, + MD_STATE_READY = 2, + MD_STATE_EXCEPTION = 3 +}; // align to MD_BOOT_STAGE + +enum { + ID_GET_MD_WAKEUP_SRC = 0, // for SPM + ID_CCCI_DORMANCY = 1, // abandoned + ID_LOCK_MD_SLEEP = 2, // abandoned + ID_ACK_MD_SLEEP = 3, // abandoned + ID_SSW_SWITCH_MODE = 4, // abandoned + ID_SET_MD_TX_LEVEL = 5, // abandoned + ID_GET_TXPOWER = 6, // for thermal + ID_IPO_H_RESTORE_CB = 7, // abandoned + ID_FORCE_MD_ASSERT = 8, // abandoned + ID_PAUSE_LTE = 9, // for DVFS + ID_STORE_SIM_SWITCH_MODE = 10, + ID_GET_SIM_SWITCH_MODE = 11, + ID_GET_MD_STATE = 12, // for DVFS + ID_THROTTLING_CFG = 13, // For MD SW throughput throttling + ID_RESET_MD = 14, // for SVLTE MD3 reset MD1 + + ID_UPDATE_TX_POWER = 100, // for SWTP + +}; + +enum { + /*bit0-bit15: for modem capability related with ccci or ccci&ccmni driver*/ + MODEM_CAP_NAPI = (1<<0), + MODEM_CAP_TXBUSY_STOP = (1<<1), + /*bit16-bit31: for modem capability only related with ccmni driver*/ + MODEM_CAP_CCMNI_DISABLE = (1<<16), + MODEM_CAP_DATA_ACK_DVD = (1<<17), + MODEM_CAP_CCMNI_SEQNO = (1<<18), + MODEM_CAP_CCMNI_IRAT = (1<<19), +}; + +/* AP<->MD messages on control or system channel */ +enum { + // Control channel, MD->AP + MD_INIT_START_BOOT = 0x0, + MD_NORMAL_BOOT = 0x0, + MD_NORMAL_BOOT_READY = 0x1, // not using + MD_META_BOOT_READY = 0x2, // not using + MD_RESET = 0x3, // not using + MD_EX = 0x4, + CCCI_DRV_VER_ERROR = 0x5, + MD_EX_REC_OK = 0x6, + MD_EX_RESUME = 0x7, // not using + MD_EX_PASS = 0x8, + MD_INIT_CHK_ID = 0x5555FFFF, + MD_EX_CHK_ID = 0x45584350, + MD_EX_REC_OK_CHK_ID = 0x45524543, + + // System channel, AP->MD || AP<-->MD message start from 0x100 + MD_DORMANT_NOTIFY = 0x100, + MD_SLP_REQUEST = 0x101, + MD_TX_POWER = 0x102, + MD_RF_TEMPERATURE = 0x103, + MD_RF_TEMPERATURE_3G = 0x104, + MD_GET_BATTERY_INFO = 0x105, + MD_SIM_TYPE = 0x107, + MD_ICUSB_NOTIFY = 0x108, + //0x109 for md legacy use to crystal_thermal_change + MD_LOW_BATTERY_LEVEL = 0x10A, + // 0x10B-0x10C occupied by EEMCS + MD_PAUSE_LTE = 0x10D, + //used for throttling feature - start + MD_THROTTLING = 0x112, // SW throughput throttling + //used for throttling feature - end + + /* swtp */ + MD_SW_MD1_TX_POWER = 0x10E, + MD_SW_MD2_TX_POWER = 0x10F, + MD_SW_MD1_TX_POWER_REQ = 0x110, + MD_SW_MD2_TX_POWER_REQ = 0x111, + + // System channel, MD->AP message start from 0x1000 + MD_WDT_MONITOR = 0x1000, + // System channel, AP->MD message + MD_WAKEN_UP = 0x10000, +}; + +#define NORMAL_BOOT_ID 0 +#define META_BOOT_ID 1 + +typedef enum { + INVALID = 0, // no traffic + GATED, // broadcast by modem driver, no traffic + BOOTING, // broadcast by modem driver + READY, // broadcast by port_kernel + EXCEPTION, // broadcast by port_kernel + RESET, // broadcast by modem driver, no traffic + + RX_IRQ, // broadcast by modem driver, illegal for md->md_state, only for NAPI! + TX_IRQ, // broadcast by modem driver, illegal for md->md_state, only for network! + TX_FULL, // broadcast by modem driver, illegal for md->md_state, only for network! + BOOT_FAIL, // broadcast by port_kernel, illegal for md->md_state +}MD_STATE; // for CCCI internal + + +//================================================================================= +// Image type and header defination part +//================================================================================= +typedef enum { + IMG_MD = 0, + IMG_DSP, + IMG_NUM, +} MD_IMG_TYPE; + +typedef enum{ + INVALID_VARSION = 0, + DEBUG_VERSION, + RELEASE_VERSION +} PRODUCT_VER_TYPE; + +#define IMG_NAME_LEN 32 +#define IMG_POSTFIX_LEN 16 +#define IMG_PATH_LEN 64 + +struct IMG_CHECK_INFO{ + char *product_ver; /* debug/release/invalid */ + char *image_type; /*2G/3G/invalid*/ + char *platform; /* MT6573_S00(MT6573E1) or MT6573_S01(MT6573E2) */ + char *build_time; /* build time string */ + char *build_ver; /* project version, ex:11A_MD.W11.28 */ + unsigned int mem_size; /*md rom+ram mem size*/ + unsigned int md_img_size; /*modem image actual size, exclude head size*/ + PRODUCT_VER_TYPE version; +}; + +struct ccci_image_info +{ + MD_IMG_TYPE type; + char file_name[IMG_PATH_LEN]; + phys_addr_t address; // phy memory address to load this image + unsigned int size; // image size without signature, cipher and check header, read form check header + unsigned int offset; // signature and cipher header + unsigned int tail_length; // signature tail + unsigned int dsp_offset; + unsigned int dsp_size; + char *ap_platform; + struct IMG_CHECK_INFO img_info; // read from MD image header + struct IMG_CHECK_INFO ap_info; // get from AP side configuration +}; + +struct ccci_dev_cfg { + unsigned int index; + unsigned int major; + unsigned int minor_base; + unsigned int capability; +}; + +typedef int (*get_status_func_t)(int,char*,int); +typedef int (*boot_md_func_t)(int); + +// Rutime data common part +typedef enum +{ + FEATURE_NOT_EXIST = 0, + FEATURE_NOT_SUPPORT, + FEATURE_SUPPORT, + FEATURE_PARTIALLY_SUPPORT, +} MISC_FEATURE_STATE; + +typedef enum +{ + MISC_DMA_ADDR = 0, + MISC_32K_LESS, + MISC_RAND_SEED, + MISC_MD_COCLK_SETTING, + MISC_MD_SBP_SETTING, + MISC_MD_SEQ_CHECK, + MISC_MD_CLIB_TIME, + MISC_MD_C2K_ON, +} MISC_FEATURE_ID; + +typedef enum { + MODE_UNKNOWN = -1, // -1 + MODE_IDLE, // 0 + MODE_USB, // 1 + MODE_SD, // 2 + MODE_POLLING, // 3 + MODE_WAITSD, // 4 +} LOGGING_MODE; + +typedef enum { + HIF_EX_INIT = 0, // interrupt + HIF_EX_ACK, // AP->MD + HIF_EX_INIT_DONE, // polling + HIF_EX_CLEARQ_DONE, //interrupt + HIF_EX_CLEARQ_ACK, // AP->MD + HIF_EX_ALLQ_RESET, // polling +}HIF_EX_STAGE; + +// runtime data format uses EEMCS's version, NOT the same with legacy CCCI +struct modem_runtime { + u32 Prefix; // "CCIF" + u32 Platform_L; // Hardware Platform String ex: "TK6516E0" + u32 Platform_H; + u32 DriverVersion; // 0x00000923 since W09.23 + u32 BootChannel; // Channel to ACK AP with boot ready + u32 BootingStartID; // MD is booting. NORMAL_BOOT_ID or META_BOOT_ID +#if 1 // not using in EEMCS + u32 BootAttributes; // Attributes passing from AP to MD Booting + u32 BootReadyID; // MD response ID if boot successful and ready + u32 FileShareMemBase; + u32 FileShareMemSize; + u32 ExceShareMemBase; + u32 ExceShareMemSize; + u32 CCIFShareMemBase; + u32 CCIFShareMemSize; + u32 TotalShareMemBase; + u32 TotalShareMemSize; + u32 CheckSum; +#endif + u32 Postfix; //"CCIF" +#if 1 // misc region + u32 misc_prefix; // "MISC" + u32 support_mask; + u32 index; + u32 next; + u32 feature_0_val[4]; + u32 feature_1_val[4]; + u32 feature_2_val[4]; + u32 feature_3_val[4]; + u32 feature_4_val[4]; + u32 feature_5_val[4]; + u32 feature_6_val[4]; + u32 feature_7_val[4]; + u32 feature_8_val[4]; + u32 feature_9_val[4]; + u32 feature_10_val[4]; + u32 feature_11_val[4]; + u32 feature_12_val[4]; + u32 feature_13_val[4]; + u32 feature_14_val[4]; + u32 feature_15_val[4]; + u32 reserved_2[3]; + u32 misc_postfix; // "MISC" +#endif +} __attribute__ ((packed)); + +typedef enum { + ID_GET_FDD_THERMAL_DATA = 0, + ID_GET_TDD_THERMAL_DATA, +}SYS_CB_ID; + +typedef int (*ccci_sys_cb_func_t)(int, int); +typedef struct{ + SYS_CB_ID id; + ccci_sys_cb_func_t func; +}ccci_sys_cb_func_info_t; + +#define MAX_KERN_API 20 + +//============================================================================================== +// Export API +//============================================================================================== +int ccci_get_fo_setting(char item[], unsigned int *val); // Export by ccci util +void ccci_md_mem_reserve(void); // Export by ccci util +unsigned int get_modem_is_enabled(int md_id); // Export by ccci util +unsigned int ccci_get_modem_nr(void); // Export by ccci util +int ccci_init_security(void); // Export by ccci util +int ccci_sysfs_add_modem(int md_id, void *kobj, void *ktype, get_status_func_t, boot_md_func_t); // Export by ccci util +int get_modem_support_cap(int md_id); // Export by ccci util +int set_modem_support_cap(int md_id, int new_val); // Export by ccci util +char* ccci_get_md_info_str(int md_id); // Export by ccci util +int ccci_load_firmware(int md_id, void* img_inf, char img_err_str[], char post_fix[]); // Export by ccci util +int get_md_resv_mem_info(int md_id, phys_addr_t *r_rw_base, unsigned int *r_rw_size, phys_addr_t *srw_base, unsigned int *srw_size); // Export by ccci util +//used for throttling feature - start +unsigned long ccci_get_md_boot_count(int md_id); +//used for throttling feature - end + +int exec_ccci_kern_func_by_md_id(int md_id, unsigned int id, char *buf, unsigned int len); +int register_ccci_sys_call_back(int md_id, unsigned int id, ccci_sys_cb_func_t func); +int switch_sim_mode(int id, char *buf, unsigned int len); +unsigned int get_sim_switch_type(void); + +// CLib for modem get ap time +void notify_time_update(void); +int wait_time_update_notify(void); +#endif diff --git a/include/mach/mt_chip_common.h b/include/mach/mt_chip_common.h new file mode 100644 index 000000000..761effa1e --- /dev/null +++ b/include/mach/mt_chip_common.h @@ -0,0 +1,63 @@ + /* + * + * + * Copyright (C) 2008,2009 MediaTek <www.mediatek.com> + * Authors: Infinity Chen <infinity.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __MT_CHIP_COMMON_H__ +#define __MT_CHIP_COMMON_H__ + +typedef enum { + CHIP_INFO_NONE = 0, + CHIP_INFO_HW_CODE, + CHIP_INFO_HW_SUBCODE, + CHIP_INFO_HW_VER, + CHIP_INFO_SW_VER, + + CHIP_INFO_REG_HW_CODE, + CHIP_INFO_REG_HW_SUBCODE, + CHIP_INFO_REG_HW_VER, + CHIP_INFO_REG_SW_VER, + + CHIP_INFO_FUNCTION_CODE, + CHIP_INFO_PROJECT_CODE, + CHIP_INFO_DATE_CODE, + CHIP_INFO_FAB_CODE, + CHIP_INFO_WAFER_BIG_VER, + + CHIP_INFO_MAX, + CHIP_INFO_ALL, +} chip_info_t; + +#define CHIP_INFO_BIT(ID) (1 << ID) +#define CHIP_INFO_SUP(MASK,ID) ((MASK & CHIP_INFO_BIT(ID)) ? (1) : (0)) + +#define C_UNKNOWN_CHIP_ID (0x0000FFFF) + +struct mt_chip_drv +{ + /* raw information */ + unsigned int info_bit_mask; + unsigned int (*get_chip_info)(chip_info_t id); +}; + +typedef unsigned int (*chip_info_cb)(void); +struct mt_chip_drv* get_mt_chip_drv(void); + + +#endif diff --git a/include/mach/mt_freqhopping_drv.h b/include/mach/mt_freqhopping_drv.h new file mode 100644 index 000000000..c8f84316d --- /dev/null +++ b/include/mach/mt_freqhopping_drv.h @@ -0,0 +1,95 @@ +#ifndef __FREQHOPPING_DRV_H +#define __FREQHOPPING_DRV_H + +#include <linux/proc_fs.h> +#include "mach/mt_freqhopping.h" + +// move to /mediatek/platform/prj, can config. by prj. +//#define MEMPLL_SSC 0 +//#define MAINPLL_SSC 1 + +/* Export API */ +int mt_freqhopping_devctl(unsigned int cmd, void* args); + +struct mt_fh_hal_proc_func{ + + int (*clk_gen_read)(char *, char **, off_t, int, int *, void *); + int (*clk_gen_write)(struct file *,const char *, unsigned long, void *); + int (*dramc_read)(struct seq_file* m, void* v); //(char *, char **, off_t, int, int *, void *); + int (*dramc_write)(struct file *,const char *, unsigned long, void *); + int (*dumpregs_read)(struct seq_file* m, void* v);//(char *, char **, off_t, int, int *, void *); + int (*dvfs_read)(struct seq_file* m, void* v); //(char *, char **, off_t, int, int *, void *); + int (*dvfs_write)(struct file *,const char *, unsigned long, void *); + +}; + +struct mt_fh_hal_driver{ + + fh_pll_t *fh_pll; + struct freqhopping_ssc *fh_usrdef; + unsigned int mempll; + unsigned int lvdspll; + unsigned int mainpll; + unsigned int msdcpll; + unsigned int mmpll; + unsigned int vencpll; + unsigned int pll_cnt; + + struct mt_fh_hal_proc_func proc; + + void (*mt_fh_hal_init)(void); + int (*mt_fh_hal_ctrl)(struct freqhopping_ioctl* , bool); + void (*mt_fh_lock)(unsigned long *); + void (*mt_fh_unlock)(unsigned long *); + int (*mt_fh_get_init)(void); + void (*mt_fh_popod_restore)(void); + void (*mt_fh_popod_save)(void); + + int (*mt_l2h_mempll)(void); + int (*mt_h2l_mempll)(void); + int (*mt_dfs_armpll)(unsigned int , unsigned int); + int (*mt_dfs_mmpll)(unsigned int); + int (*mt_dfs_vencpll)(unsigned int); + int (*mt_dfs_mpll)(unsigned int); + int (*mt_dfs_mempll)(unsigned int); + int (*mt_is_support_DFS_mode)(void); + int (*mt_l2h_dvfs_mempll)(void); + int (*mt_h2l_dvfs_mempll)(void); + int (*mt_dram_overclock)(int); + int (*mt_get_dramc)(void); + void (*mt_fh_default_conf)(void); + + void (*ioctl)(unsigned int ctlid, void* ); +}; + +//define ctlid for ioctl() +#define FH_IO_PROC_READ 0x001 + +enum FH_DEVCTL_CMD_ID { + FH_DCTL_CMD_ID = 0x1000, + FH_DCTL_CMD_DVFS = 0x1001, + FH_DCTL_CMD_DVFS_SSC_ENABLE = 0x1002, + FH_DCTL_CMD_DVFS_SSC_DISABLE = 0x1003, + FH_DCTL_CMD_SSC_ENABLE = 0x1004, + FH_DCTL_CMD_SSC_DISABLE = 0x1005, + FH_DCTL_CMD_MAX +}; + + +//define structure for correspoinding ctlid +typedef struct{ + struct seq_file* m; + void* v; + fh_pll_t * pll; +}FH_IO_PROC_READ_T; + +struct mt_fh_hal_driver* mt_get_fh_hal_drv(void); + +#define FH_BUG_ON(x) \ +do { \ + if((x)){ \ + printk("BUGON %s:%d %s:%d\n",__FUNCTION__,__LINE__,current->comm,current->pid); \ + } \ +} while(0); + +#endif diff --git a/include/mach/mt_gpio.h b/include/mach/mt_gpio.h new file mode 100644 index 000000000..bcaee7d6f --- /dev/null +++ b/include/mach/mt_gpio.h @@ -0,0 +1,161 @@ +#ifndef _MT_GPIO_H_ +#define _MT_GPIO_H_ + +/* mark for delete, need remove other driver build error */ +#include <linux/ioctl.h> +#include <linux/fs.h> + +/* FIX-ME: */ +/* #if (defined(CONFIG_MT6589_FPGA)) */ +#if (defined(CONFIG_MTK_FPGA)) +/* #define CONFIG_MT_GPIO_FPGA_ENABLE */ +#include <mach/mt_gpio_fpga.h> +#else +/* FIX-ME: marked for early porting */ +#include <cust_gpio_usage.h> +#include <mach/mt_gpio_base.h> +#include <mach/mt_gpio_affix.h> +#endif +#include <mach/mt_gpio_ext.h> + +/****************************************************************************** +* Enumeration for GPIO pin +******************************************************************************/ +/* GPIO MODE CONTROL VALUE*/ +typedef enum { + GPIO_MODE_UNSUPPORTED = -1, + GPIO_MODE_GPIO = 0, + GPIO_MODE_00 = 0, + GPIO_MODE_01 = 1, + GPIO_MODE_02 = 2, + GPIO_MODE_03 = 3, + GPIO_MODE_04 = 4, + GPIO_MODE_05 = 5, + GPIO_MODE_06 = 6, + GPIO_MODE_07 = 7, + + GPIO_MODE_MAX, + GPIO_MODE_DEFAULT = GPIO_MODE_01, +} GPIO_MODE; +/*----------------------------------------------------------------------------*/ +/* GPIO DIRECTION */ +typedef enum { + GPIO_DIR_UNSUPPORTED = -1, + GPIO_DIR_IN = 0, + GPIO_DIR_OUT = 1, + + GPIO_DIR_MAX, + GPIO_DIR_DEFAULT = GPIO_DIR_IN, +} GPIO_DIR; +/*----------------------------------------------------------------------------*/ +/* GPIO PULL ENABLE*/ +typedef enum { + GPIO_PULL_EN_UNSUPPORTED = -1, + GPIO_PULL_DISABLE = 0, + GPIO_PULL_ENABLE = 1, + + GPIO_PULL_EN_MAX, + GPIO_PULL_EN_DEFAULT = GPIO_PULL_ENABLE, +} GPIO_PULL_EN; +/*----------------------------------------------------------------------------*/ +/* GPIO SMT*/ +typedef enum { + GPIO_SMT_UNSUPPORTED = -1, + GPIO_SMT_DISABLE = 0, + GPIO_SMT_ENABLE = 1, + + GPIO_SMT_MAX, + GPIO_SMT_DEFAULT = GPIO_SMT_ENABLE, +} GPIO_SMT; +/*----------------------------------------------------------------------------*/ +/* GPIO IES*/ +typedef enum { + GPIO_IES_UNSUPPORTED = -1, + GPIO_IES_DISABLE = 0, + GPIO_IES_ENABLE = 1, + + GPIO_IES_MAX, + GPIO_IES_DEFAULT = GPIO_IES_ENABLE, +} GPIO_IES; +/*----------------------------------------------------------------------------*/ +/* GPIO PULL-UP/PULL-DOWN*/ +typedef enum { + GPIO_PULL_UNSUPPORTED = -1, + GPIO_PULL_DOWN = 0, + GPIO_PULL_UP = 1, + + GPIO_PULL_MAX, + GPIO_PULL_DEFAULT = GPIO_PULL_DOWN +} GPIO_PULL; +/*----------------------------------------------------------------------------*/ +/* GPIO INVERSION */ +typedef enum { + GPIO_DATA_INV_UNSUPPORTED = -1, + GPIO_DATA_UNINV = 0, + GPIO_DATA_INV = 1, + + GPIO_DATA_INV_MAX, + GPIO_DATA_INV_DEFAULT = GPIO_DATA_UNINV +} GPIO_INVERSION; +/*----------------------------------------------------------------------------*/ +/* GPIO OUTPUT */ +typedef enum { + GPIO_OUT_UNSUPPORTED = -1, + GPIO_OUT_ZERO = 0, + GPIO_OUT_ONE = 1, + + GPIO_OUT_MAX, + GPIO_OUT_DEFAULT = GPIO_OUT_ZERO, + GPIO_DATA_OUT_DEFAULT = GPIO_OUT_ZERO, /*compatible with DCT */ +} GPIO_OUT; +/*----------------------------------------------------------------------------*/ +/* GPIO INPUT */ +typedef enum { + GPIO_IN_UNSUPPORTED = -1, + GPIO_IN_ZERO = 0, + GPIO_IN_ONE = 1, + + GPIO_IN_MAX, +} GPIO_IN; + +/****************************************************************************** +* GPIO Driver interface +******************************************************************************/ +/*direction*/ +int mt_set_gpio_dir(unsigned long pin, unsigned long dir); +int mt_get_gpio_dir(unsigned long pin); + +/*pull enable*/ +int mt_set_gpio_pull_enable(unsigned long pin, unsigned long enable); +int mt_get_gpio_pull_enable(unsigned long pin); + +/*schmitt trigger*/ +int mt_set_gpio_smt(unsigned long pin, unsigned long enable); +int mt_get_gpio_smt(unsigned long pin); + +/*IES*/ +int mt_set_gpio_ies(unsigned long pin, unsigned long enable); +int mt_get_gpio_ies(unsigned long pin); + +/*pull select*/ +int mt_set_gpio_pull_select(unsigned long pin, unsigned long select); +int mt_get_gpio_pull_select(unsigned long pin); + +/*data inversion*/ +int mt_set_gpio_inversion(unsigned long pin, unsigned long enable); +int mt_get_gpio_inversion(unsigned long pin); + +/*input/output*/ +int mt_set_gpio_out(unsigned long pin, unsigned long output); +int mt_get_gpio_out(unsigned long pin); +int mt_get_gpio_in(unsigned long pin); + +/*mode control*/ +int mt_set_gpio_mode(unsigned long pin, unsigned long mode); +int mt_get_gpio_mode(unsigned long pin); + +/*misc functions for protect GPIO*/ +/* void mt_gpio_dump(GPIO_REGS *regs,GPIOEXT_REGS *regs_ext); */ +void gpio_dump_regs(void); + +#endif /* _MT_GPIO_H_ */ diff --git a/include/mach/mt_gpio_core.h b/include/mach/mt_gpio_core.h new file mode 100644 index 000000000..02f391608 --- /dev/null +++ b/include/mach/mt_gpio_core.h @@ -0,0 +1,130 @@ +#ifndef _MT_GPIO_CORE_H_ +#define _MT_GPIO_CORE_H_ +/* +#if (defined(CONFIG_FPGA)) +//#define CONFIG_MT_GPIO_FPGA_ENABLE +#include <mach/mt_gpio_fpga.h> +#else +// FIX-ME: marked for early porting +#include <cust_gpio_usage.h> +#include <mach/mt_gpio_base.h> +#endif +#include <mach/mt_gpio_ext.h> +*/ +#ifdef CONFIG_OF +#include <linux/of_device.h> +#endif +/****************************************************************************** + MACRO Definition +******************************************************************************/ +#define GPIO_DEVICE "mt-gpio" +#define VERSION GPIO_DEVICE + +#define GPIOTAG "[GPIO] " +#define GPIOLOG(fmt, arg...) printk(GPIOTAG fmt, ##arg) +#define GPIOMSG(fmt, arg...) printk(fmt, ##arg) +#define GPIOERR(fmt, arg...) printk(KERN_ERR GPIOTAG "%5d: "fmt, __LINE__, ##arg) +#define GPIOFUC(fmt, arg...) /* printk(GPIOTAG "%s\n", __FUNCTION__) */ +/*----------------------------------------------------------------------------*/ +/* Error Code No. */ +#define RSUCCESS 0 +#define ERACCESS 1 +#define ERINVAL 2 +#define ERWRAPPER 3 + +#define GPIO_RETERR(res, fmt, args...) \ + do { \ + printk(KERN_ERR GPIOTAG "%s:%04d: " fmt"\n", __func__, __LINE__, ##args);\ + return res; \ + } while (0) +#define GIO_INVALID_OBJ(ptr) ((ptr) != mt_gpio) + +enum { + MT_BASE = 0, + MT_EXT, + MT_NOT_SUPPORT, +}; +#define MT_GPIO_PLACE(pin) ({\ + int ret = -1;\ + if ((pin >= MT_GPIO_BASE_START) && (pin < MT_GPIO_BASE_MAX)) {\ + ret = MT_BASE;\ + GPIOFUC("pin in base is %d\n", (int)pin);\ + } else if ((pin >= MT_GPIO_EXT_START) && (pin < MT_GPIO_EXT_MAX)) {\ + ret = MT_EXT;\ + GPIOFUC("pin in ext is %d\n", (int)pin);\ + } else{\ + GPIOERR("Pin number error %d\n", (int)pin); \ + ret = -1;\ + } \ + ret; }) +/* int where_is(unsigned long pin) */ +/* { */ +/* int ret = -1; */ +/* // GPIOLOG("pin is %d\n",pin); */ +/* if((pin >= MT_GPIO_BASE_START) && (pin < MT_GPIO_BASE_MAX)){ */ +/* ret = MT_BASE; */ +/* //GPIOLOG("pin in base is %d\n",pin); */ +/* }else if((pin >= MT_GPIO_EXT_START) && (pin < MT_GPIO_EXT_MAX)){ */ +/* ret = MT_EXT; */ +/* //GPIOLOG("pin in ext is %d\n",pin); */ +/* }else{ */ +/* GPIOERR("Pin number error %d\n",pin); */ +/* ret = -1; */ +/* } */ +/* return ret; */ +/* } */ +/*decrypt pin*/ + +/*---------------------------------------------------------------------------*/ +int mt_set_gpio_dir_base(unsigned long pin, unsigned long dir); +int mt_get_gpio_dir_base(unsigned long pin); +int mt_set_gpio_pull_enable_base(unsigned long pin, unsigned long enable); +int mt_get_gpio_pull_enable_base(unsigned long pin); +int mt_set_gpio_smt_base(unsigned long pin, unsigned long enable); +int mt_get_gpio_smt_base(unsigned long pin); +int mt_set_gpio_ies_base(unsigned long pin, unsigned long enable); +int mt_get_gpio_ies_base(unsigned long pin); +int mt_set_gpio_pull_select_base(unsigned long pin, unsigned long select); +int mt_get_gpio_pull_select_base(unsigned long pin); +int mt_set_gpio_inversion_base(unsigned long pin, unsigned long enable); +int mt_get_gpio_inversion_base(unsigned long pin); +int mt_set_gpio_out_base(unsigned long pin, unsigned long output); +int mt_get_gpio_out_base(unsigned long pin); +int mt_get_gpio_in_base(unsigned long pin); +int mt_set_gpio_mode_base(unsigned long pin, unsigned long mode); +int mt_get_gpio_mode_base(unsigned long pin); +#ifdef CONFIG_PM +void mt_gpio_suspend(void); +void mt_gpio_resume(void); +#endif /*CONFIG_PM */ +#ifdef CONFIG_OF +void get_gpio_vbase(struct device_node *node); +void get_io_cfg_vbase(void); +#endif +#ifdef CONFIG_MD32_SUPPORT +void md32_gpio_handle_init(void); +#endif + +int mt_set_gpio_dir_ext(unsigned long pin, unsigned long dir); +int mt_get_gpio_dir_ext(unsigned long pin); +int mt_set_gpio_pull_enable_ext(unsigned long pin, unsigned long enable); +int mt_get_gpio_pull_enable_ext(unsigned long pin); +int mt_set_gpio_smt_ext(unsigned long pin, unsigned long enable); +int mt_get_gpio_smt_ext(unsigned long pin); +int mt_set_gpio_ies_ext(unsigned long pin, unsigned long enable); +int mt_get_gpio_ies_ext(unsigned long pin); +int mt_set_gpio_pull_select_ext(unsigned long pin, unsigned long select); +int mt_get_gpio_pull_select_ext(unsigned long pin); +int mt_set_gpio_inversion_ext(unsigned long pin, unsigned long enable); +int mt_get_gpio_inversion_ext(unsigned long pin); +int mt_set_gpio_out_ext(unsigned long pin, unsigned long output); +int mt_get_gpio_out_ext(unsigned long pin); +int mt_get_gpio_in_ext(unsigned long pin); +int mt_set_gpio_mode_ext(unsigned long pin, unsigned long mode); +int mt_get_gpio_mode_ext(unsigned long pin); + +void mt_gpio_pin_decrypt(unsigned long *cipher); +int mt_gpio_create_attr(struct device *dev); +int mt_gpio_delete_attr(struct device *dev); + +#endif diff --git a/include/mach/mt_pmic_wrap.h b/include/mach/mt_pmic_wrap.h new file mode 100644 index 000000000..e6c94bf0b --- /dev/null +++ b/include/mach/mt_pmic_wrap.h @@ -0,0 +1,54 @@ +#ifndef __MT_PMIC_WRAP_H__ +#define __MT_PMIC_WRAP_H__ +/* #include <mach/typedefs.h> */ +/* #include <linux/smp.h> */ +#include <mach/mt_typedefs.h> +#include <linux/device.h> + + +struct mt_pmic_wrap_driver{ + + struct device_driver driver; + S32 (*wacs2_hal)( U32 write, U32 adr, U32 wdata, U32 *rdata ); + + S32 (*show_hal)(char *buf); + S32 (*store_hal)(const char *buf, size_t count); + + S32 (*suspend)(void); + void (*resume)(void); +}; +typedef enum { + PWRAP_READ = 0, + PWRAP_WRITE = 1, +}PWRAP_OPS; + +/* ------external API for pmic_wrap user-------------------------------------------------- */ +S32 pwrap_read( U32 adr, U32 *rdata ); +S32 pwrap_write( U32 adr, U32 wdata ); +//S32 pwrap_write_nochk( U32 adr, U32 wdata ); +//S32 pwrap_read_nochk( U32 adr, U32 *rdata ); + +S32 pwrap_wacs2( U32 write, U32 adr, U32 wdata, U32 *rdata ); +/*_____________ROME only_____________________________________________*/ +/********************************************************************/ +/* return value : EINT_STA: [0]: CPU IRQ status in MT6331 */ +/* [1]: MD32 IRQ status in MT6331 */ +/* [2]: CPU IRQ status in MT6332 */ +/* [3]: RESERVED */ +/********************************************************************/ +U32 pmic_wrap_eint_status(void); +/********************************************************************/ +/* set value(W1C) : EINT_CLR: [0]: CPU IRQ status in MT6331 */ +/* [1]: MD32 IRQ status in MT6331 */ +/* [2]: CPU IRQ status in MT6332 */ +/* [3]: RESERVED */ +/* para: offset is shift of clear bit which needs to clear */ +/********************************************************************/ +void pmic_wrap_eint_clr(int offset); +/*--------------------------------------------------------------------*/ +U32 mt_pmic_wrap_eint_status(void); +void mt_pmic_wrap_eint_clr(int offset); +S32 pwrap_init( void ); +struct mt_pmic_wrap_driver *get_mt_pmic_wrap_drv(void); + +#endif /* __MT_PMIC_WRAP_H__ */ diff --git a/include/mach/mt_pwm.h b/include/mach/mt_pwm.h new file mode 100644 index 000000000..a80880f07 --- /dev/null +++ b/include/mach/mt_pwm.h @@ -0,0 +1,131 @@ +/******************************************************************************* +* mt6575_pwm.h PWM Drvier +* +* Copyright (c) 2010, Media Teck.inc +* +* This program is free software; you can redistribute it and/or modify it +* under the terms and conditions of the GNU General Public Licence, +* version 2, as publish by the Free Software Foundation. +* +* This program is distributed and in hope it will be useful, but WITHOUT +* ANY WARRNTY; without even the implied warranty of MERCHANTABITLITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* +******************************************************************************** +* Author : Chagnlei Gao (changlei.gao@mediatek.com) +******************************************************************************** +*/ + +#ifndef __MT_PWM_H__ +#define __MT_PWM_H__ + +#include <mach/mt_typedefs.h> +#include <mach/mt_pwm_hal.h> + +struct pwm_easy_config { + U32 pwm_no; + U32 duty; + U32 clk_src; + U32 clk_div; + U16 duration; + BOOL pmic_pad; +}; +struct pwm_spec_config { + U32 pwm_no; + U32 mode; + U32 clk_div; + U32 clk_src; + BOOL intr; + BOOL pmic_pad; + + union { + /* for old mode */ + struct _PWM_OLDMODE_REGS { + U16 IDLE_VALUE; + U16 GUARD_VALUE; + U16 GDURATION; + U16 WAVE_NUM; + U16 DATA_WIDTH; + U16 THRESH; + } PWM_MODE_OLD_REGS; + + /* for fifo mode */ + struct _PWM_MODE_FIFO_REGS { + U32 IDLE_VALUE; + U32 GUARD_VALUE; + U32 STOP_BITPOS_VALUE; + U16 HDURATION; + U16 LDURATION; + U32 GDURATION; + U32 SEND_DATA0; + U32 SEND_DATA1; + U32 WAVE_NUM; + } PWM_MODE_FIFO_REGS; + + //for memory mode + struct _PWM_MODE_MEMORY_REGS { + U32 IDLE_VALUE; + U32 GUARD_VALUE; + U32 STOP_BITPOS_VALUE; + U16 HDURATION; + U16 LDURATION; + U16 GDURATION; + U32 * BUF0_BASE_ADDR; + U32 BUF0_SIZE; + U16 WAVE_NUM; + }PWM_MODE_MEMORY_REGS; + + //for RANDOM mode + struct _PWM_MODE_RANDOM_REGS { + U16 IDLE_VALUE; + U16 GUARD_VALUE; + U32 STOP_BITPOS_VALUE; + U16 HDURATION; + U16 LDURATION; + U16 GDURATION; + U32 * BUF0_BASE_ADDR; + U32 BUF0_SIZE; + U32 *BUF1_BASE_ADDR; + U32 BUF1_SIZE; + U16 WAVE_NUM; + U32 VALID; + }PWM_MODE_RANDOM_REGS; + + //for seq mode + struct _PWM_MODE_DELAY_REGS { + //U32 ENABLE_DELAY_VALUE; + U16 PWM3_DELAY_DUR; + U32 PWM3_DELAY_CLK; //0: block clock source, 1: block/1625 clock source + U16 PWM4_DELAY_DUR; + U32 PWM4_DELAY_CLK; + U16 PWM5_DELAY_DUR; + U32 PWM5_DELAY_CLK; + }PWM_MODE_DELAY_REGS; + + }; +}; + +S32 pwm_set_easy_config(struct pwm_easy_config *conf); +S32 pwm_set_spec_config(struct pwm_spec_config *conf); + + + +void mt_pwm_dump_regs(void); +void mt_pwm_disable(U32 pwm_no, BOOL pmic_pad); + +/*----------3dLCM support-----------*/ +void mt_set_pwm_3dlcm_enable(BOOL enable); +/* + set "pwm_no" inversion of pwm base or not + */ +void mt_set_pwm_3dlcm_inv(U32 pwm_no, BOOL inv); +//void mt_set_pwm_3dlcm_base(U32 pwm_no); + +//void mt_pwm_26M_clk_enable(U32 enable); +S32 mt_set_intr_ack ( U32 pwm_intr_ack_bit ); +S32 mt_set_intr_enable(U32 pwm_intr_enable_bit); +S32 mt_get_intr_status(U32 pwm_intr_status_bit); + +#endif diff --git a/include/mach/mt_pwm_hal_pub.h b/include/mach/mt_pwm_hal_pub.h new file mode 100644 index 000000000..988aa8d62 --- /dev/null +++ b/include/mach/mt_pwm_hal_pub.h @@ -0,0 +1,78 @@ +/* +* This program is distributed and in hope it will be useful, but WITHOUT +* ANY WARRNTY; without even the implied warranty of MERCHANTABITLITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* +******************************************************************************** +* Author : Chagnlei Gao (changlei.gao@mediatek.com) +******************************************************************************** +*/ + +#ifndef __MT_PWM_HAL_PUB_H__ +#define __MT_PWM_HAL_PUB_H__ + +#include <mach/mt_typedefs.h> + +/********************************* +* Define Error Number +**********************************/ +#define RSUCCESS 0 +#define EEXCESSPWMNO 1 +#define EPARMNOSUPPORT 2 +#define ERROR 3 +#define EBADADDR 4 +#define EEXCESSBITS 5 +#define EINVALID 6 + +#ifdef PWM_DEBUG +#define PWMDBG(fmt, args ...) printk(KERN_INFO "pwm %5d: " fmt, __LINE__, ##args) +#else +#define PWMDBG(fmt, args ...) +#endif + +#define PWMMSG(fmt, args ...) printk(KERN_INFO fmt, ##args) + +#define PWM_DEVICE "mt-pwm" + +void mt_pwm_power_on_hal(U32 pwm_no, BOOL pmic_pad, unsigned long *power_flag); +void mt_pwm_power_off_hal(U32 pwm_no, BOOL pmic_pad, unsigned long *power_flag); +void mt_pwm_init_power_flag(unsigned long *power_flag); +S32 mt_pwm_sel_pmic_hal(U32 pwm_no); +S32 mt_pwm_sel_ap_hal(U32 pwm_no); +void mt_set_pwm_enable_hal(U32 pwm_no); +void mt_set_pwm_disable_hal(U32 pwm_no); +void mt_set_pwm_enable_seqmode_hal(void); +void mt_set_pwm_disable_seqmode_hal(void); +S32 mt_set_pwm_test_sel_hal(U32 val); +void mt_set_pwm_clk_hal(U32 pwm_no, U32 clksrc, U32 div); +S32 mt_get_pwm_clk_hal(U32 pwm_no); +S32 mt_set_pwm_con_datasrc_hal(U32 pwm_no, U32 val); +S32 mt_set_pwm_con_mode_hal(U32 pwm_no, U32 val); +S32 mt_set_pwm_con_idleval_hal(U32 pwm_no, U16 val); +S32 mt_set_pwm_con_guardval_hal(U32 pwm_no, U16 val); +void mt_set_pwm_con_stpbit_hal(U32 pwm_no, U32 stpbit, U32 srcsel); +S32 mt_set_pwm_con_oldmode_hal(U32 pwm_no, U32 val); +void mt_set_pwm_HiDur_hal(U32 pwm_no, U16 DurVal); +void mt_set_pwm_LowDur_hal(U32 pwm_no, U16 DurVal); +void mt_set_pwm_GuardDur_hal(U32 pwm_no, U16 DurVal); +void mt_set_pwm_send_data0_hal(U32 pwm_no, U32 data); +void mt_set_pwm_send_data1_hal(U32 pwm_no, U32 data); +void mt_set_pwm_wave_num_hal(U32 pwm_no, U16 num); +void mt_set_pwm_data_width_hal(U32 pwm_no, U16 width); +void mt_set_pwm_thresh_hal(U32 pwm_no, U16 thresh); +S32 mt_get_pwm_send_wavenum_hal(U32 pwm_no); +void mt_set_intr_enable_hal(U32 pwm_intr_enable_bit); +S32 mt_get_intr_status_hal(U32 pwm_intr_status_bit); +void mt_set_intr_ack_hal(U32 pwm_intr_ack_bit); + +void mt_pwm_dump_regs_hal(void); + +void pwm_debug_store_hal(void); +void pwm_debug_show_hal(void); + +void mt_set_pwm_buf0_addr_hal(U32 pwm_no, U32 addr); +void mt_set_pwm_buf0_size_hal(U32 pwm_no, U16 size); + +#endif diff --git a/include/mach/mt_sec_export.h b/include/mach/mt_sec_export.h new file mode 100644 index 000000000..832891c26 --- /dev/null +++ b/include/mach/mt_sec_export.h @@ -0,0 +1,75 @@ +#ifndef SEC_EXPORT_H +#define SEC_EXPORT_H + +/************************************************************************** + * Security Module ERROR CODE + **************************************************************************/ +#define SEC_OK 0x0000 + + /* IMAGE CIPHER */ +#define ERR_IMAGE_CIPHER_KEY_ERR 0x1000 +#define ERR_IMAGE_CIPHER_IMG_NOT_FOUND 0x1001 +#define ERR_IMAGE_CIPHER_READ_FAIL 0x1002 +#define ERR_IMAGE_CIPHER_WRONG_OPERATION 0x1003 +#define ERR_IMAGE_CIPHER_DEC_TEST_ERROR 0x1004 +#define ERR_IMAGE_CIPHER_ENC_TEST_ERROR 0x1005 +#define ERR_IMAGE_CIPHER_HEADER_NOT_FOUND 0x1006 +#define ERR_IMAGE_CIPHER_DEC_Fail 0x1007 + + /* AUTH */ +#define ERR_AUTH_IMAGE_VERIFY_FAIL 0x2000 +#define ERR_AES_KEY_NOT_FOUND 0x2005 + + /* LIB */ +#define ERR_LIB_SEC_CFG_NOT_EXIST 0x3000 +#define ERR_LIB_VER_INVALID 0x3001 +#define ERR_LIB_SEC_CFG_ERASE_FAIL 0x3002 +#define ERR_LIB_SEC_CFG_CANNOT_WRITE 0x3003 + + /* SECURE DOWNLOAD / IMAGE VERIFICATION */ +#define ERR_IMG_VERIFY_THIS_IMG_INFO_NOT_EXIST 0x4000 +#define ERR_IMG_VERIFY_HASH_COMPARE_FAIL 0x4001 +#define ERR_IMG_VERIFY_NO_SPACE_ADD_IMG_INFO 0x4002 +#define ERR_SEC_DL_TOKEN_NOT_FOUND_IN_IMG 0x4003 +#define ERR_SEC_DL_FLOW_ERROR 0x4004 + + /* IMAGE DOWNLOAD LOCK */ +#define ERR_IMG_LOCK_TABLE_NOT_EXIST 0x5000 +#define ERR_IMG_LOCK_ALL_LOCK 0x5001 +#define ERR_IMG_LOCK_NO_SPACE_ADD_LOCK_INFO 0x5002 +#define ERR_IMG_LOCK_THIS_IMG_INFO_NOT_EXIST 0x5003 +#define ERR_IMG_LOCK_MAGIC_ERROR 0x5004 + + /* KERNEL DRIVER */ +#define ERR_KERNEL_CRYPTO_INVALID_MODE 0xA000 + +/************************************************************************** + * Security Module Enumeration + **************************************************************************/ +typedef enum { + SECRO_MD1 = 0, + SECRO_MD2, +} SECRO_USER; + +/************************************************************************** + * Security Module Export API + **************************************************************************/ +extern int masp_boot_init(void); +extern void masp_secure_algo(unsigned char Direction, unsigned char *ContentAddr, + unsigned int ContentLen, unsigned char *CustomSeed, + unsigned char *ResText); +extern unsigned char masp_secure_algo_init(void); +extern unsigned char masp_secure_algo_deinit(void); +extern int masp_ccci_signfmt_verify_file(char *file_path, unsigned int *data_offset, + unsigned int *data_sec_len); +extern int masp_ccci_version_info(void); +extern int masp_ccci_is_cipherfmt(int fp_id, unsigned int start_off, unsigned int *img_len); +extern int masp_ccci_decrypt_cipherfmt(int fp_id, unsigned int start_off, char *buf, + unsigned int buf_len, unsigned int *data_offset); +extern unsigned char masp_secro_en(void); +extern unsigned int masp_secro_md_len(unsigned char *md_info); +extern unsigned int masp_secro_md_get_data(unsigned char *md_info, unsigned char *buf, + unsigned int offset, unsigned int len); +extern unsigned int masp_secro_blk_sz(void); + +#endif /* SEC_EXPORT_H */ diff --git a/include/mach/mt_sec_hal.h b/include/mach/mt_sec_hal.h new file mode 100644 index 000000000..ca85f787e --- /dev/null +++ b/include/mach/mt_sec_hal.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2012 MediaTek, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MT_SEC_HAL_H__ +#define __MT_SEC_HAL_H__ + +typedef enum { + HACC_USER1 = 0, + HACC_USER2, + HACC_USER3, + HACC_USER4 +} HACC_USER; + +int masp_hal_get_uuid(unsigned int *uuid); +int masp_hal_sbc_enabled(void); +int masp_hal_get_sbc_checksum(unsigned int *pChecksum); +unsigned char masp_hal_secure_algo_init(void); +unsigned char masp_hal_secure_algo_deinit(void); +void masp_hal_secure_algo(unsigned char Direction, unsigned char *ContentAddr, + unsigned int ContentLen, unsigned char *CustomSeed, + unsigned char *ResText); +unsigned int masp_hal_sp_hacc_init(unsigned char *sec_seed, unsigned int size); +unsigned int masp_hal_sp_hacc_blk_sz(void); +unsigned char *masp_hal_sp_hacc_enc(unsigned char *buf, unsigned int size, unsigned char bAC, + HACC_USER user, unsigned char bDoLock); +unsigned char *masp_hal_sp_hacc_dec(unsigned char *buf, unsigned int size, unsigned char bAC, + HACC_USER user, unsigned char bDoLock); + +#endif /* !__MT_SEC_HAL_H__ */ diff --git a/include/mach/mt_sec_hal_tee.h b/include/mach/mt_sec_hal_tee.h new file mode 100644 index 000000000..64b68c92d --- /dev/null +++ b/include/mach/mt_sec_hal_tee.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2012 MediaTek, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MT_SEC_HAL_TEE_H__ +#define __MT_SEC_HAL_TEE_H__ + +typedef enum { + HACC_USER1 = 0, + HACC_USER2, + HACC_USER3, + HACC_USER4 +} HACC_USER; + +int masp_hal_get_uuid(unsigned int *uuid); +int masp_hal_sbc_enabled(void); +int masp_hal_get_sbc_checksum(unsigned int *pChecksum); +unsigned char masp_hal_secure_algo_init(void); +unsigned char masp_hal_secure_algo_deinit(void); +void masp_hal_secure_algo(unsigned char Direction, unsigned int ContentAddr, + unsigned int ContentLen, unsigned char *CustomSeed, + unsigned char *ResText); +unsigned int masp_hal_sp_hacc_init(unsigned char *sec_seed, unsigned int size); +unsigned int masp_hal_sp_hacc_blk_sz(void); +unsigned char *masp_hal_sp_hacc_enc(unsigned char *buf, unsigned int size, unsigned char bAC, + HACC_USER user, unsigned char bDoLock); +unsigned char *masp_hal_sp_hacc_dec(unsigned char *buf, unsigned int size, unsigned char bAC, + HACC_USER user, unsigned char bDoLock); + +#endif /* !__MT_SEC_HAL_H__ */ diff --git a/include/mach/mt_spi.h b/include/mach/mt_spi.h new file mode 100644 index 000000000..0e56c35e0 --- /dev/null +++ b/include/mach/mt_spi.h @@ -0,0 +1,95 @@ +#ifndef __MT_SPI_H__ +#define __MT_SPI_H__ + + +#include <linux/types.h> +#include <linux/io.h> +/******************************************************************************* +* define struct for spi driver +********************************************************************************/ +enum spi_sample_sel { + POSEDGE, + NEGEDGE +}; +enum spi_cs_pol { + ACTIVE_LOW, + ACTIVE_HIGH +}; + +enum spi_cpol { + SPI_CPOL_0, + SPI_CPOL_1 +}; + +enum spi_cpha { + SPI_CPHA_0, + SPI_CPHA_1 +}; + +enum spi_mlsb { + SPI_LSB, + SPI_MSB +}; + +enum spi_endian { + SPI_LENDIAN, + SPI_BENDIAN +}; + +enum spi_transfer_mode { + FIFO_TRANSFER, + DMA_TRANSFER, + OTHER1, + OTHER2, +}; + +enum spi_pause_mode { + PAUSE_MODE_DISABLE, + PAUSE_MODE_ENABLE +}; +enum spi_finish_intr { + FINISH_INTR_DIS, + FINISH_INTR_EN, +}; + +enum spi_deassert_mode { + DEASSERT_DISABLE, + DEASSERT_ENABLE +}; + +enum spi_ulthigh { + ULTRA_HIGH_DISABLE, + ULTRA_HIGH_ENABLE +}; + +enum spi_tckdly { + TICK_DLY0, + TICK_DLY1, + TICK_DLY2, + TICK_DLY3 +}; + +struct mt_chip_conf { + u32 setuptime; + u32 holdtime; + u32 high_time; + u32 low_time; + u32 cs_idletime; + u32 ulthgh_thrsh; + enum spi_sample_sel sample_sel; + enum spi_cs_pol cs_pol; + enum spi_cpol cpol; + enum spi_cpha cpha; + enum spi_mlsb tx_mlsb; + enum spi_mlsb rx_mlsb; + enum spi_endian tx_endian; + enum spi_endian rx_endian; + enum spi_transfer_mode com_mod; + enum spi_pause_mode pause; + enum spi_finish_intr finish_intr; + enum spi_deassert_mode deassert; + enum spi_ulthigh ulthigh; + enum spi_tckdly tckdly; +}; + +#endif diff --git a/include/mach/mt_storage_logger.h b/include/mach/mt_storage_logger.h new file mode 100644 index 000000000..09dbaab1a --- /dev/null +++ b/include/mach/mt_storage_logger.h @@ -0,0 +1,238 @@ +/* + * Copyright (C) 2011 MediaTek, Inc. + * + * Author: Holmes Chiou <holmes.chiou@mediatek.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MT_STORAGE_LOGGER_H__ +#define __MT_STORAGE_LOGGER_H__ + + +#define SLTAG "[StorageLogger]" +#define SLog_MSG(fmt, args...) \ +do { \ + printk(KERN_INFO SLTAG""fmt" <- %s(): L<%d> PID<%s><%d>\n", \ + ##args , __func__, __LINE__, current->comm, current->pid); \ +} while (0); + +#define STrace_MSG(fmt, args...) \ +do { \ + printk(KERN_INFO SLTAG""fmt" in PID<%s><%d>\n", \ + ##args, current->comm, current->pid); \ +} while (0); + +struct _loggerFuncName { + int FuncID; + char *FuncName; +}; + +struct _loggerMsgFormat { + int MsgID; + char *MsgFmt; + char *DispFmt; +}; + +enum Storage_Logger_MsgID { + STORAGE_LOGGER_MSG_FIRST_ONE = 0, + STORAGE_LOGGER_MSG_ISSUE_RQ = STORAGE_LOGGER_MSG_FIRST_ONE, + STORAGE_LOGGER_MSG_ISSUE_RQ_1, + STORAGE_LOGGER_MSG_SUBMITBIO, + STORAGE_LOGGER_MSG_VFS_SDCARD, + STORAGE_LOGGER_MSG_VFS_SDCARD_END, + STORAGE_LOGGER_MSG_VFS_OPEN_SDCARD, + STORAGE_LOGGER_MSG_VFS_OPEN_SDCARD_END, + STORAGE_LOGGER_MSG_VFS_INTFS, + STORAGE_LOGGER_MSG_VFS_INTFS_END, + STORAGE_LOGGER_MSG_VFS_OPEN_INTFS, + STORAGE_LOGGER_MSG_VFS_OPEN_INTFS_END, + STORAGE_LOGGER_MSG_IOSCHED1, + STORAGE_LOGGER_MSG_IOSCHED2, + STORAGE_LOGGER_MSG_MSDC_DO, + STORAGE_LOGGER_MSG_MSDC_DO_END, + STORAGE_LOGGER_MSG_GET_REQUEST, + STORAGE_LOGGER_MSG_GET_REQUEST_END, + STORAGE_LOGGER_MSG_LAST_ONE, /* MUST BE THE LAST STORAGE MSG ID */ + + USB_LOGGER_MSG_FIRST_ONE = STORAGE_LOGGER_MSG_LAST_ONE + 1, + USB_LOGGER_MSG_MUSB_INTERRUPT = USB_LOGGER_MSG_FIRST_ONE, + USB_LOGGER_MSG_MUSB_STAGE0_IRQ, + USB_LOGGER_MSG_MUSB_G_EP0_IRQ, + USB_LOGGER_MSG_TXSTATE, + USB_LOGGER_MSG_TXSTATE_END, + USB_LOGGER_MSG_MUSB_G_TX, + USB_LOGGER_MSG_MUSB_G_RX, + USB_LOGGER_MSG_MUSB_READ_SETUP, + USB_LOGGER_MSG_FORWARD_TO_DRIVER, + USB_LOGGER_MSG_COMPOSITE_SETUP, + USB_LOGGER_MSG_USB_ADD_FUNCTION, + USB_LOGGER_MSG_SET_CONFIG, + USB_LOGGER_MSG_DEVICE_DESCRIPTOR, + USB_LOGGER_MSG_INTERFACE_DESCRIPTOR, + USB_LOGGER_MSG_ENDPOINT_DESCRIPTOR, + USB_LOGGER_MSG_ANDROID_WORK, + USB_LOGGER_MSG_GS_RX_PUSH, + USB_LOGGER_MSG_GS_START_TX, + USB_LOGGER_MSG_ACM_SETUP, + USB_LOGGER_MSG_ACM_SET_ALT, + USB_LOGGER_MSG_ACM_BIND, + USB_LOGGER_MSG_GS_OPEN, + USB_LOGGER_MSG_GS_CLOSE, + USB_LOGGER_MSG_ACM_CDC_LINE_CODING, + USB_LOGGER_MSG_STRING, + USB_LOGGER_MSG_HEX_NUM, + USB_LOGGER_MSG_DEC_NUM, + USB_LOGGER_MSG_LAST_ONE, /* MUST BE THE LAST USB MSG ID */ + + THRML_LOGGER_MSG_FIRST_ONE = USB_LOGGER_MSG_LAST_ONE + 1, + THRML_LOGGER_MSG_STRING = THRML_LOGGER_MSG_FIRST_ONE, + THRML_LOGGER_MSG_HEX_NUM, + THRML_LOGGER_MSG_DEC_NUM, + THRML_LOGGER_MSG_BIND, + THRML_LOGGER_MSG_ZONE_TEMP, + THRML_LOGGER_MSG_COOL_STAE, + THRML_LOGGER_MSG_TRIP_POINT, + THRML_LOGGER_MSG_BATTERY_INFO, + THRML_LOGGER_MSG_CPU_INFO, + THRML_LOGGER_MSG_CPU_INFO_EX, + THRML_LOGGER_MSG_MISC_INFO, + THRML_LOGGER_MSG_MISC_EX_INFO, + THRML_LOGGER_MSG_LAST_ONE, + + LOGGER_MSG_ID_MAX = THRML_LOGGER_MSG_LAST_ONE /* THE WHOLE ENUM LAST ONE */ +}; + +/*========STORAGE PART========*/ +enum Storage_LogAPI { + STORAGE_LOG_API___submit_bio__func = 0, + STORAGE_LOG_API___mmc_blk_issue_rq__func, + STORAGE_LOG_API___do_sys_open__func, + STORAGE_LOG_API___vfs_read__func, + STORAGE_LOG_API___vfs_write__func, + STORAGE_LOG_API___msdc_do_request__func, + STORAGE_LOG_API___msdc_ops_request__func, + STORAGE_LOG_API___io_schedule__func, + STORAGE_LOG_API___get_request_wait__func, + STORAGE_LOG_API___get_request__func, + STORAGE_LOG_API___make_request__func, + STORAGE_LOG_API___MAX__func +}; + +/*========USB PART========*/ +enum usb_func_string_index { + USB_FUNC_STRING_INDEX_MUSB_INTERRUPT = 0, + USB_FUNC_STRING_INDEX_MUSB_STAGE0_IRQ, + USB_FUNC_STRING_INDEX_MUSB_G_EP0_IRQ, + USB_FUNC_STRING_INDEX_TXSTATE, + USB_FUNC_STRING_INDEX_MUSB_G_TX, + USB_FUNC_STRING_INDEX_MUSB_G_RX, + USB_FUNC_STRING_INDEX_MUSB_READ_SETUP, + USB_FUNC_STRING_INDEX_FORWARD_TO_DRIVER, + USB_FUNC_STRING_INDEX_COMPOSITE_SETUP, + USB_FUNC_STRING_INDEX_USB_ADD_FUNCTION, + USB_FUNC_STRING_INDEX_SET_CONFIG, + USB_FUNC_STRING_INDEX_CONFIG_BUF, + USB_FUNC_STRING_INDEX_USB_DESCRIPTOR_FILLBUF, + USB_FUNC_STRING_INDEX_ANDROID_WORK, + USB_FUNC_STRING_INDEX_GS_RX_PUSH, + USB_FUNC_STRING_INDEX_GS_START_TX, + USB_FUNC_STRING_INDEX_ACM_SETUP, + USB_FUNC_STRING_INDEX_ACM_SET_ALT, + USB_FUNC_STRING_INDEX_ACM_BIND, + USB_FUNC_STRING_INDEX_GS_OPEN, + USB_FUNC_STRING_INDEX_GS_CLOSE, + USB_FUNC_STRING_INDEX_ACM_COMPLETE_SET_LINE, + USB_FUNC_STRING_INDEX_ADB_READ, + USB_FUNC_STRING_INDEX_ADB_WRITE, + USB_FUNC_STRING_INDEX_MAX +}; +/*========Thermal PART========*/ +enum thermal_func_string_index { + /* Thermal API INDEX */ + THRML_FID_bind = 0, + THRML_FID_unbind, + THRML_FID_get_temp, + THRML_FID_get_mode, + THRML_FID_set_mode, + THRML_FID_get_trip_type, /* 5 */ + THRML_FID_get_trip_temp, + THRML_FID_get_crit_temp, + /* Cooling API INDEX */ + THRML_FID_get_max_state, + THRML_FID_get_cur_state, + THRML_FID_set_cur_state, /* 10 */ + /* Battery API INDEX */ + THRML_FID_get_battery_info, + THRML_FID_get_cpu_info, + THRML_FID_get_real_time, + THRML_FID_get_cpu_info_ex, /* /< JB only, ICS not support */ + THRML_FID_get_misc_info, /* /< JB only, ICS not support */ + THRML_FID_get_misc_ex_info, /* /< JB only, ICS not support */ + THRML_FID_MAX +}; +/*========================*/ + +enum logger_type { + LOGGER_TYPE_START = 0, + LOGGER_TYPE_STORAGE = LOGGER_TYPE_START, + LOGGER_TYPE_USB, + LOGGER_TYPE_THRML, + LOGGER_TYPE_END +}; + +#if defined(CONFIG_MT_ENG_BUILD) /* engineering mode */ + +#define CREATE_PROC_ENTRY(proc, x, y, z, o) proc = proc_create(x, y, z, o) + +#else + +#define CREATE_PROC_ENTRY(proc, x, y, z, o) + +#endif + +/* + * add the api to disable the storage logger + */ +extern void storage_logger_switch(bool enabled); + +extern void add_trace(enum logger_type type, unsigned int msg_id, + unsigned int line_cnt, unsigned int func_id, ...); + +/*========STORAGE PART========*/ +extern bool dumpMMCqd(void); +extern bool dumpBlkLayer(void); +extern bool dumpVFS(void); +extern bool dumpMSDC(void); +extern bool ioschedule_dump(void); +/*======= File System PART========*/ +extern int dumpFsRecTime(void); + +#define AddStorageTrace(msg_id, name, ...) \ + add_trace(LOGGER_TYPE_STORAGE, msg_id, __LINE__, \ + STORAGE_LOG_API___##name##__func, __VA_ARGS__); +/*========USB PART========*/ +extern bool is_dump_musb(void); +extern bool is_dump_usb_gadget(void); + +#define ADD_USB_TRACE(func_id, name, ...) \ + add_trace(LOGGER_TYPE_USB, USB_LOGGER_MSG_##func_id, __LINE__, \ + USB_FUNC_STRING_INDEX_##name, __VA_ARGS__); + +/*======Thermal PART======*/ +extern bool is_dump_mthermal(void); + +#define AddThrmlTrace(msg_id, name, ...) \ + add_trace(LOGGER_TYPE_THRML, msg_id, __LINE__, \ + THRML_FID_##name, __VA_ARGS__); + +/*========================*/ +#endif /* !__MT_STORAGE_LOGGER_H__ */ diff --git a/include/mach/mt_sys_cirq.h b/include/mach/mt_sys_cirq.h new file mode 100644 index 000000000..ee88a5b48 --- /dev/null +++ b/include/mach/mt_sys_cirq.h @@ -0,0 +1,66 @@ +#ifndef __CIRQ_H__ +#define __CIRQ_H__ + +#define MT_EDGE_SENSITIVE 0 +#define MT_LEVEL_SENSITIVE 1 + +/* + * Define hardware register + */ +#define CIRQ_STA_BASE (SYS_CIRQ_BASE + 0x000) +#define CIRQ_ACK_BASE (SYS_CIRQ_BASE + 0x040) +#define CIRQ_MASK_BASE (SYS_CIRQ_BASE + 0x080) +#define CIRQ_MASK_SET_BASE (SYS_CIRQ_BASE + 0x0C0) +#define CIRQ_MASK_CLR_BASE (SYS_CIRQ_BASE + 0x100) +#define CIRQ_SENS_BASE (SYS_CIRQ_BASE + 0x140) +#define CIRQ_SENS_SET_BASE (SYS_CIRQ_BASE + 0x180) +#define CIRQ_SENS_CLR_BASE (SYS_CIRQ_BASE + 0x1C0) +#define CIRQ_POL_BASE (SYS_CIRQ_BASE + 0x200) +#define CIRQ_POL_SET_BASE (SYS_CIRQ_BASE + 0x240) +#define CIRQ_POL_CLR_BASE (SYS_CIRQ_BASE + 0x280) +#define CIRQ_CON (SYS_CIRQ_BASE + 0x300) + +/* + * Register placement + */ +#define CIRQ_CON_EN_BITS (0) +#define CIRQ_CON_EDGE_ONLY_BITS (1) +#define CIRQ_CON_FLUSH_BITS (2) +#define CIRQ_CON_EVENT_BITS (31) +#define CIRQ_CON_BITS_MASK (0x7) + +/* + * Register setting + */ +#define CIRQ_CON_EN (0x1) +#define CIRQ_CON_EDGE_ONLY (0x1) +#define CIRQ_CON_FLUSH (0x1) + +/* + * Define constant + */ +//#define CIRQ_IRQ_NUM (168) // !!! Porting !!! Don't include cirq_event_b +#define CIRQ_CTRL_REG_NUM ((CIRQ_IRQ_NUM + 31) / 32) +//#define CIRQ_SPI_START (72) // !!! Porting !!! + +#define MT_CIRQ_POL_NEG (0) +#define MT_CIRQ_POL_POS (1) + +/* + * Define macro + */ +#define IRQ_TO_CIRQ_NUM(irq) ((irq) - (GIC_PRIVATE_SIGNALS + CIRQ_SPI_START)) +#define CIRQ_TO_IRQ_NUM(cirq) ((cirq) + (GIC_PRIVATE_SIGNALS + CIRQ_SPI_START)) + +/* + * Define function prototypes. + */ +void mt_cirq_enable(void); +void mt_cirq_disable(void); +void mt_cirq_clone_gic(void); +void mt_cirq_flush(void); +#if 0 +void mt_cirq_wfi_func(void); +#endif + +#endif /*!__CIRQ_H__ */ diff --git a/include/mach/mtk_hibernate_dpm.h b/include/mach/mtk_hibernate_dpm.h new file mode 100644 index 000000000..3f246d4e7 --- /dev/null +++ b/include/mach/mtk_hibernate_dpm.h @@ -0,0 +1,40 @@ +#ifndef __MTK_HIBERNATE_DPM_H +#define __MTK_HIBERNATE_DPM_H + +#include <linux/device.h> + +/* -------------other configure-------------------------// */ +#define MAX_CB_FUNCS (10) + +/* -------------error code define-----------------------// */ +#define E_NO_EXIST (-1) +#define E_PARAM (-2) + +typedef enum { + ID_M_BEGIN = 0, + ID_M_DEVAPC = 0, + ID_M_VCODEC = 1, + ID_M_SPC = 2, + ID_M_MSDC = 3, + ID_M_MALI = 4, + ID_M_GPU = 4, + ID_M_MJC = 5, + ID_M_CONNSYS = 6, + ID_M_END = MAX_CB_FUNCS, +} KERN_FUNC_ID; + +/* -------------structure define------------------------// */ +typedef int (*swsusp_cb_func_t) (struct device *device); +typedef struct { + KERN_FUNC_ID id; + swsusp_cb_func_t func; + struct device *device; +} swsusp_cb_func_info; + +/* -----------------export function declaration----------------------------// */ +int register_swsusp_restore_noirq_func(unsigned int id, swsusp_cb_func_t func, + struct device *device); +int unregister_swsusp_restore_noirq_func(unsigned int id); +int exec_swsusp_restore_noirq_func(unsigned int id); + +#endif diff --git a/include/mach/mtk_memcfg.h b/include/mach/mtk_memcfg.h new file mode 100644 index 000000000..a05ec54f4 --- /dev/null +++ b/include/mach/mtk_memcfg.h @@ -0,0 +1,36 @@ +#ifndef __MTK_MEMCFG_H__ +#define __MTK_MEMCFG_H__ + +/* late warning flags */ +#define WARN_MEMBLOCK_CONFLICT (1 << 0) /* memblock overlap */ +#define WARN_MEMSIZE_CONFLICT (1 << 1) /* dram info missing */ +#define WARN_API_NOT_INIT (1 << 2) /* API is not initialized */ + +#ifdef CONFIG_MTK_MEMCFG + +#define MTK_MEMCFG_LOG_AND_PRINTK(fmt, arg...) \ + do { \ + printk(fmt, ##arg); \ + mtk_memcfg_write_memory_layout_buf(fmt, ##arg); \ + } while (0) + +extern void mtk_memcfg_write_memory_layout_buf(char *, ...); +extern void mtk_memcfg_late_warning(unsigned long); + +#else + +#define MTK_MEMCFG_LOG_AND_PRINTK(fmt, arg...) \ + do { \ + printk(fmt, ##arg); \ + } while (0) + +#define mtk_memcfg_get_force_inode_gfp_lowmem() do { } while (0) +#define mtk_memcfg_set_force_inode_gfp_lowmem(flag) do { } while (0) +#define mtk_memcfg_get_bypass_slub_debug_flag() do { } while (0) +#define mtk_memcfg_set_bypass_slub_debug_flag(flag) do { } while (0) +#define mtk_memcfg_write_memory_layout_buf(fmt, arg...) do { } while (0) +#define mtk_memcfg_late_warning(flag) do { } while (0) + +#endif /* end CONFIG_MTK_MEMCFG */ + +#endif /* end __MTK_MEMCFG_H__ */ diff --git a/include/mach/mtk_meminfo.h b/include/mach/mtk_meminfo.h new file mode 100644 index 000000000..5930d4b6a --- /dev/null +++ b/include/mach/mtk_meminfo.h @@ -0,0 +1,11 @@ +#ifndef __MTK_MEMINFO_H__ +#define __MTK_MEMINFO_H__ + +/* physical offset */ +extern phys_addr_t get_phys_offset(void); +/* physical DRAM size */ +extern phys_addr_t get_max_DRAM_size(void); +/* DRAM size controlled by kernel */ +extern phys_addr_t get_memory_size(void); + +#endif /* end __MTK_MEMINFO_H__ */ diff --git a/include/mach/mtk_rtc.h b/include/mach/mtk_rtc.h new file mode 100644 index 000000000..555b47265 --- /dev/null +++ b/include/mach/mtk_rtc.h @@ -0,0 +1,81 @@ +#ifndef MTK_RTC_H +#define MTK_RTC_H + +#include <linux/ioctl.h> +#include <linux/rtc.h> +#include <mach/mt_typedefs.h> + +typedef enum { + RTC_GPIO_USER_WIFI = 8, + RTC_GPIO_USER_GPS = 9, + RTC_GPIO_USER_BT = 10, + RTC_GPIO_USER_FM = 11, + RTC_GPIO_USER_PMIC = 12, +} rtc_gpio_user_t; + +#ifdef CONFIG_MTK_RTC + +/* + * NOTE: + * 1. RTC_GPIO always exports 32K enabled by some user even if the phone is powered off + */ + +extern unsigned long rtc_read_hw_time(void); +extern void rtc_gpio_enable_32k(rtc_gpio_user_t user); +extern void rtc_gpio_disable_32k(rtc_gpio_user_t user); +extern bool rtc_gpio_32k_status(void); + +/* for AUDIOPLL (deprecated) */ +extern void rtc_enable_abb_32k(void); +extern void rtc_disable_abb_32k(void); + +/* NOTE: used in Sleep driver to workaround Vrtc-Vore level shifter issue */ +extern void rtc_enable_writeif(void); +extern void rtc_disable_writeif(void); + +extern void rtc_mark_recovery(void); +#if defined(CONFIG_MTK_KERNEL_POWER_OFF_CHARGING) +extern void rtc_mark_kpoc(void); +#endif +extern void rtc_mark_fast(void); +extern u16 rtc_rdwr_uart_bits(u16 *val); + +extern void rtc_bbpu_power_down(void); + +extern void rtc_read_pwron_alarm(struct rtc_wkalrm *alm); + + +extern int get_rtc_spare_fg_value(void); +extern int set_rtc_spare_fg_value(int val); + +extern void rtc_irq_handler(void); + +extern bool crystal_exist_status(void); + +#else +#define rtc_read_hw_time() ({ 0; }) +#define rtc_gpio_enable_32k(user) do {} while (0) +#define rtc_gpio_disable_32k(user) do {} while (0) +#define rtc_gpio_32k_status() do {} while (0) +#define rtc_enable_abb_32k() do {} while (0) +#define rtc_disable_abb_32k() do {} while (0) +#define rtc_enable_writeif() do {} while (0) +#define rtc_disable_writeif() do {} while (0) +#define rtc_mark_recovery() do {} while (0) +#if defined(CONFIG_MTK_KERNEL_POWER_OFF_CHARGING) +#define rtc_mark_kpoc() do {} while (0) +#endif +#define rtc_mark_fast() do {} while (0) +#define rtc_rdwr_uart_bits(val) ({ 0; }) +#define rtc_bbpu_power_down() do {} while (0) +#define rtc_read_pwron_alarm(alm) do {} while (0) + +#define get_rtc_spare_fg_value() ({ 0; }) +#define set_rtc_spare_fg_value(val) ({ 0; }) + +#define rtc_irq_handler() do {} while (0) + +#define crystal_exist_status() do {} while (0) +#endif + +#endif diff --git a/include/mach/mtk_thermal_ext_control.h b/include/mach/mtk_thermal_ext_control.h new file mode 100644 index 000000000..eac6bc713 --- /dev/null +++ b/include/mach/mtk_thermal_ext_control.h @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2009 Travis Geiselbrecht + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files + * (the "Software"), to deal in the Software without restriction, + * including without limitation the rights to use, copy, modify, merge, + * publish, distribute, sublicense, and/or sell copies of the Software, + * and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _MTK_THERMAL_EXT_CONTROL_H +#define _MTK_THERMAL_EXT_CONTROL_H + +#define THERMAL_MD32_IPI_MSG_BASE 0x1F00 +#define THERMAL_AP_IPI_MSG_BASE 0x2F00 + +typedef enum { + THERMAL_AP_IPI_MSG_SET_TZ_THRESHOLD = THERMAL_AP_IPI_MSG_BASE, + THERMAL_AP_IPI_MSG_MD32_START, + + THERMAL_MD32_IPI_MSG_READY = THERMAL_MD32_IPI_MSG_BASE, + THERMAL_MD32_IPI_MSG_MD32_START_ACK, + THERMAL_MD32_IPI_MSG_REACH_THRESHOLD, +} thermal_ipi_msg_id; + +typedef enum { +/* MTK_THERMAL_EXT_SENSOR_CPU = 0, */ + MTK_THERMAL_EXT_SENSOR_ABB = 0, + MTK_THERMAL_EXT_SENSOR_PMIC, + MTK_THERMAL_EXT_SENSOR_BATTERY, + MTK_THERMAL_EXT_SENSOR_COUNT +} MTK_THERMAL_EXT_SENSOR_ID; + +typedef struct { + int id; /* id of this tz */ + int polling_delay; /* polling delay of this tz */ + long high_trip_point; /* high threshold of this tz */ + long low_trip_point; /* low threshold of this tz */ +} thermal_zone_data; + +typedef struct { + int id; /* id of this tz */ + long high_trip_point; /* high threshold of this tz */ + long low_trip_point; /* low threshold of this tz */ + long temperature; /* Current temperature gotten from TS */ +} thermal_zone_status; + +typedef struct { + short id; + union { + thermal_zone_data tz; + thermal_zone_status tz_status; + } data; +} thermal_ipi_msg; + +#endif /* _MTK_THERMAL_EXT_CONTROL_H */ diff --git a/include/mach/mtk_thermal_monitor.h b/include/mach/mtk_thermal_monitor.h new file mode 100644 index 000000000..2acd45594 --- /dev/null +++ b/include/mach/mtk_thermal_monitor.h @@ -0,0 +1,73 @@ +#ifndef _MTK_THERMAL_MONITOR_H +#define _MTK_THERMAL_MONITOR_H + +#include <linux/thermal.h> + +/* + * MTK_THERMAL_WRAPPER_BYPASS = 1 (use original Linux Thermal API) + * MTK_THERMAL_WRAPPER_BYPASS = 0 (use MTK Thermal API Monitor) + */ +#define MTK_THERMAL_WRAPPER_BYPASS 0 + +#if MTK_THERMAL_WRAPPER_BYPASS +/* Original LTF API */ +#define mtk_thermal_zone_device_register thermal_zone_device_register +#define mtk_thermal_zone_device_unregister thermal_zone_device_unregister +#define mtk_thermal_cooling_device_unregister thermal_cooling_device_unregister +#define mtk_thermal_cooling_device_register thermal_cooling_device_register +#define mtk_thermal_zone_bind_cooling_device thermal_zone_bind_cooling_device + +#else + +extern +struct thermal_zone_device *mtk_thermal_zone_device_register_wrapper + (char *type, + int trips, + void *devdata, + const struct thermal_zone_device_ops *ops, + int tc1, int tc2, int passive_delay, int polling_delay); + +extern +void mtk_thermal_zone_device_unregister_wrapper(struct thermal_zone_device *tz); + +extern +struct thermal_cooling_device *mtk_thermal_cooling_device_register_wrapper + (char *type, void *devdata, const struct thermal_cooling_device_ops *ops); + +extern +void mtk_thermal_cooling_device_unregister_wrapper(struct thermal_cooling_device *cdev); + +extern int mtk_thermal_zone_bind_cooling_device_wrapper + (struct thermal_zone_device *tz, int trip, struct thermal_cooling_device *cdev); + +extern int mtk_thermal_zone_bind_trigger_trip(struct thermal_zone_device *tz, int trip, int mode); +#define mtk_thermal_zone_device_register mtk_thermal_zone_device_register_wrapper +#define mtk_thermal_zone_device_unregister mtk_thermal_zone_device_unregister_wrapper +#define mtk_thermal_cooling_device_unregister mtk_thermal_cooling_device_unregister_wrapper +#define mtk_thermal_cooling_device_register mtk_thermal_cooling_device_register_wrapper +#define mtk_thermal_zone_bind_cooling_device mtk_thermal_zone_bind_cooling_device_wrapper + +#endif + +typedef enum { + MTK_THERMAL_SENSOR_CPU = 0, + MTK_THERMAL_SENSOR_ABB, + MTK_THERMAL_SENSOR_PMIC, + MTK_THERMAL_SENSOR_BATTERY, + MTK_THERMAL_SENSOR_MD1, + MTK_THERMAL_SENSOR_MD2, + MTK_THERMAL_SENSOR_WIFI, + MTK_THERMAL_SENSOR_BATTERY2, + MTK_THERMAL_SENSOR_BUCK, + MTK_THERMAL_SENSOR_AP, + MTK_THERMAL_SENSOR_PCB1, + MTK_THERMAL_SENSOR_PCB2, + MTK_THERMAL_SENSOR_SKIN, + MTK_THERMAL_SENSOR_XTAL, + + MTK_THERMAL_SENSOR_COUNT +} MTK_THERMAL_SENSOR_ID; + +extern int mtk_thermal_get_temp(MTK_THERMAL_SENSOR_ID id); + +#endif diff --git a/include/mach/mtk_thermal_platform.h b/include/mach/mtk_thermal_platform.h new file mode 100644 index 000000000..49273ec00 --- /dev/null +++ b/include/mach/mtk_thermal_platform.h @@ -0,0 +1,34 @@ +#ifndef _MTK_THERMAL_PLATFORM_H +#define _MTK_THERMAL_PLATFORM_H + +#include <linux/thermal.h> + +extern +int mtk_thermal_get_cpu_info(int *nocores, int **cpufreq, int **cpuloading); + +extern +int mtk_thermal_get_gpu_info(int *nocores, int **gpufreq, int **gpuloading); + +extern +int mtk_thermal_get_batt_info(int *batt_voltage, int *batt_current, int *batt_temp); + +extern +int mtk_thermal_get_extra_info(int *no_extra_attr, + char ***attr_names, int **attr_values, char ***attr_unit); + +extern +int mtk_thermal_force_get_batt_temp(void); + + +enum { + MTK_THERMAL_SCEN_CALL = 0x1 +}; + +extern +unsigned int mtk_thermal_set_user_scenarios(unsigned int mask); + +extern +unsigned int mtk_thermal_clear_user_scenarios(unsigned int mask); + + +#endif /* _MTK_THERMAL_PLATFORM_H */ diff --git a/include/mach/mtk_thermal_trace.h b/include/mach/mtk_thermal_trace.h new file mode 100644 index 000000000..74081a0ab --- /dev/null +++ b/include/mach/mtk_thermal_trace.h @@ -0,0 +1,35 @@ +#undef TRACE_SYSTEM +#define TRACE_SYSTEM thermal + +#if !defined(_MTK_THERMAL_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) +#define _MTK_THERMAL_TRACE_H + +#include <linux/tracepoint.h> + +TRACE_EVENT(cooling_device_state, + TP_PROTO(int device, unsigned long state), + TP_ARGS(device, state), TP_STRUCT__entry(__field(int, device) + __field(unsigned long, state) + ), + TP_fast_assign(__entry->device = device; + __entry->state = state;), + TP_printk("cooling_device=%d, state=%lu\n", __entry->device, __entry->state) + ); + +TRACE_EVENT(thermal_zone_state, + TP_PROTO(int device, int state), + TP_ARGS(device, state), TP_STRUCT__entry(__field(int, device) + __field(int, state) + ), + TP_fast_assign(__entry->device = device; + __entry->state = state;), + TP_printk("thermal_zone=%d, state=%d\n", __entry->device, __entry->state) + ); + +#endif /* _MTK_THERMAL_TRACE_H */ + +/* This part must be outside protection */ +#undef TRACE_INCLUDE_PATH +#define TRACE_INCLUDE_PATH . +#define TRACE_INCLUDE_FILE mach/mtk_thermal_trace +#include <trace/define_trace.h> diff --git a/include/mach/sec_osal.h b/include/mach/sec_osal.h new file mode 100644 index 000000000..f3e76afe4 --- /dev/null +++ b/include/mach/sec_osal.h @@ -0,0 +1,68 @@ +#ifndef SEC_OSAL_H +#define SEC_OSAL_H + +/************************************************************************** + * Operating System Abstract Layer - ERROR Definition + **************************************************************************/ +#define OSAL_FILE_NULL (0) +#define OSAL_FILE_OPEN_FAIL (-1) +#define OSAL_FILE_CLOSE_FAIL (-2) +#define OSAL_FILE_SEEK_FAIL (-3) +#define OSAL_FILE_GET_POS_FAIL (-4) +#define OSAL_FILE_READ_FAIL (-5) + + +/************************************************************************** + * Operating System Abstract Layer - External Function + **************************************************************************/ +extern void osal_kfree(void *buf); +extern void *osal_kmalloc(unsigned int size); +extern unsigned long osal_copy_from_user(void *to, void *from, unsigned long size); +extern unsigned long osal_copy_to_user(void *to, void *from, unsigned long size); +extern int osal_hacc_lock(void); +extern void osal_hacc_unlock(void); +extern int osal_verify_lock(void); +extern void osal_verify_unlock(void); +extern int osal_secro_lock(void); +extern void osal_secro_unlock(void); +extern int osal_secro_v5_lock(void); +extern void osal_secro_v5_unlock(void); +extern int osal_mtd_lock(void); +extern void osal_mtd_unlock(void); +extern int osal_rid_lock(void); +extern void osal_rid_unlock(void); +extern void osal_msleep(unsigned int msec); +extern void osal_assert(unsigned int val); +extern int osal_set_kernel_fs(void); +extern void osal_restore_fs(void); +extern int osal_filp_open_read_only(const char *file_path); +extern void *osal_get_filp_struct(int fp_id); +extern int osal_filp_close(int fp_id); +extern long long osal_filp_seek_set(int fp_id, long long off); +extern long long osal_filp_seek_end(int fp_id, long long off); +extern long long osal_filp_pos(int fp_id); +extern long osal_filp_read(int fp_id, char *buf, unsigned long len); +extern long osal_is_err(int fp_id); + +/************************************************************************** + * Operating System Abstract Layer - Macro + **************************************************************************/ +#define SEC_ASSERT(a) osal_assert(a) + +#define ASF_FILE int +#define ASF_FILE_NULL OSAL_FILE_NULL +#define ASF_GET_DS osal_set_kernel_fs(); +#define ASF_PUT_DS osal_restore_fs(); +#define ASF_OPEN(file_name) osal_filp_open_read_only(file_name) +#define ASF_FILE_ERROR(fp) (fp == OSAL_FILE_NULL) +#define ASF_CLOSE(fp) osal_filp_close(fp) +#define ASF_SEEK_SET(fp, off) osal_filp_seek_set(fp, off) +#define ASF_SEEK_END(fp, off) osal_filp_seek_end(fp, off) +#define ASF_FILE_POS(fp) osal_filp_pos(fp) +#define ASF_MALLOC(len) osal_kmalloc(len) +#define ASF_FREE(buf) osal_kfree(buf) +#define ASF_READ(fp, buf, len) osal_filp_read(fp, buf, len) +#define ASF_STRTOK(str, delim) strsep(&str, delim) +#define ASF_IS_ERR(fp) osal_is_err(fp) + +#endif /* SEC_OSAL_H */ diff --git a/include/mach/viatel_rawbulk.h b/include/mach/viatel_rawbulk.h new file mode 100644 index 000000000..06b8dd089 --- /dev/null +++ b/include/mach/viatel_rawbulk.h @@ -0,0 +1,207 @@ +/* + * Rawbulk Driver from VIA Telecom + * + * Copyright (C) 2011 VIA Telecom, Inc. + * Author: Karfield Chen (kfchen@via-telecom.com) + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __RAWBULK_H__ +#define __RAWBULK_H__ + +#include <linux/usb.h> +#include <linux/usb/ch9.h> +#include <linux/usb/composite.h> +#include <linux/usb/gadget.h> +#include <linux/wakelock.h> +#include <linux/workqueue.h> +#include <linux/device.h> +#include <linux/tty.h> +#include <linux/tty_driver.h> +#include <linux/workqueue.h> +#include <linux/kthread.h> +#include <linux/wait.h> +#include <linux/sched.h> + +#define INTF_DESC 0 +#define BULKIN_DESC 1 +#define BULKOUT_DESC 2 +#define MAX_DESC_ARRAY 4 + +#define NAME_BUFFSIZE 64 +#define MAX_ATTRIBUTES 10 + +#define MAX_TTY_RX 8 +#define MAX_TTY_RX_PACKAGE 512 +#define MAX_TTY_TX 8 +#define MAX_TTY_TX_PACKAGE 512 + +//#define CONFIG_EVDO_DT_VIA_SUPPORT +#ifdef CONFIG_EVDO_DT_VIA_SUPPORT +enum transfer_id { + RAWBULK_TID_MODEM, + RAWBULK_TID_ETS, + RAWBULK_TID_AT, + RAWBULK_TID_PCV, + RAWBULK_TID_GPS, + _MAX_TID +}; +#else +enum transfer_id { + RAWBULK_TID_PCV, + RAWBULK_TID_MODEM, + RAWBULK_TID_ETS, + RAWBULK_TID_AT, + RAWBULK_TID_GPS, + _MAX_TID +}; +#endif + +struct rawbulk_function { + int transfer_id; + const char *longname; + const char *shortname; + struct device *dev; + + /* Controls */ + spinlock_t lock; + int enable:1; + int activated:1; /* set when usb enabled */ + int tty_opened:1; + + int initialized:1; /* init-flag for activator worker */ + struct work_struct activator; /* asynic transaction starter */ + + struct wake_lock keep_awake; + + /* USB Gadget related */ + struct usb_function function; + struct usb_composite_dev *cdev; + struct usb_ep *bulk_out, *bulk_in; + + int rts_state; /* Handshaking pins (outputs) */ + int dtr_state; + int cts_state; /* Handshaking pins (inputs) */ + int dsr_state; + int dcd_state; + int ri_state; + + /* TTY related */ + struct tty_struct *tty; + int tty_minor; + struct tty_port port; + spinlock_t tx_lock; + struct list_head tx_free; + struct list_head tx_inproc; + spinlock_t rx_lock; + struct list_head rx_free; + struct list_head rx_inproc; + struct list_head rx_throttled; + unsigned int last_pushed; + struct workqueue_struct *tty_push_wq; + struct work_struct tty_push_work; + int tty_throttled; + /* Transfer Controls */ + int nups; + int ndowns; + int upsz; + int downsz; + /* int splitsz; */ + int autoreconn; + int pushable; /* Set to use push-way for upstream */ + int cbp_reset; + /* Descriptors and Strings */ + struct usb_descriptor_header *fs_descs[MAX_DESC_ARRAY]; + struct usb_descriptor_header *hs_descs[MAX_DESC_ARRAY]; + struct usb_string string_defs[2]; + struct usb_gadget_strings string_table; + struct usb_gadget_strings *strings[2]; + struct usb_interface_descriptor interface; + struct usb_endpoint_descriptor fs_bulkin_endpoint; + struct usb_endpoint_descriptor hs_bulkin_endpoint; + struct usb_endpoint_descriptor fs_bulkout_endpoint; + struct usb_endpoint_descriptor hs_bulkout_endpoint; + + /* Sysfs Accesses */ + int max_attrs; + struct device_attribute attr[MAX_ATTRIBUTES]; +}; + +typedef void (*rawbulk_autoreconn_callback_t) (int transfer_id); + +/* bind/unbind host interfaces */ +int rawbulk_bind_sdio_channel(int transfer_id); +void rawbulk_unbind_sdio_channel(int transfer_id); + +struct rawbulk_function *rawbulk_lookup_function(int transfer_id); + +/* rawbulk tty io */ +int rawbulk_register_tty(struct rawbulk_function *fn); +void rawbulk_unregister_tty(struct rawbulk_function *fn); + +int rawbulk_tty_stop_io(struct rawbulk_function *fn); +int rawbulk_tty_start_io(struct rawbulk_function *fn); +int rawbulk_tty_alloc_request(struct rawbulk_function *fn); +void rawbulk_tty_free_request(struct rawbulk_function *fn); + +/* bind/unbind for gadget */ +int rawbulk_bind_function(int transfer_id, struct usb_function *function, + struct usb_ep *bulk_out, struct usb_ep *bulk_in, + rawbulk_autoreconn_callback_t autoreconn_callback); +void rawbulk_unbind_function(int trasfer_id); +int rawbulk_check_enable(struct rawbulk_function *fn); +void rawbulk_disable_function(struct rawbulk_function *fn); + +/* operations for transactions */ +int rawbulk_start_transactions(int transfer_id, int nups, int ndowns, int upsz, int downsz); +void rawbulk_stop_transactions(int transfer_id); + +int rawbulk_push_upstream_buffer(int transfer_id, const void *buffer, unsigned int length); +int rawbulk_transfer_statistics(int transfer_id, char *buf); +int rawbulk_transfer_state(int transfer_id); + +extern int modem_dtr_set(int on, int low_latency); +extern int modem_dcd_state(void); +extern int sdio_buffer_push(int port_num, const unsigned char *buf, int count); +extern int sdio_rawbulk_intercept(int port_num, unsigned int inception); + +/* debug mechanism */ +extern unsigned int c2k_usb_dbg_level; /* refer to rawbulk_transfer.c */ +static inline int c2k_dbg_level(unsigned level) +{ + return c2k_usb_dbg_level >= level; +} + +#define C2K_LOG_EMERG 0 +#define C2K_LOG_ALERT 1 +#define C2K_LOG_CRIT 2 +#define C2K_LOG_ERR 3 +#define C2K_LOG_WARN 4 +#define C2K_LOG_NOTICE 5 +#define C2K_LOG_INFO 6 +#define C2K_LOG_DBG 7 + +#define C2K_USB_DBG_ON +#ifdef C2K_USB_DBG_ON +#define C2K_ERR(format, args...) do {if(c2k_dbg_level(C2K_LOG_ERR)){printk(KERN_WARNING "C2K_USB_ERR,<%s %d>, " format , __func__, __LINE__ , ## args);}}while(0) +#define C2K_WARN(format, args...) do {if(c2k_dbg_level(C2K_LOG_WARN)){printk(KERN_WARNING "C2K_USB_WARN,<%s %d>, " format , __func__, __LINE__ , ## args);}}while(0) +#define C2K_NOTE(format, args...) do {if(c2k_dbg_level(C2K_LOG_NOTICE)){printk(KERN_WARNING "C2K_USB_NOTE,<%s %d>, " format , __func__, __LINE__ , ## args);}}while(0) +#define C2K_INFO(format, args...) do {if(c2k_dbg_level(C2K_LOG_INFO)){printk(KERN_WARNING "C2K_USB_INFO,<%s %d>, " format , __func__, __LINE__ , ## args);}}while(0) +#define C2K_DBG(format, args...) do {if(c2k_dbg_level(C2K_LOG_DBG)){printk(KERN_WARNING "C2K_USB_DBG,<%s %d>, " format , __func__, __LINE__ , ## args);}}while(0) +#else +#define C2K_ERR(format, args...) do {}while(0) +#define C2K_WARN(format, args...) do {}while(0) +#define C2K_INFO(format, args...) do {}while(0) +#define C2K_DBG(format, args...) do {}while(0) +#endif + +#endif /* __RAWBULK_HEADER_FILE__ */ diff --git a/include/mach/vow_api.h b/include/mach/vow_api.h new file mode 100644 index 000000000..7a2db18b8 --- /dev/null +++ b/include/mach/vow_api.h @@ -0,0 +1,8 @@ +#ifndef __VOW_API_H__ +#define __VOW_API_H__ + +int VowDrv_ChangeStatus(void); +int VowDrv_EnableHW(int status); +void VowDrv_SetDmicLowPower(bool enable); +void VowDrv_SetSmartDevice(void); +#endif //__VOW_API__
\ No newline at end of file diff --git a/include/mach/wd_api.h b/include/mach/wd_api.h new file mode 100644 index 000000000..0c7cb3b74 --- /dev/null +++ b/include/mach/wd_api.h @@ -0,0 +1,60 @@ +#ifndef _MT_WD_API_H_ +#define _MT_WD_API_H_ +/* WD MODE MARK BIT */ +#define MTK_WDT_REQ_DEBUG_EN_MARK (0x80000) +#define MTK_WDT_REQ_SPM_THERMAL_MARK (0x0001) +#define MTK_WDT_REQ_SPM_SCPSYS_MARK (0x0002) +#define MTK_WDT_REQ_THERMAL_MARK (1<<18) + +typedef enum ext_wdt_mode { + WDT_IRQ_ONLY_MODE, + WDT_HW_REBOOT_ONLY_MODE, + WDT_DUAL_MODE, +} WD_MODE; + +typedef enum wk_wdt_en { + WK_WDT_DIS, + WK_WDT_EN, +} WD_CTL; + + +typedef enum wd_restart_type { + WD_TYPE_NORMAL, + WD_TYPE_NOLOCK, +} WD_RES_TYPE; + +typedef enum wk_req_en { + WD_REQ_DIS, + WD_REQ_EN, +} WD_REQ_CTL; + +typedef enum wk_req_mode { + WD_REQ_IRQ_MODE, + WD_REQ_RST_MODE, +} WD_REQ_MODE; + +struct wd_api { + long ready; + int (*wd_restart) (enum wd_restart_type type); + int (*wd_cpu_hot_plug_on_notify) (int); + int (*wd_cpu_hot_plug_off_notify) (int); + int (*wd_sw_reset) (int); + int (*wd_config) (enum ext_wdt_mode, int timeout_val); + int (*wd_disable_ext) (void); + int (*wd_disable_local) (void); + int (*wd_disable_all) (void); + int (*wd_set_mode) (enum ext_wdt_mode); + int (*wd_aee_confirm_hwreboot) (void); + void (*wd_suspend_notify) (void); + void (*wd_resume_notify) (void); + unsigned int (*wd_get_check_bit) (void); + unsigned int (*wd_get_kick_bit) (void); + int (*wd_spmwdt_mode_config) (WD_REQ_CTL en, WD_REQ_MODE mode); + int (*wd_thermal_mode_config) (WD_REQ_CTL en, WD_REQ_MODE mode); + int (*wd_dram_reserved_mode) (bool enabled); + int (*wd_thermal_direct_mode_config) (WD_REQ_CTL en, WD_REQ_MODE mode); +}; + +int wd_api_init(void); +int get_wd_api(struct wd_api **obj); +#endif /* _MT_WD_API_H_ */ |