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authorMeizu OpenSource <patchwork@meizu.com>2016-08-15 10:19:42 +0800
committerMeizu OpenSource <patchwork@meizu.com>2016-08-15 10:19:42 +0800
commitd2e1446d81725c351dc73a03b397ce043fb18452 (patch)
tree4dbc616b7f92aea39cd697a9084205ddb805e344 /drivers/misc/mediatek/dual_ccci/include
downloadandroid_kernel_m2note-d2e1446d81725c351dc73a03b397ce043fb18452.tar.gz
first commit
Diffstat (limited to 'drivers/misc/mediatek/dual_ccci/include')
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci.h134
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_cfg.h50
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_ch.h88
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_chrdev.h112
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_common.h357
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_err_no.h83
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_fs.h44
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_ipc.h127
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_ipc_task_ID.h40
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_layer.h313
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_md.h447
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_pmic.h84
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_rpc.h79
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccci_tty.h30
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccif.h73
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccmni_net.h205
-rw-r--r--drivers/misc/mediatek/dual_ccci/include/ccmni_pfp.h120
17 files changed, 2386 insertions, 0 deletions
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci.h b/drivers/misc/mediatek/dual_ccci/include/ccci.h
new file mode 100644
index 000000000..ee72b8fbf
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci.h
@@ -0,0 +1,134 @@
+#ifndef __CCCI_H__
+#define __CCCI_H__
+#include <ccci_common.h>
+typedef void (*ccci_aed_cb_t)(unsigned int flag, char* aed_str);
+/******************************************************************************/
+/** mdlogger mode define **/
+/******************************************************************************/
+typedef enum {
+ MODE_UNKNOWN = -1, // -1
+ MODE_IDLE, // 0
+ MODE_USB, // 1
+ MODE_SD, // 2
+ MODE_POLLING, // 3
+ MODE_WAITSD, // 4
+}LOGGING_MODE;
+
+//==================================================================================
+// IOCTL commands
+//==================================================================================
+// CCCI == EEMCS
+#define CCCI_IOC_MAGIC 'C'
+#define CCCI_IOC_MD_RESET _IO(CCCI_IOC_MAGIC, 0) // mdlogger // META // muxreport
+#define CCCI_IOC_GET_MD_STATE _IOR(CCCI_IOC_MAGIC, 1, unsigned int) // audio
+#define CCCI_IOC_PCM_BASE_ADDR _IOR(CCCI_IOC_MAGIC, 2, unsigned int) // audio
+#define CCCI_IOC_PCM_LEN _IOR(CCCI_IOC_MAGIC, 3, unsigned int) // audio
+#define CCCI_IOC_FORCE_MD_ASSERT _IO(CCCI_IOC_MAGIC, 4) // muxreport // mdlogger
+#define CCCI_IOC_ALLOC_MD_LOG_MEM _IO(CCCI_IOC_MAGIC, 5) // mdlogger
+#define CCCI_IOC_DO_MD_RST _IO(CCCI_IOC_MAGIC, 6) // md_init
+#define CCCI_IOC_SEND_RUN_TIME_DATA _IO(CCCI_IOC_MAGIC, 7) // md_init
+#define CCCI_IOC_GET_MD_INFO _IOR(CCCI_IOC_MAGIC, 8, unsigned int) // md_init
+#define CCCI_IOC_GET_MD_EX_TYPE _IOR(CCCI_IOC_MAGIC, 9, unsigned int) // mdlogger
+#define CCCI_IOC_SEND_STOP_MD_REQUEST _IO(CCCI_IOC_MAGIC, 10) // muxreport
+#define CCCI_IOC_SEND_START_MD_REQUEST _IO(CCCI_IOC_MAGIC, 11) // muxreport
+#define CCCI_IOC_DO_STOP_MD _IO(CCCI_IOC_MAGIC, 12) // md_init
+#define CCCI_IOC_DO_START_MD _IO(CCCI_IOC_MAGIC, 13) // md_init
+#define CCCI_IOC_ENTER_DEEP_FLIGHT _IO(CCCI_IOC_MAGIC, 14) // RILD // factory
+#define CCCI_IOC_LEAVE_DEEP_FLIGHT _IO(CCCI_IOC_MAGIC, 15) // RILD // factory
+#define CCCI_IOC_POWER_ON_MD _IO(CCCI_IOC_MAGIC, 16) // md_init
+#define CCCI_IOC_POWER_OFF_MD _IO(CCCI_IOC_MAGIC, 17) // md_init
+#define CCCI_IOC_POWER_ON_MD_REQUEST _IO(CCCI_IOC_MAGIC, 18)
+#define CCCI_IOC_POWER_OFF_MD_REQUEST _IO(CCCI_IOC_MAGIC, 19)
+#define CCCI_IOC_SIM_SWITCH _IOW(CCCI_IOC_MAGIC, 20, unsigned int) // RILD // factory
+#define CCCI_IOC_SEND_BATTERY_INFO _IO(CCCI_IOC_MAGIC, 21) // md_init
+#define CCCI_IOC_SIM_SWITCH_TYPE _IOR(CCCI_IOC_MAGIC, 22, unsigned int) // RILD
+#define CCCI_IOC_STORE_SIM_MODE _IOW(CCCI_IOC_MAGIC, 23, unsigned int) // RILD
+#define CCCI_IOC_GET_SIM_MODE _IOR(CCCI_IOC_MAGIC, 24, unsigned int) // RILD
+#define CCCI_IOC_RELOAD_MD_TYPE _IO(CCCI_IOC_MAGIC, 25) // META // md_init // muxreport
+#define CCCI_IOC_GET_SIM_TYPE _IOR(CCCI_IOC_MAGIC, 26, unsigned int) // terservice
+#define CCCI_IOC_ENABLE_GET_SIM_TYPE _IOW(CCCI_IOC_MAGIC, 27, unsigned int) // terservice
+#define CCCI_IOC_SEND_ICUSB_NOTIFY _IOW(CCCI_IOC_MAGIC, 28, unsigned int) // icusbd
+#define CCCI_IOC_SET_MD_IMG_EXIST _IOW(CCCI_IOC_MAGIC, 29, unsigned int) // md_init
+#define CCCI_IOC_GET_MD_IMG_EXIST _IOR(CCCI_IOC_MAGIC, 30, unsigned int)
+#define CCCI_IOC_GET_MD_TYPE _IOR(CCCI_IOC_MAGIC, 31, unsigned int) // RILD
+#define CCCI_IOC_STORE_MD_TYPE _IOW(CCCI_IOC_MAGIC, 32, unsigned int) // RILD
+#define CCCI_IOC_GET_MD_TYPE_SAVING _IOR(CCCI_IOC_MAGIC, 33, unsigned int) // META
+#define CCCI_IOC_GET_EXT_MD_POST_FIX _IOR(CCCI_IOC_MAGIC, 34, char[32]) // eemcs_fsd // mdlogger
+#define CCCI_IOC_FORCE_FD _IOW(CCCI_IOC_MAGIC, 35, unsigned int) // RILD(6577)
+#define CCCI_IOC_AP_ENG_BUILD _IOW(CCCI_IOC_MAGIC, 36, unsigned int) // md_init(6577)
+#define CCCI_IOC_GET_MD_MEM_SIZE _IOR(CCCI_IOC_MAGIC, 37, unsigned int) // md_init(6577)
+#define CCCI_IOC_UPDATE_SIM_SLOT_CFG _IOW(CCCI_IOC_MAGIC, 38, unsigned int) // RILD
+#define CCCI_IOC_GET_CFG_SETTING _IOW(CCCI_IOC_MAGIC, 39, unsigned int) // md_init
+
+#define CCCI_IOC_SET_MD_SBP_CFG _IOW(CCCI_IOC_MAGIC, 40, unsigned int) // md_init
+#define CCCI_IOC_GET_MD_SBP_CFG _IOW(CCCI_IOC_MAGIC, 41, unsigned int) // md_init
+#define CCCI_IOC_GET_MD_PROTOCOL_TYPE _IOR(CCCI_IOC_MAGIC, 42, char[16]) /*metal tool to get modem protocol type: AP_TST or DHL*/
+
+
+//==================================================================================
+// API functions exported in ccci
+//==================================================================================
+int ccci_md_ctrl_init(int md_id);
+void ccci_md_ctrl_exit(int md_id);
+int ccci_chrdev_init(int md_id);
+void ccci_chrdev_exit(int md_id);
+int ccci_tty_init(int md_id);
+void ccci_tty_exit(int md_id);
+int ccci_ipc_init(int md_id);
+void ccci_ipc_exit(int md_id);
+int ccci_rpc_init(int md_id);
+void ccci_rpc_exit(int md_id);
+int ccci_fs_init(int md_id);
+void ccci_fs_exit(int md_id);
+int ccmni_init(int md_id);
+void ccmni_exit(int md_id);
+int ccci_vir_chrdev_init(int md_id);
+void ccci_vir_chrdev_exit(int md_id);
+int init_ccci_dev_node(void);
+void release_ccci_dev_node(void);
+int mk_ccci_dev_node(int md_id);
+void ccci_dev_node_exit(int md_id);
+int statistics_init(int md_id);
+void statistics_exit(int md_id);
+
+
+int get_dev_id_by_md_id(int md_id, char node_name[], int *major, int* minor);
+int get_md_id_by_dev_major(int dev_major);
+int init_ccci_dev_node(void);
+int send_md_reset_notify(int);
+int ccci_trigger_md_assert(int);
+
+int get_md_exception_type(int md_id);
+int send_md_stop_notify(int md_id);
+int send_md_start_notify(int md_id);
+int ccci_start_modem(int md_id);
+int ccci_stop_modem(int md_id, unsigned int timeout);
+int ccci_set_reload_modem(int md_id);
+int ccci_send_run_time_data(int md_id);
+int statistics_init_ch_dir(int md_sys_id, int ch, int dir, char *name);
+void dump_logical_layer_tx_rx_histroy(int md_id);
+void logic_layer_ch_record_dump(int md_id, int ch);
+void add_logic_layer_record(int md_id, ccci_msg_t *data, int drop);
+void ccci_dump_logic_layer_info(int md_id, unsigned int buf[], int len);
+void ccci_dump_hw_reg_val(int md_id, unsigned int buf[], int len);
+int send_enter_flight_mode_request(int md_id);
+int send_leave_flight_mode_request(int md_id);
+int send_power_on_md_request(int md_id);
+int send_power_down_md_request(int md_id);
+int send_update_cfg_request(int md_id, unsigned int val);
+int ccci_md_ctrl_common_init(void);
+int bind_to_low_layer_notify(int md_id, void (*isr_func)(int), void (*send_func)(int, unsigned int));
+ccif_t* ccif_create_instance(ccif_hw_info_t *info, void* ctl_b, int md_id);
+int register_ccci_attr_func(const char *buf, ssize_t (*show)(char*), ssize_t (*store)(const char*,size_t));
+int get_common_cfg_setting(int md_id, int cfg[], int *num);
+//==================================================================================
+// API functions for IPO-H
+//==================================================================================
+int ccci_uart_ipo_h_restore(int md_id);
+int ccci_ipc_ipo_h_restore(int md_id);
+int ccmni_ipo_h_restore(int md_id);
+int ccci_ipo_h_restore(int md_id, char buf[], unsigned int len);
+
+int ccci_misc_ipo_h_restore(int md_id);
+
+#endif //__CCCI_H__ \ No newline at end of file
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_cfg.h b/drivers/misc/mediatek/dual_ccci/include/ccci_cfg.h
new file mode 100644
index 000000000..22e5c2f5e
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_cfg.h
@@ -0,0 +1,50 @@
+#ifndef __CCCI_CFG_H__
+#define __CCCI_CFG_H__
+
+#include <ccci_ch.h>
+
+
+/*******************************************************************/
+/** ccci version define and explanation **/
+/*******************************************************************/
+//v1.4 20120618: add dual ccci design for MT6589 and enhance ccci driver architecture
+#define CCCI_VERSION "v1.4 20120618"
+
+
+/*******************************************************************/
+/** ccci configure macro define **/
+/*******************************************************************/
+#define CCCI_MAX_CHANNEL (100)
+
+
+#define CCCI_WAKEUP_LOCK_NAME_LEN (16)
+
+#define MDLOGGER_FILE_PATH "/data/mdl/mdl_config"
+
+#define IMG_INF_LEN (256)
+
+#define EE_BUF_LEN (256)
+
+#define EE_TIMER_BASE (HZ)
+
+#define CCCI_NODE_TYPE_NUM (10)
+#define NET_PORT_NUM (4)
+
+// Total must less than 255
+#define STD_CHR_DEV_NUM CCCI_MAX_CH_NUM //(50) //notes: STD_CHR_DEV_NUM must be not less than CCCI_MAX_CH_NUM
+#define IPC_DEV_NUM (20)
+#define FS_DEV_NUM (10)
+#define VIR_CHR_DEV_NUM (10)
+#define TTY_DEV_NUM (10)
+#define RPC_DEV_NUM (10)
+
+#define CCCI_MAX_VCHR_NUM (10)
+#define CCCI_VIR_CHR_KFIFO_SIZE (16)
+
+
+/*******************************************************************/
+/** Feature options **/
+/*******************************************************************/
+//#define USING_PRINTK_LOG
+
+#endif//__CCCI_CFG_H__ \ No newline at end of file
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_ch.h b/drivers/misc/mediatek/dual_ccci/include/ccci_ch.h
new file mode 100644
index 000000000..97d7e9dfd
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_ch.h
@@ -0,0 +1,88 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_ch.h
+ *
+ * Project:
+ * --------
+ * YuSu
+ *
+ * Description:
+ * ------------
+ * MT6516 CCCI channel definitions
+ *
+ * Author:
+ * -------
+ * CC Hwang (mtk00702)
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_CH_H__
+#define __CCCI_CH_H__
+
+typedef enum _ccci_ch{
+ CCCI_CONTROL_RX = 0,
+ CCCI_CONTROL_TX = 1,
+ CCCI_SYSTEM_RX = 2,
+ CCCI_SYSTEM_TX = 3,
+ CCCI_PCM_RX = 4,
+ CCCI_PCM_TX = 5,
+ CCCI_UART1_RX = 6,
+ CCCI_UART1_RX_ACK = 7,
+ CCCI_UART1_TX = 8,
+ CCCI_UART1_TX_ACK = 9,
+ CCCI_UART2_RX = 10,
+ CCCI_UART2_RX_ACK = 11,
+ CCCI_UART2_TX = 12,
+ CCCI_UART2_TX_ACK = 13,
+ CCCI_FS_RX = 14,
+ CCCI_FS_TX = 15,
+ CCCI_PMIC_RX = 16,
+ CCCI_PMIC_TX = 17,
+ CCCI_UEM_RX = 18,
+ CCCI_UEM_TX = 19,
+ CCCI_CCMNI1_RX = 20,
+ CCCI_CCMNI1_RX_ACK = 21,
+ CCCI_CCMNI1_TX = 22,
+ CCCI_CCMNI1_TX_ACK = 23,
+ CCCI_CCMNI2_RX = 24,
+ CCCI_CCMNI2_RX_ACK = 25,
+ CCCI_CCMNI2_TX = 26,
+ CCCI_CCMNI2_TX_ACK = 27,
+ CCCI_CCMNI3_RX = 28,
+ CCCI_CCMNI3_RX_ACK = 29,
+ CCCI_CCMNI3_TX = 30,
+ CCCI_CCMNI3_TX_ACK = 31,
+ CCCI_RPC_RX = 32,
+ CCCI_RPC_TX = 33,
+ CCCI_IPC_RX = 34,
+ CCCI_IPC_RX_ACK = 35,
+ CCCI_IPC_TX = 36,
+ CCCI_IPC_TX_ACK = 37,
+ CCCI_IPC_UART_RX = 38,
+ CCCI_IPC_UART_RX_ACK = 39,
+ CCCI_IPC_UART_TX = 40,
+ CCCI_IPC_UART_TX_ACK = 41,
+ CCCI_MD_LOG_RX = 42,
+ CCCI_MD_LOG_TX = 43,
+#ifdef CONFIG_MTK_ICUSB_SUPPORT
+ CCCI_ICUSB_RX = 44,
+ CCCI_ICUSB_RX_ACK = 45,
+ CCCI_ICUSB_TX = 46,
+ CCCI_ICUSB_TX_ACK = 47,
+#endif
+
+ // MAX Channel
+ CCCI_MAX_CH_NUM,
+
+ // Force modem assert channel id
+ CCCI_FORCE_ASSERT_CH = 20090215,
+
+ // Monitor channel
+ CCCI_MONITOR_CH = 0xf0000000,
+ // CCCI_INVALID_CH_ID
+ CCCI_INVALID_CH_ID = 0xffffffff,
+}ccci_ch_t;
+
+#endif //__CCCI_CH_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_chrdev.h b/drivers/misc/mediatek/dual_ccci/include/ccci_chrdev.h
new file mode 100644
index 000000000..4d055d550
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_chrdev.h
@@ -0,0 +1,112 @@
+#ifndef __CCCI_CHRDEV_H__
+#define __CCCI_CHRDEV_H__
+#include <linux/list.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <asm/atomic.h>
+#include <linux/cdev.h>
+#include <ccci_layer.h>
+
+
+#define MAX_BUFFER_MESSAGES ((1<<20)/sizeof(CCCI_BUFF_T))
+#define DEFAULT_BUFFER (CCCI_FIFO_MAX_LEN*2)
+
+#define recv_array_is_full(array) ({ \
+ unsigned int __nr=(array)->nr; \
+ unsigned int __idx=(array)->in_idx; \
+ WARN_ON(__idx>__nr); \
+ __nr==__idx ; })
+
+#define recv_array_is_empty(array) ({ \
+ unsigned int __nr=(array)->in_idx; \
+ unsigned int __idx=(array)->out_idx; \
+ WARN_ON(__idx>__nr); \
+ __nr==__idx ; })
+
+#define reset_recv_array(array) ({ \
+ (array)->in_idx=0; \
+ (array)->out_idx=0; })
+
+
+#define get_first_entry(list,type,mem) ({ \
+ type * __ret;\
+ if (list_empty(list)) __ret=NULL;\
+ else __ret=list_entry((list)->next,type,mem);\
+ __ret; })
+
+#define get_last_entry(list,type,mem) ({ \
+ type * __ret;\
+ if (list_empty(list)) __ret=NULL;\
+ else __ret=list_entry((list)->prev,type,mem);\
+ __ret; })
+
+#define ccci_get_first(_list) get_first_entry(_list,struct recv_array,list)
+#define ccci_get_last(_list) get_last_entry(_list,struct recv_array,list)
+#define ccci_is_last_recv(list) list_is_last((list)->next,list)
+
+
+struct recv_array{
+ CCCI_BUFF_T *array;
+ unsigned int nr;
+ unsigned int in_idx;
+ unsigned int out_idx;
+ struct list_head list;
+};
+
+struct ccci_dev_client{
+ spinlock_t lock;
+ atomic_t user;
+ pid_t pid;
+ int ch_num;
+ struct list_head dev_list;
+ wait_queue_head_t wait_q;
+ int md_id;
+ void *ctlb;
+ struct fasync_struct *fasync;
+ volatile unsigned int wakeup_waitq;
+};
+
+typedef struct _chr_ctl_block
+{
+ int md_id;
+ struct mutex chr_dev_mutex;
+ struct list_head chr_dev_list;
+ struct cdev ccci_chrdev;
+ int major;
+ int minor;
+}chr_ctl_block_t;
+
+
+typedef struct _ccci_vir_client{
+ spinlock_t lock;
+ atomic_t user;
+ pid_t pid;
+ int index;
+ struct list_head dev_list;
+ wait_queue_head_t wait_q;
+ int md_id;
+ void *ctlb;
+ struct fasync_struct *fasync;
+ volatile unsigned int wakeup_waitq;
+ struct kfifo private_fifo;
+ int fifo_ready;
+}ccci_vir_client_t;
+
+typedef struct _vir_chr_ctl_block
+{
+ int md_id;
+ struct mutex chr_dev_mutex;
+ struct list_head chr_dev_list;
+ struct cdev ccci_chrdev;
+ int major;
+ int minor;
+ spinlock_t bind_lock;
+ ccci_vir_client_t *system_msg_client;
+}vir_ctl_block_t;
+
+
+extern int ccci_chrdev_init(int);
+extern void ccci_chrdev_exit(int);
+
+
+#endif //__CCCI_CHRDEV_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_common.h b/drivers/misc/mediatek/dual_ccci/include/ccci_common.h
new file mode 100644
index 000000000..e528763b4
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_common.h
@@ -0,0 +1,357 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_common.h
+ *
+ * Project:
+ * --------
+ *
+ *
+ * Description:
+ * ------------
+ *
+ * Author:
+ * -------
+ *
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_COMMON_H__
+#define __CCCI_COMMON_H__
+#include <linux/xlog.h>
+#include <ccci_cfg.h>
+#include <ccci_err_no.h>
+#include <ccci_md.h>
+#include <ccci_layer.h>
+#include <ccci_rpc.h>
+#include <ccci_ipc.h>
+#include <ccci_fs.h>
+#include <ccmni_net.h>
+#include <ccci_platform_cfg.h>
+#include <mach/mtk_ccci_helper.h>
+//==================================================================================
+// debug log define
+//==================================================================================
+/*---------------------------alway on log-----------------------------------*/
+
+#define pr_fmt(fmt) "["KBUILD_MODNAME"]"fmt
+
+#define CCCI_MSG(fmt, args...) pr_notice("[com] (0)" fmt, ##args)
+#define CCCI_MSG_INF(idx, tag, fmt, args...) pr_notice("[" tag "] (%d)" fmt, (idx+1), ##args)
+#define CCCI_DBG_MSG(idx, tag, fmt, args...) pr_debug("[" tag "] (%d)" fmt, (idx+1), ##args)
+#define CCCI_DBG_COM_MSG(fmt, args...) pr_notice("[com] (0)" fmt, ##args)
+#define CCCI_ERR(fmt, args...) pr_err("[err] (0)" fmt, ##args)
+#define CCCI_ERR_INF(idx, tag, fmt, args...) pr_err("[" tag "] (%d)" fmt, (idx+1), ##args)
+
+
+/*---------------------------Switchable log--------------------------------*/
+/* Debug message switch */
+#define CCCI_DBG_NONE (0x00000000) /* No debug log */
+#define CCCI_DBG_CTL (0x00000001) /* Control log */
+#define CCCI_DBG_TTY (0x00000002) /* TTY channel log */
+#define CCCI_DBG_FS (0x00000004) /* FS channel log */
+#define CCCI_DBG_RPC (0x00000008) /* RPC channel log */
+#define CCCI_DBG_IPC (0x00000010) /* IPC channel log */
+#define CCCI_DBG_PMIC (0x00000020) /* PMIC channel log */
+#define CCCI_DBG_CCMNI (0x00000040) /* CCMIN channel log */
+#define CCCI_DBG_FUNC (0x00000080) /* Functiong entry log */
+#define CCCI_DBG_MISC (0x00000100) /* Misc log */
+#define CCCI_DBG_CHR (0x00000200) /* Char dev log */
+#define CCCI_DBG_CCIF (0x00000400) /* Ccif log */
+#define CCCI_DBG_ALL (0xffffffff)
+
+#define ENABLE_ALL_RX_LOG (1ULL<<63)
+
+/*---------------------------------------------------------------------------*/
+/* Switchable messages */
+extern unsigned int ccci_msg_mask[];
+
+#ifdef USING_PRINTK_LOG
+
+#define CCCI_FILTER_MSG(mask, fmt, args...) \
+do { \
+ if ((CCCI_DBG_##mask) & ccci_msg_mask ) \
+ printk("[ccci]" fmt , ##args); \
+} while(0)
+
+#define CCCI_CTL_MSG(fmt, args...) CCCI_FILTER_MSG(CTL, "<ctl>"fmt, ##args)
+#define CCCI_TTY_MSG(fmt, args...) CCCI_FILTER_MSG(TTY, "<tty>"fmt, ##args)
+#define CCCI_FS_MSG(fmt, args...) CCCI_FILTER_MSG(FS, "<fs>"fmt, ##args)
+#define CCCI_RPC_MSG(fmt, args...) CCCI_FILTER_MSG(RPC, "<rpc>"fmt, ##args)
+#define CCCI_IPC_MSG(fmt, args...) CCCI_FILTER_MSG(IPC, "<ipc>"fmt, ##args)
+#define CCCI_PMIC_MSG(fmt, args...) CCCI_FILTER_MSG(PMIC, "<pmic>"fmt, ##args)
+#define CCCI_FUNC_ENTRY(f) CCCI_FILTER_MSG(FUNC, "%s\n", __FUNCTION__)
+#define CCCI_MISC_MSG(fmt, args...) CCCI_FILTER_MSG(MISC, fmt, ##args)
+#define CCCI_CHR_MSG(fmt, args...) CCCI_FILTER_MSG(CHR, "<chr>"fmt, ##args)
+#define CCCI_CCIF_MSG(fmt, args...) CCCI_FILTER_MSG(CCIF, "<chr>"fmt, ##args)
+#define CCCI_CCMNI_MSG(fmt, args...) CCCI_FILTER_MSG(CCMNI, "<ccmni>"fmt, ##args)
+
+#else
+#define CCCI_FILTER_MSG(mask, tag, idx, fmt, args...) \
+do { \
+ if ((CCCI_DBG_##mask) & ccci_msg_mask[idx] ) \
+ CCCI_MSG_INF(idx, tag, fmt, ##args); \
+} while(0)
+
+#define CCCI_CTL_MSG(idx, fmt, args...) CCCI_FILTER_MSG(CTL, "/ctl", idx, fmt, ##args)
+#define CCCI_TTY_MSG(idx, fmt, args...) CCCI_FILTER_MSG(TTY, "/tty", idx, fmt, ##args)
+#define CCCI_FS_MSG(idx, fmt, args...) CCCI_FILTER_MSG(FS, "/fs ", idx, fmt, ##args)
+#define CCCI_RPC_MSG(idx, fmt, args...) CCCI_FILTER_MSG(RPC, "/rpc", idx, fmt, ##args)
+#define CCCI_IPC_MSG(idx, fmt, args...) CCCI_FILTER_MSG(IPC, "/ipc", idx, fmt, ##args)
+#define CCCI_PMIC_MSG(idx, fmt, args...) CCCI_FILTER_MSG(PMIC, "/pmc", idx, fmt, ##args)
+#define CCCI_FUNC_ENTRY(idx) CCCI_FILTER_MSG(FUNC, "/fun", idx, "%s\n", __FUNCTION__)
+#define CCCI_MISC_MSG(idx, fmt, args...) CCCI_FILTER_MSG(MISC, "/mis", idx, fmt, ##args)
+#define CCCI_CHR_MSG(idx, fmt, args...) CCCI_FILTER_MSG(CHR, "/chr", idx, fmt, ##args)
+#define CCCI_CCIF_MSG(idx, fmt, args...) CCCI_FILTER_MSG(CCIF, "/cci", idx, fmt, ##args)
+#define CCCI_CCMNI_MSG(idx, fmt, args...) CCCI_FILTER_MSG(CCMNI, "/net", idx, fmt, ##args)
+#endif
+
+
+
+//==================================================================================
+// AEE function and macro define
+//==================================================================================
+#define CCCI_AED_DUMP_EX_MEM (1<<0)
+#define CCCI_AED_DUMP_MD_IMG_MEM (1<<1)
+#define CCCI_AED_DUMP_CCIF_REG (1<<2)
+
+void ccci_aed(int, unsigned int, char *);
+
+
+//==================================================================================
+// ccci related macro and structure define
+//==================================================================================
+#define CAN_BE_RELOAD (0x1<<1)
+#define LOAD_ONE_TIME (0x1<<0)
+#define LOAD_ALL_IMG (LOAD_ONE_TIME|CAN_BE_RELOAD)
+#define RELOAD_ONLY (CAN_BE_RELOAD)
+
+#define CCCI_LOG_TX 0
+#define CCCI_LOG_RX 1
+
+#define DBG_FLAG_DEBUG (1<<0)
+#define DBG_FLAG_JTAG (1<<1)
+
+
+enum {
+ MD_DEBUG_REL_INFO_NOT_READY = 0,
+ MD_IS_DEBUG_VERSION,
+ MD_IS_RELEASE_VERSION
+};
+
+typedef enum _ccif_type
+{
+ CCIF_STD_V1=0, // 16 channel ccif, tx 8, rx 8
+ CCIF_VIR, // Virtual CCIF type
+}ccif_type_t;
+
+typedef struct _ccif_hw_info
+{
+ unsigned long reg_base;
+ unsigned long md_reg_base;
+ unsigned int irq_id;
+ unsigned int irq_attr;
+ ccif_type_t type;
+ unsigned int md_id;
+}ccif_hw_info_t;
+
+typedef struct _rpc_cfg_inf
+{
+ int rpc_ch_num;
+ int rpc_max_buf_size;
+}rpc_cfg_inf_t;
+
+
+
+//==================================================================================
+// share memory layout define
+//==================================================================================
+//share memory table
+typedef struct _smem_alloc
+{
+ // Share memory
+ unsigned int ccci_smem_size;
+ unsigned int ccci_smem_vir;
+ unsigned int ccci_smem_phy;
+ // -- Log
+ unsigned int ccci_mdlog_smem_base_virt;
+ unsigned int ccci_mdlog_smem_base_phy;
+ unsigned int ccci_mdlog_smem_size;
+ // -- PCM
+ unsigned int ccci_pcm_smem_base_virt;
+ unsigned int ccci_pcm_smem_base_phy;
+ unsigned int ccci_pcm_smem_size;
+ // -- PMIC
+ unsigned int ccci_pmic_smem_base_virt;
+ unsigned int ccci_pmic_smem_base_phy;
+ unsigned int ccci_pmic_smem_size;
+ // -- FS
+ unsigned int ccci_fs_smem_base_virt;
+ unsigned int ccci_fs_smem_base_phy;
+ unsigned int ccci_fs_smem_size;
+ // -- RPC
+ unsigned int ccci_rpc_smem_base_virt;
+ unsigned int ccci_rpc_smem_base_phy;
+ unsigned int ccci_rpc_smem_size;
+ // -- TTY
+ unsigned int ccci_uart_smem_base_virt[CCCI_UART_PORT_NUM];
+ unsigned int ccci_uart_smem_base_phy[CCCI_UART_PORT_NUM];
+ unsigned int ccci_uart_smem_size[CCCI_UART_PORT_NUM];
+ // -- Exception
+ unsigned int ccci_exp_smem_base_virt;
+ unsigned int ccci_exp_smem_base_phy;
+ unsigned int ccci_exp_smem_size;
+ // -- IPC
+ unsigned int ccci_ipc_smem_base_virt;
+ unsigned int ccci_ipc_smem_base_phy;
+ unsigned int ccci_ipc_smem_size;
+ // -- SYS - Eint exchagne
+ unsigned int ccci_sys_smem_base_virt;
+ unsigned int ccci_sys_smem_base_phy;
+ unsigned int ccci_sys_smem_size;
+ // -- CCMNI new version
+ // ----- Up-link
+ unsigned int ccci_ccmni_smem_ul_base_virt;
+ unsigned int ccci_ccmni_smem_ul_base_phy;
+ unsigned int ccci_ccmni_smem_ul_size;
+ // ----- Donw-link
+ unsigned int ccci_ccmni_smem_dl_base_virt;
+ unsigned int ccci_ccmni_smem_dl_base_phy;
+ unsigned int ccci_ccmni_smem_dl_size;
+ unsigned int ccci_ccmni_ctl_smem_base_virt[NET_PORT_NUM];
+ unsigned int ccci_ccmni_ctl_smem_base_phy[NET_PORT_NUM];
+ unsigned int ccci_ccmni_ctl_smem_size[NET_PORT_NUM];
+ // -- EXT MD Exception
+ unsigned int ccci_md_ex_exp_info_smem_base_virt;
+ unsigned int ccci_md_ex_exp_info_smem_base_phy;
+ unsigned int ccci_md_ex_exp_info_smem_size;
+ // -- MD Runtime Data
+ unsigned int ccci_md_runtime_data_smem_base_virt;
+ unsigned int ccci_md_runtime_data_smem_base_phy;
+ unsigned int ccci_md_runtime_data_smem_size;
+ // -- Misc Info Data
+ unsigned int ccci_misc_info_base_virt;
+ unsigned int ccci_misc_info_base_phy;
+ unsigned int ccci_misc_info_size;
+}smem_alloc_t;
+
+// Memory layout table
+typedef struct _ccci_mem_layout
+{
+ // MD image
+ unsigned int md_region_vir;
+ unsigned int md_region_phy;
+ unsigned int md_region_size;
+ // DSP image
+ unsigned int dsp_region_vir;
+ unsigned int dsp_region_phy;
+ unsigned int dsp_region_size;
+ // Share memory
+ unsigned int smem_region_vir;
+ unsigned int smem_region_phy;
+ unsigned int smem_region_size;
+ unsigned int smem_region_phy_before_map;
+}ccci_mem_layout_t;
+
+
+// Misc info structure
+typedef struct _misc_info
+{
+ unsigned int prefix; // "CCIF"
+ unsigned int support_mask;
+ unsigned int index;
+ unsigned int next;
+ unsigned int feature_0_val[4];
+ unsigned int feature_1_val[4];
+ unsigned int feature_2_val[4];
+ unsigned int feature_3_val[4];
+ unsigned int feature_4_val[4];
+ unsigned int feature_5_val[4];
+ unsigned int feature_6_val[4];
+ unsigned int feature_7_val[4];
+ unsigned int feature_8_val[4];
+ unsigned int feature_9_val[4];
+ unsigned int feature_10_val[4];
+ unsigned int feature_11_val[4];
+ unsigned int feature_12_val[4];
+ unsigned int feature_13_val[4];
+ unsigned int feature_14_val[4];
+ unsigned int feature_15_val[4];
+ unsigned int reserved_2[3];
+ unsigned int postfix; // "CCIF"
+} misc_info_t;
+
+typedef enum
+{
+ FEATURE_NOT_EXIST = 0,
+ FEATURE_NOT_SUPPORT,
+ FEATURE_SUPPORT,
+ FEATURE_PARTIALLY_SUPPORT,
+} misc_feature_sta_t;
+
+typedef enum
+{
+ MISC_DMA_ADDR = 0,
+ MISC_32K_LESS,
+ MISC_RAND_SEED,
+ MISC_MD_COCLK_SETTING,
+ MISC_MD_SBP_SETTING,
+} misc_feature_id_t;
+
+
+
+//==================================================================================
+// API need implemented by ccci platform
+//==================================================================================
+int get_dev_major_for_md_sys(int md_id);
+int get_ccif_hw_info(int md_id, ccif_hw_info_t *ccif_hw_info);
+void md_env_setup_before_boot(int md_id);
+void md_env_setup_before_ready(int md_id);
+void md_boot_up_additional_operation(int md_id);
+void md_boot_ready_additional_operation(int md_id);
+void additional_operation_before_stop_md(int md_id);
+smem_alloc_t* get_md_smem_layout(int md_id);
+unsigned int get_md_sys_max_num(void);
+void ccci_md_wdt_notify_register(int, int (*funcp)(int));
+int ccci_load_firmware(int md_id, unsigned int load_flag, char img_err_str[], int len);
+int ccci_power_on_md(int md_id);
+int ccci_power_down_md(int md_id);
+int let_md_stop(int md_id, unsigned int timeout);
+int let_md_go(int md_id);
+int ccci_get_sub_module_cfg(int md_id, char name[], char out_buf[], int size);
+int ccci_alloc_smem(int md_id);
+void ccci_free_smem(int md_id);
+ccci_mem_layout_t* get_md_sys_layout(int md_id);
+int is_modem_debug_ver(int md_id);
+char* get_md_info_str(int md_id);
+void platform_set_runtime_data(int md_id, modem_runtime_t *runtime);
+void config_misc_info(int md_id, unsigned int base[], unsigned int size);
+void send_battery_info(int md_id);
+#ifdef CONFIG_MTK_ICUSB_SUPPORT
+void send_icusb_notify(int md_id, unsigned int sim_id);
+#endif
+void md_fast_dormancy(int md_id);
+void start_md_wdt_recov_timer(int md_id);
+int platform_init(int md_id, int power_down);
+void platform_deinit(int md_id);
+unsigned int get_debug_mode_flag(void);
+int ccci_ipo_h_platform_restore(int md_id);
+int set_sim_type(int md_id, int data);
+int get_sim_type(int md_id, int *p_sim_type);
+int enable_get_sim_type(int md_id, unsigned int enable);
+void ccci_dump_md_register(int md_id);
+#ifdef CONFIG_MTK_MD_SBP_CUSTOM_VALUE
+int ccci_set_md_sbp(int md_id, unsigned int md_sbp);
+#endif // CONFIG_MTK_MD_SBP_CUSTOM_VALUE
+
+int get_md2_ap_phy_addr_fixed(void);//Generally, AP and MD has same share memory address after hw remapp.
+ //however, if hardware remapp does not work, then need software remap,
+ //This variable is used to fix md phy addr does not equeal with AP.
+ //If hardware remap works, then the variable is 0.
+//==================================================================================
+// CCCI API cannot be directly called by platform,
+// since ccci.ko is loaded after ccci_platform.ko,
+// so there is no API exported to platform.
+//==================================================================================
+#endif //__CCCI_COMMON_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_err_no.h b/drivers/misc/mediatek/dual_ccci/include/ccci_err_no.h
new file mode 100644
index 000000000..824eb8132
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_err_no.h
@@ -0,0 +1,83 @@
+#ifndef __CCCI_ERR_NO_H__
+#define __CCCI_ERR_NO_H__
+
+// CCCI error number region
+#define CCCI_ERR_MODULE_INIT_START_ID (0)
+#define CCCI_ERR_COMMON_REGION_START_ID (100)
+#define CCCI_ERR_CCIF_REGION_START_ID (200)
+#define CCCI_ERR_CCCI_REGION_START_ID (300)
+#define CCCI_ERR_LOAD_IMG_START_ID (400)
+
+// CCCI error number
+#define CCCI_ERR_MODULE_INIT_OK (CCCI_ERR_MODULE_INIT_START_ID+0)
+#define CCCI_ERR_INIT_DEV_NODE_FAIL (CCCI_ERR_MODULE_INIT_START_ID+1)
+#define CCCI_ERR_INIT_PLATFORM_FAIL (CCCI_ERR_MODULE_INIT_START_ID+2)
+#define CCCI_ERR_MK_DEV_NODE_FAIL (CCCI_ERR_MODULE_INIT_START_ID+3)
+#define CCCI_ERR_INIT_LOGIC_LAYER_FAIL (CCCI_ERR_MODULE_INIT_START_ID+4)
+#define CCCI_ERR_INIT_MD_CTRL_FAIL (CCCI_ERR_MODULE_INIT_START_ID+5)
+#define CCCI_ERR_INIT_CHAR_DEV_FAIL (CCCI_ERR_MODULE_INIT_START_ID+6)
+#define CCCI_ERR_INIT_TTY_FAIL (CCCI_ERR_MODULE_INIT_START_ID+7)
+#define CCCI_ERR_INIT_IPC_FAIL (CCCI_ERR_MODULE_INIT_START_ID+8)
+#define CCCI_ERR_INIT_RPC_FAIL (CCCI_ERR_MODULE_INIT_START_ID+9)
+#define CCCI_ERR_INIT_FS_FAIL (CCCI_ERR_MODULE_INIT_START_ID+10)
+#define CCCI_ERR_INIT_CCMNI_FAIL (CCCI_ERR_MODULE_INIT_START_ID+11)
+#define CCCI_ERR_INIT_VIR_CHAR_FAIL (CCCI_ERR_MODULE_INIT_START_ID+12)
+
+// ---- Common
+#define CCCI_ERR_FATAL_ERR (CCCI_ERR_COMMON_REGION_START_ID+0)
+#define CCCI_ERR_ASSERT_ERR (CCCI_ERR_COMMON_REGION_START_ID+1)
+#define CCCI_ERR_MD_IN_RESET (CCCI_ERR_COMMON_REGION_START_ID+2)
+#define CCCI_ERR_RESET_NOT_READY (CCCI_ERR_COMMON_REGION_START_ID+3)
+#define CCCI_ERR_GET_MEM_FAIL (CCCI_ERR_COMMON_REGION_START_ID+4)
+#define CCCI_ERR_GET_SMEM_SETTING_FAIL (CCCI_ERR_COMMON_REGION_START_ID+5)
+#define CCCI_ERR_INVALID_PARAM (CCCI_ERR_COMMON_REGION_START_ID+6)
+#define CCCI_ERR_LARGE_THAN_BUF_SIZE (CCCI_ERR_COMMON_REGION_START_ID+7)
+#define CCCI_ERR_GET_MEM_LAYOUT_FAIL (CCCI_ERR_COMMON_REGION_START_ID+8)
+#define CCCI_ERR_MEM_CHECK_FAIL (CCCI_ERR_COMMON_REGION_START_ID+9)
+#define CCCI_IPO_H_RESTORE_FAIL (CCCI_ERR_COMMON_REGION_START_ID+10)
+
+// ---- CCIF
+#define CCCI_ERR_CCIF_NOT_READY (CCCI_ERR_CCIF_REGION_START_ID+0)
+#define CCCI_ERR_CCIF_CALL_BACK_HAS_REGISTERED (CCCI_ERR_CCIF_REGION_START_ID+1)
+#define CCCI_ERR_CCIF_GET_NULL_POINTER (CCCI_ERR_CCIF_REGION_START_ID+2)
+#define CCCI_ERR_CCIF_UN_SUPPORT (CCCI_ERR_CCIF_REGION_START_ID+3)
+#define CCCI_ERR_CCIF_NO_PHYSICAL_CHANNEL (CCCI_ERR_CCIF_REGION_START_ID+4)
+#define CCCI_ERR_CCIF_INVALID_RUNTIME_LEN (CCCI_ERR_CCIF_REGION_START_ID+5)
+#define CCCI_ERR_CCIF_INVALID_MD_SYS_ID (CCCI_ERR_CCIF_REGION_START_ID+6)
+#define CCCI_ERR_CCIF_GET_HW_INFO_FAIL (CCCI_ERR_CCIF_REGION_START_ID+9)
+
+// ---- CCCI
+#define CCCI_ERR_INVALID_LOGIC_CHANNEL_ID (CCCI_ERR_CCCI_REGION_START_ID+0)
+#define CCCI_ERR_PUSH_RX_DATA_TO_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+1)
+#define CCCI_ERR_REG_CALL_BACK_FOR_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+2)
+#define CCCI_ERR_LOGIC_CH_HAS_REGISTERED (CCCI_ERR_CCCI_REGION_START_ID+3)
+#define CCCI_ERR_MD_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+4)
+#define CCCI_ERR_ALLOCATE_MEMORY_FAIL (CCCI_ERR_CCCI_REGION_START_ID+5)
+#define CCCI_ERR_CREATE_CCIF_INSTANCE_FAIL (CCCI_ERR_CCCI_REGION_START_ID+6)
+#define CCCI_ERR_REPEAT_CHANNEL_ID (CCCI_ERR_CCCI_REGION_START_ID+7)
+#define CCCI_ERR_KFIFO_IS_NOT_READY (CCCI_ERR_CCCI_REGION_START_ID+8)
+#define CCCI_ERR_GET_NULL_POINTER (CCCI_ERR_CCCI_REGION_START_ID+9)
+#define CCCI_ERR_GET_RX_DATA_FROM_TX_CHANNEL (CCCI_ERR_CCCI_REGION_START_ID+10)
+#define CCCI_ERR_CHANNEL_NUM_MIS_MATCH (CCCI_ERR_CCCI_REGION_START_ID+11)
+#define CCCI_ERR_START_ADDR_NOT_4BYTES_ALIGN (CCCI_ERR_CCCI_REGION_START_ID+12)
+#define CCCI_ERR_NOT_DIVISIBLE_BY_4 (CCCI_ERR_CCCI_REGION_START_ID+13)
+#define CCCI_ERR_MD_AT_EXCEPTION (CCCI_ERR_CCCI_REGION_START_ID+14)
+#define CCCI_ERR_MD_CB_HAS_REGISTER (CCCI_ERR_CCCI_REGION_START_ID+15)
+
+// ---- Load image error
+#define CCCI_ERR_LOAD_IMG_NOMEM (CCCI_ERR_LOAD_IMG_START_ID+0)
+#define CCCI_ERR_LOAD_IMG_FILE_OPEN (CCCI_ERR_LOAD_IMG_START_ID+1)
+#define CCCI_ERR_LOAD_IMG_FILE_READ (CCCI_ERR_LOAD_IMG_START_ID+2)
+#define CCCI_ERR_LOAD_IMG_KERN_READ (CCCI_ERR_LOAD_IMG_START_ID+3)
+#define CCCI_ERR_LOAD_IMG_NO_ADDR (CCCI_ERR_LOAD_IMG_START_ID+4)
+#define CCCI_ERR_LOAD_IMG_NO_FIRST_BOOT (CCCI_ERR_LOAD_IMG_START_ID+5)
+#define CCCI_ERR_LOAD_IMG_LOAD_FIRM (CCCI_ERR_LOAD_IMG_START_ID+6)
+#define CCCI_ERR_LOAD_IMG_FIRM_NULL (CCCI_ERR_LOAD_IMG_START_ID+7)
+#define CCCI_ERR_LOAD_IMG_CHECK_HEAD (CCCI_ERR_LOAD_IMG_START_ID+8)
+#define CCCI_ERR_LOAD_IMG_SIGN_FAIL (CCCI_ERR_LOAD_IMG_START_ID+9)
+#define CCCI_ERR_LOAD_IMG_CIPHER_FAIL (CCCI_ERR_LOAD_IMG_START_ID+10)
+#define CCCI_ERR_LOAD_IMG_MD_CHECK (CCCI_ERR_LOAD_IMG_START_ID+11)
+#define CCCI_ERR_LOAD_IMG_DSP_CHECK (CCCI_ERR_LOAD_IMG_START_ID+12)
+#define CCCI_ERR_LOAD_IMG_ABNORAL_SIZE (CCCI_ERR_LOAD_IMG_START_ID+13)
+
+#endif //__CCCi_ERR_NO_H__ \ No newline at end of file
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_fs.h b/drivers/misc/mediatek/dual_ccci/include/ccci_fs.h
new file mode 100644
index 000000000..71ca0bada
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_fs.h
@@ -0,0 +1,44 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_fs.h
+ *
+ * Project:
+ * --------
+ * ALPS
+ *
+ * Description:
+ * ------------
+ * MT65XX CCCI FS Proxy Driver
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_FS_H__
+#define __CCCI_FS_H__
+/*
+ * define IOCTL commands
+ */
+#define CCCI_FS_IOC_MAGIC 'K'
+#define CCCI_FS_IOCTL_GET_INDEX _IO(CCCI_FS_IOC_MAGIC, 1)
+#define CCCI_FS_IOCTL_SEND _IOR(CCCI_FS_IOC_MAGIC, 2, unsigned int)
+
+#define CCCI_FS_MAX_BUF_SIZE (16384)
+#define CCCI_FS_MAX_BUFFERS (5)
+
+typedef struct
+{
+ unsigned length;
+ unsigned index;
+} fs_stream_msg_t;
+
+
+typedef struct
+{
+ unsigned fs_ops;
+ unsigned char buffer[CCCI_FS_MAX_BUF_SIZE];
+} fs_stream_buffer_t;
+
+#define CCCI_FS_SMEM_SIZE (sizeof(fs_stream_buffer_t) * CCCI_FS_MAX_BUFFERS)
+
+#endif // __CCCI_FS_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_ipc.h b/drivers/misc/mediatek/dual_ccci/include/ccci_ipc.h
new file mode 100644
index 000000000..d5cc6409f
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_ipc.h
@@ -0,0 +1,127 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_ipc.h
+ *
+ *
+ * Author:
+ * -------
+ * Yalin wang (mtk80678)
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_IPC_H__
+#define __CCCI_IPC_H__
+#include <linux/kernel.h>
+#include <asm/types.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <linux/device.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/timer.h>
+#include <linux/list.h>
+#include <linux/sched.h>
+#include <linux/mutex.h>
+#include <asm/bitops.h>
+#include <asm/atomic.h>
+#include "ccci_tty.h"
+#define IPC_MSGSVC_RVC_DONE 0x12344321
+#define MAX_NUM_IPC_TASKS_MD 10
+#define MAX_NUM_IPC_TASKS 10
+#define CCCI_IPC_BUFFER_SIZE (4<<10)
+#define CCCI_IPC_DEV_MAJOR 183
+#define CCCI_TASK_PENDING 0x01
+#define CCCI_MD_IMAGE_MAPPING_SIZE (20<<20)
+#define CCCI_IPC_MAGIC 'P'
+#define CCCI_IPC_RESET_RECV _IO(CCCI_IPC_MAGIC,0)
+#define CCCI_IPC_RESET_SEND _IO(CCCI_IPC_MAGIC,1)
+#define CCCI_IPC_WAIT_MD_READY _IO(CCCI_IPC_MAGIC,2)
+
+
+typedef unsigned int uint32;
+typedef unsigned char uint8;
+typedef unsigned short uint16;
+
+typedef struct {
+ uint8 ref_count;
+ uint16 msg_len;
+ uint8 data[0];
+} local_para_struct ;
+
+typedef struct {
+ uint16 pdu_len;
+ uint8 ref_count;
+ uint8 pb_resvered;
+ uint16 free_header_space;
+ uint16 free_tail_space;
+ uint8 data[0];
+}peer_buff_struct ;
+
+typedef struct ipc_ilm_struct
+{
+ uint32 src_mod_id;
+ uint32 dest_mod_id;
+ uint32 sap_id;
+ uint32 msg_id;
+ local_para_struct *local_para_ptr;
+ peer_buff_struct *peer_buff_ptr;
+}ipc_ilm_t;
+
+ typedef struct{
+ uint32 rx_offset;
+ uint32 tx_offset;
+ uint32 size;
+ uint8 buffer[CCCI_IPC_BUFFER_SIZE];
+} BUFF;
+
+typedef struct {
+ BUFF buff_wr;
+ BUFF buff_rd;
+} CCCI_IPC_BUFFER;
+
+typedef struct {
+ ipc_ilm_t ilm_md[MAX_NUM_IPC_TASKS_MD]; //md side ilms
+ ipc_ilm_t ilm[MAX_NUM_IPC_TASKS] ;
+ CCCI_IPC_BUFFER buffer;
+} CCCI_IPC_MEM;
+
+typedef struct {
+ struct list_head list;
+ void *data;
+ uint32 len;
+}CCCI_RECV_ITEM;
+
+typedef struct {
+ spinlock_t lock;
+ unsigned long flag;
+ atomic_t user;
+ unsigned long jiffies;
+ uint32 to_id;
+ struct fasync_struct *fasync;
+ ipc_ilm_t *ilm_p;
+ uint32 time_out;
+ uint32 ilm_phy_addr;
+ wait_queue_head_t read_wait_queue;
+ wait_queue_head_t write_wait_queue;
+ struct list_head recv_list;
+ void *owner;
+}IPC_TASK;
+
+typedef struct IPC_MSGSVC_TASKMAP_STRUCT
+{
+ uint32 extq_id; /* IPC universal mapping external queue */
+ uint32 task_id; /* IPC processor internal task id */
+
+}IPC_MSGSVC_TASKMAP_T;
+
+extern int __init ccci_ipc_init(int);
+extern void __exit ccci_ipc_exit(int);
+
+#define offset_of(type,mem) ((uint32)(&(((type *)0)->mem)))
+#define CCCI_IPC_SMEM_SIZE (sizeof(CCCI_IPC_MEM))
+
+
+
+#endif //__CCCI_IPC_H__ \ No newline at end of file
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_ipc_task_ID.h b/drivers/misc/mediatek/dual_ccci/include/ccci_ipc_task_ID.h
new file mode 100644
index 000000000..0f72880cb
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_ipc_task_ID.h
@@ -0,0 +1,40 @@
+#ifndef __CCCI_IPC_TASK_ID_H__
+#define __CCCI_IPC_TASK_ID_H__
+// Priority --> Local module ID --> External ID --> Max sent message
+// X_IPC_MODULE_CONF(1,M_SSDBG1,0,1) //TASK_ID_1
+// X_IPC_MODULE_CONF(1,AP_SSDBG2,1,1) //TASK_ID_2
+#ifdef __IPC_ID_TABLE
+#define X_IPC_MODULE_CONF(a,b,c,d) {c,b},
+#else
+#define X_IPC_MODULE_CONF(a,b,c,d)
+#endif
+
+
+#define AP_UNIFY_ID_FLAG (1<<31)
+#define MD_UNIFY_ID_FLAG (0<<31)
+
+//----------------------------------------------------------
+#define AGPS_MD_MOD_L4C 0
+#define AGPS_MD_MOD_L4C_2 1
+#define AGPS_MD_MOD_L4C_3 2
+#define AGPS_MD_MOD_L4C_4 3
+//agps MD begin task_id
+//Wait to add
+
+#define AGPS_AP_MOD_MMI 0
+//agps AP begin task_id
+//Wait to add
+#define GPS_AP_MOD 2
+//--------------------------------------------------------------------------
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C, MD_UNIFY_ID_FLAG|0, 1)
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C_2, MD_UNIFY_ID_FLAG|1, 1)
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C_3, MD_UNIFY_ID_FLAG|2, 1)
+X_IPC_MODULE_CONF(1, AGPS_MD_MOD_L4C_4, MD_UNIFY_ID_FLAG|3, 1)
+//Wait to add
+//--------------------------------------------------------------------------
+X_IPC_MODULE_CONF(1, AGPS_AP_MOD_MMI, AP_UNIFY_ID_FLAG|0, 1)
+X_IPC_MODULE_CONF(1, GPS_AP_MOD, AP_UNIFY_ID_FLAG|2, 1)
+//Wait to add
+//-------------------------------------------------------------------------
+
+#endif
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_layer.h b/drivers/misc/mediatek/dual_ccci/include/ccci_layer.h
new file mode 100644
index 000000000..27718b619
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_layer.h
@@ -0,0 +1,313 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_layer.h
+ *
+ * Project:
+ * --------
+ * ALPS
+ *
+ * Description:
+ * ------------
+ * MT65XX CCCI header file
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_LAYER_H__
+#define __CCCI_LAYER_H__
+
+#include <linux/kfifo.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/kfifo.h>
+#include <linux/io.h>
+#include <asm/atomic.h>
+#include <linux/rwlock.h>
+#include <asm/bitops.h>
+#include <linux/sched.h>
+#include <linux/wakelock.h>
+#include <ccci_ch.h>
+#include <ccif.h>
+
+
+#define CCCI_DEV_NAME "ccci"
+//#define CCCI_DEV_MAJOR 184 move to platform.h
+#define CCCI_SYSFS_INFO "info"
+#define CCCI_FIFO_MAX_LEN 8 /* 8 = max of physical channel */
+
+
+//--------------logical channel attribute define-------------------//
+#define L_CH_ATTR_TX (1<<0) // This logic channel is a TX channel
+#define L_CH_ATTR_PRVLG0 (1<<1) // This logic channel can send data even if runtime data not send
+#define L_CH_ATTR_PRVLG1 (1<<2) // This logic channel can send data even if modem not boot ready
+#define L_CH_ATTR_PRVLG2 (1<<3) // This logic channel can send data even if modem has exception
+#define L_CH_ATTR_DUMMY_WRITE (1<<4) // This logic channel using dummy write if modem has exception
+#define L_CH_ATTR_OPEN_CLEAR (1<<5) // Clear all fifo data when open
+#define L_CH_DROP_TOLERATED (1<<6) // Drop message is tolerated for this channel
+#define L_CH_MUST_RDY_FOR_BOOT (1<<7) // During modem boot up, the channel must be ready
+
+//#define MD_BOOT_STAGE_0 (1) // Not set runtime data to MD
+//#define MD_BOOT_STAGE_1 (2) // Has set runtime data to MD, but MD not ready yet
+//#define MD_BOOT_STAGE_2 (3) // Modem is ready
+
+
+//--------------TX transfer function define-------------------//
+/* initialize a CCCI mailbox buffer */
+#define CCCI_INIT_MAILBOX(buff, mailbox_id) \
+ do { \
+ ((ccci_msg_t*)buff)->magic = 0xFFFFFFFF; \
+ ((ccci_msg_t*)buff)->id = (mailbox_id); \
+ ((ccci_msg_t*)buff)->channel = CCCI_INVALID_CH_ID; \
+ ((ccci_msg_t*)buff)->reserved = 0; \
+ } while (0)
+
+/* initialize a CCCI stream buffer */
+#define CCCI_INIT_STREAM(buff, stream_addr, stream_len) \
+ do { \
+ ((ccci_msg_t*)buff)->addr = (stream_addr); \
+ ((ccci_msg_t*)buff)->len = (stream_len); \
+ ((ccci_msg_t*)buff)->channel = CCCI_INVALID_CH_ID; \
+ ((ccci_msg_t*)buff)->reserved = 0; \
+ } while (0)
+
+
+//-----------------data structure define-------------------------//
+/* CCCI API return value */
+typedef enum
+{
+ CCCI_SUCCESS = 0,
+ CCCI_FAIL = -EIO,
+ CCCI_IN_USE = -EEXIST,
+ CCCI_NOT_OWNER = -EPERM,
+ CCCI_INVALID_PARAM = -EINVAL,
+ CCCI_NO_PHY_CHANNEL = -ENXIO,
+ CCCI_IN_INTERRUPT = -EACCES,
+ CCCI_IN_IRQ = -EINTR,
+ CCCI_MD_NOT_READY = -EBUSY,
+ CCCI_MD_IN_RESET = -ESRCH,
+ CCCI_RESET_NOT_READY = -ENODEV
+}CCCI_RETURNVAL_T;
+
+/*typedef enum
+{
+#define X_DEF_CH
+#include "ccci_ch.h"
+#undef X_DEF_CH
+ CCCI_MAX_CHANNEL=100,
+ CCCI_FORCE_RESET_MODEM_CHANNEL = 20090215,
+} CCCI_CHANNEL_T;
+*/
+
+/* CCCI mailbox channel structure */
+typedef struct
+{
+ unsigned int magic; /* 0xFFFFFFFF */
+ unsigned int id;
+} CCCI_MAILBOX_T;
+
+/* CCCI stream channel structure */
+typedef struct
+{
+ unsigned int addr;
+ unsigned int len;
+} CCCI_STREAM_T;
+
+/* CCCI channel buffer structure */
+typedef struct
+{
+ unsigned int data[2];
+ unsigned int channel;
+ unsigned int reserved;
+} CCCI_BUFF_T;
+
+/* CCCI callback function prototype */
+typedef void (*CCCI_CALLBACK)(CCCI_BUFF_T *buff, void *private_data);
+
+/* CCCI status */
+/*
+typedef enum
+{
+ CCCI_IDLE = 0x00,
+ CCCI_ACTIVE_READ = 0x01,ror: expected specifier-qualifier-list before 'CCCI_BUFF_T'
+
+ CCCI_ACTIVE_WRITE = 0x02,
+ CCCI_ACTIVE_ISR = 0x04
+} CCCI_STATE_T;
+*/
+/* CCCI control structure */
+
+typedef enum {
+ CCCI_ENABLED=0x0,
+ CCCI_RUNNING=0x1,
+
+} CCCI_STATE_T;
+typedef struct _CCCI_LOG_T
+{
+ unsigned long sec;
+ unsigned long nanosec;
+ CCCI_BUFF_T buff;
+ short rx;
+} CCCI_LOG_T;
+
+// CCCI mailbox channel structure
+typedef struct _ccci_mail_box{
+ unsigned int magic; // 0xFFFFFFFF
+ unsigned int id;
+}ccci_mail_box_t;
+
+// CCCI stream channel structure
+typedef struct _ccci_stream_msg{
+ unsigned int addr;
+ unsigned int len;
+}ccci_stream_msg_t;
+
+// CCCI common channel structure
+typedef struct _ccci_common_msg{
+ unsigned int data[2];
+}ccci_common_msg_t;
+
+typedef struct _ccci_msg{
+ union{
+ unsigned int magic; // For mail box magic number
+ unsigned int addr; // For stream start addr
+ unsigned int data0; // For ccci common data[0]
+ };
+ union{
+ unsigned int id; // For mail box message id
+ unsigned int len; // For stream len
+ unsigned int data1; // For ccci common data[1]
+ };
+ unsigned int channel;
+ unsigned int reserved;
+}ccci_msg_t;
+
+typedef struct dump_debug_info
+{
+ unsigned int type;
+ char *name;
+ unsigned int more_info;
+ union {
+ struct {
+
+ char file_name[30];
+ int line_num;
+ unsigned int parameters[3];
+ } assert;
+ struct {
+ int err_code1;
+ int err_code2;
+
+ }fatal_error;
+ ccci_msg_t data;
+ struct {
+ unsigned char execution_unit[9]; // 8+1
+ char file_name[30];
+ int line_num;
+ unsigned int parameters[3];
+ }dsp_assert;
+ struct {
+ unsigned char execution_unit[9];
+ unsigned int code1;
+ }dsp_exception;
+ struct {
+ unsigned char execution_unit[9];
+ unsigned int err_code[2];
+ }dsp_fatal_err;
+ };
+ int *ext_mem;
+ size_t ext_size;
+ int *md_image;
+ size_t md_size;
+ void *platform_data;
+ void (*platform_call)(void *data);
+}DEBUG_INFO_T ;
+
+typedef struct _logic_channel_info{
+ unsigned int m_ch_id;
+ unsigned int m_attrs;
+ struct kfifo m_kfifo;
+ unsigned int m_kfifo_ready;
+ char* m_ch_name;
+ char* m_owner_name;
+ void* m_owner;
+ void (*m_call_back)(void*);
+ spinlock_t m_lock;
+ unsigned int m_register;
+ int m_md_id;
+}logic_channel_info_t;
+
+typedef struct _logic_channel_static_info{
+ unsigned int m_ch_id;
+ unsigned int m_kfifo_size;
+ char* m_ch_name;
+ unsigned int m_attrs;
+}logic_channel_static_info_t;
+
+typedef struct _logic_dispatch_ctl_block{
+ logic_channel_info_t m_logic_ch_table[CCCI_MAX_CH_NUM];
+ ccif_t *m_ccif;
+ struct tasklet_struct m_dispatch_tasklet;
+ volatile unsigned char m_has_pending_data;
+ volatile unsigned char m_freezed;
+ volatile unsigned char m_running;
+ unsigned int m_md_id;
+ struct wake_lock m_wakeup_wake_lock;
+ char m_wakelock_name[16];
+ void (*m_send_notify_cb)(int, unsigned int);
+ unsigned long m_last_send_ref_jiffies;
+ unsigned long m_status_flag;
+ spinlock_t m_lock;
+}logic_dispatch_ctl_block_t;
+//volatile unsigned char m_privilege;
+
+
+//-----------------function define-------------------------//
+int register_to_logic_ch(int md_id, int ch, void (*func)(void*), void* owner);
+int un_register_to_logic_ch(int md_id, int ch);
+int logic_layer_reset(int);
+int cal_ring_buffer_free_space(int read_idx, int write_idx, int ring_buf_len);
+int cal_ring_buffer_valid_data_size(int read_idx, int write_idx, int ring_buf_len);
+int ccci_logic_ctlb_init(int);
+void ccci_logic_ctlb_deinit(int);
+int get_logic_ch_data(logic_channel_info_t *ch_info, ccci_msg_t *msg);
+int get_logic_ch_data_len(logic_channel_info_t *ch_info);
+logic_channel_info_t* get_logic_ch_info(int md_id, int ch_id);
+void freeze_logic_layer_tx(int);
+void freeze_all_logic_layer(int);
+//void set_curr_md_state(int md_id, int state);
+void * get_dispatch_ctl_block(int md_sys);
+int ccci_message_send(int md_id, ccci_msg_t *msg, int retry_en);
+void ccci_system_message(int md_id, unsigned int msg, unsigned int resv);
+void ccci_disable_md_intr(int md_id);
+void ccci_enable_md_intr(int md_id);
+void ccci_hal_reset(int md_id);
+void ccci_hal_irq_register(int md_id);
+void set_md_sys_max_num(unsigned int max_num);
+void update_active_md_sys_state(int md_id, int active);
+void set_md_enable(int md_id, int en);
+int ccci_logic_layer_init(int);
+void ccci_logic_layer_exit(int);
+int ccci_write_runtime_data(int md_id, unsigned char buf[], int len);
+
+
+
+//-----------------external function define---------------------//
+//typedef int (*is_md_boot_func)(void);
+//typedef int (*reset_md_func)(void);
+//typedef int (*ccci_base_req_func)(void*,int*);
+//extern is_md_boot_func is_md_boot_funcp;
+//extern reset_md_func reset_md_funcp;
+//extern ccci_base_req_func ccci_pcm_base_req_funcp;
+//extern ccci_base_req_func ccci_log_base_req_funcp;
+//extern void ccci_register_mdfunc(is_md_boot_func func1, reset_md_func func2,
+// ccci_base_req_func pcm_func,ccci_base_req_func log_func);
+extern int __init ccif_module_init(void);
+extern void __exit ccif_module_exit(void);
+
+
+#endif // __CCCI_LAYER_H__
+
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_md.h b/drivers/misc/mediatek/dual_ccci/include/ccci_md.h
new file mode 100644
index 000000000..d1b8cd9a7
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_md.h
@@ -0,0 +1,447 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_md.h
+ *
+ * Project:
+ * --------
+ * Andes
+ *
+ * Description:
+ * ------------
+ * MT65XX Modem initialization and handshake header file
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_MD_H__
+#define __CCCI_MD_H__
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+
+#define CCCI_SYSFS_MD_INIT "modem"
+#define CCCI_SYSFS_MD_BOOT_ATTR "boot"
+#define MD_BOOT_CMD_CHAR '0'
+#define NORMAL_BOOT_ID 0
+#define META_BOOT_ID 1
+//#define MD_RUNTIME_ADDR (CCIF_BASE + 0x0140)
+//#define SLEEP_CON 0xF0001204
+//#define CCCI_CURRENT_VERSION 0x00000923
+#define NR_CCCI_RESET_USER 10
+#define NR_CCCI_RESET_USER_NAME 16
+
+#define CCCI_UART_PORT_NUM 8
+
+#define CCCI_MD_EXCEPTION 0x1
+#define CCCI_MD_RESET 0x2
+#define CCCI_MD_BOOTUP 0x3
+#define CCCI_MD_STOP 0x4
+
+#define LOCK_MD_SLP 0x1
+#define UNLOCK_MD_SLP 0x0
+
+#define MD_IMG_MAX_CNT 0x4
+/*-----------------------------------------------------------*/
+/* Device ID assignment */
+#define CCCI_TTY_DEV_MAJOR (169) //(0: Modem; 1: Meta; 2:IPC)
+
+
+enum {
+ MD_BOOT_STAGE_0 = 0,
+ MD_BOOT_STAGE_1 = 1,
+ MD_BOOT_STAGE_2 = 2,
+ MD_BOOT_STAGE_EXCEPTION = 3
+};
+
+enum {
+ MD_INIT_START_BOOT = 0x00000000,
+ MD_INIT_CHK_ID = 0x5555FFFF,
+ MD_EX = 0x00000004,
+ MD_EX_CHK_ID = 0x45584350,
+ MD_EX_REC_OK = 0x00000006,
+ MD_EX_REC_OK_CHK_ID = 0x45524543,
+ MD_EX_RESUME_CHK_ID = 0x7,
+ CCCI_DRV_VER_ERROR = 0x5,
+
+ // System channel, AP->MD || AP<-->MD message start from 0x100
+/* MD_DORMANT_NOTIFY = 0x100,
+ MD_SLP_REQUEST = 0x101,
+ MD_TX_POWER = 0x102,
+ MD_RF_TEMPERATURE = 0x103,
+ MD_RF_TEMPERATURE_3G = 0x104,
+ MD_GET_BATTERY_INFO = 0x105,
+*/
+ // System channel, MD --> AP message start from 0x1000
+ MD_WDT_MONITOR = 0x1000,
+ MD_WAKEN_UP = 0x10000,
+};
+
+enum {
+ ER_MB_START_CMD = -1,
+ ER_MB_CHK_ID = -2,
+ ER_MB_BOOT_READY = -3,
+ ER_MB_UNKNOW_STAGE = -4
+};
+
+enum {
+ MD_EX_TYPE_INVALID = 0,
+ MD_EX_TYPE_UNDEF = 1,
+ MD_EX_TYPE_SWI = 2,
+ MD_EX_TYPE_PREF_ABT = 3,
+ MD_EX_TYPE_DATA_ABT = 4,
+ MD_EX_TYPE_ASSERT = 5,
+ MD_EX_TYPE_FATALERR_TASK = 6,
+ MD_EX_TYPE_FATALERR_BUF = 7,
+ MD_EX_TYPE_LOCKUP = 8,
+ MD_EX_TYPE_ASSERT_DUMP = 9,
+ MD_EX_TYPE_ASSERT_FAIL = 10,
+ DSP_EX_TYPE_ASSERT = 11,
+ DSP_EX_TYPE_EXCEPTION = 12,
+ DSP_EX_FATAL_ERROR = 13,
+ NUM_EXCEPTION
+};
+#define MD_EX_TYPE_EMI_CHECK 99
+
+enum {
+ MD_EE_FLOW_START = 0,
+ MD_EE_DUMP_ON_GOING,
+ MD_STATE_UPDATE,
+ MD_EE_MSG_GET,
+ MD_EE_TIME_OUT_SET,
+ MD_EE_OK_MSG_GET,
+ MD_EE_FOUND_BY_ISR,
+ MD_EE_FOUND_BY_TX,
+ MD_EE_PENDING_TOO_LONG,
+
+ MD_EE_INFO_OFFSET = 20,
+ MD_EE_EXCP_OCCUR = 20,
+ MD_EE_AP_MASK_I_BIT_TOO_LONG = 21,
+};
+
+enum {
+ MD_EE_CASE_NORMAL = 0,
+ MD_EE_CASE_ONLY_EX,
+ MD_EE_CASE_ONLY_EX_OK,
+ MD_EE_CASE_TX_TRG,
+ MD_EE_CASE_ISR_TRG,
+ MD_EE_CASE_NO_RESPONSE,
+ MD_EE_CASE_AP_MASK_I_BIT_TOO_LONG,
+};
+
+
+
+#ifdef AP_MD_EINT_SHARE_DATA
+enum {
+ CCCI_EXCH_CORE_AWAKEN = 0,
+ CCCI_EXCH_CORE_SLEEP = 1,
+ CCCI_EXCH_CORE_SLUMBER = 2
+};
+#endif
+
+/* CCCI system message */
+enum {
+ CCCI_SYS_MSG_RESET_MD = 0x20100406
+};
+
+/* MD Message, this is for user space deamon use */
+enum {
+ CCCI_MD_MSG_BOOT_READY = 0xFAF50001,
+ CCCI_MD_MSG_BOOT_UP = 0xFAF50002,
+ CCCI_MD_MSG_EXCEPTION = 0xFAF50003,
+ CCCI_MD_MSG_RESET = 0xFAF50004,
+ CCCI_MD_MSG_RESET_RETRY = 0xFAF50005,
+ CCCI_MD_MSG_READY_TO_RESET = 0xFAF50006,
+ CCCI_MD_MSG_BOOT_TIMEOUT = 0xFAF50007,
+ CCCI_MD_MSG_STOP_MD_REQUEST = 0xFAF50008,
+ CCCI_MD_MSG_START_MD_REQUEST = 0xFAF50009,
+ CCCI_MD_MSG_ENTER_FLIGHT_MODE = 0xFAF5000A,
+ CCCI_MD_MSG_LEAVE_FLIGHT_MODE = 0xFAF5000B,
+ CCCI_MD_MSG_POWER_ON_REQUEST = 0xFAF5000C,
+ CCCI_MD_MSG_POWER_DOWN_REQUEST = 0xFAF5000D,
+ CCCI_MD_MSG_SEND_BATTERY_INFO = 0xFAF5000E,
+ CCCI_MD_MSG_NOTIFY = 0xFAF5000F,
+ CCCI_MD_MSG_STORE_NVRAM_MD_TYPE = 0xFAF50010,
+ CCCI_MD_MSG_CFG_UPDATE = 0xFAF50011,
+};
+
+/* MD Status, this is for user space deamon use */
+enum {
+ CCCI_MD_STA_BOOT_READY = 0,
+ CCCI_MD_STA_BOOT_UP = 1,
+ CCCI_MD_STA_RESET = 2,
+};
+
+#if 0
+/* MODEM MAUI SW ASSERT LOG */
+struct modem_assert_log
+{
+ char ex_type;
+ char ex_nvram;
+ short ex_serial;
+ char data1[212];
+ char filename[24];
+ int linenumber;
+ char data2[268];
+};
+
+/* MODEM MAUI SW FATAL ERROR LOG */
+struct modem_fatalerr_log
+{
+ char ex_type;
+ char ex_nvram;
+ short ex_serial;
+ char data1[212];
+ int err_code1;
+ int err_code2;
+ char data2[288];
+};
+#endif
+
+struct cores_sleep_info
+{
+ unsigned char AP_Sleep;
+ unsigned char padding1[3];
+ unsigned int RTC_AP_WakeUp;
+ unsigned int AP_SettleTime; /* clock settle duration */
+ unsigned char MD_Sleep;
+ unsigned char padding2[3];
+ unsigned int RTC_MD_WakeUp;
+ unsigned int RTC_MD_Settle_OK; /* clock settle done time */
+};
+
+/* MODEM MAUI Exception header (4 bytes)*/
+typedef struct _exception_record_header_t
+{
+ unsigned char ex_type;
+ unsigned char ex_nvram;
+ unsigned short ex_serial_num;
+}EX_HEADER_T;
+
+/* MODEM MAUI Environment information (164 bytes) */
+typedef struct _ex_environment_info_t
+{
+ unsigned char boot_mode;
+ unsigned char reserved1[8];
+ unsigned char execution_unit[8];
+ unsigned char reserved2[147];
+}EX_ENVINFO_T;
+
+/* MODEM MAUI Special for fatal error (8 bytes)*/
+typedef struct _ex_fatalerror_code_t
+{
+ unsigned int code1;
+ unsigned int code2;
+}EX_FATALERR_CODE_T;
+
+/* MODEM MAUI fatal error (296 bytes)*/
+typedef struct _ex_fatalerror_t
+{
+ EX_FATALERR_CODE_T error_code;
+ unsigned char reserved1[288];
+}EX_FATALERR_T;
+
+/* MODEM MAUI Assert fail (296 bytes)*/
+typedef struct _ex_assert_fail_t
+{
+ unsigned char filename[24];
+ unsigned int linenumber;
+ unsigned int parameters[3];
+ unsigned char reserved1[256];
+}EX_ASSERTFAIL_T;
+
+/* MODEM MAUI Globally exported data structure (300 bytes) */
+typedef union
+{
+ EX_FATALERR_T fatalerr;
+ EX_ASSERTFAIL_T assert;
+}EX_CONTENT_T;
+
+/* MODEM MAUI Standard structure of an exception log ( */
+typedef struct _ex_exception_log_t
+{
+ EX_HEADER_T header;
+ unsigned char reserved1[12];
+ EX_ENVINFO_T envinfo;
+ unsigned char reserved2[36];
+ EX_CONTENT_T content;
+}EX_LOG_T;
+
+struct core_eint_config
+{
+ unsigned char eint_no;
+ unsigned char Sensitivity;
+ unsigned char ACT_Polarity;
+ unsigned char Dbounce_En;
+ unsigned int Dbounce_ms;
+};
+
+struct ccci_cores_exch_data
+{
+ struct cores_sleep_info sleep_info;
+ unsigned int report_os_tick; /* report OS Tick Periodic in second unit */
+ /* ( 0 = disable ) */
+ unsigned int nr_eint_config;
+ unsigned int eint_config_offset; /* offset from SysShareMemBase for struct coreeint_config */
+};
+
+#define CCCI_SYS_SMEM_SIZE sizeof(struct ccci_cores_exch_data)
+
+struct ccci_reset_sta
+{
+ int is_allocate;
+ int is_reset;
+ char name[NR_CCCI_RESET_USER_NAME];
+};
+
+typedef struct _modem_runtime
+{
+ int Prefix; // "CCIF"
+
+ int Platform_L; // Hardware Platform String ex: "MT6589E1"
+ int Platform_H;
+ int DriverVersion; // 0x20121001 since W12.39
+ int BootChannel; // Channel to ACK AP with boot ready
+ int BootingStartID; // MD is booting. NORMAL_BOOT_ID or META_BOOT_ID
+ int BootAttributes; // Attributes passing from AP to MD Booting
+ int BootReadyID; // MD response ID if boot successful and ready
+ int MdlogShareMemBase;
+ int MdlogShareMemSize;
+ int PcmShareMemBase;
+ int PcmShareMemSize;
+ int UartPortNum;
+ int UartShareMemBase[CCCI_UART_PORT_NUM]; // <<< Current UART_MAX_PORT_NUM is 8
+ int UartShareMemSize[CCCI_UART_PORT_NUM];
+ int FileShareMemBase;
+ int FileShareMemSize;
+ int RpcShareMemBase;
+ int RpcShareMemSize;
+ int PmicShareMemBase;
+ int PmicShareMemSize;
+ int ExceShareMemBase;
+ int ExceShareMemSize; // 512 Bytes Required
+ int SysShareMemBase;
+ int SysShareMemSize;
+ int IPCShareMemBase;
+ int IPCShareMemSize;
+ int MDULNetShareMemBase;
+ int MDULNetShareMemSize;
+ int MDDLNetShareMemBase;
+ int MDDLNetShareMemSize;
+ int NetPortNum;
+ int NetULCtrlShareMemBase[NET_PORT_NUM]; // <<< Current NET_PORT_NUM is 4
+ int NetULCtrlShareMemSize[NET_PORT_NUM];
+ int NetDLCtrlShareMemBase[NET_PORT_NUM];
+ int NetDLCtrlShareMemSize[NET_PORT_NUM];
+ int MDExExpInfoBase; //md exception expand info memory
+ int MDExExpInfoSize;
+ int IPCMDIlmShareMemBase;
+ int IPCMDIlmShareMemSize;
+ int MiscInfoBase;
+ int MiscInfoSize;
+
+ int CheckSum;
+ int Postfix; //"CCIF"
+}modem_runtime_t;
+
+
+#define CCCI_MD_RUNTIME_DATA_SMEM_SIZE (sizeof(modem_runtime_t))
+
+typedef struct _modem_runtime_info_tag
+{
+ int prefix; //"CCIF"
+ int platform_L; //Hardware platform string. ex: 'TK6516E0'
+ int platform_H;
+ int driver_version; //0x00000923 since W09.23
+ int runtime_data_base;
+ int runtime_data_size;
+ int postfix; //"CCIF"
+}modem_runtime_info_tag_t;
+
+typedef struct _modem_exception_exp
+{
+ int exception_occur;
+ int send_time;
+ int wait_time;
+}modem_exception_exp_t;
+
+
+typedef struct _MD_CALL_BACK_QUEUE {
+ void (*call)(struct _MD_CALL_BACK_QUEUE*,unsigned long data);
+ struct _MD_CALL_BACK_QUEUE *next;
+}MD_CALL_BACK_QUEUE;
+
+typedef struct {
+ spinlock_t lock;
+ MD_CALL_BACK_QUEUE *next;
+ int is_busy;
+ struct tasklet_struct tasklet;
+}MD_CALL_BACK_HEAD_T;
+
+
+#if 0
+struct IMG_CHECK_INFO{
+ char *product_ver; /* debug/release/invalid */
+ char *image_type; /*2G/3G/invalid*/
+ char *platform; /* MT6573_S00(MT6573E1) or MT6573_S01(MT6573E2) */
+ char *build_time; /* build time string */
+ char *build_ver; /* project version, ex:11A_MD.W11.28 */
+};
+
+
+#define NAME_LEN 100
+struct image_info
+{
+ int idx; /*idx=0,modem image; idx=1, dsp image */
+ char file_name[NAME_LEN];
+ unsigned long address;
+ ssize_t size;
+ loff_t offset;
+ struct IMG_CHECK_INFO img_info;
+ struct IMG_CHECK_INFO ap_info;
+ int (*load_firmware)(struct image_info *info);
+};
+#endif
+
+typedef int (*ccci_cores_sleep_info_base_req)(void *);
+typedef int (*ccci_core_eint_config_setup)(int, void *);
+
+
+int __init ccci_md_init_mod_init(void);
+void __exit ccci_md_init_mod_exit(void);
+
+
+int ccci_mdlog_base_req(int md_id, void *addr_vir, void *addr_phy, unsigned int *len);
+int ccci_pcm_base_req(int md_id, void *addr_vir, void *addr_phy, unsigned int *len);
+int ccci_uart_base_req(int md_id, int port, void *addr_vir, void *addr_phy, unsigned int *len);
+int ccci_fs_base_req(int md_id, void *addr_vir, void *addr_phy, unsigned int *len);
+int ccci_rpc_base_req(int md_id, int *addr_vir, int *addr_phy, int *len);
+int ccci_pmic_base_req(int md_id, void *addr_vir, void *addr_phy, int *len);
+int ccci_ipc_base_req(int md_id, void *addr_vir, void *addr_phy, int *len);
+int ccmni_v2_ul_base_req(int md_id, void *addr_vir, void *addr_phy);
+int ccmni_v2_dl_base_req(int md_id, void *addr_vir, void *addr_phy);
+int ccci_ccmni_v2_ctl_mem_base_req(int md_id, int port, int *addr_virt, int *addr_phy, int *len);
+
+
+int md_register_call_chain(int md_id, MD_CALL_BACK_QUEUE *queue);
+int md_unregister_call_chain(int md_id, MD_CALL_BACK_QUEUE *queue);
+void md_call_chain(MD_CALL_BACK_HEAD_T *head,unsigned long data);
+
+int ccci_reset_register(int md_id, char *name);
+int ccci_user_ready_to_reset(int md_id, int handle);
+
+
+int get_curr_md_state(int md_id);
+void check_data_connected(int md_id, int channel);
+
+
+//extern int ccci_sys_smem_base_phy;
+extern int ccci_smem_size ;
+extern int *ccci_smem_virt ;
+extern dma_addr_t ccci_smem_phy;
+extern int is_first_boot;
+extern MD_CALL_BACK_HEAD_T md_notifier;
+
+
+
+#endif // __CCCI_MD_H__
+
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_pmic.h b/drivers/misc/mediatek/dual_ccci/include/ccci_pmic.h
new file mode 100644
index 000000000..c9bf53050
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_pmic.h
@@ -0,0 +1,84 @@
+#ifndef __CCCI_PMIC_H__
+#define __CCCI_PMIC_H__
+
+typedef enum
+{
+ PMIC6326_VSIM_ENABLE = 0,
+ PMIC6326_VSIM_SET_AND_ENABLE = 1,
+ PMIC6236_LOCK = 2,
+ PMIC6326_UNLOCK = 3,
+ PMIC6326_VSIM2_ENABLE = 4,
+ PMIC6326_VSIM2_SET_AND_ENABLE = 5,
+ PMIC6326_MAX
+}pmic6326_ccci_op;
+
+typedef enum
+{
+ PMIC6326_REQ = 0, // Local side send request to remote side
+ PMIC6326_RES = 1 // Remote side send response to local side
+}pmic6326_ccci_type;
+
+/*
+ The CCCI message format (CCIF Mailbox port)
+ | 4 bytes | 4 bytes | 4 bytes | 4 bytes |
+ Magic number Message ID Logical channel Reserved
+ PMIC msg PMIC msg info
+*/
+
+/*
+ PMIC msg format
+ (MSB) (LSB)
+ | 1 byte | 1 byte | 1 byte | 1 byte |
+ Param2 Param1 Type Op
+*/
+
+/*
+ PMIC msg info format
+ (MSB) (LSB)
+ | 1 byte | 1 byte | 2 bytes |
+ Param2 Param1 Exec_time
+*/
+
+
+
+typedef struct
+{
+ unsigned short pmic6326_op; // Operation
+ unsigned short pmic6326_type; // message type: Request or Response
+ unsigned short pmic6326_param1;
+ unsigned short pmic6326_param2;
+}pmic6326_ccci_msg;
+
+typedef struct
+{
+ unsigned int pmic6326_exec_time; // Operation execution time (In ms)
+ unsigned short pmic6326_param1;
+ unsigned short pmic6326_param2;
+}pmic6326_ccci_msg_info;
+
+/*
+ PMIC share memory
+ (MSB) (LSB)
+ | 1 byte | 1 byte | 1 byte | 1 byte |
+ Param2 Param1 Type Op
+ | 1 byte | 1 byte | 2 bytes |
+ Param2 Param1 Exec_time
+*/
+
+typedef struct
+{
+ pmic6326_ccci_msg ccci_msg;
+ pmic6326_ccci_msg_info ccci_msg_info;
+}pmic6326_share_mem_info;
+
+typedef struct
+{
+ pmic6326_ccci_msg ccci_msg;
+ pmic6326_ccci_msg_info ccci_msg_info;
+} shared_mem_pmic_t;
+
+int __init ccci_pmic_init(void);
+void __exit ccci_pmic_exit(void);
+
+#define CCCI_PMIC_SMEM_SIZE sizeof(shared_mem_pmic_t)
+#endif // __CCCI_PMIC_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_rpc.h b/drivers/misc/mediatek/dual_ccci/include/ccci_rpc.h
new file mode 100644
index 000000000..55f7cecf4
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_rpc.h
@@ -0,0 +1,79 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccci_rpc.h
+ *
+ * Project:
+ * --------
+ * YuSu
+ *
+ * Description:
+ * ------------
+ *
+ *
+ * Author:
+ * -------
+ *
+ *
+ ****************************************************************************/
+
+#ifndef __CCCI_RPC_H__
+#define __CCCI_RPC_H__
+
+#define CCCI_SED_LEN_BYTES 16
+typedef struct {unsigned char sed[CCCI_SED_LEN_BYTES]; }sed_t;
+#define SED_INITIALIZER { {[0 ... CCCI_SED_LEN_BYTES-1]=0}}
+/*******************************************************************************
+ * Define marco or constant.
+ *******************************************************************************/
+#define IPC_RPC_EXCEPT_MAX_RETRY 7
+#define IPC_RPC_MAX_RETRY 0xFFFF
+#define IPC_RPC_MAX_ARG_NUM 6 /* parameter number */
+
+#define IPC_RPC_USE_DEFAULT_INDEX -1
+#define IPC_RPC_API_RESP_ID 0xFFFF0000
+#define IPC_RPC_INC_BUF_INDEX(x) (x = (x + 1) % IPC_RPC_REQ_BUFFER_NUM)
+
+/*******************************************************************************
+ * Define data structure.
+ *******************************************************************************/
+typedef enum
+{
+ IPC_RPC_CPSVC_SECURE_ALGO_OP = 0x2001,
+ IPC_RPC_GET_SECRO_OP = 0x2002,
+ IPC_RPC_GET_TDD_EINT_NUM_OP = 0x4001,
+ IPC_RPC_GET_TDD_GPIO_NUM_OP = 0x4002,
+ IPC_RPC_GET_TDD_ADC_NUM_OP = 0x4003,
+ IPC_RPC_GET_EMI_CLK_TYPE_OP = 0x4004,
+ IPC_RPC_GET_EINT_ATTR_OP = 0x4005,
+ IPC_RPC_GET_GPIO_VAL_OP = 0x4006,
+ IPC_RPC_GET_ADC_VAL_OP = 0x4007,
+}RPC_OP_ID;
+
+typedef struct
+{
+ unsigned int len;
+ void *buf;
+}RPC_PKT;
+
+typedef struct
+{
+ unsigned int op_id;
+ unsigned char buf[0];
+}RPC_BUF;
+
+#define FS_NO_ERROR 0
+#define FS_NO_OP -1
+#define FS_PARAM_ERROR -2
+#define FS_NO_FEATURE -3
+#define FS_NO_MATCH -4
+#define FS_FUNC_FAIL -5
+#define FS_ERROR_RESERVED -6
+#define FS_MEM_OVERFLOW -7
+
+extern int ccci_rpc_init(int);
+extern void ccci_rpc_exit(int);
+
+
+#endif // __CCCI_RPC_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccci_tty.h b/drivers/misc/mediatek/dual_ccci/include/ccci_tty.h
new file mode 100644
index 000000000..dd5eff224
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccci_tty.h
@@ -0,0 +1,30 @@
+#ifndef __CCCI_TTY_H__
+#define __CCCI_TTY_H__
+
+#define CCCI_TTY_MODEM 0
+#define CCCI_TTY_META 1
+#define CCCI_TTY_IPC 2
+#define CCCI_TTY_ICUSB 3
+
+typedef struct
+{
+ unsigned read;
+ unsigned write;
+ unsigned length;
+} buffer_control_tty_t;
+
+
+typedef struct
+{
+ buffer_control_tty_t rx_control;
+ buffer_control_tty_t tx_control;
+ unsigned char buffer[0]; // [RX | TX]
+ //unsigned char *tx_buffer;
+} shared_mem_tty_t;
+
+extern void ccci_reset_buffers(shared_mem_tty_t *shared_mem, int size);
+extern int __init ccci_tty_init(int);
+extern void __exit ccci_tty_exit(int);
+
+
+#endif // __CCCI_TTY_H__
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccif.h b/drivers/misc/mediatek/dual_ccci/include/ccif.h
new file mode 100644
index 000000000..b5d6917a2
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccif.h
@@ -0,0 +1,73 @@
+#ifndef __CCIF_H__
+#define __CCIF_H__
+
+// CCIF common macro definition
+#define CCIF_INTR_MAX_RE_ENTER_CNT (5)
+
+
+typedef struct _ccif_statistics
+{
+ unsigned long long irq_cnt;
+ unsigned int re_enter_cnt;
+ unsigned int max_re_enter_cnt;
+}ccif_statistics_t;
+
+typedef enum {
+ CCIF_TOP_HALF_RUNNING=0x0,
+ CCIF_BOTTOM_HALF_RUNNING,
+ CCIF_CALL_BACK_FUNC_LOCKED,
+ CCIF_ISR_INFO_CALL_BACK_LOCKED,
+} ccif_state_bit_t;
+
+typedef struct
+{
+ unsigned int data[2];
+ unsigned int channel;
+ unsigned int reserved;
+} ccif_msg_t;
+
+typedef int (*ccif_push_func_t)(ccif_msg_t*);
+typedef int (*ccif_notify_funct_t)(void);
+
+typedef struct _ccif
+{
+ unsigned long m_reg_base;
+ unsigned long m_md_reg_base;
+ unsigned long m_status;
+ unsigned int m_rx_idx;
+ unsigned int m_tx_idx;
+ unsigned int m_irq_id;
+ unsigned int m_irq_attr;
+ unsigned int m_ccif_type;
+ ccif_statistics_t m_statistics;
+ spinlock_t m_lock;
+ void* m_logic_ctl_block;
+ unsigned int m_irq_dis_cnt;
+ unsigned int m_md_id;
+
+ int (*push_msg)(ccif_msg_t*, void*);
+ void (*notify_push_done)(void*);
+ void (*isr_notify)(int);
+ int (*register_call_back_func)(struct _ccif *, int (*push_func)(ccif_msg_t*, void*), void (*notify_func)(void*));
+ int (*register_isr_notify_func)(struct _ccif *, void (*additional)(int));
+ int (*ccif_init)(struct _ccif *);
+ int (*ccif_de_init)(struct _ccif *);
+ int (*ccif_register_intr)(struct _ccif *);
+ int (*ccif_en_intr)(struct _ccif *);
+ void (*ccif_dis_intr)(struct _ccif *);
+ int (*ccif_dump_reg)(struct _ccif *, unsigned int buf[], int len);
+ int (*ccif_read_phy_ch_data)(struct _ccif *, int ch, unsigned int buf[]);
+ int (*ccif_write_phy_ch_data)(struct _ccif *, unsigned int buf[], int retry_en);
+ int (*ccif_get_rx_ch)(struct _ccif *);
+ int (*ccif_get_busy_state)(struct _ccif *);
+ void (*ccif_set_busy_state)(struct _ccif *, unsigned int val);
+ int (*ccif_ack_phy_ch)(struct _ccif *, int ch);
+ int (*ccif_clear_sram)(struct _ccif *);
+ int (*ccif_write_runtime_data)(struct _ccif *, unsigned int buf[], int len);
+ int (*ccif_intr_handler)(struct _ccif *);
+ int (*ccif_reset)(struct _ccif *);
+}ccif_t;
+
+//ccif_t* ccif_create_instance(ccif_hw_info_t *info, void* ctl_b, int md_id);
+
+#endif //__CCIF_H__ \ No newline at end of file
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccmni_net.h b/drivers/misc/mediatek/dual_ccci/include/ccmni_net.h
new file mode 100644
index 000000000..dc4ef3f9e
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccmni_net.h
@@ -0,0 +1,205 @@
+/************************************
+*
+* CCMNI Memory Layout
+*
+*|------------------------------|
+*| |
+*| |
+*| CCMNI UP-Link Memory |
+*| (Maintained by MD) |
+*| |
+*|------------------------------|
+*| CCMNI1 RX Memory |
+*|------------------------------|
+*| CCMNI2 RX Memory |
+*|------------------------------|
+*| ... |
+*|------------------------------|
+*| CCMNIn RX Memory |
+*|------------------------------|
+*| CCMNI1 - Ctrl Memory |
+*|------------------------------|
+*| CCMNI2 - Ctrl Memory |
+*|------------------------------|
+*| ... |
+*|------------------------------|
+*| CCMNIn - Ctrl Memory |
+*|------------------------------|
+************************************
+*
+* CCMNI ctrl memory layout
+*
+*|------------------------------|
+*| CCMNI1 - TX Read out |
+*|------------------------------|
+*| CCMNI1 - TX Avai out |
+*|------------------------------|
+*| CCMNI1 - TX Avai in |
+*|------------------------------|
+*| CCMNI1 - TX Queue len |
+*|------------------------------|
+*| |
+*| |
+*| CCMNI1 TX Queue |
+*| |
+*| |
+*|------------------------------|
+*| CCMNI1 - RX Read out |
+*|------------------------------|
+*| CCMNI1 - RX Avai out |
+*|------------------------------|
+*| CCMNI1 - RX Avai in |
+*|------------------------------|
+*| CCMNI1 - RX Queue len |
+*|------------------------------|
+*| |
+*| |
+*| CCMNI1 RX Queue |
+*| |
+*| |
+*|------------------------------|
+*************************************
+*
+* CCMNI RX memory layout
+*
+*|------------------------------|
+*| Buffer[0] 1500B + 28B |
+*|------------------------------|
+*| Buffer[1] 1500B + 28B |
+*|------------------------------|
+*| ... |
+*|------------------------------|
+*| Buffer[n] 1500B + 28B |
+*|------------------------------|
+***********************************
+*
+*CCMNI ctrl Q memory layout (ring buffer)
+*For example, ptr_n points to the start address of RX memory's Data field of Buffer[n],
+*len_n stands for the length of RX memory's Data field of Buffer[n] (not including End Byte).
+*
+*|-----------------------------|
+*| ptr_n / len_n |
+*|-----------------------------|
+*| ... |
+*|-----------------------------|
+*| ptr_1 / len_1 |
+*|-----------------------------|
+*| ptr_1 / len_1 |
+*|-----------------------------|
+***********************************/
+
+/****************Data buffer mem layout***************
+*|-------------------------------------------------------------------------------|
+*| DBG(16B) | Header(4B) | Data Field (1500B Max.) + End Byte (1B) + Blank (nB) | Footer (4B) |
+*|-------------------------------------------------------------------------------|
+*
+*|----------------------------------------------------------|
+*| DBG |
+*|----------------------------------------------------------|
+*| port (1B) | avail in no. (1B) | avail out no. (1B) | read out no. (1B) |
+*|----------------------------------------------------------|
+************************************************/
+
+#ifndef __CCCI_CCMNI_H__
+#define __CCCI_CCMNI_H__
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/bitops.h>
+#include <linux/wakelock.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/wait.h>
+#include <linux/dma-mapping.h>
+#include <linux/timer.h>
+#include <linux/if_ether.h>
+#include <asm/bitops.h>
+#include <asm/dma-mapping.h>
+#include <mach/mt_typedefs.h>
+
+#define CCCI_NETWORK 0
+#define CCMNI_MTU 1500
+
+#define CCMNI_CHANNEL_OFFSET 2
+//#define CCMNI_MAX_CHANNELS NET_PORT_NUM
+//#define CCMNI_CHANNEL_CNT CCMNI_V2_PORT_NUM //Currently, we use 3 channels.
+
+
+#define IPV4_VERSION 0x40
+#define IPV6_VERSION 0x60
+
+//Flags bit used for timer
+#define CCMNI_RECV_ACK_PENDING (0)
+#define CCMNI_SEND_PENDING (1)
+#define CCMNI_RECV_PENDING (2)
+
+#define CCMNI_TX_QUEUE 8
+//To store 256 ptr_n & len_n. Normally we use 100.
+//If current channel busy, we may use the rest by negotiating with other channels,
+//other channels may release their unused resources.
+#define CCMNI_CTRL_Q_RX_SIZE (256)
+#define CCMNI_CTRL_Q_TX_SIZE (64)
+
+#define CCMNI_RX_ACK_BOUND (CCMNI_CTRL_Q_RX_SIZE_DEFAULT/4)
+
+#define CCMNI_CTRL_Q_RX_SIZE_DEFAULT 100
+
+#define CCMNI_SINGLE_BUFF_SIZE (CCMNI_MTU + 28)
+#define CCMNI_BUFF_DATA_FIELD_SIZE (CCMNI_SINGLE_BUFF_SIZE -24) //1500+1+3
+
+#define CCCI_CCMNI_SMEM_UL_SIZE (300 * 1024)
+#define CCCI_CCMNI_SMEM_DL_SIZE (300 * CCMNI_SINGLE_BUFF_SIZE)
+
+//Used for negotiating
+#define RX_BUF_RESOURCE_LOWER_BOUND (20)
+#define RX_BUF_RESOURCE_UPPER_BOUND (80) //Should be more than 2*RX_BUF_RESOURCE_OCCUPY_CNT
+#define RX_BUF_RESOURCE_OCCUPY_CNT (20) //((RX_BUF_RESOURCE_UPPER_BOUND - RX_BUF_RESOURCE_LOWER_BOUND)/2 )
+
+
+typedef struct
+{
+ unsigned port;
+ unsigned avai_in_no;
+ unsigned avai_out_no;
+ unsigned read_out_no;
+} dbg_info_ccmni_t;
+
+#define CCMNI_BUFF_DBG_INFO_SIZE (sizeof(dbg_info_ccmni_t))
+#define CCMNI_BUFF_HEADER_SIZE (4)
+#define CCMNI_BUFF_FOOTER_SIZE (4)
+
+#define CCMNI_BUFF_HEADER (0xE1E1E1E1)
+#define CCMNI_BUFF_FOOTER (0xE2E2E2E2)
+#define CCMNI_DATA_END (0xE3)
+
+typedef struct
+{
+ unsigned char *ptr;
+ unsigned len;
+} q_ringbuf_ccmni_t;
+
+typedef struct
+{
+ unsigned avai_in;
+ unsigned avai_out;
+ unsigned read_out;
+ unsigned q_length; //default 256 for Rx
+} buffer_control_ccmni_t;
+
+typedef struct
+{
+ buffer_control_ccmni_t rx_control; //Down Llink
+ q_ringbuf_ccmni_t q_rx_ringbuff[CCMNI_CTRL_Q_RX_SIZE]; //Down Link, default 256
+ buffer_control_ccmni_t tx_control; //Up Link
+ q_ringbuf_ccmni_t q_tx_ringbuff[CCMNI_CTRL_Q_TX_SIZE]; //Up Link, default 64
+} shared_mem_ccmni_t;
+
+#define CCCI_CCMNI_SMEM_SIZE (sizeof(shared_mem_ccmni_t))
+#define CCMNI_DL_CTRL_MEM_SIZE ((sizeof(buffer_control_ccmni_t)) + (CCMNI_CTRL_Q_RX_SIZE * (sizeof(q_ringbuf_ccmni_t))))
+#define CCMNI_UL_CTRL_MEM_SIZE ((sizeof(buffer_control_ccmni_t)) + (CCMNI_CTRL_Q_TX_SIZE * (sizeof(q_ringbuf_ccmni_t))))
+
+#endif // __CCCI_CCMNI_H__ \ No newline at end of file
diff --git a/drivers/misc/mediatek/dual_ccci/include/ccmni_pfp.h b/drivers/misc/mediatek/dual_ccci/include/ccmni_pfp.h
new file mode 100644
index 000000000..3ec9c0e6a
--- /dev/null
+++ b/drivers/misc/mediatek/dual_ccci/include/ccmni_pfp.h
@@ -0,0 +1,120 @@
+/*****************************************************************************
+ *
+ * Filename:
+ * ---------
+ * ccmni_pfp.h
+ *
+ * Project:
+ * --------
+ * YuSu
+ *
+ * Description:
+ * ------------
+ * MT6516 Cross Chip Modem Network Interface - Packet Framing Protocol
+ *
+ * Author:
+ * -------
+ * Stanley Chou (mtk01411)
+ *
+ ****************************************************************************/
+#ifndef __CCCI_CCMNI_PFP_H__
+#define __CCCI_CCMNI_PFP_H__
+/* Compile Option to decide if DYNAMIC_MULTIPLE_FRAME encode/decode is supported or not */
+
+#define MAX_PDP_CONT_NUM 3
+#define PFP_FRAME_START_FLAG 0xF9
+#define PFP_FRAME_MAGIC_NUM 0x66
+/* MAX_PFP_LEN_FIELD_VALUE is the maximum size of one IP Packet */
+#define MAX_PFP_LEN_FIELD_VALUE 1500
+#define FREE_RAW_DATA_BUF_SIZE 2048
+#define FREE_COOKED_DATA_BUF_SIZE 2048
+#define SUPPORT_FRAME_NUM 1
+#define SUPPORT_PKT_NUM 1024
+
+enum frame_flag_t
+{
+ FRAME_START = 0,
+ FRAME_CONTINUOUS,
+ FRAME_END
+};
+
+enum unframe_state_t
+{
+ PARSE_PFP_FRAME_START_FLAG_STATE = 0,
+ PARSE_PFP_FRAME_MAGIC_NUM_STATE,
+ PARSE_PFP_FRAME_LENGTH_FIELD_STATE,
+ PARSE_PFP_FRAME_GET_DATA_STATE
+};
+
+/* Following implementations are designed for PFP(Packet Frame Protocol) */
+typedef struct
+{
+ int frame_size;
+ unsigned char *frame_data;
+} frame_format_t;
+
+typedef struct
+{
+ int num_frames;
+ int pending_data_flag;
+ int consumed_length;
+#ifdef __SUPPORT_DYNAMIC_MULTIPLE_FRAME__
+ frame_format_t *frame_list;
+#else
+ frame_format_t frame_list[SUPPORT_FRAME_NUM];
+#endif
+} frame_info_t;
+
+typedef struct _complete_ippkt_t
+{
+ int pkt_size;
+ unsigned char *pkt_data;
+#ifndef __SUPPORT_DYNAMIC_MULTIPLE_FRAME__
+ int entry_used;
+#endif
+ struct _complete_ippkt_t *next;
+} complete_ippkt_t;
+
+typedef struct _packet_info_t
+{
+ int num_complete_packets;
+ int consumed_length;
+ int try_decode_again;
+ enum unframe_state_t parse_data_state;
+ complete_ippkt_t *pkt_list;
+} packet_info_t;
+
+typedef struct _ccmni_record_t
+{
+ /* Next expected state to be parsed while entering the pfp_unframe() again */
+ enum unframe_state_t unframe_state;
+ /* Record the latest parsed Packet length for getting the data */
+ int pkt_size;
+ /* For fast to find the last node of pkt_list to insert a new parsed IP Pkt into this pkt_list */
+ complete_ippkt_t *last_pkt_node;
+} ccmni_record_t;
+
+extern ccmni_record_t ccmni_dev[];
+
+/* The following buffers are used for testing purpose */
+/* Store one IP Packet data */
+extern unsigned char frame_cooked_data [];
+/* Pack the IP Packet into a Frame sent to Modem */
+extern unsigned char frame_raw_data [];
+extern unsigned char unframe_raw_data [];
+extern unsigned char unframe_cooked_data[];
+
+
+void pfp_reset (int ccmni_inx);
+frame_info_t pfp_frame (unsigned char* raw_data, unsigned char* cooked_data,
+ int cooked_size, int frame_flag, int ccmni_inx);
+packet_info_t pfp_unframe(unsigned char* cooked_data, int cooked_data_buf_size,
+ unsigned char* raw_data, int raw_size, int ccmni_inx);
+void traverse_pkt_list(complete_ippkt_t *node);
+
+#ifndef __SUPPORT_DYNAMIC_MULTIPLE_FRAME__
+complete_ippkt_t* get_one_available_complete_ippkt_entry(void);
+void release_one_used_complete_ippkt_entry(complete_ippkt_t* entry);
+#endif
+
+#endif // __CCCI_CCMNI_PFP_H__ \ No newline at end of file
generated by cgit v1.2.3 (git 2.39.1) at 2026-05-12 20:19:17 +0000