aboutsummaryrefslogtreecommitdiff
path: root/arch/arm64/kernel/traps.c
diff options
context:
space:
mode:
authorGreg Hackmann <ghackmann@google.com>2017-10-04 09:31:34 -0700
committerMister Oyster <oysterized@gmail.com>2018-01-15 22:49:39 +0100
commit44042cc4ca2e9364eef918da3edf9d3ef5b8edce (patch)
tree92d16617a03e6374e80ea89d0713f397699951b0 /arch/arm64/kernel/traps.c
parent1f9cec18064452e5bc0705ee1ae5566d8fa67fce (diff)
arm64: issue isb when trapping CNTVCT_EL0 access
Bug: 68266545 Change-Id: I6005a6e944494257bfc2243fde2f7a09c3fd76c6
Diffstat (limited to 'arch/arm64/kernel/traps.c')
-rw-r--r--arch/arm64/kernel/traps.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 107b25502..9b72ebdc5 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -34,6 +34,7 @@
#include <asm/arch_timer.h>
#include <asm/atomic.h>
+#include <asm/barrier.h>
#include <asm/debug-monitors.h>
#include <asm/esr.h>
#include <asm/traps.h>
@@ -399,6 +400,7 @@ static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
{
int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
+ isb();
if (rt != 31)
regs->regs[rt] = arch_counter_get_cntvct();
regs->pc += 4;