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authorWill Deacon <will.deacon@arm.com>2015-09-02 18:49:28 +0100
committerMoyster <oysterized@gmail.com>2016-08-26 20:01:58 +0200
commitc6350680c5651cbe9c108846450ebe19eea61d27 (patch)
treee47afe255b2a0af02ea650d46a7c4fe260df5b3d
parentddc2c3592a011be6a40330cfb8bbc5ef0843d2ab (diff)
arm64: head.S: initialise mdcr_el2 in el2_setup
commit d10bcd473301888f957ec4b6b12aa3621be78d59 upstream. When entering the kernel at EL2, we fail to initialise the MDCR_EL2 register which controls debug access and PMU capabilities at EL1. This patch ensures that the register is initialised so that all traps are disabled and all the PMU counters are available to the host. When a guest is scheduled, KVM takes care to configure trapping appropriately. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stefan Guendhoer <stefan@guendhoer.com>
-rw-r--r--arch/arm64/kernel/head.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index f9c8478b8..286829e33 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -184,6 +184,11 @@ ENTRY(el2_setup)
msr hstr_el2, xzr // Disable CP15 traps to EL2
#endif
+ /* EL2 debug */
+ mrs x0, pmcr_el0 // Disable debug access traps
+ ubfx x0, x0, #11, #5 // to EL2 and allow access to
+ msr mdcr_el2, x0 // all PMU counters from EL1
+
/* Stage-2 translation */
msr vttbr_el2, xzr