/* * This definitions of the PIC16LF1567 MCU. * * This file is part of the GNU PIC library for SDCC, originally * created by Molnar Karoly 2016. * * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:08 UTC. * * SDCC is licensed under the GNU Public license (GPL) v2. Note that * this license covers the code to the compiler and other executables, * but explicitly does not cover any code or objects generated by sdcc. * * For pic device libraries and header files which are derived from * Microchip header (.inc) and linker script (.lkr) files Microchip * requires that "The header files should state that they are only to be * used with authentic Microchip devices" which makes them incompatible * with the GPL. Pic device libraries and header files are located at * non-free/lib and non-free/include directories respectively. * Sdcc should be run with the --use-non-free command line option in * order to include non-free header files and libraries. * * See http://sdcc.sourceforge.net/ for the latest information on sdcc. */ #include //============================================================================== __at(0x0000) __sfr INDF0; __at(0x0001) __sfr INDF1; __at(0x0002) __sfr PCL; __at(0x0003) __sfr STATUS; __at(0x0003) volatile __STATUSbits_t STATUSbits; __at(0x0004) __sfr FSR0; __at(0x0004) __sfr FSR0L; __at(0x0005) __sfr FSR0H; __at(0x0006) __sfr FSR1; __at(0x0006) __sfr FSR1L; __at(0x0007) __sfr FSR1H; __at(0x0008) __sfr BSR; __at(0x0008) volatile __BSRbits_t BSRbits; __at(0x0009) __sfr WREG; __at(0x000A) __sfr PCLATH; __at(0x000B) __sfr INTCON; __at(0x000B) volatile __INTCONbits_t INTCONbits; __at(0x000C) __sfr PORTA; __at(0x000C) volatile __PORTAbits_t PORTAbits; __at(0x000D) __sfr PORTB; __at(0x000D) volatile __PORTBbits_t PORTBbits; __at(0x000E) __sfr PORTC; __at(0x000E) volatile __PORTCbits_t PORTCbits; __at(0x000F) __sfr PORTD; __at(0x000F) volatile __PORTDbits_t PORTDbits; __at(0x0010) __sfr PORTE; __at(0x0010) volatile __PORTEbits_t PORTEbits; __at(0x0011) __sfr PIR1; __at(0x0011) volatile __PIR1bits_t PIR1bits; __at(0x0012) __sfr PIR2; __at(0x0012) volatile __PIR2bits_t PIR2bits; __at(0x0015) __sfr TMR0; __at(0x0016) __sfr TMR1; __at(0x0016) __sfr TMR1L; __at(0x0017) __sfr TMR1H; __at(0x0018) __sfr T1CON; __at(0x0018) volatile __T1CONbits_t T1CONbits; __at(0x0019) __sfr T1GCON; __at(0x0019) volatile __T1GCONbits_t T1GCONbits; __at(0x001A) __sfr TMR2; __at(0x001B) __sfr PR2; __at(0x001C) __sfr T2CON; __at(0x001C) volatile __T2CONbits_t T2CONbits; __at(0x008C) __sfr TRISA; __at(0x008C) volatile __TRISAbits_t TRISAbits; __at(0x008D) __sfr TRISB; __at(0x008D) volatile __TRISBbits_t TRISBbits; __at(0x008E) __sfr TRISC; __at(0x008E) volatile __TRISCbits_t TRISCbits; __at(0x008F) __sfr TRISD; __at(0x008F) volatile __TRISDbits_t TRISDbits; __at(0x0090) __sfr TRISE; __at(0x0090) volatile __TRISEbits_t TRISEbits; __at(0x0091) __sfr PIE1; __at(0x0091) volatile __PIE1bits_t PIE1bits; __at(0x0092) __sfr PIE2; __at(0x0092) volatile __PIE2bits_t PIE2bits; __at(0x0095) __sfr OPTION_REG; __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; __at(0x0096) __sfr PCON; __at(0x0096) volatile __PCONbits_t PCONbits; __at(0x0097) __sfr WDTCON; __at(0x0097) volatile __WDTCONbits_t WDTCONbits; __at(0x0099) __sfr OSCCON; __at(0x0099) volatile __OSCCONbits_t OSCCONbits; __at(0x009A) __sfr OSCSTAT; __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; __at(0x009B) __sfr ADRES; __at(0x009B) __sfr ADRESL; __at(0x009C) __sfr ADRESH; __at(0x009D) __sfr ADCON0; __at(0x009D) volatile __ADCON0bits_t ADCON0bits; __at(0x009E) __sfr ADCON1; __at(0x009E) volatile __ADCON1bits_t ADCON1bits; __at(0x009F) __sfr ADCON2; __at(0x009F) volatile __ADCON2bits_t ADCON2bits; __at(0x010C) __sfr LATA; __at(0x010C) volatile __LATAbits_t LATAbits; __at(0x010D) __sfr LATB; __at(0x010D) volatile __LATBbits_t LATBbits; __at(0x010E) __sfr LATC; __at(0x010E) volatile __LATCbits_t LATCbits; __at(0x010F) __sfr LATD; __at(0x010F) volatile __LATDbits_t LATDbits; __at(0x0110) __sfr LATE; __at(0x0110) volatile __LATEbits_t LATEbits; __at(0x0116) __sfr BORCON; __at(0x0116) volatile __BORCONbits_t BORCONbits; __at(0x0117) __sfr FVRCON; __at(0x0117) volatile __FVRCONbits_t FVRCONbits; __at(0x011D) __sfr APFCON; __at(0x011D) volatile __APFCONbits_t APFCONbits; __at(0x018C) __sfr ANSELA; __at(0x018C) volatile __ANSELAbits_t ANSELAbits; __at(0x018D) __sfr ANSELB; __at(0x018D) volatile __ANSELBbits_t ANSELBbits; __at(0x018E) __sfr ANSELC; __at(0x018E) volatile __ANSELCbits_t ANSELCbits; __at(0x018F) __sfr ANSELD; __at(0x018F) volatile __ANSELDbits_t ANSELDbits; __at(0x0190) __sfr ANSELE; __at(0x0190) volatile __ANSELEbits_t ANSELEbits; __at(0x0191) __sfr PMADR; __at(0x0191) __sfr PMADRL; __at(0x0192) __sfr PMADRH; __at(0x0193) __sfr PMDAT; __at(0x0193) __sfr PMDATL; __at(0x0194) __sfr PMDATH; __at(0x0195) __sfr PMCON1; __at(0x0195) volatile __PMCON1bits_t PMCON1bits; __at(0x0196) __sfr PMCON2; __at(0x0199) __sfr RCREG; __at(0x019A) __sfr TXREG; __at(0x019B) __sfr SPBRG; __at(0x019B) __sfr SPBRGL; __at(0x019C) __sfr SPBRGH; __at(0x019D) __sfr RCSTA; __at(0x019D) volatile __RCSTAbits_t RCSTAbits; __at(0x019E) __sfr TXSTA; __at(0x019E) volatile __TXSTAbits_t TXSTAbits; __at(0x019F) __sfr BAUDCON; __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; __at(0x020D) __sfr WPUB; __at(0x020D) volatile __WPUBbits_t WPUBbits; __at(0x0210) __sfr WPUE; __at(0x0210) volatile __WPUEbits_t WPUEbits; __at(0x0211) __sfr SSP1BUF; __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits; __at(0x0211) __sfr SSPBUF; __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits; __at(0x0212) __sfr SSP1ADD; __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits; __at(0x0212) __sfr SSPADD; __at(0x0212) volatile __SSPADDbits_t SSPADDbits; __at(0x0213) __sfr SSP1MSK; __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits; __at(0x0213) __sfr SSPMSK; __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits; __at(0x0214) __sfr SSP1STAT; __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; __at(0x0214) __sfr SSPSTAT; __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; __at(0x0215) __sfr SSP1CON; __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits; __at(0x0215) __sfr SSP1CON1; __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; __at(0x0215) __sfr SSPCON; __at(0x0215) volatile __SSPCONbits_t SSPCONbits; __at(0x0215) __sfr SSPCON1; __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; __at(0x0216) __sfr SSP1CON2; __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; __at(0x0216) __sfr SSPCON2; __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; __at(0x0217) __sfr SSP1CON3; __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; __at(0x0217) __sfr SSPCON3; __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; __at(0x0218) __sfr SSPLVL; __at(0x0218) volatile __SSPLVLbits_t SSPLVLbits; __at(0x0219) __sfr SSP2BUF; __at(0x0219) volatile __SSP2BUFbits_t SSP2BUFbits; __at(0x021A) __sfr SSP2ADD; __at(0x021A) volatile __SSP2ADDbits_t SSP2ADDbits; __at(0x021B) __sfr SSP2MSK; __at(0x021B) volatile __SSP2MSKbits_t SSP2MSKbits; __at(0x021C) __sfr SSP2STAT; __at(0x021C) volatile __SSP2STATbits_t SSP2STATbits; __at(0x021D) __sfr SSP2CON; __at(0x021D) volatile __SSP2CONbits_t SSP2CONbits; __at(0x021D) __sfr SSP2CON1; __at(0x021D) volatile __SSP2CON1bits_t SSP2CON1bits; __at(0x021E) __sfr SSP2CON2; __at(0x021E) volatile __SSP2CON2bits_t SSP2CON2bits; __at(0x021F) __sfr SSP2CON3; __at(0x021F) volatile __SSP2CON3bits_t SSP2CON3bits; __at(0x0394) __sfr IOCBP; __at(0x0394) volatile __IOCBPbits_t IOCBPbits; __at(0x0395) __sfr IOCBN; __at(0x0395) volatile __IOCBNbits_t IOCBNbits; __at(0x0396) __sfr IOCBF; __at(0x0396) volatile __IOCBFbits_t IOCBFbits; __at(0x0415) __sfr TMR4; __at(0x0416) __sfr PR4; __at(0x0417) __sfr T4CON; __at(0x0417) volatile __T4CONbits_t T4CONbits; __at(0x0611) __sfr PWM1DCL; __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits; __at(0x0612) __sfr PWM1DCH; __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits; __at(0x0613) __sfr PWM1CON; __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits; __at(0x0613) __sfr PWM1CON0; __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits; __at(0x0614) __sfr PWM2DCL; __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits; __at(0x0615) __sfr PWM2DCH; __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits; __at(0x0616) __sfr PWM2CON; __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits; __at(0x0616) __sfr PWM2CON0; __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits; __at(0x061D) __sfr PWMTMRS; __at(0x061D) volatile __PWMTMRSbits_t PWMTMRSbits; __at(0x061E) __sfr PWM1AOE; __at(0x061E) volatile __PWM1AOEbits_t PWM1AOEbits; __at(0x061F) __sfr PWM2AOE; __at(0x061F) volatile __PWM2AOEbits_t PWM2AOEbits; __at(0x0691) __sfr ADCTX; __at(0x0691) volatile __ADCTXbits_t ADCTXbits; __at(0x0692) __sfr AAD1TX; __at(0x0692) __sfr AAD1TX0; __at(0x0692) volatile __AAD1TX0bits_t AAD1TX0bits; __at(0x0692) __sfr AD1TX; __at(0x0692) __sfr AD1TX0; __at(0x0692) volatile __AD1TX0bits_t AD1TX0bits; __at(0x0693) __sfr AAD1TX1; __at(0x0693) volatile __AAD1TX1bits_t AAD1TX1bits; __at(0x0693) __sfr AD1TX1; __at(0x0693) volatile __AD1TX1bits_t AD1TX1bits; __at(0x0694) __sfr AAD2TX; __at(0x0694) __sfr AAD2TX0; __at(0x0694) volatile __AAD2TX0bits_t AAD2TX0bits; __at(0x0694) __sfr AD2TX; __at(0x0694) __sfr AD2TX0; __at(0x0694) volatile __AD2TX0bits_t AD2TX0bits; __at(0x0695) __sfr AAD2TX1; __at(0x0695) volatile __AAD2TX1bits_t AAD2TX1bits; __at(0x0695) __sfr AD2TX1; __at(0x0695) volatile __AD2TX1bits_t AD2TX1bits; __at(0x0711) __sfr AAD1CON0; __at(0x0711) volatile __AAD1CON0bits_t AAD1CON0bits; __at(0x0711) __sfr AADCON0; __at(0x0711) volatile __AADCON0bits_t AADCON0bits; __at(0x0711) __sfr AD1CON0; __at(0x0711) volatile __AD1CON0bits_t AD1CON0bits; __at(0x0712) __sfr AADCON1; __at(0x0712) volatile __AADCON1bits_t AADCON1bits; __at(0x0712) __sfr ADCOMCON; __at(0x0712) volatile __ADCOMCONbits_t ADCOMCONbits; __at(0x0713) __sfr AAD1CON2; __at(0x0713) volatile __AAD1CON2bits_t AAD1CON2bits; __at(0x0713) __sfr AADCON2; __at(0x0713) volatile __AADCON2bits_t AADCON2bits; __at(0x0713) __sfr AD1CON2; __at(0x0713) volatile __AD1CON2bits_t AD1CON2bits; __at(0x0714) __sfr AAD1CON3; __at(0x0714) volatile __AAD1CON3bits_t AAD1CON3bits; __at(0x0714) __sfr AADCON3; __at(0x0714) volatile __AADCON3bits_t AADCON3bits; __at(0x0714) __sfr AD1CON3; __at(0x0714) volatile __AD1CON3bits_t AD1CON3bits; __at(0x0715) __sfr AADSTAT; __at(0x0715) volatile __AADSTATbits_t AADSTATbits; __at(0x0715) __sfr ADSTAT; __at(0x0715) volatile __ADSTATbits_t ADSTATbits; __at(0x0716) __sfr AAD1PRE; __at(0x0716) volatile __AAD1PREbits_t AAD1PREbits; __at(0x0716) __sfr AADPRE; __at(0x0716) volatile __AADPREbits_t AADPREbits; __at(0x0716) __sfr AD1PRE; __at(0x0716) volatile __AD1PREbits_t AD1PREbits; __at(0x0716) __sfr AD1PRECON; __at(0x0716) volatile __AD1PRECONbits_t AD1PRECONbits; __at(0x0717) __sfr AAD1ACQ; __at(0x0717) volatile __AAD1ACQbits_t AAD1ACQbits; __at(0x0717) __sfr AADACQ; __at(0x0717) volatile __AADACQbits_t AADACQbits; __at(0x0717) __sfr AD1ACQ; __at(0x0717) volatile __AD1ACQbits_t AD1ACQbits; __at(0x0717) __sfr AD1ACQCON; __at(0x0717) volatile __AD1ACQCONbits_t AD1ACQCONbits; __at(0x0718) __sfr AAD1GRD; __at(0x0718) volatile __AAD1GRDbits_t AAD1GRDbits; __at(0x0718) __sfr AADGRD; __at(0x0718) volatile __AADGRDbits_t AADGRDbits; __at(0x0718) __sfr AD1GRD; __at(0x0718) volatile __AD1GRDbits_t AD1GRDbits; __at(0x0719) __sfr AAD1CAP; __at(0x0719) volatile __AAD1CAPbits_t AAD1CAPbits; __at(0x0719) __sfr AAD1CAPCON; __at(0x0719) volatile __AAD1CAPCONbits_t AAD1CAPCONbits; __at(0x0719) __sfr AADCAP; __at(0x0719) volatile __AADCAPbits_t AADCAPbits; __at(0x0719) __sfr AD1CAPCON; __at(0x0719) volatile __AD1CAPCONbits_t AD1CAPCONbits; __at(0x071A) __sfr AAD1RES0; __at(0x071A) __sfr AAD1RES0L; __at(0x071A) __sfr AD1RES0; __at(0x071A) __sfr AD1RES0L; __at(0x071A) __sfr ADRES0; __at(0x071B) __sfr AAD1RES0H; __at(0x071B) __sfr AD1RES0H; __at(0x071C) __sfr AAD1RES1; __at(0x071C) __sfr AAD1RES1L; __at(0x071C) __sfr AD1RES1; __at(0x071C) __sfr AD1RES1L; __at(0x071C) __sfr ADRES1; __at(0x071D) __sfr AAD1RES1H; __at(0x071D) __sfr AD1RES1H; __at(0x071E) __sfr AAD1CH; __at(0x071E) __sfr AAD1CH0; __at(0x071E) volatile __AAD1CH0bits_t AAD1CH0bits; __at(0x071E) __sfr AD1CH; __at(0x071E) __sfr AD1CH0; __at(0x071E) volatile __AD1CH0bits_t AD1CH0bits; __at(0x071F) __sfr AAD1CH1; __at(0x071F) volatile __AAD1CH1bits_t AAD1CH1bits; __at(0x071F) __sfr AD1CH1; __at(0x071F) volatile __AD1CH1bits_t AD1CH1bits; __at(0x0791) __sfr AAD2CON0; __at(0x0791) volatile __AAD2CON0bits_t AAD2CON0bits; __at(0x0791) __sfr AD2CON0; __at(0x0791) volatile __AD2CON0bits_t AD2CON0bits; __at(0x0793) __sfr AAD2CON2; __at(0x0793) volatile __AAD2CON2bits_t AAD2CON2bits; __at(0x0793) __sfr AD2CON2; __at(0x0793) volatile __AD2CON2bits_t AD2CON2bits; __at(0x0794) __sfr AAD2CON3; __at(0x0794) volatile __AAD2CON3bits_t AAD2CON3bits; __at(0x0794) __sfr AD2CON3; __at(0x0794) volatile __AD2CON3bits_t AD2CON3bits; __at(0x0796) __sfr AAD2PRE; __at(0x0796) volatile __AAD2PREbits_t AAD2PREbits; __at(0x0796) __sfr AD2PRE; __at(0x0796) volatile __AD2PREbits_t AD2PREbits; __at(0x0796) __sfr AD2PRECON; __at(0x0796) volatile __AD2PRECONbits_t AD2PRECONbits; __at(0x0797) __sfr AAD2ACQ; __at(0x0797) volatile __AAD2ACQbits_t AAD2ACQbits; __at(0x0797) __sfr AD2ACQ; __at(0x0797) volatile __AD2ACQbits_t AD2ACQbits; __at(0x0797) __sfr AD2ACQCON; __at(0x0797) volatile __AD2ACQCONbits_t AD2ACQCONbits; __at(0x0798) __sfr AAD2GRD; __at(0x0798) volatile __AAD2GRDbits_t AAD2GRDbits; __at(0x0798) __sfr AD2GRD; __at(0x0798) volatile __AD2GRDbits_t AD2GRDbits; __at(0x0799) __sfr AAD2CAP; __at(0x0799) volatile __AAD2CAPbits_t AAD2CAPbits; __at(0x0799) __sfr AAD2CAPCON; __at(0x0799) volatile __AAD2CAPCONbits_t AAD2CAPCONbits; __at(0x0799) __sfr AD2CAPCON; __at(0x0799) volatile __AD2CAPCONbits_t AD2CAPCONbits; __at(0x079A) __sfr AAD2RES0; __at(0x079A) __sfr AAD2RES0L; __at(0x079A) __sfr AD2RES0; __at(0x079B) __sfr AAD2RES0H; __at(0x079C) __sfr AAD2RES1; __at(0x079C) __sfr AAD2RES1L; __at(0x079C) __sfr AD2RES1; __at(0x079D) __sfr AAD2RES1H; __at(0x079E) __sfr AAD2CH; __at(0x079E) __sfr AAD2CH0; __at(0x079E) volatile __AAD2CH0bits_t AAD2CH0bits; __at(0x079E) __sfr AD2CH; __at(0x079E) __sfr AD2CH0; __at(0x079E) volatile __AD2CH0bits_t AD2CH0bits; __at(0x079F) __sfr AAD2CH1; __at(0x079F) volatile __AAD2CH1bits_t AAD2CH1bits; __at(0x079F) __sfr AD2CH1; __at(0x079F) volatile __AD2CH1bits_t AD2CH1bits; __at(0x0F8C) __sfr ICDIO; __at(0x0F8C) volatile __ICDIObits_t ICDIObits; __at(0x0F8D) __sfr ICDCON0; __at(0x0F8D) volatile __ICDCON0bits_t ICDCON0bits; __at(0x0F91) __sfr ICDSTAT; __at(0x0F91) volatile __ICDSTATbits_t ICDSTATbits; __at(0x0F96) __sfr ICDINSTL; __at(0x0F96) volatile __ICDINSTLbits_t ICDINSTLbits; __at(0x0F97) __sfr ICDINSTH; __at(0x0F97) volatile __ICDINSTHbits_t ICDINSTHbits; __at(0x0F9C) __sfr ICDBK0CON; __at(0x0F9C) volatile __ICDBK0CONbits_t ICDBK0CONbits; __at(0x0F9D) __sfr ICDBK0L; __at(0x0F9D) volatile __ICDBK0Lbits_t ICDBK0Lbits; __at(0x0F9E) __sfr ICDBK0H; __at(0x0F9E) volatile __ICDBK0Hbits_t ICDBK0Hbits; __at(0x0FE3) __sfr BSRICDSHAD; __at(0x0FE4) __sfr STATUS_SHAD; __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; __at(0x0FE5) __sfr WREG_SHAD; __at(0x0FE6) __sfr BSR_SHAD; __at(0x0FE7) __sfr PCLATH_SHAD; __at(0x0FE8) __sfr FSR0L_SHAD; __at(0x0FE9) __sfr FSR0H_SHAD; __at(0x0FEA) __sfr FSR1L_SHAD; __at(0x0FEB) __sfr FSR1H_SHAD; __at(0x0FED) __sfr STKPTR; __at(0x0FEE) __sfr TOSL; __at(0x0FEF) __sfr TOSH;