/** * exception.c * * Exception handling code (part 2) */ #include #include #include #define DICR *((unsigned int*)0x1f8010f4) #define IPENDING *((volatile unsigned int*)0x1f801070) #define IMASK *((volatile unsigned int*)0x1f801074) void __psxsdk_exception_manager(); void (*_EXC_vblank_handler)(); void (*_EXC_cdrom_handler)(); void (*_EXC_sio_handler)(unsigned char *data); void (*_EXC_dma_handler)(); unsigned int _EXC_vblank_handler_set; unsigned int _EXC_cdrom_handler_set; unsigned int _EXC_sio_handler_set; unsigned int _EXC_dma_handler_set; volatile int __psxsdk_gpu_dma_finished; void __psxsdk_real_exception_handler() { unsigned int Cause = get_cop0_register(COP0_CAUSE); unsigned int Cause_excCode = (Cause >> 2) & 31; unsigned int Cause_IP = (Cause >> 8) & 255; unsigned int SR = get_cop0_register(COP0_SR); unsigned int SR_IM = (SR >> 8) & 255; int i; /* unsigned int oldSR = SR; unsigned int psxIP = IPENDING; unsigned int psxIM = IMASK; unsigned int sio_data;*/ if(Cause_excCode == 0) // interrupt generated the exception { /*for(i = 0; i < 8; i++) { if((Cause_IP & (1<> 24) & 127; if(irq & (1<<2)) // GPU __psxsdk_gpu_dma_finished = 1; // Acknowledge DICR = s_dicr; // Waste some cycles, so that the acknowledgement is reported // int x; // for(x = 0; x < 1000; x++); } extern void _internal_cdromlib_callback(); void __PSX_Init_NoBios() { _EXC_vblank_handler = NULL; _EXC_cdrom_handler = _internal_cdromlib_callback; _EXC_dma_handler = __psxsdk_dma_handler; _EXC_sio_handler = NULL; _EXC_vblank_handler_set = 0; _EXC_cdrom_handler_set = 0; _EXC_dma_handler_set = 1; _EXC_sio_handler_set = 0; IMASK = 0; // Clear Mask IPENDING = 0; // Clear pending interrupts // Disable interrupts set_cop0_register(COP0_SR, 0); // Change exception vector to point to our exception manager *((unsigned int*)0x80000080) = 0x08000000 | ((((unsigned int)__psxsdk_exception_manager)>>2) & 0x3FFFFFF); *((unsigned int*)0x80000084) = 0; // Enable interrupt generation, and interrupt 2 (PlayStation Interrupt Controller) set_cop0_register(COP0_SR, (1<<10) | 1); // Enable VBlank, CDROM and DMA IRQs (on PlayStation Interrupt Controller) IMASK = 1 | /* CDROM */ /*4 |*/ 8; // Set DMA channel priority DPCR = 0x07654321; // Enable DMA IRQ master, and IRQ generation for DMA channel 2 (GPU) DICR = (1<<23) | (1<<(16+2)); // Setup variables __psxsdk_gpu_dma_finished = 1; }