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authorspicyjpeg <thatspicyjpeg@gmail.com>2023-05-11 23:08:11 +0200
committerspicyjpeg <thatspicyjpeg@gmail.com>2023-05-11 23:08:11 +0200
commit2021cdfca29dc5c98e570a674ac97f92f47a1129 (patch)
treea7355b8852ae4e9d217560b0cab2dcc02ab8c249 /libpsn00b/psxgpu/common.c
parent3b696fc431a9c3f2aa7ea4f27aec20ce5dd67859 (diff)
downloadpsn00bsdk-2021cdfca29dc5c98e570a674ac97f92f47a1129.tar.gz
Add GPU IRQ variants of all display list APIs
Diffstat (limited to 'libpsn00b/psxgpu/common.c')
-rw-r--r--libpsn00b/psxgpu/common.c81
1 files changed, 0 insertions, 81 deletions
diff --git a/libpsn00b/psxgpu/common.c b/libpsn00b/psxgpu/common.c
index 8af6c5b..7e0758b 100644
--- a/libpsn00b/psxgpu/common.c
+++ b/libpsn00b/psxgpu/common.c
@@ -270,87 +270,6 @@ void *DrawSyncCallback(void (*func)(void)) {
return old_callback;
}
-/* OT and primitive drawing API */
-
-void ClearOTagR(uint32_t *ot, size_t length) {
- _sdk_validate_args_void(ot && length);
-
- DMA_MADR(DMA_OTC) = (uint32_t) &ot[length - 1];
- DMA_BCR(DMA_OTC) = length & 0xffff;
- DMA_CHCR(DMA_OTC) = 0x11000002;
-
- while (DMA_CHCR(DMA_OTC) & (1 << 24))
- __asm__ volatile("");
-}
-
-void ClearOTag(uint32_t *ot, size_t length) {
- _sdk_validate_args_void(ot && length);
-
- // DMA6 only supports writing to RAM in reverse order (last to first), so
- // the OT has to be cleared in software here. This function is thus much
- // slower than ClearOTagR().
- // https://problemkaputt.de/psx-spx.htm#dmachannels
- for (int i = 0; i < (length - 1); i++)
- ot[i] = (uint32_t) &ot[i + 1] & 0x7fffff;
- //setaddr(&ot[i], &ot[i + 1]);
-
- ot[length - 1] = 0xffffff;
- //termPrim(&ot[length - 1]);
-}
-
-void AddPrim(uint32_t *ot, const void *pri) {
- _sdk_validate_args_void(ot && pri);
-
- addPrim(ot, pri);
-}
-
-int DrawOTag(const uint32_t *ot) {
- _sdk_validate_args(ot, -1);
-
- return EnqueueDrawOp((void *) &DrawOTag2, (uint32_t) ot, 0, 0);
-}
-
-void DrawOTag2(const uint32_t *ot) {
- _sdk_validate_args_void(ot);
-
- SetDrawOpType(DRAWOP_TYPE_DMA);
- GPU_GP1 = 0x04000002; // Enable DMA request, route to GP0
-
- while (DMA_CHCR(DMA_GPU) & (1 << 24))
- __asm__ volatile("");
-
- DMA_MADR(DMA_GPU) = (uint32_t) ot;
- DMA_BCR(DMA_GPU) = 0;
- DMA_CHCR(DMA_GPU) = 0x01000401;
-}
-
-int DrawBuffer(const uint32_t *buf, size_t length) {
- _sdk_validate_args(buf && length && (length <= 0xffff), -1);
-
- return EnqueueDrawOp((void *) &DrawBuffer2, (uint32_t) buf, length, 0);
-}
-
-void DrawBuffer2(const uint32_t *buf, size_t length) {
- _sdk_validate_args_void(buf && length && (length <= 0xffff));
-
- SetDrawOpType(DRAWOP_TYPE_DMA);
- GPU_GP1 = 0x04000002; // Enable DMA request, route to GP0
-
- while (DMA_CHCR(DMA_GPU) & (1 << 24))
- __asm__ volatile("");
-
- DMA_MADR(DMA_GPU) = (uint32_t) buf;
- DMA_BCR(DMA_GPU) = 0x00000001 | (length << 16);
- DMA_CHCR(DMA_GPU) = 0x01000201;
-}
-
-void DrawPrim(const uint32_t *pri) {
- _sdk_validate_args_void(pri);
-
- DrawSync(0);
- DrawBuffer2(&pri[1], getlen(pri));
-}
-
/* Queue pause/resume API */
int IsIdleGPU(int timeout) {