133 lines
4.1 KiB
C
133 lines
4.1 KiB
C
#include "gdbstub_sys.h"
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#include "gdbstub.h"
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#include "libpcsxcore/socket.h"
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#include "libpcsxcore/r3000a.h"
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#include <stdio.h>
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static int server_socket, client_socket;
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static void update_regs(struct dbg_state *const dbg_state)
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{
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dbg_state->registers[DBG_CPU_MIPS_I_REG_ZERO] = 0;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_AT] = psxRegs.GPR.n.at;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_V0] = psxRegs.GPR.n.v0;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_V1] = psxRegs.GPR.n.v1;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_A0] = psxRegs.GPR.n.a0;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_A1] = psxRegs.GPR.n.a1;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_A2] = psxRegs.GPR.n.a2;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_A3] = psxRegs.GPR.n.a3;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T0] = psxRegs.GPR.n.t0;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T1] = psxRegs.GPR.n.t1;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T2] = psxRegs.GPR.n.t2;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T3] = psxRegs.GPR.n.t3;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T4] = psxRegs.GPR.n.t4;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T5] = psxRegs.GPR.n.t5;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T6] = psxRegs.GPR.n.t6;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T7] = psxRegs.GPR.n.t7;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S0] = psxRegs.GPR.n.s0;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S1] = psxRegs.GPR.n.s1;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S2] = psxRegs.GPR.n.s2;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S3] = psxRegs.GPR.n.s3;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S4] = psxRegs.GPR.n.s4;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S5] = psxRegs.GPR.n.s5;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S6] = psxRegs.GPR.n.s6;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S7] = psxRegs.GPR.n.s7;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T8] = psxRegs.GPR.n.t8;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_T9] = psxRegs.GPR.n.t9;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_K0] = psxRegs.GPR.n.k0;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_K1] = psxRegs.GPR.n.k1;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_GP] = psxRegs.GPR.n.gp;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_SP] = psxRegs.GPR.n.sp;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_S8] = psxRegs.GPR.n.s8;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_RA] = psxRegs.GPR.n.ra;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_SR] = psxRegs.CP0.n.Status;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_LO] = psxRegs.GPR.r[32];
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dbg_state->registers[DBG_CPU_MIPS_I_REG_HI] = psxRegs.GPR.r[33];
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dbg_state->registers[DBG_CPU_MIPS_I_REG_BAD] = psxRegs.CP0.n.BadVAddr;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_CAUSE] = psxRegs.CP0.n.Cause;
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dbg_state->registers[DBG_CPU_MIPS_I_REG_PC] = psxRegs.pc;
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}
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void dbg_sys_process(void)
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{
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static struct dbg_state dbg_state;
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update_regs(&dbg_state);
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dbg_main(&dbg_state);
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}
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int dbg_sys_getc(void)
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{
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while (1) {
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char packet;
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size_t len = sizeof packet;
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const enum read_socket_err err = ReadSocket(client_socket, &packet, &len);
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switch (err) {
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case READ_SOCKET_OK:
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return packet;
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case READ_SOCKET_SHUTDOWN:
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client_socket = 0;
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return EOF;
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case READ_SOCKET_ERR_INVALID_ARG:
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/* Fall through. */
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case READ_SOCKET_ERR_RECV:
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/* Fall through. */
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default:
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break;
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}
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}
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}
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int dbg_sys_putchar(int ch)
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{
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WriteSocket(client_socket, (const char *)&ch, sizeof (char));
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}
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int dbg_sys_mem_readb(address addr, char *val)
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{
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*val = psxMemRead8(addr);
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return 0;
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}
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int dbg_sys_mem_writeb(address addr, char val)
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{
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psxMemWrite8(addr, val);
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return 0;
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}
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int dbg_sys_continue(void)
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{
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return 0;
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}
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int dbg_sys_step(void)
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{
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return 0;
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}
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void dbg_start(void)
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{
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const unsigned short port = 3333;
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if (server_socket > 0)
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StopServer(server_socket);
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server_socket = StartServer(port);
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if (server_socket > 0)
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printf("GDB server started on port %hu.\n", port);
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else
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fprintf(stderr, "Could not start GDB server\n");
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}
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