84 lines
2.9 KiB
C
84 lines
2.9 KiB
C
/***************************************************************************
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* Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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#ifndef __PSXDMA_H__
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#define __PSXDMA_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "psxcommon.h"
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#include "r3000a.h"
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#include "psxhw.h"
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#include "psxmem.h"
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#define GPUDMA_INT(eCycle) { \
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psxRegs.interrupt |= (1 << PSXINT_GPUDMA); \
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psxRegs.intCycle[PSXINT_GPUDMA].cycle = eCycle; \
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psxRegs.intCycle[PSXINT_GPUDMA].sCycle = psxRegs.cycle; \
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}
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#define SPUDMA_INT(eCycle) { \
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psxRegs.interrupt |= (1 << PSXINT_SPUDMA); \
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psxRegs.intCycle[PSXINT_SPUDMA].cycle = eCycle; \
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psxRegs.intCycle[PSXINT_SPUDMA].sCycle = psxRegs.cycle; \
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}
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#define MDECOUTDMA_INT(eCycle) { \
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psxRegs.interrupt |= (1 << PSXINT_MDECOUTDMA); \
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psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle = eCycle; \
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psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle = psxRegs.cycle; \
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}
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#define MDECINDMA_INT(eCycle) { \
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psxRegs.interrupt |= (1 << PSXINT_MDECINDMA); \
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psxRegs.intCycle[PSXINT_MDECINDMA].cycle = eCycle; \
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psxRegs.intCycle[PSXINT_MDECINDMA].sCycle = psxRegs.cycle; \
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}
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#define GPUOTCDMA_INT(eCycle) { \
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psxRegs.interrupt |= (1 << PSXINT_GPUOTCDMA); \
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psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle = eCycle; \
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psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle = psxRegs.cycle; \
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}
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#define CDRDMA_INT(eCycle) { \
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psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \
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psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \
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psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \
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}
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/*
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DMA5 = N/A (PIO)
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*/
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void psxDma3(u32 madr, u32 bcr, u32 chcr);
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void psxDma4(u32 madr, u32 bcr, u32 chcr);
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void psxDma6(u32 madr, u32 bcr, u32 chcr);
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void spuInterrupt();
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void mdec0Interrupt();
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void gpuotcInterrupt();
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void cdrDmaInterrupt();
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#ifdef __cplusplus
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}
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#endif
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#endif
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