86 lines
1.7 KiB
C
86 lines
1.7 KiB
C
#ifndef GDBSTUB_SYS_H
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#define GDBSTUB_SYS_H
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typedef unsigned int address;
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enum DBG_REGISTER {
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DBG_CPU_MIPS_I_REG_ZERO,
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DBG_CPU_MIPS_I_REG_AT,
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DBG_CPU_MIPS_I_REG_V0,
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DBG_CPU_MIPS_I_REG_V1,
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DBG_CPU_MIPS_I_REG_A0,
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DBG_CPU_MIPS_I_REG_A1,
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DBG_CPU_MIPS_I_REG_A2,
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DBG_CPU_MIPS_I_REG_A3,
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DBG_CPU_MIPS_I_REG_T0,
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DBG_CPU_MIPS_I_REG_T1,
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DBG_CPU_MIPS_I_REG_T2,
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DBG_CPU_MIPS_I_REG_T3,
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DBG_CPU_MIPS_I_REG_T4,
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DBG_CPU_MIPS_I_REG_T5,
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DBG_CPU_MIPS_I_REG_T6,
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DBG_CPU_MIPS_I_REG_T7,
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DBG_CPU_MIPS_I_REG_S0,
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DBG_CPU_MIPS_I_REG_S1,
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DBG_CPU_MIPS_I_REG_S2,
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DBG_CPU_MIPS_I_REG_S3,
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DBG_CPU_MIPS_I_REG_S4,
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DBG_CPU_MIPS_I_REG_S5,
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DBG_CPU_MIPS_I_REG_S6,
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DBG_CPU_MIPS_I_REG_S7,
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DBG_CPU_MIPS_I_REG_T8,
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DBG_CPU_MIPS_I_REG_T9,
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DBG_CPU_MIPS_I_REG_K0,
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DBG_CPU_MIPS_I_REG_K1,
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DBG_CPU_MIPS_I_REG_GP,
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DBG_CPU_MIPS_I_REG_SP,
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DBG_CPU_MIPS_I_REG_S8,
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DBG_CPU_MIPS_I_REG_RA,
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DBG_CPU_MIPS_I_REG_SR,
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DBG_CPU_MIPS_I_REG_LO,
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DBG_CPU_MIPS_I_REG_HI,
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DBG_CPU_MIPS_I_REG_BAD,
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DBG_CPU_MIPS_I_REG_CAUSE,
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DBG_CPU_MIPS_I_REG_PC,
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/* GDB requests 73, where 38 are the ones above and the rest
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* are the floating-point registers. This way, unused registers
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* are left to zero. */
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DBG_CPU_NUM_REGISTERS = 73
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};
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typedef unsigned int reg;
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struct dbg_state {
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int signum;
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reg registers[DBG_CPU_NUM_REGISTERS];
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};
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struct msg {
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enum {
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MSG_TYPE_CONTINUE,
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MSG_TYPE_BREAKPOINT,
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MSG_TYPE_STEP,
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MSG_TYPE_ACK,
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MSG_TYPE_REMOVE_BREAKPOINT,
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MSG_TYPE_SHUTDOWN,
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/* Response frames. */
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MSG_TYPE_HIT,
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MSG_TYPE_BREAK,
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} type;
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union {
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struct {
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address addr;
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} breakpoint;
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} data;
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};
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void dbg_start(void);
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void dbg_stop(void);
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void gdbstub_sys_send(const struct msg *msg);
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void gdbstub_sys_recv(struct msg *msg);
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#endif /* GDBSTUB_SYS_H */
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