From 2db43c9279b994dfaf5f7f74c17b86d6b637aefd Mon Sep 17 00:00:00 2001
From: "SND\\weimingzhi_cp"
 <SND\weimingzhi_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97>
Date: Wed, 12 Jan 2011 04:37:52 +0000
Subject: - Fixed: -psxout/-slowboot not effective for GNU/Linux.

git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@62027 e17a0e51-4ae3-4d35-97c3-1a29b211df97
---
 libpcsxcore/r3000a.h | 146 +++++++++++++++++++++++++--------------------------
 1 file changed, 73 insertions(+), 73 deletions(-)

(limited to 'libpcsxcore')

diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index e4af4037..ae48a5c0 100644
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -178,79 +178,79 @@ typedef struct {
 
 extern psxRegisters psxRegs;
 
-/*
-Formula One 2001
-- Use old CPU cache code when the RAM location is
-  updated with new code (affects in-game racing)
-
-TODO:
-- I-cache / D-cache swapping
-- Isolate D-cache from RAM
-*/
-
-static inline u32 *Read_ICache(u32 pc, boolean isolate) {
-	u32 pc_bank, pc_offset, pc_cache;
-	u8 *IAddr, *ICode;
-
-	pc_bank = pc >> 24;
-	pc_offset = pc & 0xffffff;
-	pc_cache = pc & 0xfff;
-
-	IAddr = psxRegs.ICache_Addr;
-	ICode = psxRegs.ICache_Code;
-
-	// clear I-cache
-	if (!psxRegs.ICache_valid) {
-		memset(psxRegs.ICache_Addr, 0xff, sizeof(psxRegs.ICache_Addr));
-		memset(psxRegs.ICache_Code, 0xff, sizeof(psxRegs.ICache_Code));
-
-		psxRegs.ICache_valid = TRUE;
-	}
-
-	// uncached
-	if (pc_bank >= 0xa0)
-		return PSXM(pc);
-
-	// cached - RAM
-	if (pc_bank == 0x80 || pc_bank == 0x00) {
-		if (SWAP32(*(u32 *)(IAddr + pc_cache)) == pc_offset) {
-			// Cache hit - return last opcode used
-			return ICode + pc_cache;
-		} else {
-			// Cache miss - addresses don't match
-			// - default: 0xffffffff (not init)
-
-			if (!isolate) {
-				// cache line is 4 bytes wide
-				pc_offset &= ~0xf;
-				pc_cache &= ~0xf;
-
-				// address line
-				*(u32 *)(IAddr + pc_cache + 0x0) = SWAP32(pc_offset + 0x0);
-				*(u32 *)(IAddr + pc_cache + 0x4) = SWAP32(pc_offset + 0x4);
-				*(u32 *)(IAddr + pc_cache + 0x8) = SWAP32(pc_offset + 0x8);
-				*(u32 *)(IAddr + pc_cache + 0xc) = SWAP32(pc_offset + 0xc);
-
-				// opcode line
-				pc_offset = pc & ~0xf;
-				*(u32 *)(ICode + pc_cache + 0x0) = psxMu32ref(pc_offset + 0x0);
-				*(u32 *)(ICode + pc_cache + 0x4) = psxMu32ref(pc_offset + 0x4);
-				*(u32 *)(ICode + pc_cache + 0x8) = psxMu32ref(pc_offset + 0x8);
-				*(u32 *)(ICode + pc_cache + 0xc) = psxMu32ref(pc_offset + 0xc);
-			}
-
-			// normal code
-			return PSXM(pc);
-		}
-	}
-
-	/*
-	TODO: Probably should add cached BIOS
-	*/
-
-	// default
-	return PSXM(pc);
-}
+/*
+Formula One 2001
+- Use old CPU cache code when the RAM location is
+  updated with new code (affects in-game racing)
+
+TODO:
+- I-cache / D-cache swapping
+- Isolate D-cache from RAM
+*/
+
+static inline u32 *Read_ICache(u32 pc, boolean isolate) {
+	u32 pc_bank, pc_offset, pc_cache;
+	u8 *IAddr, *ICode;
+
+	pc_bank = pc >> 24;
+	pc_offset = pc & 0xffffff;
+	pc_cache = pc & 0xfff;
+
+	IAddr = psxRegs.ICache_Addr;
+	ICode = psxRegs.ICache_Code;
+
+	// clear I-cache
+	if (!psxRegs.ICache_valid) {
+		memset(psxRegs.ICache_Addr, 0xff, sizeof(psxRegs.ICache_Addr));
+		memset(psxRegs.ICache_Code, 0xff, sizeof(psxRegs.ICache_Code));
+
+		psxRegs.ICache_valid = TRUE;
+	}
+
+	// uncached
+	if (pc_bank >= 0xa0)
+		return (u32 *)PSXM(pc);
+
+	// cached - RAM
+	if (pc_bank == 0x80 || pc_bank == 0x00) {
+		if (SWAP32(*(u32 *)(IAddr + pc_cache)) == pc_offset) {
+			// Cache hit - return last opcode used
+			return (u32 *)(ICode + pc_cache);
+		} else {
+			// Cache miss - addresses don't match
+			// - default: 0xffffffff (not init)
+
+			if (!isolate) {
+				// cache line is 4 bytes wide
+				pc_offset &= ~0xf;
+				pc_cache &= ~0xf;
+
+				// address line
+				*(u32 *)(IAddr + pc_cache + 0x0) = SWAP32(pc_offset + 0x0);
+				*(u32 *)(IAddr + pc_cache + 0x4) = SWAP32(pc_offset + 0x4);
+				*(u32 *)(IAddr + pc_cache + 0x8) = SWAP32(pc_offset + 0x8);
+				*(u32 *)(IAddr + pc_cache + 0xc) = SWAP32(pc_offset + 0xc);
+
+				// opcode line
+				pc_offset = pc & ~0xf;
+				*(u32 *)(ICode + pc_cache + 0x0) = psxMu32ref(pc_offset + 0x0);
+				*(u32 *)(ICode + pc_cache + 0x4) = psxMu32ref(pc_offset + 0x4);
+				*(u32 *)(ICode + pc_cache + 0x8) = psxMu32ref(pc_offset + 0x8);
+				*(u32 *)(ICode + pc_cache + 0xc) = psxMu32ref(pc_offset + 0xc);
+			}
+
+			// normal code
+			return (u32 *)PSXM(pc);
+		}
+	}
+
+	/*
+	TODO: Probably should add cached BIOS
+	*/
+
+	// default
+	return (u32 *)PSXM(pc);
+}
 
 #if defined(__BIGENDIAN__)
 
-- 
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