From 03cfe9e6c22044c5b6e333b90c2b0021842fffad Mon Sep 17 00:00:00 2001 From: iCatButler Date: Sat, 2 Jul 2016 16:52:21 +0100 Subject: Additional checks - Change processor transfer functions to use take both source and destination values - Add enum values to all debug functions to double check instructions are correct - Temporarily store instruction codes in interpreter wrappers as these are sometimes changed by branching - Change recompiler wrapper functions to store register values in global variables in case they're changed by the original function --- libpcsxcore/pgxp_cpu.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'libpcsxcore/pgxp_cpu.c') diff --git a/libpcsxcore/pgxp_cpu.c b/libpcsxcore/pgxp_cpu.c index f2fff96e..c9022046 100644 --- a/libpcsxcore/pgxp_cpu.c +++ b/libpcsxcore/pgxp_cpu.c @@ -773,32 +773,36 @@ void PGXP_CPU_SB(u32 instr, u8 rtVal, u32 addr) //////////////////////////////////// // Data transfer tracking //////////////////////////////////// -void PGXP_CP0_MFC0(u32 instr, u32 rdVal) +void PGXP_CP0_MFC0(u32 instr, u32 rtVal, u32 rdVal) { // CPU[Rt] = CP0[Rd] Validate(&CP0_reg[rd(instr)], rdVal); CPU_reg[rt(instr)] = CP0_reg[rd(instr)]; + CPU_reg[rt(instr)].value = rtVal; } -void PGXP_CP0_MTC0(u32 instr, u32 rtVal) +void PGXP_CP0_MTC0(u32 instr, u32 rdVal, u32 rtVal) { // CP0[Rd] = CPU[Rt] Validate(&CPU_reg[rt(instr)], rtVal); CP0_reg[rd(instr)] = CPU_reg[rt(instr)]; + CP0_reg[rd(instr)].value = rdVal; } -void PGXP_CP0_CFC0(u32 instr, u32 rdVal) +void PGXP_CP0_CFC0(u32 instr, u32 rtVal, u32 rdVal) { // CPU[Rt] = CP0[Rd] Validate(&CP0_reg[rd(instr)], rdVal); CPU_reg[rt(instr)] = CP0_reg[rd(instr)]; + CPU_reg[rt(instr)].value = rtVal; } -void PGXP_CP0_CTC0(u32 instr, u32 rtVal) +void PGXP_CP0_CTC0(u32 instr, u32 rdVal, u32 rtVal) { // CP0[Rd] = CPU[Rt] Validate(&CPU_reg[rt(instr)], rtVal); CP0_reg[rd(instr)] = CPU_reg[rt(instr)]; + CP0_reg[rd(instr)].value = rdVal; } void PGXP_CP0_RFE(u32 instr) -- cgit v1.2.3