Additional checks

- Change processor transfer functions to use take both source and destination values
- Add enum values to all debug functions to double check instructions are correct
- Temporarily store instruction codes in interpreter wrappers as these are sometimes changed by branching
- Change recompiler wrapper functions to store register values in global variables in case they're changed by the original function

1 files changed, 86 insertions, 76 deletions

diff --git a/libpcsxcore/pgxp_debug.c b/libpcsxcore/pgxp_debug.c
index 5349a2b7..724ed7a0 100644
--- a/libpcsxcore/pgxp_debug.c
+++ b/libpcsxcore/pgxp_debug.c
@@ -39,6 +39,7 @@ typedef enum
 
 typedef struct
 {
+	unsigned int eOp;
 	unsigned short OutputFlags;
 	unsigned short InputFlags;
 	unsigned char numRegisters;
@@ -52,41 +53,41 @@ void PGXP_CPU_EMPTY() {}
 void PGXP_CPU_NULL() { int* pi = NULL; *pi = 5; }
 void PGXP_CPU_ERROR() { int* pi = NULL; *pi = 5; }
 
-#define PGXP_Data_ERROR		{ 0, 0, 0, 0, "", "ERROR",		(void(*)())PGXP_CPU_ERROR }
-#define PGXP_Data_NULL		{ 0, 0, 0, 0, "", "NULL",		(void(*)())PGXP_CPU_NULL }
-#define PGXP_Data_SPECIAL	{ 0, 0, 0, 0, "", "SPECIAL",	(void(*)())PGXP_CPU_EMPTY }
-#define PGXP_Data_COP0		{ 0, 0, 0, 0, "", "COP0",		(void(*)())PGXP_CPU_EMPTY }
-#define PGXP_Data_COP2		{ 0, 0, 0, 0, "", "COP2",		(void(*)())PGXP_CPU_EMPTY }
-#define PGXP_Data_HLE		{ 0, 0, 0, 0, "", "HLE",		(void(*)())PGXP_CPU_EMPTY }
+#define PGXP_Data_ERROR		{ DBG_E_ERROR,		0, 0, 0, 0, "", "ERROR",	(void(*)())PGXP_CPU_ERROR }
+#define PGXP_Data_NULL		{ DBG_E_NULL,		0, 0, 0, 0, "", "NULL",		(void(*)())PGXP_CPU_NULL }
+#define PGXP_Data_SPECIAL	{ DBG_E_SPECIAL,	0, 0, 0, 0, "", "SPECIAL",	(void(*)())PGXP_CPU_EMPTY }
+#define PGXP_Data_COP0		{ DBG_E_COP0,		0, 0, 0, 0, "", "COP0",		(void(*)())PGXP_CPU_EMPTY }
+#define PGXP_Data_COP2		{ DBG_E_COP2,		0, 0, 0, 0, "", "COP2",		(void(*)())PGXP_CPU_EMPTY }
+#define PGXP_Data_HLE		{ DBG_E_HLE,		0, 0, 0, 0, "", "HLE",		(void(*)())PGXP_CPU_EMPTY }
 
 // Arithmetic with immediate value
-#define PGXP_Data_ADDI	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "+", "ADDI",	(void(*)())PGXP_CPU_ADDI }
-#define PGXP_Data_ADDIU	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "+", "ADDIU",	(void(*)())PGXP_CPU_ADDIU }
-#define PGXP_Data_ANDI	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "&", "ANDI",	(void(*)())PGXP_CPU_ANDI }
-#define PGXP_Data_ORI	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "|", "ORI",	(void(*)())PGXP_CPU_ORI }
-#define PGXP_Data_XORI	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "^", "XORI",	(void(*)())PGXP_CPU_XORI }
-#define PGXP_Data_SLTI	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "<", "SLTI",	(void(*)())PGXP_CPU_SLTI }
-#define PGXP_Data_SLTIU	{ fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "<", "SLTIU",	(void(*)())PGXP_CPU_SLTIU }
+#define PGXP_Data_ADDI	{ DBG_E_ADDI,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "+", "ADDI",		(void(*)())PGXP_CPU_ADDI }
+#define PGXP_Data_ADDIU	{ DBG_E_ADDIU,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "+", "ADDIU",	(void(*)())PGXP_CPU_ADDIU }
+#define PGXP_Data_ANDI	{ DBG_E_ANDI,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "&", "ANDI",		(void(*)())PGXP_CPU_ANDI }
+#define PGXP_Data_ORI	{ DBG_E_ORI,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "|", "ORI",		(void(*)())PGXP_CPU_ORI }
+#define PGXP_Data_XORI	{ DBG_E_XORI,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "^", "XORI",		(void(*)())PGXP_CPU_XORI }
+#define PGXP_Data_SLTI	{ DBG_E_SLTI,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "<", "SLTI",		(void(*)())PGXP_CPU_SLTI }
+#define PGXP_Data_SLTIU	{ DBG_E_SLTIU,	fOp_CPU_Rt, fOp_CPU_Rs | fOp_Im, 2, 2, "<", "SLTIU",	(void(*)())PGXP_CPU_SLTIU }
 // Load Upper
-#define PGXP_Data_LUI	{ fOp_CPU_Rt, fOp_Im, 1, 1, "<<", "LUI", (void(*)())PGXP_CPU_LUI }
+#define PGXP_Data_LUI	{ DBG_E_LUI,	fOp_CPU_Rt, fOp_Im, 1, 1, "<<", "LUI", (void(*)())PGXP_CPU_LUI }
 
 // Load/Store
-#define PGXP_Data_LWL	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LWL",	(void(*)())PGXP_CPU_LWL }	// 32-bit Loads
-#define PGXP_Data_LW	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LW",	(void(*)())PGXP_CPU_LW	}
-#define PGXP_Data_LWR	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LWR",	(void(*)())PGXP_CPU_LWR }
-#define PGXP_Data_LH	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LH",	(void(*)())PGXP_CPU_LH }	// 16-bit Loads
-#define PGXP_Data_LHU	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LHU",	(void(*)())PGXP_CPU_LHU }
-#define PGXP_Data_LB	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LB",	(void(*)())PGXP_CPU_LB }	// 8-bit Loads
-#define PGXP_Data_LBU	{ fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LBU",	(void(*)())PGXP_CPU_LBU }
-#define PGXP_Data_SWL	{ fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SWL",	(void(*)())PGXP_CPU_SWL }	// 32-bit Store
-#define PGXP_Data_SW	{ fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SW",	(void(*)())PGXP_CPU_SW }
-#define PGXP_Data_SWR	{ fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SWR",	(void(*)())PGXP_CPU_SWR }
-#define PGXP_Data_SH	{ fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SH",	(void(*)())PGXP_CPU_SH }	// 16-bit Store
-#define PGXP_Data_SB	{ fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SB",	(void(*)())PGXP_CPU_SB }	// 8-bit Store
+#define PGXP_Data_LWL	{ DBG_E_LWL,	fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LWL",	(void(*)())PGXP_CPU_LWL }	// 32-bit Loads
+#define PGXP_Data_LW	{ DBG_E_LW,		fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LW",		(void(*)())PGXP_CPU_LW	}
+#define PGXP_Data_LWR	{ DBG_E_LWR,	fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LWR",	(void(*)())PGXP_CPU_LWR }
+#define PGXP_Data_LH	{ DBG_E_LH,		fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LH",		(void(*)())PGXP_CPU_LH }	// 16-bit Loads
+#define PGXP_Data_LHU	{ DBG_E_LHU,	fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LHU",	(void(*)())PGXP_CPU_LHU }
+#define PGXP_Data_LB	{ DBG_E_LB,		fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LB",		(void(*)())PGXP_CPU_LB }	// 8-bit Loads
+#define PGXP_Data_LBU	{ DBG_E_LBU,	fOp_CPU_Rt, fOp_Ad, 1, 2, "", "LBU",	(void(*)())PGXP_CPU_LBU }
+#define PGXP_Data_SWL	{ DBG_E_SWL,	fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SWL",	(void(*)())PGXP_CPU_SWL }	// 32-bit Store
+#define PGXP_Data_SW	{ DBG_E_SW,		fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SW",		(void(*)())PGXP_CPU_SW }
+#define PGXP_Data_SWR	{ DBG_E_SWR,	fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SWR",	(void(*)())PGXP_CPU_SWR }
+#define PGXP_Data_SH	{ DBG_E_SH,		fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SH",		(void(*)())PGXP_CPU_SH }	// 16-bit Store
+#define PGXP_Data_SB	{ DBG_E_SB,		fOp_Ad, fOp_CPU_Rt, 1, 2, "", "SB",		(void(*)())PGXP_CPU_SB }	// 8-bit Store
 
 // Load/Store GTE
-#define PGXP_Data_LWC2	{ fOp_GTE_Dt, fOp_Ad, 1, 2, "", "LWC2",	(void(*)())PGXP_GTE_LWC2 }	// 32-bit Loads
-#define PGXP_Data_SWC2	{ fOp_Ad, fOp_GTE_Dt, 1, 2, "", "SWC2",	(void(*)())PGXP_GTE_SWC2 }	// 32-bit Store
+#define PGXP_Data_LWC2	{ DBG_E_LWC2,	fOp_GTE_Dt, fOp_Ad, 1, 2, "", "LWC2",	(void(*)())PGXP_GTE_LWC2 }	// 32-bit Loads
+#define PGXP_Data_SWC2	{ DBG_E_SWC2,	fOp_Ad, fOp_GTE_Dt, 1, 2, "", "SWC2",	(void(*)())PGXP_GTE_SWC2 }	// 32-bit Store
 
 static PGXP_CPU_OpData PGXP_BSC_LUT[64] = {
 	PGXP_Data_SPECIAL, PGXP_Data_NULL  , PGXP_Data_NULL, PGXP_Data_NULL , PGXP_Data_NULL, PGXP_Data_NULL, PGXP_Data_NULL, PGXP_Data_NULL,
@@ -100,38 +101,38 @@ static PGXP_CPU_OpData PGXP_BSC_LUT[64] = {
 };
 
 // Register Arithmetic
-#define PGXP_Data_ADD	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "+", "ADD",	(void(*)())PGXP_CPU_ADD }
-#define PGXP_Data_ADDU	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "+", "ADDU",	(void(*)())PGXP_CPU_ADDU }
-#define PGXP_Data_SUB	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "-", "SUB",	(void(*)())PGXP_CPU_SUB }
-#define PGXP_Data_SUBU	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "-", "SUBU",	(void(*)())PGXP_CPU_SUBU }
-#define PGXP_Data_AND	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "&", "AND",	(void(*)())PGXP_CPU_AND }
-#define PGXP_Data_OR	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "|", "OR",		(void(*)())PGXP_CPU_OR }
-#define PGXP_Data_XOR	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "^", "XOR",	(void(*)())PGXP_CPU_XOR }
-#define PGXP_Data_NOR	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "^", "NOR",	(void(*)())PGXP_CPU_NOR }
-#define PGXP_Data_SLT	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "<", "SLT",	(void(*)())PGXP_CPU_SLT }
-#define PGXP_Data_SLTU	{ fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "<", "SLTU",	(void(*)())PGXP_CPU_SLTU }
+#define PGXP_Data_ADD	{ DBG_E_ADD,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "+", "ADD",	(void(*)())PGXP_CPU_ADD }
+#define PGXP_Data_ADDU	{ DBG_E_ADDU,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "+", "ADDU",	(void(*)())PGXP_CPU_ADDU }
+#define PGXP_Data_SUB	{ DBG_E_SUB,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "-", "SUB",	(void(*)())PGXP_CPU_SUB }
+#define PGXP_Data_SUBU	{ DBG_E_SUBU,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "-", "SUBU",	(void(*)())PGXP_CPU_SUBU }
+#define PGXP_Data_AND	{ DBG_E_AND,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "&", "AND",	(void(*)())PGXP_CPU_AND }
+#define PGXP_Data_OR	{ DBG_E_OR,		fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "|", "OR",	(void(*)())PGXP_CPU_OR }
+#define PGXP_Data_XOR	{ DBG_E_XOR,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "^", "XOR",	(void(*)())PGXP_CPU_XOR }
+#define PGXP_Data_NOR	{ DBG_E_NOR,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "^", "NOR",	(void(*)())PGXP_CPU_NOR }
+#define PGXP_Data_SLT	{ DBG_E_SLT,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "<", "SLT",	(void(*)())PGXP_CPU_SLT }
+#define PGXP_Data_SLTU	{ DBG_E_SLTU,	fOp_CPU_Rd, fOp_CPU_Rs | fOp_CPU_Rt, 3, 3, "<", "SLTU",	(void(*)())PGXP_CPU_SLTU }
 
 // Register mult/div
-#define PGXP_Data_MULT	{ fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "*", "MULT",	(void(*)())PGXP_CPU_MULT }
-#define PGXP_Data_MULTU	{ fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "*", "MULTU",	(void(*)())PGXP_CPU_MULTU }
-#define PGXP_Data_DIV	{ fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "/", "DIV",	(void(*)())PGXP_CPU_DIV }
-#define PGXP_Data_DIVU	{ fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "/", "DIVU",	(void(*)())PGXP_CPU_DIVU }
+#define PGXP_Data_MULT	{ DBG_E_MULT,	fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "*", "MULT",	(void(*)())PGXP_CPU_MULT }
+#define PGXP_Data_MULTU	{ DBG_E_MULTU,	fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "*", "MULTU",	(void(*)())PGXP_CPU_MULTU }
+#define PGXP_Data_DIV	{ DBG_E_DIV,	fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "/", "DIV",		(void(*)())PGXP_CPU_DIV }
+#define PGXP_Data_DIVU	{ DBG_E_DIVU,	fOp_CPU_Hi | fOp_CPU_Lo, fOp_CPU_Rs | fOp_CPU_Rt, 4, 4, "/", "DIVU",	(void(*)())PGXP_CPU_DIVU }
 
 // Shift operations (sa)
-#define PGXP_Data_SLL	{ fOp_CPU_Rd, fOp_CPU_Rt | fOp_Sa, 2, 2, ">>", "SLL",	(void(*)())PGXP_CPU_SLL }
-#define PGXP_Data_SRL	{ fOp_CPU_Rd, fOp_CPU_Rt | fOp_Sa, 2, 2, "<<", "SRL",	(void(*)())PGXP_CPU_SRL }
-#define PGXP_Data_SRA	{ fOp_CPU_Rd, fOp_CPU_Rt | fOp_Sa, 2, 2, "<<", "SRA",	(void(*)())PGXP_CPU_SRA }
+#define PGXP_Data_SLL	{ DBG_E_SLL,	fOp_CPU_Rd, fOp_CPU_Rt | fOp_Sa, 2, 2, ">>", "SLL",	(void(*)())PGXP_CPU_SLL }
+#define PGXP_Data_SRL	{ DBG_E_SRL,	fOp_CPU_Rd, fOp_CPU_Rt | fOp_Sa, 2, 2, "<<", "SRL",	(void(*)())PGXP_CPU_SRL }
+#define PGXP_Data_SRA	{ DBG_E_SRA,	fOp_CPU_Rd, fOp_CPU_Rt | fOp_Sa, 2, 2, "<<", "SRA",	(void(*)())PGXP_CPU_SRA }
 
 // Shift operations variable
-#define PGXP_Data_SLLV	{ fOp_CPU_Rd, fOp_CPU_Rt | fOp_CPU_Rs, 3, 3, ">>", "SLLV",	(void(*)())PGXP_CPU_SLLV }
-#define PGXP_Data_SRLV	{ fOp_CPU_Rd, fOp_CPU_Rt | fOp_CPU_Rs, 3, 3, "<<", "SRLV",	(void(*)())PGXP_CPU_SRLV }
-#define PGXP_Data_SRAV	{ fOp_CPU_Rd, fOp_CPU_Rt | fOp_CPU_Rs, 3, 3, "<<", "SRAV",	(void(*)())PGXP_CPU_SRAV }
+#define PGXP_Data_SLLV	{ DBG_E_SLLV,	fOp_CPU_Rd, fOp_CPU_Rt | fOp_CPU_Rs, 3, 3, ">>", "SLLV",	(void(*)())PGXP_CPU_SLLV }
+#define PGXP_Data_SRLV	{ DBG_E_SRLV,	fOp_CPU_Rd, fOp_CPU_Rt | fOp_CPU_Rs, 3, 3, "<<", "SRLV",	(void(*)())PGXP_CPU_SRLV }
+#define PGXP_Data_SRAV	{ DBG_E_SRAV,	fOp_CPU_Rd, fOp_CPU_Rt | fOp_CPU_Rs, 3, 3, "<<", "SRAV",	(void(*)())PGXP_CPU_SRAV }
 
 // Move registers
-#define PGXP_Data_MFHI	{ fOp_CPU_Rd, fOp_CPU_Hi, 2, 2, "<-", "MFHI",	(void(*)())PGXP_CPU_MFHI }
-#define PGXP_Data_MTHI	{ fOp_CPU_Hi, fOp_CPU_Rd, 2, 2, "<-", "MTHI",	(void(*)())PGXP_CPU_MTHI }
-#define PGXP_Data_MFLO	{ fOp_CPU_Rd, fOp_CPU_Lo, 2, 2, "<-", "MFLO",	(void(*)())PGXP_CPU_MFLO }
-#define PGXP_Data_MTLO	{ fOp_CPU_Lo, fOp_CPU_Rd, 2, 2, "<-", "MFHI",	(void(*)())PGXP_CPU_MTLO }
+#define PGXP_Data_MFHI	{ DBG_E_MFHI,	fOp_CPU_Rd, fOp_CPU_Hi, 2, 2, "<-", "MFHI",	(void(*)())PGXP_CPU_MFHI }
+#define PGXP_Data_MTHI	{ DBG_E_MTHI,	fOp_CPU_Hi, fOp_CPU_Rd, 2, 2, "<-", "MTHI",	(void(*)())PGXP_CPU_MTHI }
+#define PGXP_Data_MFLO	{ DBG_E_MFLO,	fOp_CPU_Rd, fOp_CPU_Lo, 2, 2, "<-", "MFLO",	(void(*)())PGXP_CPU_MFLO }
+#define PGXP_Data_MTLO	{ DBG_E_MTLO,	fOp_CPU_Lo, fOp_CPU_Rd, 2, 2, "<-", "MFHI",	(void(*)())PGXP_CPU_MTLO }
 
 static PGXP_CPU_OpData PGXP_SPC_LUT[64] = {
 	PGXP_Data_SLL , PGXP_Data_NULL, PGXP_Data_SRL , PGXP_Data_SRA , PGXP_Data_SLLV   , PGXP_Data_NULL , PGXP_Data_SRLV, PGXP_Data_SRAV,
@@ -145,10 +146,10 @@ static PGXP_CPU_OpData PGXP_SPC_LUT[64] = {
 };
 
 // GTE transfer registers
-#define PGXP_Data_MFC2	{ fOp_CPU_Rt, fOp_GTE_Dd, 2, 1, "<-", "MFC2",	(void(*)())PGXP_GTE_MFC2 }
-#define PGXP_Data_MTC2	{ fOp_GTE_Dd, fOp_CPU_Rt, 2, 1, "<-", "MTC2",	(void(*)())PGXP_GTE_MTC2 }
-#define PGXP_Data_CFC2	{ fOp_CPU_Rt, fOp_GTE_Cd, 2, 1, "<-", "CFC2",	(void(*)())PGXP_GTE_CFC2 }
-#define PGXP_Data_CTC2	{ fOp_GTE_Cd, fOp_CPU_Rt, 2, 1, "<-", "CTC2",	(void(*)())PGXP_GTE_CTC2 }
+#define PGXP_Data_MFC2	{ DBG_E_MFC2,	fOp_CPU_Rt, fOp_GTE_Dd, 2, 2, "<-", "MFC2",	(void(*)())PGXP_GTE_MFC2 }
+#define PGXP_Data_MTC2	{ DBG_E_MTC2,	fOp_GTE_Dd, fOp_CPU_Rt, 2, 2, "<-", "MTC2",	(void(*)())PGXP_GTE_MTC2 }
+#define PGXP_Data_CFC2	{ DBG_E_CFC2,	fOp_CPU_Rt, fOp_GTE_Cd, 2, 2, "<-", "CFC2",	(void(*)())PGXP_GTE_CFC2 }
+#define PGXP_Data_CTC2	{ DBG_E_CTC2,	fOp_GTE_Cd, fOp_CPU_Rt, 2, 2, "<-", "CTC2",	(void(*)())PGXP_GTE_CTC2 }
 
 static PGXP_CPU_OpData  PGXP_CO2BSC_LUT[32] = {
 	PGXP_Data_MFC2, PGXP_Data_NULL, PGXP_Data_CFC2, PGXP_Data_NULL, PGXP_Data_MTC2, PGXP_Data_NULL, PGXP_Data_CTC2, PGXP_Data_NULL,
@@ -158,11 +159,11 @@ static PGXP_CPU_OpData  PGXP_CO2BSC_LUT[32] = {
 };
 
 // CP0 transfer registers
-#define PGXP_Data_MFC0	{ fOp_CPU_Rt, fOp_CP0_Dd, 2, 1, "<-", "MFC0",	(void(*)())PGXP_CP0_MFC0 }
-#define PGXP_Data_MTC0	{ fOp_CP0_Dd, fOp_CPU_Rt, 2, 1, "<-", "MTC0",	(void(*)())PGXP_CP0_MTC0 }
-#define PGXP_Data_CFC0	{ fOp_CPU_Rt, fOp_CP0_Cd, 2, 1, "<-", "CFC0",	(void(*)())PGXP_CP0_CFC0 }
-#define PGXP_Data_CTC0	{ fOp_CP0_Cd, fOp_CPU_Rt, 2, 1, "<-", "CTC0",	(void(*)())PGXP_CP0_CTC0 }
-#define PGXP_Data_RFE	{ 0, 0, 0, 0,"", "RFE", PGXP_CPU_EMPTY }
+#define PGXP_Data_MFC0	{ DBG_E_MFC0,	fOp_CPU_Rt, fOp_CP0_Dd, 2, 2, "<-", "MFC0",	(void(*)())PGXP_CP0_MFC0 }
+#define PGXP_Data_MTC0	{ DBG_E_MTC0,	fOp_CP0_Dd, fOp_CPU_Rt, 2, 2, "<-", "MTC0",	(void(*)())PGXP_CP0_MTC0 }
+#define PGXP_Data_CFC0	{ DBG_E_CFC0,	fOp_CPU_Rt, fOp_CP0_Cd, 2, 2, "<-", "CFC0",	(void(*)())PGXP_CP0_CFC0 }
+#define PGXP_Data_CTC0	{ DBG_E_CTC0,	fOp_CP0_Cd, fOp_CPU_Rt, 2, 2, "<-", "CTC0",	(void(*)())PGXP_CP0_CTC0 }
+#define PGXP_Data_RFE	{ DBG_E_RFE,	0, 0, 0, 0,"", "RFE", PGXP_CPU_EMPTY }
 
 static PGXP_CPU_OpData PGXP_COP0_LUT[32] = {
 	PGXP_Data_MFC0, PGXP_Data_NULL, PGXP_Data_CFC0, PGXP_Data_NULL, PGXP_Data_MTC0, PGXP_Data_NULL, PGXP_Data_CTC0, PGXP_Data_NULL,
@@ -305,8 +306,14 @@ void PrintOperands(char* szBuffer, u32 instr, u32 flags, const char* szDelim, ps
 			}
 			else if(flag == fOp_Ad)
 			{
-				sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x)] ", szPre, szOpdName,
-					psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d));
+				pReg = GetPtr(psx_reg.d);
+				if(pReg)
+					sprintf(szTempBuffer, "%s %s [%x(%d, %d) (%x) %x(%.2f, %.2f, %.2f)%x : %x] ", szPre, szOpdName,
+						psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d),
+						pReg->value, pReg->x, pReg->y, pReg->z, pReg->count, pReg->valid);
+				else
+					sprintf(szTempBuffer, "%s %s [%x(%d, %d) INVALID_ADDRESS!] ", szPre, szOpdName,
+						psx_reg.d, psx_reg.sw.l, psx_reg.sw.h, PGXP_ConvertAddress(psx_reg.d));
 				strcat(szBuffer, szTempBuffer);
 			}
 			else
@@ -321,7 +328,7 @@ void PrintOperands(char* szBuffer, u32 instr, u32 flags, const char* szDelim, ps
 	}
 }
 
-void PGXP_CPU_DebugOutput(u32 instr, u32 numOps, u32 op1, u32 op2, u32 op3, u32 op4)
+void PGXP_CPU_DebugOutput(u32 eOp, u32 instr, u32 numOps, u32 op1, u32 op2, u32 op3, u32 op4)
 {
 	char szOutputBuffer[256];
 	char szInputBuffer[512];
@@ -341,8 +348,8 @@ void PGXP_CPU_DebugOutput(u32 instr, u32 numOps, u32 op1, u32 op2, u32 op3, u32
 	}
 
 	// Hack: duplicate psx register data for GTE register movement funcs
-	if ((op(instr) == 18) && (func(instr) == 0))
-		psx_regs[1] = psx_regs[0];
+	//if ((op(instr) == 18) && (func(instr) == 0))
+	//	psx_regs[1] = psx_regs[0];
 
 	// /iCB Hack
 
@@ -367,6 +374,9 @@ void PGXP_CPU_DebugOutput(u32 instr, u32 numOps, u32 op1, u32 op2, u32 op3, u32
 	if (numOps != opData.numArgs)
 		PGXP_CPU_ERROR();
 
+	if (eOp != opData.eOp)
+		PGXP_CPU_ERROR();
+
 	switch (numOps)
 	{
 	case 0:
@@ -401,42 +411,42 @@ void PGXP_CPU_DebugOutput(u32 instr, u32 numOps, u32 op1, u32 op2, u32 op3, u32
 	}
 }
 
-void PGXP_psxTraceOp(u32 instr)
+void PGXP_psxTraceOp(u32 eOp, u32 instr)
 {
 	//PGXP_CPU_OpData opData = GetOpData(instr);
 	//if (opData.funcPtr && (opData.numArgs == 0))
 	//	((void(*)(u32))opData.funcPtr)(instr);
-	PGXP_CPU_DebugOutput(instr, 0, 0, 0, 0, 0);
+	PGXP_CPU_DebugOutput(eOp, instr, 0, 0, 0, 0, 0);
 }
 
-void PGXP_psxTraceOp1(u32 instr, u32 op1)
+void PGXP_psxTraceOp1(u32 eOp, u32 instr, u32 op1)
 {
 	//PGXP_CPU_OpData opData = GetOpData(instr);
 	//if (opData.funcPtr && (opData.numArgs == 1))
 	//	((void(*)(u32, u32))opData.funcPtr)(instr, op1);
-	PGXP_CPU_DebugOutput(instr, 1, op1, 0, 0, 0);
+	PGXP_CPU_DebugOutput(eOp, instr, 1, op1, 0, 0, 0);
 }
 
-void PGXP_psxTraceOp2(u32 instr, u32 op1, u32 op2)
+void PGXP_psxTraceOp2(u32 eOp, u32 instr, u32 op1, u32 op2)
 {
 	//PGXP_CPU_OpData opData = GetOpData(instr);
 	//if (opData.funcPtr && (opData.numArgs == 2))
 	//	((void(*)(u32, u32, u32))opData.funcPtr)(instr, op1, op2);
-	PGXP_CPU_DebugOutput(instr, 2, op1, op2, 0, 0);
+	PGXP_CPU_DebugOutput(eOp, instr, 2, op1, op2, 0, 0);
 }
 
-void PGXP_psxTraceOp3(u32 instr, u32 op1, u32 op2, u32 op3)
+void PGXP_psxTraceOp3(u32 eOp, u32 instr, u32 op1, u32 op2, u32 op3)
 {
 	//PGXP_CPU_OpData opData = GetOpData(instr);
 	//if (opData.funcPtr && (opData.numArgs == 3))
 	//	((void(*)(u32, u32, u32, u32))opData.funcPtr)(instr, op1, op2, op3);
-	PGXP_CPU_DebugOutput(instr, 3, op1, op2, op3, 0);
+	PGXP_CPU_DebugOutput(eOp, instr, 3, op1, op2, op3, 0);
 }
 
-void PGXP_psxTraceOp4(u32 instr, u32 op1, u32 op2, u32 op3, u32 op4)
+void PGXP_psxTraceOp4(u32 eOp, u32 instr, u32 op1, u32 op2, u32 op3, u32 op4)
 {
 	//PGXP_CPU_OpData opData = GetOpData(instr);
 	//if (opData.funcPtr && (opData.numArgs == 4))
 	//	((void(*)(u32, u32, u32, u32, u32))opData.funcPtr)(instr, op1, op2, op3, op4);
-	PGXP_CPU_DebugOutput(instr, 4, op1, op2, op3, op4);
+	PGXP_CPU_DebugOutput(eOp, instr, 4, op1, op2, op3, op4);
 }
\ No newline at end of file