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authoriCatButler <i.am.catbutler@gmail.com>2016-06-30 11:49:11 +0100
committeriCatButler <i.am.catbutler@gmail.com>2016-06-30 11:49:11 +0100
commit485432c1988ab203ca85cd122f03118dcc2d9f8d (patch)
tree4d68b43dbe68cd9c733fd8a2800608951e976ef6 /libpcsxcore/pgxp_cpu.c
parent6b78a14b0e466ff870aa042185c67539a8c51324 (diff)
downloadpcsxr-485432c1988ab203ca85cd122f03118dcc2d9f8d.tar.gz
Initialise GTE and CPU regsiters (invalidate)
Diffstat (limited to 'libpcsxcore/pgxp_cpu.c')
-rw-r--r--libpcsxcore/pgxp_cpu.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/libpcsxcore/pgxp_cpu.c b/libpcsxcore/pgxp_cpu.c
index 17853afc..f2fff96e 100644
--- a/libpcsxcore/pgxp_cpu.c
+++ b/libpcsxcore/pgxp_cpu.c
@@ -20,6 +20,12 @@ PGXP_value* CP0_reg = CP0_reg_mem;
#define rs(_instr) ((_instr >> 21) & 0x1F) // The rs part of the instruction register
#define imm(_instr) (_instr & 0xFFFF) // The immediate part of the instruction register
+void PGXP_InitCPU()
+{
+ memset(CPU_reg_mem, 0, sizeof(CPU_reg_mem));
+ memset(CP0_reg_mem, 0, sizeof(CP0_reg_mem));
+}
+
// invalidate register (invalid 8 bit read)
void InvalidLoad(u32 addr, u32 code, u32 value)
{