diff options
| author | SND\weimingzhi_cp <SND\weimingzhi_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97> | 2010-09-13 06:43:32 +0000 |
|---|---|---|
| committer | SND\weimingzhi_cp <SND\weimingzhi_cp@e17a0e51-4ae3-4d35-97c3-1a29b211df97> | 2010-09-13 06:43:32 +0000 |
| commit | 71a6d4942d28da563d906934e85404d35846d51f (patch) | |
| tree | 02a74d1b39df52f99b83f958f8b6c35bf6b72463 /libpcsxcore/gpu.c | |
| parent | 74116c11a2adc1f2030970ff8143cba5fb636eb6 (diff) | |
| download | pcsxr-71a6d4942d28da563d906934e85404d35846d51f.tar.gz | |
Merged change from http://forums.ngemu.com/pcsx-discussion/116599-developers-wanted-pcsx-revival-9.html#post1902678 with minor amendments.
GPU DMA chain timing (FF7 opening CG and maybe other games too - not tested with rebel assault 2 though).
git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@57139 e17a0e51-4ae3-4d35-97c3-1a29b211df97
Diffstat (limited to 'libpcsxcore/gpu.c')
| -rw-r--r-- | libpcsxcore/gpu.c | 102 |
1 files changed, 48 insertions, 54 deletions
diff --git a/libpcsxcore/gpu.c b/libpcsxcore/gpu.c index ee7204d8..95af7a1c 100644 --- a/libpcsxcore/gpu.c +++ b/libpcsxcore/gpu.c @@ -1,10 +1,27 @@ +/* Copyright (c) 2010, shalma.
+ * Portions Copyright (c) 2002, Pete Bernert.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA
+ */
+
#include "psxhw.h"
#include "gpu.h"
#include "psxdma.h"
extern unsigned int hSyncCount;
-
#define GPUSTATUS_ODDLINES 0x80000000
#define GPUSTATUS_DMABITS 0x60000000 // Two bits
#define GPUSTATUS_READYFORCOMMANDS 0x10000000
@@ -22,61 +39,46 @@ extern unsigned int hSyncCount; #define GPUSTATUS_DRAWINGALLOWED 0x00000400
#define GPUSTATUS_DITHER 0x00000200
-
// Taken from PEOPS SOFTGPU
-unsigned long lUsedAddr[3];
-
-char CheckForEndlessLoop(unsigned long laddr)
-{
- if(laddr==lUsedAddr[1]) return 1;
- if(laddr==lUsedAddr[2]) return 1;
+u32 lUsedAddr[3];
- if(laddr<lUsedAddr[0]) lUsedAddr[1]=laddr;
- else lUsedAddr[2]=laddr;
- lUsedAddr[0]=laddr;
- return 0;
-}
+static inline boolean CheckForEndlessLoop(unsigned long laddr) {
+ if (laddr == lUsedAddr[1]) return TRUE;
+ if (laddr == lUsedAddr[2]) return TRUE;
-long gpuDmaChain(unsigned long *baseAddrL, unsigned long addr)
-{
- unsigned long dmaMem;
- unsigned char *baseAddrB;
- short count;unsigned int DMACommandCounter = 0;
- int size;
+ if (laddr < lUsedAddr[0]) lUsedAddr[1] = laddr;
+ else lUsedAddr[2] = laddr;
- size = 0;
- lUsedAddr[0]=lUsedAddr[1]=lUsedAddr[2]=0xffffff;
+ lUsedAddr[0] = laddr;
- baseAddrB = (unsigned char*) baseAddrL;
+ return FALSE;
+}
- do
- {
- // Only Zinc = 1024
- //if(iGPUHeight==512) addr&=0x1FFFFC;
+static u32 gpuDmaChainSize(u32 *baseAddrL, u32 addr) {
+ u8 *baseAddrB;
+ unsigned int DMACommandCounter = 0;
+ u32 size = 0;
- addr&=0x1FFFFC;
- if(DMACommandCounter++ > 2000000) break;
- if(CheckForEndlessLoop(addr)) break;
+ lUsedAddr[0] = lUsedAddr[1] = lUsedAddr[2] = 0xffffff;
- count = baseAddrB[addr+3];
- size += 4;
- size += count;
+ baseAddrB = (u8 *)baseAddrL;
- dmaMem=addr+4;
+ do {
+ addr &= 0x1ffffc;
- //if(count>0) GPUwriteDataMem(&baseAddrL[dmaMem>>2],count);
+ if (DMACommandCounter++ > 2000000) break;
+ if (CheckForEndlessLoop(addr)) break;
- addr = baseAddrL[addr>>2]&0xffffff;
- }
- while (addr != 0xffffff);
+ size += 4;
+ size += baseAddrB[addr + 3];
+ addr = baseAddrL[addr >> 2] & 0xffffff;
+ } while (addr != 0xffffff);
- return size;
+ return size;
}
-
-int gpuReadStatus()
-{
+int gpuReadStatus() {
int hard;
@@ -125,13 +127,11 @@ int gpuReadStatus() return hard;
}
-
-
void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
u32 *ptr;
u32 size;
- switch(chcr) {
+ switch (chcr) {
case 0x01000200: // vram2mem
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
@@ -147,10 +147,9 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU GPU_readDataMem(ptr, size);
psxCpu->Clear(madr, size);
- GPUDMA_INT( size / 4 );
+ GPUDMA_INT(size / 4);
return;
-
case 0x01000201: // mem2vram
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
@@ -165,22 +164,19 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU size = (bcr >> 16) * (bcr & 0xffff);
GPU_writeDataMem(ptr, size);
- GPUDMA_INT( size / 4 );
+ GPUDMA_INT(size / 4);
return;
-
-
case 0x01000401: // dma chain
#ifdef PSXDMA_LOG
PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
#endif
GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
- // FIXME!! GPU DMA chain walking
- GPUDMA_INT( 0x4000 / 4 );
+ size = gpuDmaChainSize((u32 *)psxM, madr & 0x1fffff);
+ GPUDMA_INT(size / 4);
return;
-
#ifdef PSXDMA_LOG
default:
PSXDMA_LOG("*** DMA 2 - GPU unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
@@ -192,8 +188,6 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU DMA_INTERRUPT(2);
}
-
-
void gpuInterrupt() {
HW_DMA2_CHCR &= SWAP32(~0x01000000);
DMA_INTERRUPT(2);
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