Chrono Cross interlace fix (ePSXe version)
GameShark Lite needs GPUSTATUS_READYFORVRAM off when not IDLE. Also fixes CDROM swapping. - Enable 'Fake GPU Busy States' to work - Perhaps we should fix PEOPS GPU to turn off READYFORVRAM instead of gpu.c (my temp solution) Please add gpu.c / gpu.h to your makefiles. git-svn-id: https://pcsxr.svn.codeplex.com/svn/pcsxr@56824 e17a0e51-4ae3-4d35-97c3-1a29b211df97
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SND\shalma_cp
parent
37edbb7d48
commit
dcc46e2d30
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@ -573,9 +573,14 @@ void cdrInterrupt() {
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// case now open
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if (stat.Status & 0x10) {
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cdr.Stat = DiskError;
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if( Irq != CdlNop )
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{
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cdr.Stat = DiskError;
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cdr.Result[0] |= 0x01;
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}
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cdr.Result[0] |= 0x11;
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// GameShark Lite: Wants -exactly- $10
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cdr.Result[0] |= 0x10;
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cdr.Result[0] &= ~0x02;
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}
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// case now closed
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@ -583,6 +588,9 @@ void cdrInterrupt() {
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cdr.StatP &= ~0x11;
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cdr.Result[0] |= 0x2;
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// GameShark Lite: Wants -exactly- $42, then $02
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cdr.Result[0] |= 0x40;
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CheckCdrom();
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}
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}
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@ -0,0 +1,198 @@
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#include "psxhw.h"
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#include "gpu.h"
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#include "psxdma.h"
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extern unsigned int hSyncCount;
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#define GPUSTATUS_ODDLINES 0x80000000
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#define GPUSTATUS_DMABITS 0x60000000 // Two bits
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#define GPUSTATUS_READYFORCOMMANDS 0x10000000
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#define GPUSTATUS_READYFORVRAM 0x08000000
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#define GPUSTATUS_IDLE 0x04000000
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#define GPUSTATUS_DISPLAYDISABLED 0x00800000
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#define GPUSTATUS_INTERLACED 0x00400000
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#define GPUSTATUS_RGB24 0x00200000
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#define GPUSTATUS_PAL 0x00100000
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#define GPUSTATUS_DOUBLEHEIGHT 0x00080000
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#define GPUSTATUS_WIDTHBITS 0x00070000 // Three bits
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#define GPUSTATUS_MASKENABLED 0x00001000
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#define GPUSTATUS_MASKDRAWN 0x00000800
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#define GPUSTATUS_DRAWINGALLOWED 0x00000400
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#define GPUSTATUS_DITHER 0x00000200
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// Taken from PEOPS SOFTGPU
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unsigned long lUsedAddr[3];
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char CheckForEndlessLoop(unsigned long laddr)
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{
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if(laddr==lUsedAddr[1]) return 1;
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if(laddr==lUsedAddr[2]) return 1;
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if(laddr<lUsedAddr[0]) lUsedAddr[1]=laddr;
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else lUsedAddr[2]=laddr;
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lUsedAddr[0]=laddr;
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return 0;
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}
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long gpuDmaChain(unsigned long *baseAddrL, unsigned long addr)
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{
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unsigned long dmaMem;
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unsigned char *baseAddrB;
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short count;unsigned int DMACommandCounter = 0;
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int size;
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size = 0;
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lUsedAddr[0]=lUsedAddr[1]=lUsedAddr[2]=0xffffff;
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baseAddrB = (unsigned char*) baseAddrL;
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do
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{
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// Only Zinc = 1024
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//if(iGPUHeight==512) addr&=0x1FFFFC;
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addr&=0x1FFFFC;
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if(DMACommandCounter++ > 2000000) break;
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if(CheckForEndlessLoop(addr)) break;
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count = baseAddrB[addr+3];
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size += 4;
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size += count;
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dmaMem=addr+4;
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//if(count>0) GPUwriteDataMem(&baseAddrL[dmaMem>>2],count);
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addr = baseAddrL[addr>>2]&0xffffff;
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}
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while (addr != 0xffffff);
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return size;
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}
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int gpuReadStatus()
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{
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int hard;
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// GPU plugin
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hard = GPU_readStatus();
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// ePSXe 1.7.0 - Chrono Cross interlace hack
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if (hard & 0x400000) {
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switch (Config.PsxType) {
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case PSX_TYPE_NTSC:
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if (hSyncCount > 262 - 240) hard ^= 0x80000000;
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break;
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case PSX_TYPE_PAL:
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if (hSyncCount > 312 - 256) hard ^= 0x80000000;
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break;
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}
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}
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// NOTE:
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// Backup option when plugins fail to simulate 'busy gpu'
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// TODO:
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// Check this with
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// - Hot wheels turbo racing
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// - Dukes of Hazzard
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#if 1
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if( HW_DMA2_CHCR & 0x01000000 )
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{
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hard &= ~GPUSTATUS_IDLE;
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hard &= ~GPUSTATUS_READYFORCOMMANDS;
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}
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#endif
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// Gameshark Lite - wants to see VRAM busy
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// - Must enable GPU 'Fake Busy States' hack
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if( (hard & GPUSTATUS_IDLE) == 0 )
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hard &= ~GPUSTATUS_READYFORVRAM;
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return hard;
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}
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void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
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u32 *ptr;
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u32 size;
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switch(chcr) {
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case 0x01000200: // vram2mem
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#ifdef PSXDMA_LOG
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PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
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#endif
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ptr = (u32 *)PSXM(madr);
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if (ptr == NULL) {
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#ifdef CPU_LOG
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CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
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#endif
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break;
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}
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size = (bcr >> 16) * (bcr & 0xffff);
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GPU_readDataMem(ptr, size);
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psxCpu->Clear(madr, size);
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GPUDMA_INT( size / 4 );
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return;
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case 0x01000201: // mem2vram
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#ifdef PSXDMA_LOG
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PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
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#endif
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ptr = (u32 *)PSXM(madr);
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if (ptr == NULL) {
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#ifdef CPU_LOG
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CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
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#endif
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break;
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}
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size = (bcr >> 16) * (bcr & 0xffff);
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GPU_writeDataMem(ptr, size);
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GPUDMA_INT( size / 4 );
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return;
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case 0x01000401: // dma chain
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#ifdef PSXDMA_LOG
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PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
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#endif
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GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
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// FIXME!! GPU DMA chain walking
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GPUDMA_INT( 0x4000 / 4 );
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return;
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#ifdef PSXDMA_LOG
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default:
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PSXDMA_LOG("*** DMA 2 - GPU unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
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break;
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#endif
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}
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HW_DMA2_CHCR &= SWAP32(~0x01000000);
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DMA_INTERRUPT(2);
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}
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void gpuInterrupt() {
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HW_DMA2_CHCR &= SWAP32(~0x01000000);
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DMA_INTERRUPT(2);
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}
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@ -0,0 +1 @@
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int gpuReadStatus();
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@ -75,7 +75,7 @@ static const s32 VerboseLevel = 0;
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static Rcnt rcnts[ CounterQuantity ];
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static u32 hSyncCount = 0;
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u32 hSyncCount = 0;
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static u32 spuSyncCount = 0;
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u32 psxNextCounter = 0, psxNextsCounter = 0;
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@ -80,72 +80,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
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DMA_INTERRUPT(4);
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}
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void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
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u32 *ptr;
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u32 size;
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switch(chcr) {
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case 0x01000200: // vram2mem
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#ifdef PSXDMA_LOG
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PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
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#endif
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ptr = (u32 *)PSXM(madr);
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if (ptr == NULL) {
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#ifdef CPU_LOG
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CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
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#endif
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break;
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}
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size = (bcr >> 16) * (bcr & 0xffff);
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GPU_readDataMem(ptr, size);
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psxCpu->Clear(madr, size);
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GPUDMA_INT(size / 4);
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return;
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case 0x01000201: // mem2vram
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#ifdef PSXDMA_LOG
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PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %x addr = %x size = %x\n", chcr, madr, bcr);
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#endif
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ptr = (u32 *)PSXM(madr);
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if (ptr == NULL) {
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#ifdef CPU_LOG
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CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
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#endif
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break;
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}
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size = (bcr >> 16) * (bcr & 0xffff);
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GPU_writeDataMem(ptr, size);
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GPUDMA_INT(size / 4);
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return;
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case 0x01000401: // dma chain
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#ifdef PSXDMA_LOG
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PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %x addr = %x size = %x\n", chcr, madr, bcr);
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#endif
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GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
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// FIXME!!! Walk through DMA chain and add the cycles
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GPUDMA_INT( 0x4000 / 4 );
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return;
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#ifdef PSXDMA_LOG
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default:
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PSXDMA_LOG("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
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break;
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#endif
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}
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HW_DMA2_CHCR &= SWAP32(~0x01000000);
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DMA_INTERRUPT(2);
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}
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void gpuInterrupt() {
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HW_DMA2_CHCR &= SWAP32(~0x01000000);
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DMA_INTERRUPT(2);
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}
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void psxDma6(u32 madr, u32 bcr, u32 chcr) {
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u32 *mem = (u32 *)PSXM(madr);
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@ -169,7 +104,7 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) {
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}
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mem++; *mem = 0xffffff;
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RAMDMA_INT( size / BIAS);
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RAMDMA_INT( size );
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return;
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}
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#ifdef PSXDMA_LOG
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@ -24,6 +24,7 @@
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#include "psxhw.h"
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#include "mdec.h"
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#include "cdrom.h"
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#include "gpu.h"
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void psxHwReset() {
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if (Config.Sio) psxHu32ref(0x1070) |= SWAP32(0x80);
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@ -235,7 +236,7 @@ u32 psxHwRead32(u32 add) {
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#endif
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return hard;
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case 0x1f801814:
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hard = GPU_readStatus();
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hard = gpuReadStatus();
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#ifdef PSXHW_LOG
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PSXHW_LOG("GPU STATUS 32bit read %x\n", hard);
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#endif
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